Sony CM-H777RC free download

File name CM-H777.PDF

CM-H777RC/H888RC AMPS MICROPHONE RECEIVER CM-H777RC/H888RC 5-1. FRAME SCHEMATIC DIAGRAM <3 +B GND FRONT ASSY BATTERY 2> >2 >1 J2 1> >2 >1 TEMP DET <2 <1 J201 >5 >1 >3 >4 >2 >6 >7 >8 >9 >10 >11 >12 >13 >14 J1 J3 +B GND EP (­) EP (+) CHG-C EXT +B VBC EXT +B VPP RX DATA EXT PS SW EXT A. M TX DATA ID VDD GND RECEIVE AUDIO GND TRANSMIT AUDIO >19 >22 >20 MIC201 MIC201 MIC GND SECTION 5 DIAGRAMS ­ 18 ­ LOGIC ANTENNA MATCHING NETWORK RADIO I/F MAIN +B +B +B GND SCAN3 SCAN2 SCAN1 SCAN0 RIN5 RIN4 RIN3 RIN2 RIN1 RIN0 GND MIC CHARGE-DET R-LED BL-C LCD-CE VDDB RESET PS SW LCD-CLK LCD-SID VDD GND CHARGE-IN CHARGE-IN CHARGE-IN 1> 2> 3> 4> 5> 6> 7> 8> 9> 10> 11> 12> 13> 14> 15> 16> 17> 18> 19> 20> 21> 22> 23> 24> 25> 26> 27> 28> 29> 30> >1 >2 >3 >4 >5 >6 >7 >8 >9 >10 >11 >12 >13 >14 >15 >16 >17 >18 >19 >20 >21 >22 >23 >24 >25 >26 >27 >28 >29 >30 +B +B +B GND SCAN3 SCAN2 SCAN1 SCAN0 RIN5 RIN4 RIN3 RIN2 RIN1 RIN0 GND MIC CHARGE-DET R-LED BL-C LCD-CE VDDB RESET PS SW LCD-CLK LCD-SID VDD GND CHARGE-IN CHARGE-IN CHARGE-IN ANTENNA · IC Block Diagrams ­ RAGIC Board ­ U2 AT29LV010A-15TC1 OE, CE & WE LOGIC DATA BUS A11 A9 A8 A13 A14 NC WE VCC NC A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 DATA LATCH INPUT/OUTPUT BUFFERS ADDRESS BUS Y DECODER X DECODER Y-GATING OPTIONAL BOOT BLOCK (8K BYTES) MAIN MEMORY (112K BYTES) OPTIONAL BOOT BLOCK (8K BYTES) U3 MB3805APFV-G-BND GND4 GND6 GND3 GND5 OUTB OUTA VCC4 VO1 CLK IN1 IN2 IN3 36 FB 37 BP 38 IN 39 SB 40 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 SPEAKER AMP BLOCK SOUNDER BLOCK VO2 VO3 VO0 VCC5 20 NC CT4 41 POR OUT 42 DETECTOR & REVERSION BLOCK OF POWER SUPPLY 19 18 17 16 15 POWER ON RESET BLOCK VCC3 TOUT CT3 CT2 CLR CT1 ON1 ON2 OFF VCC2 43 44 45 46 47 ON/OFF SWITCH BLOCK REFERENCE VOLTAGE CIRCUIT 14 GND2 13 GND1 POWER SUPPLY SWITCH REG 1 NC 48 1 OUT1 REG 4 REG 2 REG 3 2 NC 3 OUT4 4 VCC1 5 6 7 OUT2 NC CTL2 8 9 10 OUT3 NC CTL3 11 OUT5 12 VREF ­ 19 ­ U5 AK2334 EXP3 DTMFOUT SPCNT CRON TXE SDATA SCLK STROBE RSTB AGNDIN RAGND TAGND RTONE DEM3 DEM1 DEM2 EXP1 EXP2 BIAS 80 1 ALCVDD ALCVSS RPLVSS RPLVDD TPLVSS TPLVDD RAVSS RAVDD TAVSS TAVDD DVSS DVDD ULALM RXPDP RXPDN RXCLK RXMC 41 47 30 25 32 38 79 75 61 65 23 24 33 29 28 27 26 2 71 70 69 72 17 44 43 15 16 14 13 4 3 5 74 VR8 73 DTMF GEN S7 + ­ AMP2 77 REC1 VREF/BIAS AGND ­ MSELI + AAF1 AMP1 COS+RDATA LPF VR7 REGISTER S5 S1 VR1 ADD S6 S15 VR2 S9 S20 RX BPF D/E EXPAND S19 + AMP3 ­ S17 + AMP4 ­ S18 78 EXTOUT 76 REC2 RSW SMF1 CMP1 19 RDATA 6 RDCAP RXSYNTH S14 SAT BFP1 SAT NPATH SAT BFP2 SMF2 CMP2 NC 31 TXPDN 36 TXCLK 35 TXPDP 37 TXMC 34 MODOUT 55 SMF3 S16 VR3 TDATA LPF SUM S2 TXSYNTH S3 VR5 S4 SPLAT S9 LIMITER VR9 TEST1 P/E VR4 S11 COMPRES COS+ TXBPF AAF2 MUX DATA REMAKE TSATLPF VR6 SATDATA REMAKE SATNPATH CLKDIV OSC 20 9 11 12 21 SATOUT CKSEL OSCOUT OSCIN CPUCK CLK