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P6 Family of Processors Hardware Developer's Manual September 1998 Order No: 244001-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Pentium® II processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800548-4725 or by visiting Intel's website at http://www.intel.com Copyright © Intel Corporation 1998. * Third-party brands and names are the property of their respective owners. ii P6 Family of Processors Hardware Developer's Manual Contents 1 Introduction ... 1-1 1.1 1.2 1.3 P6 FAMILY OF PROCESSORS OVERVIEW ...1-1 TERMINOLOGY ...1-2 SPECIFIC PRODUCT REFERENCES ...1-2 2 Micro-Architecture Overview ... 2-1 2.1 2.2 FULL CORE UTILIZATION...2-1 THE P6 FAMILY PROCESSOR PIPELINE ...2-2 2.2.1 The Fetch/Decode Unit ...2-3 2.2.2 The Dispatch/Execute Unit ...2-4 2.2.3 The Retire Unit ...2-6 2.2.4 The Bus Interface Unit ...