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Now downloading free:Mitac 8640  [report bad file]  

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File information:
File name:note_mitac8640.rar
[preview 8640] new window
Size:2048 kB
Extension:
MD5 Checksum:7779b55f03b2d1b45eb62c938b33d5bd
Mfg:Mitac
Model:8640
Original no||Chassis||Ordercode:
Description:Sevrice manual Notebook Mitac 8640
Group:Electronics > Computer equipment >
Uploaded:2004-06-16 03:02:48
User:MaVic
Multipart: 0  1  2

Information about the files in archive:
Decompress result:OK
Extracted files:33
File nameRead resultText
01.pdfA B MODEL : 8640 Contexts Title COVER SHEET & SCREW HOLE System Block Diagram Power Block Diagram P4-CPU (1/2) P4-CPU (2/2) SIS M650(1/3) SIS M650(2/3) SIS M650(3/3) TV/LVDS ENCODER(SiS301LV/CH7019) nVidia MAP17/31(1/2) nVidia MAP17/31(1/2) LCD & CRT Interface Clock Generator/Buffer DDR SO-DIMM SIS962(1/3) SIS962(2/3) SIS962(3/3) IDE Interface Card Bus PHY Of LAN & MDC IEEE1394a/USB 2.0/Parallel Port Super I/O & Flash ROM MiNi-PCI & USB 2.0 Embeded Controller Invter Conn. and +1.8VS/+1.5VS/+2.5V_DDR/VDD_MEM2.5 Battery Conn. & +5VA/+1.2VS/+3VA Charger CPU Core +3V/+5V DC Jack & +12VS/+5VS/+3VS History 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Revision 02 Page TP26 TP8 TP18 TP24 TOUCHPAD_METAL8 TOUCHPAD_METAL8 TOUCHPAD_METAL8 TOUCHPAD_METAL8 4 5 6 1 1 1 1 7 8 9 MTG16 ID3.0/OD7.6 12 11 10 4 5 6 7 8 9 13 12 11 10 MTG11 ID4.5/OD7.5 4 5 6 7 8 9 MTG5 ID3.0/OD7.6 12 11 10 4 5 6 7 8 9 13 12 11 10 MTG1 ID4.5/OD7.5 3 2 1 3 2 1 3 2 1 E504 TOUCHPAD_METAL
02.pdfA B 8640 DT/Mobile Pentium 4 Willamette/Northwood C.P.U. Micro-FCPGA 478 pin ADM 1032 Thermal Recorder -HD[0..63] -HA3..31] Power Switch SSOP 16 692PBGA A[0..25] D[0..15] Control AV/RGB Control IC CARD Socket TPS2211 nVIDIA MAP 17 200 Pin DDR SO-DIMM Socket*2 S-VIDEO TV 2 SIS301LV AGP BUS 128-pin LQFP AGP HOST 2 DDR SO-DIMM MINI PCI SLOT Type III A PCI1410A PCMCIA CONTROLLER PQFP 144 Pannel LVDS SiS M650/645DX SDRAM DDR SDRAM PC2100 Memory Bus / 266MHz CRT Local Memory 702-Balls BGA Hyper Zip HyperZip Data Bus 266MHz 512MB/sec AD[0..31] Control Control AD[0..31] PCI BUS HUB[0..11] AD[0..31] Control Control 13 MuTIOL Media I/O ND3050-LA SMK Cardreader Connector External Microphone 8 DUAL USB USB 2.0 MINI IEEE1394 RJ45 LAN PHY 10/100 M ICS1893 MII LAN PCI HyperZip USB IEEE1394 PHY RTL8801 Internal Microphone Internal Speaker Ultra DMA 33/66/100 SiS 962 IDE Ultra DMA 33/66/100 Primary EIDE (HDD) AC Link AC'97 5 371-Balls BGA LPC Realtek
03.pdf5 4 3 2 1 POWER BLOCK DIAGRAM OF THE 8640A(mode1.2.3) D +1.8VS +5V_CD 5V DC to DC Convertor FAN5234 LDO SC1565-1.2V +1.2VS * OPTION(NO LINK) RTC REF_1.25V +1.2VS ICH3M DDR NV17-MAP 845M NV17-MAP M-P4 845M ICH3M ICH3M 4uA 2A ? 3.5A ? 40A 800mA 470mA D CPU_CORE_EN SUSB# +3V +3VS Shut Down MOSFET +5V Shut Down MOSFET +12V +12VS Shut Down MOSFET CPU_CORE +5VS +1.5VS CPU_CORE +1.8VS +1.8V_ICH 64mA PWR_ON VDDR_MEM2.5 +3V DDR NV17-MAP NV17-MAP ICH3M RTL8139CL IEEE1394 PCI4410 PCMCIA CARD ICH3M CLOCK NV17-MAP SIO LCD ICH3M MODEM PCMCIA CARD IDE ALC200 USBX2 H8 AUDIO AMP CD_ROM 4A ? ? 26mA 330mA 69mA 79mA 500mA 420mA 280mA ? 50mA 1.5A 14mA ? 500mA 900mA 40mA 4A 40mA 1A 1.5A C 3.3V&5V&12V ADAPTOR Selfdischarge SWITCH I_Limit Rsense Diode Protector D/VMAIN DC to DC Convertor MAX1632 +3VS +3V_ICH +5V +5VS learning C Discharge Battery Pack +5VA +5V_CD Adaptor / Battery Change Switch Vcc Core DC to DC Convertor Celeron & DT for LTC1709EG-9 Mobile for LTC3716 Diode Protector DDR
04.pdf5 4 3 2 1 CPU (1/2) D TP12 TP13 D 1 6 HA#[3..31] HA#[3..31] HA#3 K2 HA#4 K4 HA#5 L6 HA#6 K1 HA#7 L3 HA#8 M6 HA#9 L2 HA#10 M3 HA#11 M4 HA#12 N1 HA#13 M1 HA#14 N2 HA#15 N4 HA#16 N5 HA#17 T1 HA#18 R2 HA#19 P3 HA#20 P4 HA#21 R3 HA#22 T2 HA#23 U1 HA#24 P6 HA#25 U3 HA#26 T4 HA#27 V2 HA#28 R6 HA#29 W1 HA#30 T5 HA#31 U4 H_ADSTB#1 R5 H_ADSTB#0 L5 H_REQ#4 H3 H_REQ#3 J3 H_REQ#2 J4 H_REQ#1 K5 H_REQ#0 J1 AB1 Y1 W2 V3 U8B U8A A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#10 A#11 A#12 A#13 A#14 A#15 A#16 A#17 A#18 A#19 A#20 A#21 A#22 A#23 A#24 A#25 A#26 A#27 A#28 A#29 A#30 A#31 ADSTB#1 ADSTB#0 REQ#4 REQ#3 REQ#2 REQ#1 REQ#0 A#35 A#34 A#33 A#32 ADS# AP#0 AP#1 BINIT# BNR# DP#3 DP#2 DP#1 DP#0 TESTHI8 TESTHI9 TESTHI10 BR#0 BPRI# DBSY# DEFER# DRDY# HIT# HITM# IERR# INIT# LOCK# MCERR# RESET# RS#2 RS#1 RS#0 RSP# TRDY# G1 AC1 V5 AA3 G2 L25 K26 K25 J26 U6 W4 Y3 H6 D2 H5 E2 H2 F3 E3 TESTHI8 TESTHI9 TESTHI10 H_BR#0 H_BPRI# H_DBSY# H_DEFER# H_DRDY# H_HIT# H_HITM# 2 62 H_ADS# H_ADS# 6 HD#31 HD#30 HD#29 HD#28 HD#27 HD
05.pdf5 4 3 2 1 CPU (2/2) +VCC_CORE D D U8D N6 N3 N24 N21 P5 P2 P25 P22 R26 R4 R1 R23 T6 T3 T24 T21 U5 U2 U25 U22 V26 G21 H26 H4 H1 H23 J5 J2 J25 J22 K6 K3 K24 K21 L26 L4 L1 L23 M5 M2 M25 M22 E11 E9 E26 E7 E4 E1 E23 E19 F18 F16 F14 F12 F10 F8 F5 F2 F25 F22 G6 G3 G24 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A8 A10 A12 A14 A16 A18 A20 B7 B9 B11 B13 B15 B17 B19 C8 C10 C12 C14 C16 C18 C20 D7 D9 D11 D13 D15 D17 D19 E8 E10 E12 E14 E16 E18 E20 F9 F11 F13 F15 F17 F19 AA8 AA10 AA12 AA14 AA16 AA18 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AC8 AC10 AC12 AC14 AC16 AC18 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AF5 AF7 AF9 AF11 AF13 AF15 AF17 AF19 AF21 C VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
06.pdf1 2 3 4 5 6 7 8 SIS M651/645DX(1/3) A AGP_ST0 AGP_ST1 AGP_ST2 AGP_AD[0..31] AGP_ST0 10 AGP_ST1 10 AGP_ST2 10 AGP_AD[0..31] 10 AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31 AGP_SBA0 CPUAVSS CPUAVDD HPCOMP HNCOMP HNCVREF PHYAVSS PHYAVDD HVREF A AH25 AJ25 AH27 AJ27 U21 T21 P21 N21 J17 A7 F9 B7 M6 M5 M4 L3 L6 L4 K6 L2 K3 J3 K4 J2 J6 J4 J1 H6 F4 F1 G6 E3 F5 E2 E4 E1 D3 D4 C2 F7 C3 E6 B2 D5 D6 A3 D7 C5 A5 C6 D8 C7 U9A L27 CPUAVDD 1 2 +3VS 13 HCLK_SIS650 13 HCLK_SIS650# 4 4 4 4 4 4 4 H_RS#[0..2] H_LOCK# H_DEFER# H_TRDY# CPURST# CPUPWRGD H_BPRI# H_BR#0 1 HCLK_SIS650 AJ26 HCLK_SIS650# AH26 H_LOCK# H_DEFER# H_TRDY# CPURST# CPUPWRGD H_BPRI# H_BR#0 H_RS#2 H_RS#1 H_RS#0 4 4 4 4 4 4 H_REQ#[0..4] H_ADS# H_HITM# H_HIT# H_DRDY# H_DBSY# H_BNR# H_ADS# H_
07.pdf1 2 3 4 5 6 7 8 SIS M650/645DX(2/3) 14 DDR_MD[0..63] DDR_MD[0..63] U9B DDR_MD0 DDR_MD1 DDR_MD2 DDR_MD3 DDR_MD4 DDR_MD5 DDR_MD6 DDR_MD7 DDR_DQM0 DDR_DQS0 DDR_MD8 DDR_MD9 DDR_MD10 DDR_MD11 DDR_MD12 DDR_MD13 DDR_MD14 DDR_MD15 DDR_DQM1 DDR_DQS1 DDR_MD16 DDR_MD17 DDR_MD18 DDR_MD19 DDR_MD20 DDR_MD21 DDR_MD22 DDR_MD23 DDR_DQM2 DDR_DQS2 DDR_MD24 DDR_MD25 DDR_MD26 DDR_MD27 DDR_MD28 DDR_MD29 DDR_MD30 DDR_MD31 DDR_DQM3 DDR_DQS3 DDR_DQM0 DDR_DQM1 DDR_DQM2 DDR_DQM3 DDR_DQM4 DDR_DQM5 DDR_DQM6 DDR_DQM7 DDR_MD32 DDR_MD33 DDR_MD34 DDR_MD35 DDR_MD36 DDR_MD37 DDR_MD38 DDR_MD39 DDR_DQM4 DDR_DQS4 DDR_MD40 DDR_MD41 DDR_MD42 DDR_MD43 DDR_MD44 DDR_MD45 DDR_MD46 DDR_MD47 DDR_DQM5 DDR_DQS5 DDR_MD48 DDR_MD49 DDR_MD50 DDR_MD51 DDR_MD52 DDR_MD53 DDR_MD54 DDR_MD55 DDR_DQM6 DDR_DQS6 DDR_MD56 DDR_MD57 DDR_MD58 DDR_MD59 DDR_MD60 DDR_MD61 DDR_MD62 DDR_MD63 DDR_DQM7 DDR_DQS7 AJ23 AG22 AH21 AJ21 AD23 AE23 AF22 AF21 AD22 AH22 AD21 AG20 AE19 AF19 AE21 AD20 AD19 AH19 AF20 AH20 AF18 AG18 AH17 AD16 AD18 AD17 AF17 AJ17
08.pdf1 2 3 4 5 6 7 8 SIS M650/645DX(3/3) A +VCC_CORE +1.8VS A 1 1 1 1 1 1 1 1 C712 0.1U 0603 50V C713 0.1U 0603 50V C690 0.1U 0603 50V C702 0.1U 0603 50V C593 0.1U 0603 50V C738 10U 1206 10V C720 1U 0603 C709 1U 0603 1 C762 0.1U 0603 50V 2 2 2 2 2 2 2 2 +VCC_CORE +1.8VS +3VS +3V +1.8V +3V +VCC_CORE +1.8V 1 1 1 1 1 H21 H22 J16 J20 J21 J22 K16 K17 K18 K19 K20 K21 L20 M20 N20 P20 R20 R21 T20 U20 V20 W 20 Y20 Y21 AA20 AA21 AA22 AB21 AB22 L12 L14 L15 L16 L18 M11 M19 N11 P19 R11 T19 U11 V19 W 11 W 13 W 15 W 17 W 10 Y11 Y13 Y15 Y17 +VCC_CORE U9D A16 A17 A18 B16 B17 B18 C16 C17 C18 D15 D16 D17 D18 E15 E16 E17 E18 F15 F16 F17 F18 AB5 AD5 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE22 V10 V11 W18 Y9 Y10 Y12 Y14 Y16 Y18 Y19 AA8 AA9 AA10 AA13 AA14 AA15 AA16 AA17 AB8 AB9 AB13 AB17 E5 E7 E9 G5 J5 L5 H8 H9 J8 J9 J10 J13 K9 K11 K13 L10 N9 N10 N5 R5 U5 W5 P9 P10 R9 R10 T9 T10 T11 VTT_0 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VT
09.pdf5 4 3 2 1 SiS302LV/CH7019 +DVDD 13 14.318MHZ_TV R573 1 10K/NA 2 0603 R601 1 10K/NA 2 0603 R598 1 10K/NA 2 0603 R597 1 10K/NA 2 0603 R570 1 10K/NA 2 0603 D CLOSE TO CH7017 R607 14.318MHZ_TV R572 1 357K/NA2 0603 R600 1 357K/NA2 0603 1 R599 1 357K/NA2 0603 R608 1 357K/NA2 0603 R571 1 357K/NA2 0603 AS VB_GPIO2 VB_GPIO3 VB_GPIO4 VB_GPIO5 PCIRST# R575 2 0/NA 2 0 0603 R566 1 2 2 1 0 0603 1 2 X501 2 1 MOD_XOUT Spread Range Selection FS0 SR0 Spreading Range 1 0 +/- 1.50% 1 1 +/- 2.50% 0 0 +/- 1.25% 0 1 +/- 2.00% 1 Input Frequency Modulation Rate 10 MHz to 20 MHz 10 MHz to 20 MHz 20 MHz to 35 MHz 20 MHz to 35 MHz (Fin/10)*20.83 KHz (Fin/10)*20.83 KHz (Fin/10)*20.83 KHz (Fin/10)*20.83 KHz D 14.318MHZ/NA C575 22P/NA 0603 5% C585 22P/NA 0603 5% R596 1 0/NA 1 2 3 4 R574 1M/NA 0603 2 0603 MOD_XOUT +DVDD 2 U505 XIN XOUT FS0 VSS P2010/NA SO8 +DAC_VDD 2 0 0603 R47 1 1 0 R50 75/NA 0603 2 2 0603 1 2 3 4 75*4 1206 RP3 8 7 6 5 VDD SR0 MODOUT SSON 8 7 6 5 FS0 and SR0 HAVE INTERNAL PULL_UP 100
10.pdf5 4 3 2 1 nVIDIA MAP17(1/2) D VDD_MEM2.5 Place under the GPU 6 AGP_AD[0..31] AGP_AD[0..31] U6A AGP_AD0 AD30 AGP_AD1 AE30 AGP_AD2 AD29 AGP_AD3 AE29 AGP_AD4 AD28 AGP_AD5 AG30 AGP_AD6 AF28 AGP_AD7 AG29 AGP_AD8 AH30 AGP_AD9 AC28 AGP_AD10 AH29 AGP_AD11 AE28 AGP_AD12 AJ30 AGP_AD13 AG28 AGP_AD14 AK30 AGP_AD15 AG27 AGP_AD16 AH23 AGP_AD17 AJ24 AGP_AD18 AH22 AGP_AD19 AK24 AGP_AD20 AH21 AGP_AD21 AJ22 AGP_AD22 AH20 AGP_AD23 AK22 AGP_AD24 AG21 AGP_AD25 AJ19 AGP_AD26 AG18 AGP_AD27 AK19 AGP_AD28 AG19 AGP_AD29 AJ18 AGP_AD30 AF19 AGP_AD31 AK18 6 AGP_CBE#[0..3] AGP_CBE#[0..3] AGP_CBE#0 AGP_CBE#1 AGP_CBE#2 AGP_CBE#3 66M_AGP PCIRST# AH28 AJ27 AK25 AF21 AJ12 AH11 PCIAD0 PCIAD1 PCIAD2 PCIAD3 PCIAD4 PCIAD5 PCIAD6 PCIAD7 PCIAD8 PCIAD9 PCIAD10 PCIAD11 PCIAD12 PCIAD13 PCIAD14 PCIAD15 PCIAD16 PCIAD17 PCIAD18 PCIAD19 PCIAD20 PCIAD21 PCIAD22 PCIAD23 PCIAD24 PCIAD25 PCIAD26 PCIAD27 PCIAD28 PCIAD29 PCIAD30 PCIAD31 PCICBE#0 PCICBE#1 PCICBE#2 PCICBE#3 PCICLK PCIRST# PCIGNT# PCIREQ# VDDAGP VDDAGP VDDAGP VDDAGP V
11.pdf5 4 3 GPIO0:General purpose I/O GPIO1:General purpose I/O GPIO2:Provid backlight enable. GPIO3:Provid panel power enable. GPIO4:Panel power good signal to GPU. GPIO5:Provid spread spectrum support. GPIO6:Provid hardware suspend signal for mobile system.Active low. GPIO7:Dynamic core voltage power control. ( 0:VDD=1.1V, 1:VDD=1.5V) 2 1 +5VS U6E R41 9,25 ENPBLT 9,12 ENAVDD ENPBLT ENAVDD 1 2 0 0603 TP2 GPIO5 SUS_STAT# R54 A3V 1 2 0 0603 TP6 L16 1 2 120Z/100M 1608 1 GPIO0 TP3 1 C6 A6 A7 A8 GPIOD0 GPIOD1 GPIOD2 GPIOD3 GPIOD4 GPIOD5 GPIOD6 GPIOD7 I2C2SDA I2C2SCL TXD0# TXD0 TXD1# TXD1 TXD2# TXD2 IFP0IOAVDD IFP0IOBVDD IFP0VREF IFP0RSET TXD3# TXD3 TXC0 TXC0# TXD4# TXD4 TXD5# TXD5 L21 1 1 2 120Z/100M 1608 1 1 1 IFP0PLLVDD V1 IFP0PLLVDD TXD6# TXD6 TXD7# TXD7 TXC1 TXC1# IFP0PLLGND TXD8# TXD8 M1 1 L2 R78 10K 0603 IFP1IOVDD IFP1VREF IFP1RSET TXC2 TXC2# TXD9# TXD9 TXD10# TXD10 M3 N3 M4 M5 N4 N5 L3 K3 AJ6 AK6 P4 P5 R4 R5 P3 R3 P1 P2 K2 K1 U4 U5 T3 U3 V4 V5 W4 W5 T5 T4 TX2CLK+ TX2CLKTXCLK+ TXCLKTX
12.pdf5 4 3 +3VS 1 2 2 1 2 D504 D1 GND_TV BAV99/NA 3 BAV99/NA 3 1 D2 GND_TV BAV99/NA 3 L7 120Z/100M 1608 1 2 C17 33P 1 0603 50V 2 2 1 LCD & CRT INTERFACE GND_TV S-VIDEO R0A-->R01 +5VA J3 1 2 3 4 5 6 7 GND1 GND2 GND3 MINI-DIN/7P C10828-107XX 1 2 3 4 5 6 7 GND1 GND2 GND3 TV_COMP TV_COMP 9,11 1 2 74VHC164 D U511 24 LED_DATA LED_DATA 1 2 A B QA QB QC QD QE QF QG QH VCC 3 4 5 6 10 11 12 13 14 1 C664 0.1U 0603 50V R902 R903 R904 R905 R906 R907 R908 R909 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 2 2 2 2 2 2 2 2 0603 0603 0603 0603 0603 0603 0603 0603 SCROLL# NUM# CAP# MPM_LED# AC_POWER# BATT_POWER# BATT_R# BATT_G# SCROLL# 24 NUM# 24 CAP# 24 MPM_LED# 24 AC_POWER# 25 BATT_R# 25 BATT_G# 25 C513 33P 0603 50V L510 120Z/100M 1608 1 2 1 L8 C15 C5 270P 0603 10% 1 2 120Z/100M 1608 33P 0603 50V 1 2 1 1 C519 100P 0603 10% 1 4 3 2 1 D TV_CRMA TV_LUMA TV_CRMA 9,11 TV_LUMA 9,11 C22 100P 0603 10% C20 100P 0603 10% RP505 75*4 1206 24 LED_CLK 24 H8_RESET# LED_CLK H8_RESET# 8 9 7 CLK CLR GND 1 1 74VHC164
13.pdf1 2 3 4 5 6 7 8 CLOCK GEN/BUFFER +3VS +3VS U510 +3VS A L523 1 1 2 1 120Z/100M 1608 2 VDDREF C632 0.1U 0603 50V 16 STP_PCI# 16,28 CPU_STP# L525 1 2 1 120Z/100M 1608 2 VDDZ C655 0.1U 0603 50V STP_PCI# CPU_STP# K 1 R657 10K 0603 2 D506 A RLS4148 K D505 A RLS4148 2 R675 10K 0603 VDDREF VDDZ VDDPCI VDDA48 VDDAGP VDDCPU VDDSD 1 11 13 19 28 29 42 48 12 45 5 8 18 24 25 32 41 46 VDDREF VDDZ VDDPCI0 VDDPCI1 VDDA48 VDDAGP VDDCPU VDDSD *PCI_STOP# CPU_STOP#* GNDREF GNDZ GNDPCI0 GNDPCI1 GND48 GNDAGP GNDCPU GNDSD A CPUCLKT_0 CPUCLKC_0 CPUCLKT_1 CPUCLKC_1 SDRAM AGPCLK0 AGPCLK1 ZCLK0 ZCLK1 **FS3/PCICLK_F0 **FS4/PCICLK_F1 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 40 39 44 43 47 31 30 9 10 14 15 16 17 20 21 22 23 2 3 4 27 26 35 34 FS3 FS4 R664 R671 R654 R658 R651 R686 R692 R661 R660 R678 R21 R689 1 1 1 1 1 1 1 1 1 1 1 1 2 33 2 33 2 33 2 33 2 22 2 22 2 22 2 22 2 22 2 33 2 33 2 33 HCLK_CPU HCLK_CPU# HCLK_SIS650 HCLK_SIS650# SDRAMCLK AGP_CLK 66M_AGP ZCLK0 ZCLK1 CLK_SBPCI CLK_LPC33 P
14.pdfA B C D E DDR SODIMM 7 7 7 7 7 7 4 +1.25V DDR_CS0# DDR_CS1# DDR_CS2# DDR_CS3# DDR_WE# DDR_BA0 DDR_MA7 DDR_MA5 DDR_MA4 DDR_MA6 DDR_MA12 DDR_MA9 DDR_MA8 DDR_MA11 DDR_CAS# DDR_RAS# DDR_BA1 DDR_MA10 DDR_MA0 DDR_MA3 DDR_MA1 DDR_MA2 DDR_CS0# DDR_CS1# DDR_CS2# DDR_CS3# DDR_WE# DDR_BA0 DDR_MA7 DDR_MA5 DDR_MA4 DDR_MA6 DDR_MA12 DDR_MA9 DDR_MA8 DDR_MA11 DDR_CAS# DDR_RAS# DDR_BA1 DDR_MA10 DDR_MA0 DDR_MA3 DDR_MA1 DDR_MA2 RP19 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 0*8 16 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 RPX8 CS0# CS1# CS2# CS3# WE# BA0 MA7 MA5 MA4 MA6 MA12 MA9 MA8 MA11 CAS# RAS# BA1 MA10 MA0 MA3 MA1 MA2 +2.5V_DDR +2.5V_DDR PLACE CLOSE TO J4 PLACE CLOSE TO J5 CS0# CS1# CS2# CS3# WE# BA0 VREF2 VSS17 DQ4 DQ5 VDD17 DM0 DQ6 VSS18 DQ7 DQ12 VDD18 DQ13 DM1 VSS19 DQ14 DQ15 VDD19 VDD20 VSS20 VSS21 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 10
15.pdf5 4 3 2 1 SIS962(1/3) 19,23 PCI_AD[0..31] D PCI BUS PULL UP RESISTERS +3VS +3VS RP514 PCI_AD[0..31] PCI_GNT4# 1 2 3 4 5 8.2K*8/NA RP520 PCI_LOCK# PCI_DEVSEL# PCI_STOP# PCI_FRAME# IDEAVDD IDEAVSS IDE_PIORDY IDE_PDDREQ IDE_IRQ14 1 IDE_PDIOR# IDE_PDIOW# IDE_PDDACK# IDE_PDA2 IDE_PDA1 IDE_PDA0 IDE_PDCS3# IDE_PDCS1# IDE_SIORDY IDE_SDDREQ IDE_IRQ15 1 IDE_SDIOR# IDE_SDIOW# IDE_SDDACK# IDE_SDA2 IDE_SDA1 IDE_SDCS3# IDE_SDCS1# IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_PDD[0..15] IDE_PDD[0..15] 18 22 22 22 22 SA16 SA17 SA18 SA19 IDE_PIORDY 18 IDE_PDDREQ 18 IDE_IRQ14 18 TP23 IDE_PDIOR# 18 IDE_PDIOW# 18 IDE_PDDACK# 18 IDE_PDA2 18 IDE_PDA1 18 IDE_PDA0 18 IDE_PDCS3# 18 IDE_PDCS1# 18 IDE_SIORDY 18 IDE_SDDREQ 18 IDE_IRQ15 18 TP22 IDE_SDIOR
16.pdf1 2 3 4 5 6 7 8 SIS962(2/3) U515B 4 4 4 4 4 4 4 4 4 H_INIT# H_A20M# H_SMI# H_INTR H_NMI H_IGNNE# H_FERR# H_STPCLK# SLP# H_INIT# H_A20M# H_SMI# H_INTR H_NMI H_IGNNE# H_FERR# H_STPCLK# SLP# T18 P16 R17 R16 Y20 U18 T17 W20 V19 Y19 V18 W19 R785 0 0603 2 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ# SERIRQ RTC_X1 R732 10M 0603D 2 RTC_X2 BATOK PWROK R826 100K 0603 +VCC_RTC 2 V5 T7 U6 W5 W4 U7 V6 C2 D2 D3 D1 C1 E4 SMBDATA SMBCLK AC97_SDIN MDC_SDIN AC97_SDOUT AC97_RST# B2 A1 A2 D5 W2 T5 D6 Y1 W3 G5 V3 A14 B14 D14 A3 A15 B1 K D508 E5 E13 D507 CPUPERF# 1 TP17 1 TP513 GATEM# A K A16 RB551-30 D13 INIT# A20M# SMI# INTR NMI IGNNE# FERR# STPCLK# CPUSLP# APICCK APICD0 APTCD1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# SIRQ OSC32KHI OSC32KHO BATOK PWROK RTCVDD MIICOL RTCVSS MIICRS 13,14 SMBDATA 13,14 SMBCLK GPIO20 GPIO19 AC_SDIN0 AC_SDIN1 AC_SDOUT AC_SYNC AC_RESET# AC_BIT_CLK GPIO0 R132 1 2 0 0603D 13 REFCLK1 REFCLK1 ENTEST SB_SPKR SIS_PWRBTN# PME# PSON# AUXOK ACPILED DPRSLPVR AGP_STOP# 1 TP19 4 CP
17.pdf1 2 3 4 5 6 7 8 SIS962(3/3) +3VS 1 1 1 1 CLOSE TO 962 2 R715 21 A C172 1U 0603 C166 1U 0603 C176 0.1U 0603 50V C175 0.1U 0603 50V 1 C173 0.1U 0603 50V 2 2 2 USBP0+ USBP0+ 1 0 2 0603D R720 USBP0_P +3V A 1 1 21 USBP0- USBP0- 1 0 2 1 1 0603D USBP0_N C152 2 2 C728 22P/NA 0603 5% C721 22P/NA 0603 5% 13 USBCLK_SB USBCLK_SB USBP0_P USBP0_N USBP2_P USBP2_N USBP4_P USBP4_N USBP1_P USBP1_N USBP3_P USBP3_N USBP5_P USBP5_N 21 USB_OC#0 1 C772 22P/NA 0603 5% 1 C769 22P/NA 0603 5% 23 USB_OC#4 21 USB_OC#1 23 USB_OC#3 USB_OC#0 USB_OC#2 USB_OC#4 USB_OC#1 USB_OC#3 USB_OC#5 USBVDD V4 B18 C18 E14 D15 E16 E15 D18 D19 E18 F18 G18 G19 G20 J16 H17 G17 H16 G16 D16 F17 B17 E19 H10 H11 H12 H13 H8 H9 J10 J11 J12 J8 J9 K10 K11 K8 K9 L10 L11 L8 L9 M10 M11 M8 M9 N10 N11 N12 N13 N8 N9 J13 J19 K12 K13 L12 L13 L19 M12 M13 P19 USBP5_P 21 21 21 21 21 21 21 21 21 21 1394_CTL1 1394_D0 1394_D1 1394_D2 1394_D5 1394_D3 SCLK_1394 1394_D4 1394_D6 1394_D7 1394_CTL1 1394_D0 1394_D1 1394_D2 1394_D5 139
18.pdfA B IDE INTERFACE CHANGE TO 0 ohm 2 2 Terminating resistors should be place close to South Bridge J16 15 IDE_PDDREQ 15 IDE_PIORDY 15 IDE_IRQ14 15 IDE_PDDACK# 15 IDE_PDIOR# 15 IDE_PDIOW# 15 IDE_PDA0 15 IDE_PDA1 15 IDE_PDA2 15 IDE_PDCS3# 15 IDE_PDCS1# 15 IDE_PDD[0..15] IDE_PDD[0..15] RPX8 IDE_PDD4 IDE_PDD9 IDE_PDD10 IDE_PDD3 IDE_PDD5 IDE_PDD6 IDE_PDD8 IDE_PDD7 IDE_PDD15 IDE_PDD1 IDE_PDD13 IDE_PDD0 IDE_PDD14 IDE_PDD12 IDE_PDD2 IDE_PDD11 RP5271 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 RP5260*8 RPX8 16 0*8 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 PDD4 PDD9 PDD10 PDD3 PDD5 PDD6 PDD8 PDD7 1 PDD15 PDD1 PDD13 PDD0 PDD14 PDD12 PDD2 PDD11 1 1 IDE_PDDREQ IDE_PIORDY IDE_IRQ14 IDE_PDDACK# IDE_PDIOR# IDE_PDIOW# IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDCS3# IDE_PDCS1# R792 R791 R790 R795 R168 R796 RP9 1 1 1 1 1 1 1 2 3 4 R794 1 0603 0603 0603 0603 0603 0603 8 0*4 7 1206 6 5 0603 2 0 2 2 2 2 2 2 0 0 0 0 0 0 PDDREQ PIORDY IRQ14 PDDACK# PDIOR# PDIOW# PDA0 PDA1 PDA2 PDCS3# PDCS1# 7,9,10,15,19,22,23 PCIRST# +5VS 1 PC
19.pdf5 4 3 2 1 PCI1410A AD20 PCI_INTB# D PCMCIA CONTROLLER & CARDBUS SCOKET +3V +3VS 1 R185 0/NA 0603 2 R180 1 0 0603 +3VS R179 1 0/NA 0603 VCCA 2 CBVCC3 1 1 1 1 1 1 1 1 1 2 1 R184 0 0603 VCCEN#0 VCCEN#1 VPPEN0 VPPEN1 D REQ0#/GNT0# 7,9,10,15,18,22,23 PCIRST# 2 CBVCC3 SIGNAL CCD#1 CCD#2 CBLOCK# CSTOP# CDEVSEL# CTRDY# CVS1 CVS2 CRST# CSERR# CPERR# CINT# CIRDY# CREQ# CSTSCHG# CAUDIO PC CARD PULL UP +3V +3V CARD_VCC CARD_VCC CARD_VCC CARD_VCC +3V +3V CARD_VCC CARD_VCC CARD_VCC CARD_VCC CARD_VCC CARD_VCC CARD_VCC CARD_VCC VOLT 14 66 86 102 122 138 18 30 44 50 63 73 74 71 72 U12 1 C238 0.1U 0603 50V C239 0.1U 0603 50V C208 0.1U 0603 50V C210 0.1U 0603 50V C235 0.1U 0603 50V C232 0.1U 0603 50V C218 0.1U 0603 50V C236 0.1U 0603 50V C237 10U 1206 10V 2 2 2 2 2 2 2 2 PCI_VCC0 PCI_VCC1 PCI_VCC2 PCI_VCC3 CORE_VCC0 CORE_VCC1 CORE_VCC2 CORE_VCC3 CORE_VCC4 CORE_VCC5 VCCD0#/VCC5#/SDAT VCCD1#/VCC3#/SCLK VPPD0/VPP_PGM/SLAT VPPD1/VPP_VCC AUX_VCC 15,23 PCI_AD[0..31] PCI
20.pdf5 4 3 2 1 LAN AND MDC PJ7 PJRXPJ4 PJRX+ PJTXPJTX+ D RJ45 J4 1 2 3 4 5 6 7 8 GND1 GND2 1 1 1 1 1 1 1 2 3 4 5 6 7 8 GND1 GND2 8P/H11.6 ALLTOP C10025-108XX D CLOSE TO ICS1839 CHOKE_PLP3216S_BLM PLP3216S/NA 1 +3V_LAN C625 0.1U 0603 50V LAN_GND 1 1 2 1 JO511 JO509 JO507 JO506 JO510 JO508 2 2 2 2 2 2 PHY ADDRESS = 00001 2 R621 1 10K 0603 2 +3V_LAN GND_45 3 Layout Note: , EX: GND SHIELDING R626 56 0603 1% 2 2 4 L512 U508 16 LAN_MRXD0 16 LAN_MRXD1 16 LAN_MRXD2 16 LAN_MRXD3 16 LAN_MRXDV 16 LAN_MRXER 16 LAN_MRXC 16 16 16 16 LAN_MTXD0 LAN_MTXD1 LAN_MTXD2 LAN_MTXD3 LAN_MRXD0 LAN_MRXD1 LAN_MRXD2 LAN_MRXD3 LAN_MRXDV LAN_MRXER LAN_MRXC LAN_MTXD0 LAN_MTXD1 LAN_MTXD2 LAN_MTXD3 LAN_MTXE LAN_MTXC LAN_DCLK LAN_DATAIO LAN_COL LAN_CRS 31 30 29 28 32 35 34 39 40 41 42 R687 1 R690 1 R691 1 2 22 2 22 2 22 0603 0603 0603 38 37 27 26 43 44 22 +3V_LAN 1 1.5K 0603 R665 1 10K 0603 2 2 C649 1U 0603 1 C675 LAN_GND 27P 0603D 5% 3 2 4 1 X505 1 R698 2 46 47 RXD0 RXD1 RXD2 RXD3 RXDV RXER RXCLK TXD0 TXD1 TX
21.pdf5 4 3 2 1 IEEE1394a/USB 2.0/PARALLEL PORT 1 1 D R8 0 0603 2 2 R7 0 0603 1394VCC3 +3VS [(TPA1+)+(TPA+)] have to the same length with [(TPA1-) +(TPA-)] [(TPB1+)+(TPB+)] have to the sa length with [(TPB1-)+(TPB-)] me [(TPA1+/-)+(TPA+/-)],[(TPB1+/-)+(TPB+/-)] :Trace width 8mil,Space mil,Length < 5 Inch 8 CHOKE_PLP3216S_BLM PLP3216S/NA D 1 2 50 43 31 30 57 7 17 62 26 U509 17 1394_CTL0 17 1394_CTL1 17 17 17 17 17 17 17 17 1394_D0 1394_D1 1394_D2 1394_D3 1394_D4 1394_D5 1394_D6 1394_D7 1394_CTL0 1394_CTL1 1394_D0 1394_D1 1394_D2 1394_D3 1394_D4 1394_D5 1394_D6 1394_D7 PC0 PC1 PC2 17 LINKON 17 SCLK_1394 17 LREQ 17 LPS LINKON SCLK_1394 DIRECT LREQ LPS CPS PDISABLE BTEST 3 4 5 6 8 9 10 11 12 13 20 21 22 18 63 23 1 16 24 15 19 55 CTL0 CTL1 D0 D1 D2 D3 D4 D5 D6 D7 PC0 PC1 PC2 C/LKON SCLK ISO LREQ LPS CPS 51 Close to FW803 TPA1+ TPA1TPA2+ TPA2TPA3+ TPA3TPB1+ TPB1TPB2+ TPB2TPB3+ TPB3TPBIAS1 TPBIAS2 TPBIAS3 RESET TEST1 TEST2 36 35 41 40 47 46 34 33 39 38 45 44 37 42 48 61 1394GND 2
22.pdfA B 15,24 SD[0..7] SD[0..7] U513 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 13 14 15 17 18 19 20 21 1 O0 O1 O2 O3 O4 O5 O6 O7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 CE# OE# WE# 12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 30 22 24 31 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 ROMCS# MEMR# MEMW# SA[0..18] SA[0..18] 15,24 For Debug Only J20 COM1DCD# COM1DSR# COM1RXD COM1RTS# COM1TXD COM1CTS# COM1DTR# COM1RI# +3VS 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 STRAP OPTION XCNF2 X X 0 1 0 1 XCNF1 0 0 1 1 1 1 XCNF0 0 1 0 0 1 1 FUNCTIONALITY NO BIOS NORMAL MODE , XRDY DISABLE LATCH MODE ,XA12-19, XRDY ENABLE 2 2 SA18 +5VS Flash ROM VPP LATCH MODE , GPIO 10-17 , XRDY ENABLE LATCH MODE , XA12-19, XRDY DISABLE LATCH MODE , GPIO 10-17 ,XRDY DISABLE Close to EEPROM 1 32 C783 0.1U 0603 50V 16 VCC BASE ADDRESS SELECT R724 MOUNTED OPEN INDEX REGISTER DATA REGISTER 4EH 2EH 4FH 2FH 2 ROMCS# 24 MEMR# 15 FPC/FFC-12P/1MM/NA VSS 28
23.pdf5 4 3 2 1 MINI-PCI +3VS D 1 R60 10K 0603 24 WIRE_LED# WIRE_LED# 3 Q5 R1 2 WIRE_LED 1 +3VS DTC144TKA 1 C14 1U 0603 U3 3 4 GND VIN0 VIN1 VOUT0 VOUT1 1 5 17 USB_OC#3 USB_OC#3 1 2 2 F502 +5V 1 2 MINISMDC110/NA L5 USB3VCC5 1 1 R23 33K 0603 2 120Z/100M 2012 C10 10U 1206 10V D 1 1 C7 0.1U 0603 50V 2 2 15,19 PCI_AD[0..31] PCI_AD[0..31] 1 J503 R109 0 0603 2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 GND1 GND2 TIP RX+ RXPJ7 PJ8 LED1_GRNP LED1_GRNN CHSGND INTB# 3.3V[0] RESERVED0 GROUND0 CLK GROUND1 REQ# 3.3V[1] AD[31] AD[29] GROUND2 AD[27] AD[25] RESERVED1 C/BE[3]# AD[23] GROUND3 AD[21] AD[19] GROUND4 AD[17] C/BE[2]# IRDY# 3.3V[2] CLKRUN# SERR# GROUND5 PERR# C/BE[1]# AD[14] GROUND6 AD[12] AD[10] GROUND7 AD[8] AD[7] 3.3V[3] AD[5] RESERVED2 AD[3] 5V[0] AD[1] GROUND8 AC_SYNC AC_SDATA_IN AC_BIT_CLK AC_CODEC_ID1# MOD_AUDIO_MON AUDIO_GND0 SY
24.pdfA B +5VA BAV99 H8 Mode Select Table MD0 MD1 MODE 0 1 1 0 1 MODE1 MODE2 MODE3 Description Expended mode with On-Chip ROM disable Expended mode with On-Chip ROM enable Single-Chip mode I_LIMIT I_LIMIT 27 EASY START BUTTON CONNECTOR +5VA +5VS BAV99 2 3 1 D513 BAV99 2 3 1 D512 BAV99 2 3 1 D509 12 12 12 23 SCROLL# NUM# CAP# WIRE_LED# 18 KO0 KO1 1 KO0 3 PWRSW# 5 SCROLL# 7 NUM# 9 CAP# 11 WIRE_LED# 13 15 17 19 J14 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 KI1 KI2 KI3 KI4 IDE_LED# CD_LED# MPM_LED# KI2 KI3 18 18 2 3 1 D9 BAV99 2 3 1 D8 BAV99 IDE_LED# 18 CD_LED# 18 MPM_LED# 12 2 3 1 D510 BAV99 2 3 1 +5VA L537 1 2 120Z/100M 1608 H8_VDD5 +5VS +5VA +5V 3 D511 1 +1.8VS BAV70LT1 R798 10K 0603 2 1 2 Close to H8-3437S 1 1 1 C833 0.1U 0603 50V C799 0.1U 0603 50V C800 0.1U 0603 50V Close to H8-3437S 1 C815 0.1U 0603 50V 1 C816 0.1U 0603 50V 2 HDR/MA/1.27MM/H9.5 SPEED S10X-0102-20 2 2 2 1 D10 2 GND_H8 4 3 2 1 L538 1 2 JP_BEAD_DFS 0603D_DFS 9 59 37 4 70
25.pdf5 4 3 2 1 1 PL16 1 +1.25V 1 3.3UH PC82 + 330U 7343 4V PC76 0.1U 0805 25V +80-20% 1 2 2 1 0606'02 change PC73 0.1U 0805 25V +80-20% PC560 2 10U 1206 10V K 1 2 PR51 5.1 0603 2 1 Note : BKL_VMAIN is Power Trace PL11 2 120Z/100M 2012 +3VS 9,11 ENPBLT +5VS 1 PC57 1000P 0603 24 BLADJ D 2 1 PC60 10U 1206 10V PC77 0.1U 0805 25V +80-20% PU20 1 2 3 4 5 6 7 8 VCC1 PVDD1 VL1 PGND1 AGND1 SD VIN/2 AGND2 VCC2 PVDD2 VL2 PGND2 AGND4 VFB VCCQ AGND3 GND 16 15 14 13 12 11 10 9 17 PC62 0.1U 0805 25V +80-20%1 1 2 1 2 1 PD516 RLZ3.6B/NA MLL34B A +2.5V_DDR 12 AC_POWER# 12 BATT_LED# 12 BATT_G# 12 BATT_R# 1 2 3 4 FA502 8 7 6 5 Inverter PC79 0.1U 0603 50V C540 0.1U/NA 50V 0603 L514 120Z/100M 1608 1 2 L515 120Z/100M 2012 1 2 L511 120Z/100M 1608 1 2 2 1 C539 0.1U 0603 50V J13 1 2 3 4 5 6 7 8 9 10 11 12 GND1 GND2 C549 0.1U 0603 50V 1 2 3 4 5 6 7 8 9 10 11 12 2 2 2 D 2 1 2 120OHM/100MHZ 1 +5VAS PC56 0.01U 0603D 2 L516 120Z/100M 2012 1 2 1 1 2 1 PR41 200K 0603 1% PR42 1K 0603 1%
26.pdfA B C D E +5VAS DVMAIN DVMAIN 8 7 6 5 PU515 SI4835DY SO8 BATT_DEAD BATT_DEAD 24 8 7 6 5 +5VA D S G 3 2 1 D G S 1 1 PU516 SI4835DY SO8 PR556 750K 0603 1% 2 3 2 PR44 100K 0603 2 DBATT DBATT 3 2 1 DVMAIN 1 PU510A LMV393M SSOP8 4 + 4 8 PR567 1 2 1M 0603 4 4 2 PR565 100K 0603 1 D G S D S PQ518 2N7002 PL511 1 120Z/100M 2 2012 PL509 1 2 2012 120Z/100M PL510 1 120Z/100M 2 2012 1 1 PR45 100K 0603 1% 2 PC557 0.1U 0603 50V PR554 100K 0603 24 ADEN# ADEN# 2 2 1 PR563 ADINP 1 169K 0603 1% 2 2 3 PQ517 DTC144WK 1 PF1 TR/SFT-10A FUSE_2917 1 2 PR48 1 +5VAS 2 1M 0603 1% 24 3 4 J23 1 2 3 4 5 6 7 PR602 1 2 0 2 R/A-7P/2.5MM/NA SUYIN 250005MR07G100ZU 3 1 PR576 301K 0603 1% BAT_V BAT_V 1 2 1 PC577 0.1U 0603 50V 2 +5VA 1 PR46 4.7K 0603 1% 2 8 1 2 3 PR58 4.99K 0603 1% 1 PD10 24 1 1 PR57 20K 0603 1% 2 BAT_D BAV99/NA 2 2 3 1 PD9 1 1 PR603 0 1 PC591 0.01U 0603 2 PC592 1000P 0603 1 1 PR555 402K 0603 1% 2 1 2 5 6 + 4 7 PU510B LMV393M SSOP8 LI_OVP LI_OVP 27 24 BAT_T BAT_T 2
27.pdfA B C D E 4 4 ADINP ADINP_2 ADINP_1 24 I_LIMIT ADINP ADINP_2 ADINP_1 1 PR557 0 0603 PR566 10K/NA E 2 2 1 PC561 10U 1206 10V PR558 PR50 12.1k 0603 1% 2 10 1 1 1 2 2 A PC63 0.1U 0603 50V PR561 10 2 PD513 EC31QS03L K K PL507 120Z/100M 2012 2 2 1 1 A PD515 EC31QS03L PL508 120Z/100M 2012 B C 1 PQ519 MMBT3906L/NA PR601 0 0603 1 PR564 100K 0603 1% 2 PL9 120Z/100M 2012 1 2 PC563 1U 25V 0805 PC562 1U 25V 0805 1 2 1 1 2 PL10 120Z/100M 2012 1 2 1 PR562 33K/NA 0603 2 D 1 26 LI_OVP 1 2 PR600 0 0603 PR560 G S D S PQ521 2N7002/NA PR52 33 2 PC67 PC564 1 1 2 1 2 2 1 1U PC567 0.01U 1 24 CHARGING 1 47K 0603 2 1 1U 0603 2 PC69 0603 1 2 1 10U 2 10V PU512 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DCIN LD0 CLS REF CCS CCI CCV GND0 GND1 ICHG ACIN ACOK REFIN ICTL MAX1772 IINP CSSP CSSN BST DHI LX DL0V DL0 PGND CSIP CSIN BATT CELLS VCTL QSOP28 28 27 26 25 24 23 22 21 20 19 18 17 16 15 2 5 6 7 8 D G 4 PU19 SI4410DY SO8 2 3 PR53 1K 0603 1% BAW56 PD8 1 3 2 PC65 0.1
28.pdf5 4 3 2 1 1 PR20 0 0603 2 1 PC33 0.1U 0603 50V 1 PC35 4.7U 0805 +80-20% 2 2 +5V PL505 D 1 2 120Z/100M 2012 DVMAIN PL506 1 2 120Z/100M 2012 1 1 1 1 1 1 1 1 1 1 1 PC601 0.1U 0603 50V add for VRM9.0 D + PC38 100U 25V 20% 2 2 + PC37 100U 25V 20% PC603 0.01U 0603 2 2 PC604 0.01U 0603 PC605 0.1U 0603 50V PC50 0.1U 0603 50V PC602 0.1U 0603 50V 2 1 1 + PC40 15U 7343 4V + PC41 15U 7343 4V + PC42 15U 7343 4V + PC46 15U 7343 4V + PC47 15U 7343 4V 1 + PC48 15U 7343 4V 2 2 2 2 2 2 2 2 2 +5VA 1 PR8 1M 0603 PR24 1 PR29 1 3 PD510 PR7 1K 0603 2 10 2 10 2 PC544 1 1U 25V 2 0805 VR_PWRGD PU9 PC20 0.1U 1 2 D S S PQ509 PR533 2N7002 1 2.7K 2 PC22 PR534 2 delet for VRM9.0 PR5370 1 2 S 35 PC545 34 5 6 7 8 33 32 31 30 29 28 27 26 25 24 23 22 5 6 7 8 21 K D 20 1 19 4 1 PC36 0.1U 0603 50V 1 PR19 0 1 2 3 1 2 3 1 2 3 2 S S S G PU12 SI4362DY SO8 4 D G PU506 SI4362DY SO8 4 D G 0.7UH HK-RM136 30% 2 PC551 PR33 1 0.1U S 0 2 1 2 3 P6 5 6 7 8 5 6 7 8 S 1 2 3 4 PR548 add 0/NA for VRM
29.pdf5 4 3 2 1 SYSTEM POWER (5V 3V 12V) PL6 DVMAIN DVMAIN 120Z/100M 2012 1 1 PC525 22U 1812 25V 20% PC523 0.1U 0603 50V PR505 0 2 24,25 PWR_ON SHORT-SMT4 1 2 PC528 0.1U 0603 50V 1 2 10 0603 1 2 D2 1 PR524 2 2 D 2 D JS512 1 PU6 SI4800DY SO8 4 PC507 0.1U 50V 0603 1 1 PR504 1K 0603 2 PR517 1K 0603 2 +3V PL1 A4 1 2 120Z/100M 2012 PL3 K 1 1 1 PD3 EC10QS03L 1 PC12 4.7U 1206 16V A 2 120Z/100M 2012 1 2 PC10 0.1U 0603 50V A5 2 PC14 + 150U 7243 6.3V 2 PC13 + 150U 7243 6.3V PC9 0.1U 0603 50V 1 1 1 .015 2512 1% PR6 2 A2 1 PL2 2 5 6 7 8 G 1 2 3 D S PC511 470P/NA 0603 10% 1 2 1 1 2 PR516 1M 0603 PU5 2 4 PU502 1 1 2 3 +12V 1 PL503 120Z/100M 2 1 PC510 0.1U 50V 0603 2012 4 1 PC508 10U 1210 16V 5 6 7 S 2 3 CSH3 CSL3 FB3 12OUT VDD SYNC TIME/ON5 GND REF SKIP RESET FB5 CSL5 CSH5 RUN/ON3 DH3 LX3 BST3 DL3 SHDN V+ VL PGND DL5 BST5 LX5 DH5 SEQ 28 27 26 25 24 23 22 21 20 19 18 17 16 15 2 1 PC517 0.1U 50V 0603 1 BAW56 2 3 2 PD503 1 1 1 PC522 0.1U 0603 50V 2 PC521 0.1U 50V 0603 1 1 2 PR51
30.pdf5 4 3 2 1 PD501 2 3 D 1 BAV70LT1 PD502 2 3 1 BAV70LT1 ADINP JO513 1 2 JL2 OPEN-SMT4 JO514 2 OPEN-SMT4 PQ503 SI4835DY SO8 3 2 1 S 2 G PR2 470K 0603 1 2 470K 0603 3 2 1 S G PL502 120Z/100M 1 2 J1 2DC-S315-X03 1 3 2 4 5 6 JACK-3P DCP1 1 PF501 1 6.5A/32VDC 2 1 1 1 1 1 PC503 PC502 0.1U 0.1U 0603 0603 50V 50V 2 PL501 L1 1 2 L2 1 K 2012 4 8 7 6 5 1 1 PR4 .1 1 PC516 0.1U 0603 50V 2 JL3 PR5 .1 2 2 DCP3 PD5 A K DVMAIN DVMAIN EC31QS03L 1 1 1 PR514 10K 0805 2 PR513 10K 0805 1 PD4 A K 2 EC31QS03L PD6 A 8 7 6 5 K EC31QS03L 1 2 ADINP_1 SHORT-SMT4 1 2 ADINP_2 SHORT-SMT4 ALWAYS D 1 L3 D 4 PR1 D 1 D S S PQ501 2N7002 SOT23_FET PR503 24 LEARNING# C PC518 0.1U 0603 50V PC519 1000P 0603 2 1 LEARNING# 1 47K 0603 2 G PR501 100K 0603 PQ502 SI4835DY SO8 2 C D 2 PC501 0.1U 0603 50V PC1 1U 0805 25V PC2 0.1U 0603 50V 120Z/100M PC3 2012 0.1U 0603 PC6 50V 0.1U 50V PD1 RLZ24D A 2 2 2 2 2 2 PQ505 SI2303DS B +12VS PU3 SI4800DY SO8 8 7 6 5 D S G 3 2 1 8 7 6 5 D G S PU4 SI4800DY SO8 3
31.pdfA B History: REV. Layout 1.Changed FootPrint from 0603B to 0603D for easy layout.(all parts) 4/4/2002 2.Change DDR socket from stand to rev at location J5 for easy layout. 4/4/2002 3.Mirror 8P4C capacitors at location CP1,CP2,CP3,CP4,CP5,CP6 for easy layout. 4/4/2002 4.Mirror array bead at location FA1,FA2,FA3,FA4,FA5,FA6 for easy layout. 4/9/2002 5.Creat display ID for auto detect panel. 4/10/2002 6.Change CPURST# pullup from 51ohm/NA to 51ohm at location and must be terminated on the system board. 4/10/2002 7.Change R44 value from 200 ohm to NA. 4/11/2002 8.Change net name AGPVREF to AGP_VREF R28 that the signal don't have on-die termination 80.Connect the net of AGP_STOP# to SIS962 pin E5 through series diode at location D30.4/24/2002 81.Change the net of CPUPERF# through series diode at location D31 to SIS962 pin A16.4/24/2002 82.Add reserve resistor R544 to connect SUSC# and H8_SUSU for debug only. 4/24/2002 83.Change R359 value from 10K to NA .4/24/2002 84.Updata Hardware str
8640M.pdfA B MODEL : 8640 Contexts Title COVER SHEET & SCREW HOLE System Block Diagram Power Block Diagram P4-CPU (1/2) P4-CPU (2/2) SIS M650(1/3) SIS M650(2/3) SIS M650(3/3) TV/LVDS ENCODER(SiS301LV/CH7019) nVidia MAP17/31(1/2) nVidia MAP17/31(1/2) LCD & CRT Interface Clock Generator/Buffer DDR SO-DIMM SIS962(1/3) SIS962(2/3) SIS962(3/3) IDE Interface Card Bus PHY Of LAN & MDC IEEE1394a/USB 2.0/Parallel Port Super I/O & Flash ROM MiNi-PCI & USB 2.0 Embeded Controller Invter Conn. and +1.8VS/+1.5VS/+2.5V_DDR/VDD_MEM2.5 Battery Conn. & +5VA/+1.2VS/+3VA Charger CPU Core +3V/+5V DC Jack & +12VS/+5VS/+3VS History 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Revision 02 Page TP26 TP8 TP18 TP24 TOUCHPAD_METAL8 TOUCHPAD_METAL8 TOUCHPAD_METAL8 TOUCHPAD_METAL8 4 5 6 1 1 1 1 7 8 9 MTG16 ID3.0/OD7.6 12 11 10 4 5 6 7 8 9 13 12 11 10 MTG11 ID4.5/OD7.5 4 5 6 7 8 9 MTG5 ID3.0/OD7.6 12 11 10 4 5 6 7 8 9 13 12 11 10 MTG1 ID4.5/OD7.5 3 2 1 3 2 1 3 2 1 E504 TOUCHPAD_METAL
exp.pdf
exp1.pdf
spl.pdfPart Number 541667341007 541667343009 541667341022 541667340034 541667340002 441999900069 442673400004 441673400028 340673440009 340673440019 340673400021 221671640001 340673400013 342673400006 342673400005 221673412002 431673450001 431673430001 431673410001 431673420002 344673400001 413000020348 291000012028 331810006008 331810006014 Part Number 225668300002 340673430001 340673410001 340673450001 340673420005 340673400003 340673450002 340673440006 340673400002 340673400016 340673400008 344673400016 344673400025 344673400009 523499991012 523499999067 523467340006 Description Location(S) AK;04-EU,BOX,8640G/P AK;10-UK,BOX,8640D/M AK;19-UN,BOX,8640G/P AK;31-PR,BOX,8640L TONGFANG AK;EN,8640S,UTILITY ONLY BATT ASSY OPTION;LI,12-CELL,8640 BATT,ASSY;14.8V/6AH,MOLICEL,MSL, BATT,ASSY;LI-ION,12CELLS/6.0AH,M BEZEL ASSY; QUANTA,COMBO,8640M BEZEL ASSY;DVD-ROM,QSI,8640M BEZEL ASSY;DVD-ROM,QSI,8640S BOX;AK,8175 BRACKET ASSY;T/P,8640S BRACKET;L,LCD,14",8640S BRACKET;R,LCD,14",8640S CARTON;5 IN 1,8640

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