Philips TDA4568 free download

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INTEGRATED CIRCUITS DATA SHEET TDA4568 Luminance signal delay circuit Preliminary specification File under Integrated Circuits, IC02 May 1989 Philips Semiconductors Preliminary specification Luminance signal delay circuit GENERAL DESCRIPTION TDA4568 The TDA4568 is an integrated circuit that provides the luminance signal delay in colour television receivers. Features · A luminance signal path (Y) which substitutes the conventional Y-delay coil with an integrated Y-delay line · Switchable delay time from 550 ns to 820 ns in steps of 90 ns and additional fine adjustment of 37 ns · Two Y output signals; one of 180 ns less delay QUICK REFERENCE DATA PARAMETER Supply voltage (pin 10) Supply current (pin 10) Y-signal delay at pin 12 S1 open; R14-18 = 1.2 k; note 1 t17-12 t17-12 t17-12 t17-12 0.5 MHz Y 490 580 670 760 0 550 640 730 820 1 610 700 790 880 2 ns ns ns ns dB CONDITIONS VP IP SYMBOL - MIN. 10.8 TYP. 12 22 - MAX. 13.2 UNIT V mA V15-18 = 0 to 2.5 V V15-18 = 3.5 to 5.5 V V15-18 = 6.5 to 8.5 V V15-18 = 9.5 to 12 V Y-signal amplification Note 1. Delay time is proportional to resistor R14-18. R14-18 also influences the bandwidth; a value of 1.2 k results in a bandwidth of 5 MHz (typ.). PACKAGE OUTLINE 18-lead DIL; plastic (SOT102); SOT102-1; 1996 November 27. May 1989 2 Philips Semiconductors Preliminary specification Luminance signal delay circuit TDA4568 May 1989 3 Fig.1 Block diagram. Philips Semiconductors Preliminary specification Luminance signal delay circuit TDA4568 May 1989 4 Fig.2 Internal pin circuit diagram. Philips Semiconductors Preliminary specification Luminance signal delay circuit RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) PARAMETER Supply voltage range (pin 10) Voltage ranges to pin 18 (ground) at pin 15 at pin 17 Current range at pins 11 and 12 Total power dissipation (Tj = 150 °C; Tamb = 70 °C) Storage temperature range Operating ambient temperature range THERMAL RESISTANCE From junction to ambient (in free air) Note 1. Pins 13 and 14, DC potential not published. Rth j-a = Ptot Tstg Tamb - -25 0 1.1 +150 +70 V15-18 V17-18 I11, 12 0 0 VP 7 SYMBOL VP = V10-18 0 MIN. TDA4568 MAX. 13.2 UNIT V V V internally limited W °C °C 70 K/W May 1989 5 Philips Semiconductors Preliminary specification Luminance signal delay circuit CHARACTERISTICS VP = V10-18 = 12 V; Tamb = 25 °C; measured in application circuit Fig.3; unless otherwise specified PARAMETER Supply (pin 10) Supply voltage Supply current Y-signal path Y-input voltage (composite signal) (peak-to-peak value) Internal bias voltage Input current during picture content during sync. pulse Y-signal delay at pin 12 S1 open; R14 = 1.2 k; notes 1 and 2 t17-18 t17-18 t17-18 t17-18 S1 closed t17-12 t11-12 490 580 670 760 - 160 550 640 730 820 37 180 I17 -I17 - - 8 100 capacitive coupling during clamping V17(p-p) V17-18 - 2.1 0.45 2.4 VP IP 10.8 - 12 22 CONDITIONS SYMBOL MIN. TYP. TDA4568 MAX. UNIT 13.2 - V mA 0.6