Text preview for : compal_la-1511_r0b_schematics.pdf part of acer compal la-1511 r0b schematics acer Notebook Ноутбук Acer TravelMate 420 compal_la-1511_r0b_schematics.pdf



Back to : compal_la-1511_r0b_schema | Home

A B C D E F G H I J




1 1




2 2




3 3




4
LA-1511 REV1.0 Schematics Document 4




uFCBGA/uFCPGA Northwood with
Brookdale
chipset(845MP+ICH3-M)
5 5




6 6




BOM
7 7




8
Title
Compal Electronics, Inc. 8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D SCHEMATIC, M/B LA-1511
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
401224 0B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Custom
Date: , 21, 2002 Sheet 1 of 43
A B C D E F G H I J
A B C D E F G H I J


Compal confidential
File Name : LA-1511
1 1




Mobile Northwood Thermal Sensor Clock Generator
uFCBGA/uFCPGA CPU MAX6654MEE W320-04
page 4,5
CPU Bypass page 5 page 14
2 Fan Control & CPUVID HA#(3..31) HD#(0..63) 2
page 6 System Bus
page 6 400MHz

Memory
CRT Connector Brookdale-M BUS(DDR)
Docking page 15 MCH-M SO-DIMM X2
2.5V 266MHz BANK 0, 1, 2, 3 page 11,12
Conn.
page 34
AGP4X(1.5V)
845MP 625 BGA
3
VGA AGP Conn page 8,9 3

Board
page 15
LAN
LAN interface Kinnereth RJ45
page 20
page 20
HUB Link
1.8V 266MHz
Mini PCI USB interface
Bluetooth
4 Conn. 4
page 32
page 35

PCI BUS ICH3-M 3.3V 48MHz
USB conn X3
IDSEL:AD20 3.3V 33MHz page 32
(PIRQA#,GNT#2,REQ#2)
421 BGA 3.3V 24.576MHz AC-LINK

TI TSB43AB22 MDC
CardBus Controller 3.3V ATA100
page 32
5 5
page 16,17
1394 O2 6912
3.3V ATA100
page 26 page 24
LPC BUS
3.3V 33MHz

Slot 0 HDD AC97
DC/DC Interface Connector Codec
Suspend page 25
ALC202
6 page 19 page 22 6
page 36
14M_5V
EC Card Reader
W83L518D SMsC
Power Circuit 87591L 30 LPC47N227 Audio DJ AMP& Phone
DC/DC
page
page 27 O2 163 page 21 Jack
page 28 page 23
page
37,38,39,40,41,42,43 Touch Pad
page 29
7 LPT Port. CD-ROM 7
EC Ext. I/O MS SD/MMC page 29 Connector
page 31 CARD CARD
page 19
page 27 page 27 FDD
page 19
BIOS
page 31
FIR
page 29
Int.KBD Compal Electronics, Inc.
8 page 33 8
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1511
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
401224 0B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Custom
Date: , 21, 2002 Sheet 2 of 43
A B C D E F G H I J
10 9 8 7 6 5 4 3 2 1




Power Managment table

+12VS
H H
+5VS NB Chip Rev SB Chip Rev

+3VALW +3V +3VS
Signal +5VALW +5V +2.5VS
+1.8VALW +2.5V +1.8VS
+12VALW +1.5VS
+1.2VP
+CPU_CORE
State
+1.25VS
G G
+1.25VS_VGA

S0 ON ON ON


S1 ON ON ON


S3 ON ON OFF

F S5 S4/AC ON OFF OFF F



S5 S4/AC don't exist
OFF OFF OFF




E E




D D




C C




B B




A
Title
Compal Electronics, Inc. A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1511
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
401224 0B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Custom
Date: , 21, 2002 Sheet 3 of 43
10 9 8 7 6 5 4 3 2 1
A B C D E F G H I J




1 1




+CPU_CORE




AC10
AC12
AC14
AC16
AC18

AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18

AB11
AB13
AB15
AB17
AB19




AE10
AE12
AE14
AE16
AE18
AE20


AF11
AF13
AF15
AF17
AF19

AF21
AC8




AD7
AD9
AA8




AB7
AB9




AE6
AE8




AF2

AF5
AF7
AF9




C10
C12
C14
C16
C18
C20

D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20




B11
B13
B15
B17
B19




E10
2 2




C8




D7
D9
A8




B7
B9
HA#[3..31] U41A HD#[0..63]
<8> HA#[3..31] HD#[0..63] <8>




VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
HA#3 K2 B21 HD#0
HA#4 A#3 D#0 HD#1
K4 B22
HA#5 A#4 D#1 HD#2
L6 A23
HA#6 A#5 D#2 HD#3
K1 A25
HA#7 A#6 D#3 HD#4
L3 C21
HA#8 A#7 D#4 HD#5
M6 D22
HA#9 A#8 D#5 HD#6
L2 B24
HA#10 A#9 D#6 HD#7
M3 C23
HA#11 A#10 D#7 HD#8
M4 C24
HA#12 A#11 D#8 HD#9
N1 B25
HA#13 A#12 D#9 HD#10
M1 G22
3 HA#14 A#13 D#10 HD#11 3
N2 H21
HA#15 A#14 D#11 HD#12
N4 C26
HA#16 A#15 D#12 HD#13
N5 D23
HA#17 A#16 D#13 HD#14
T1 J21
HA#18 A#17 D#14 HD#15
R2 D25
HA#19 A#18 D#15 HD#16
P3 H22
HA#20 A#19 D#16 HD#17
P4 E24
HA#21 A#20 D#17 HD#18
R3 G23
HA#22 A#21 D#18 HD#19
T2 F23
HA#23 A#22 D#19 HD#20
U1 F24
HA#24 A#23 D#20 HD#21
P6 E25
HA#25 A#24 D#21 HD#22
U3 F26
HA#26 A#25 D#22 HD#23
T4 D26
HA#27 A#26 D#23 HD#24
V2 L21
HA#28 A#27 D#24 HD#25
R6 G26
HA#29 A#28 D#25 HD#26
W1 H24
4 HA#30
HA#31
T5
U4
V3
A#29
A#30
A#31
Mobile D#26
D#27
D#28
M21
L22
J24
HD#27
HD#28
HD#29
4

A#32 D#29 HD#30
W2 K23
A#33 D#30 HD#31
Y1 H25
A#34 D#31 HD#32
AB1 M23
<8> HREQ#[0..4]
HREQ#[0..4]

HREQ#0 J1
A#35
NorthWood D#32
D#33
D#34
N22
P21
M24
HD#33
HD#34
HD#35
HREQ#1 REQ#0 D#35 HD#36
K5 N23
HREQ#2 REQ#1 D#36 HD#37
J4 M26
HREQ#3 REQ#2 D#37 HD#38
J3 N26
HREQ#4 REQ#3 D#38 HD#39
H3 N25
REQ#4 D#39 HD#40
<8> HADS# G1 R21
ADS# D#40 HD#41
P24
D#41 HD#42
5 R25 5
D#42 HD#43
AC1 R24
+CPU_CORE AP#0 D#43 HD#44
V5 T26
R148 M@10K_0402 AP#1 D#44 HD#45
R148 not plant AA3
BINIT# D#45
T25
1 2 AC3 T22 HD#46
for DT CPU. IERR# D#46
T23 HD#47
D#47
1 2 R96 200_0402 U26 HD#48
D#48 HD#49
<8> HBR0# H6 U24
BR0# D#49 HD#50
<8> HBPRI# D2 U23
BPRI# D#50 HD#51
<8> HBNR# G2 V25
BNR# D#51 HD#52
<8> HLOCK# G4 U21
LOCK# D#52 HD#53