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SERVICE MANUAL MODEL : G5200 / W5200
GSM Phone SERVICE MANUAL
MODEL : G5200/W5200
P/N : MMBD0015801
JUNE, 2002
Table Of Contents
1. INTRODUCTION.......................................4
1.1 Purpose ..................................................4 1.2 Regulatory Information .......................... 4 A. Security ..............................................4 B. Incidence of Harm ..............................4 C. Changes in Service ............................4 D. Maintenance Limitations ....................4 E. Notice of Radiated Emissions .............5 F. Pictures ..............................................5 G. Interference and Attenuation .............5 H. Electrostatic Sensitive Devices ..........5 1.3 Abbreviations ......................................... 6 3.10 Display and Interfaces ........................28 3.11 Keypad Switches and Scanning ..........29 3.12 Microphone .........................................30 3.13 Earpiece ............................................. 31 3.14 Hands-free Interface .......................... 32 3.15 Headset Jack Interface .......................32 3.16 Key Back-light Illumination ..................32 3.17 LCD Back-light Illumination ................ 33 3.18 Multi-Color LED Illumination .............. 33 3.19 Speaker & MIDI IC ............................. 34
4. TROUBLE SHOOTING ..................... 35
4.1 RF Components ................................. 35 4.2 Tx Trouble .......................................... 44 4.3 Power on Trouble ............................... 60 4.4 Charging Trouble ............................... 62 4.5 LCD Trouble ....................................... 64 4.6 Receiver Trouble . ............................... 66 4.7 Speaker Trouble ................................. 69 4.8 Mic Trouble ..........................................72 4.9 Vibrator Trouble ................................. 75 4.10 Backlight Trouble ............................. 77 4.11 Folder on/off Trouble ........................ 79 4.12 SIM Detect Trouble .......................... 81 4.13 Earphone Trouble ............................ 83 4.14 HFK Trouble ..................................... 87
2. PERFORMANCE .....................................8
2.1 H/W Feature ...........................................8 2.2 Technical Specification .......................... 9
3. TECHNICAL BRIEF ............................ 13
3.1 General Descreption ............................ 13 3.2 Receiver ............................................... 13 A. RF front end .....................................14 B. Demodulator and baseband processing ...................... 14 C. DC Offset Compensation ................ 14 3.3 Transmitter Part ................................... 15 A. IF Modulator .................................... 15 B. OPLL ............................................... 16 C. Synthesizer ......................................16 D. TX APC Part ....................................17 E. Power Amplifier ................................17 3.4 13 MHz Clock ...................................... 18 3.5 Power Supplies and Control Signals ....18 3.6 Digital Main Processor ......................... 19 3.7 Analog Main Processor ........................ 24 3.8 Power Management ..............................26 3.9 Memories ..............................................28
5. ASSEMBLY INSTRUCTION ............ 95
5.1 Disassembly ....................................... 95
6. DOWNLOAD ....................................... 102
6.1 Download Setup ............................... 102 6.2 Download Procedure ........................ 103
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7. BLOCK DIAGRAM ............................. 106
7.1 Main Board ....................................... 106 7.2 FPCB ................................................ 107 7.3 RF .................................................... 107
12. AUTO CALIBRATION ................... 121
12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 Overview ....................................... 121 Requirements ............................... 121 Menu and settings ........................ 121 AGC .............................................. 123 APC .............................................. 123 ADC .............................................. 123 Setting .......................................... 123 How to do calibration .................... 123
8. CIRCUIT DIAGRAM ........................... 109
8.1 8.2 8.3 8.4 Baseband Interface .......................... 109 MIDI .................................................. 110 KYE, I/F & LCD CON ....................... 111 RF .................................................... 112 ..................................... 113
9. PCB LAYOUT
13. EXPLODED VIEW & REPLACEMENT PART LIST ...... 124
13.1 Exploded View .............................. 124 13.2 Accessories .................................. 126 13.3 Replacement Part List .................. 127
10. ENGINEERING MODE .................. 115
10.1 10.2 10.3 10.4 10.5 10.6 10.7 BB Test [MENU 1] ........................ 115 RF Test [MENU 2] ........................ 117 MF Mode [MENU 3] ...................... 118 Trace option [MENU 4] ................. 119 Call Timer [MENU 5] ..................... 119 Fact. Reset [MENU 6] ................... 119 S/W version [MENU 7] .................. 119
11. STAND ALONE TEST ................... 120
11.1 Introduction ................................... 120 11.2 Setting Method ............................. 120 11.3 Means of Test ............................... 120
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REVISED HISTORY
DATE APRIL/2002 ISSUE ISSUE 1 CONTENTS OF CHANGES Initial Release S/W VERSION
The information in this manual is subject to change without notice and should not be construed as a commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, without notice, to make changes to equipment design as advances in engineering and manufacturing methods warrant. This manual provides the information necessary to install, program, operate and maintain the G5200.
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1. INTRODUCTION
1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features of the G5200.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example, persons other than your company's employees, agents, subcontractors, or person working on your company's behalf) can result in substantial additional charges for your telecommunications services. System users are responsible for the security of own system. There are may be risks of toll fraud associated with your telecommunications system. System users are responsible for programming and configuring the equipment to prevent unauthorized use. LGE does not warrant that this product is immune from the above case but will prevent unauthorized use of common-carrier telecommunication service of facilities accessed through or connected to it. LGE will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing harm or interruption in service to the telephone network, it should disconnect telephone service until repair can be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these changes could reasonably be expected to affect the use of the G5200 or compatibility with the network, the telephone company is required to give advanced written notice to the user, allowing the user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on the G5200 must be performed only by the LGE or its authorized agent. The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system and may void any remaining warranty.
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1. INTRODUCTION
E. Notice of Radiated Emissions
The G5200 complies with rules regarding radiation and radio frequency emission as defined by local regulatory agencies. In accordance with these agencies, you may be required to provide information such as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
G. Interference and Attenuation
An G5200 may interfere with sensitive laboratory equipment, medical equipment, etc. Interference from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the Following information is ESD handling: sign.
Service personnel should ground themselves by using a wrist strap when exchange system boards. When repairs are made to a system board, they should spread the floor with anti-static mat which is also grounded. Use a suitable, grounded soldering iron. Keep sensitive parts in these protective packages until these are used. When returning system boards or parts like EEPROM to the factory, use the protective package as described.
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1. INTRODUCTION
1.3 Abbreviations
For the purposes of this manual, following abbreviations apply: APC BB BER CC-CV DAC DCS dBm DSP EEPROM EL ESD FPCB GMSK GPIB GPRS GSM IPUI IF LCD LDO LED G5200 LGE OPLL PAM PCB PGA PLL PSTN RF RLR RMS RTC SAW SIM SLR SRAM STMR TA Automatic Power Control Baseband Bit Error Ratio Constant Current Constant Voltage Digital to Analog Converter Digital Communication System dB relative to 1 milliwatt Digital Signal Processing Electrical Erasable Programmable Read-Only Memory Electroluminescence Electrostatic Discharge Flexible Printed Circuit Board Gaussian Minimum Shift Keying General Purpose Interface Bus General Packet Radio Service Global System for Mobile Communications International Portable User Identity Intermediate Frequency Liquid Crystal Display Low Drop Output Light Emitting Diodet LG GSM Phone LG Electronics Offset Phase Locked Loop Power Amplifier Module Printed Circuit Board Programmable Gain Amplifier Phase Locked Loopr Public Switched Telephone Network Radio Frequency Receiving Loudness Rating Root Mean Square Real Time Clock Surface Acoustic Wave Subscriber Identity Module Sending Loudness Rating Static Random Access Memory Side Tone Masking Rating Travel Adapter
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1. INTRODUCTION
TDD TDMA UART VCO VCTCXO WAP
Time Division Duplex Time Division Multiple Access Universal Asynchronous Receiver/Transmitter Voltage Controlled Oscillator Voltage Control Temperature Compensated Crystal Oscillator Wireless Application Protocol
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2. PERFORMANCE
2. PERFORMANCE
2.1 H/W Features
Item Li-ion, 750 mAh Standard Battery AVG TCVR Current Stand by Current Talk time Stand by time Charging time RX Sensitivity TX output power GPRS compatibility SIM card type Display Size: 41 73.9 5mm Weight: 22 g GSM , EGSM: 243 mA, DCS: 209 mA < 4 mA Up to 3 hours (GSM TX Level 7) Up to 200 hours (Paging Period: 9, RSSI: -85 dBm) 2 hours 30mins GSM, EGSM: -108 dBm, DCS: -107 dBm GSM, EGSM: 32 dBm (Level 5) DCS: 29.5 dBm (Level 0) Class 10 (This only applies to G5200) 3V Small 128 128 dots LCD(Main) , 96 64 dotsLCD(Sub) Soft icons Key Pad Status Indicator 0 ~ 9, #, *, Navigation Key, Up/Down Side Key Side Key, Confirm Key, Clear Key , Hot Key) Send Key, END/PWR Key ANT EAR Phone Jack PC Synchronization Speech coding Data and Fax Vibrator Receiver Roud Speaker Voice Recoding C-Mike Travel Adapter Options External Yes Yes EFR/FR/HR Yes Yes Yes Yes Yes Yes Yes Hands-free kit, CLA, Data Kit Feature Comment
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2. PERFORMANCE
2.2 Technical Specification
Item Description GSM TX: 890 + n RX: 935 + n 1 Frequency Band Specification 0.2 MHz 0.2 MHz (n = 1 ~ 124) 0.2 MHz 0.2 MHz (n = 975 ~ 1024) 0.2 MHz 0.2 MHz (n = 512 ~ 885)
EGSM TX: 890 + (n 1024) RX: 935 + (n 1024) DCS TX: 1710 + (n 512) Rx: 1805 + (n 512)
2 3
Phase Error Frequency Error
RMS < 5 degrees Peak < 20 degrees < 0.1 ppm GSM, EGSM Level 5 6 7 8 9 10 11 Power 33 dBm 31 dBm 29 dBm 27 dBm 25 dBm 23 dBm 21 dBm 19 dBm Toler. 2dB 3dB 3dB 3dB 3dB 3dB 3dB 3dB Level 13 14 15 16 17 18 19 Power 17 dBm 15 dBm 13 dBm 11 dBm 9 dBm 7 dBm 5 dBm Toler. 3dB 3dB 3dB 5dB 5dB 5dB 5dB
4
Power Level
12 DCS Level 0 1 2 3 4 5 6 7
Power 30 dBm 28 dBm 26 dBm 24 dBm 22 dBm 20 dBm 18 dBm 16 dBm
Toler. 2dB 3dB 3dB 3dB 3dB 3dB 3dB 3dB
Level 8 9 10 11 12 13 14 15
Power 14 dBm 12 dBm 10 dBm 8 dBm 6 dBm 4 dBm 2 dBm 0 dBm
Toler. 3dB 4dB 4dB 4dB 4dB 4dB 5dB 5dB
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2. PERFORMANCE
Item
Description GSM, EGSM
Specification
Offset from Carrier (kHz). 100 200 250 400 600 ~ 1,200 ~ 1,800 ~ 3,000 ~ 5 Output RF Spectrum (due to modulation) 1,200 1,800 3,000 6,000
Max. dBc +0.5 -30 -33 -60 -60 -60 -63 -65 -71
6,000 DCS Offset from Carrier (kHz). 100 200 250 400 600 ~ 1,200 ~ 1,800 ~ 3,000 ~ 1,200 1,800 3,000 6,000
Max. dBc +0.5 -30 -33 -60 -60 -60 -65 -65 -73
6,000 GSM, EGSM Offset from Carrier (kHz) 400 600 1,200 6 Output RF Spectrum (due to switching transient) 1,800 GSM Offset from Carrier (kHz) 400 600 1,200 1,800 7 Spurious Emissions Conduction, Emission Status
Max. (dBm) -19 -21 -21 -24
Max. (dBm) -22 -24 -24 -27
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2. PERFORMANCE
Item
Description
Specification GSM, EGSM BER (Class II) < 2.439% @-102 dBm DCS BER (Class II) < 2.439% @-100 dBm 3 dB 8 3 dB Max.(dB) -12 0 0 0 4 4 4 0 Min.(dB) -12 -6 -6 -6 -9 -
8
Bit Error Ratio
9 10
RX Level Report Accuracy SLR
Frequency (Hz) 100 200 300 11 Sending Response 1,000 2,000 3,000 3,400 4,000 12 RLR 2 3 dB
Frequency (Hz) 100 200 300 500 13 Receiving Response 1,000 3,000 3,400 4,000
Max.(dB) -12 0 2 * 0 2 2 2
Min.(dB) -7 -5 -5 -5 -10
* Mean that Adopt a straight line in between 300 Hz and 1,000 Hz to be Max. level in the range. 14 15 STMR Stability Margin 13 5 dB
> 6 dB dB to ARL (dB) -35 -30 -20 -10 0 7 10 Level Ratio (dB) 17.5 22.5 30.7 33.3 33.7 31.7 25.5
16
Distortion
17 18
Side Tone Distortion System frequency (13 MHz) tolerance
Three stage distortion < 10% 2.5 ppm - 11 -
2. PERFORMANCE
Item 19
Description 32.768KHz tolerance 30 ppm
Specification
Full power < 243 mA (GSM, EGSM) ; < 209 mA (DCS) 20 Power Consumption Standby - Normal < 4 mA (Max. power) 21 Talk Time GSM/ Level 7 (Battery Capacity 750mA): Up to 180 Min GSM/ Level 12 (Battery Capacity 750mA): Up to 300 Min Under conditions, Up to 200 hours: 1. Brand new and full 750mAh battery 2. Full charge, no receive/send and keep GSM in idle mode. 3. Broadcast set off. 4. Signal strength display set at 3 level above. 5. Backlight of phone set off. At least 80 dB under below conditions: 1. Ringer set as ringer. 2. Test distance set as 50 cm Fast Charge : < 500 mA Slow Charge: < 60 mA Antenna Bar Number 5 4 3 2 1 0 Battery Bar Number 0 1 2 3 3.5 3.62 0.03 V (Call) 0.03 V (Standby) Power -85 dBm ~ -90 dBm ~ -86 dBm -95 dBm ~ -91 dBm -100 dBm ~ -96 dBm -105 dBm ~ -101 dBm ~ -105 dBm Voltage ~ 3.62 V 3.62 ~ 3.73 V 3.73 ~ 3.82 V 3.82 V ~
22
Standby Time
23
Ringer Volume
24
Charge Voltage
25
Antenna Display
26
Battery Indicator
27 28
Low Voltage Warning Forced shut down Voltage
29
Battery Type
30
Travel Charger
3.35 0.03 V 1 Li-ion Battery Standard Voltage = 3.7 V Battery full charge voltage = 4.2 V Capacity: 750 mAh Switching-mode charger Input: 100 ~ 240 V, 50/60 Hz Output: 5.2 V, 600 mA - 12 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1 General Descreption
The RF parts consists of a transmitter part,a receiver part,a synthesizer part,a voltage supply part,a VCTCXO part. And the main RF Chipset CX74017[U411]is a single-chip dual-band transceiver for the extended global system for mobile communication[E- GSM900MHz]/Digital communication system[DCS1800MHz] voice and data transfer applications. This device integrated a direct conversion receiver architecture, which eliminates the need of Intermediate Frequency, a transmitter based on a modulation loop architecture and fractional-N synthesizer part with built in TXVCO and Local-VCO.
3.2 Receiver
The Receiver part in CX74017 contains all active circuits completely, full receiver chain with the exception of discrete front-end RF SAW filters. The filtered and amplified signal is down converted in the RF-mixer to the baseband output. The receiver path is supported by internal channel filtering. The RF front-end circuit is shown Figure 3-1.
Figure 3-1. RF front-end circuit.
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3. TECHNICAL BRIEF
A. RF front end
RF front end consists of Antenna Switch(U405), dual band LNAs integrated in transceiver(U411). The Received RF signals (GSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are fed into the antenna or mobile switch. An antenna matching circuit is between the antenna and the mobile switch. The Antenna Switch (U405) is used to control the Rx and TX paths. And, the input signals VC1 and VC2 of a U405 are connected to 2-Input AND Gates(U401) to switch either TX or RX path on. When the RX path is turned on, the received RF signal then feeds either Rx_900_RF or RX_1800_RF path selected by GSM-RX and DCS-RX respectively. This Rx_900_RF path contains one SAW filter, followed after the Antenna Switch (U405), to filter any unwanted signal apart from the DCS RX band. And, the RX_1800_RF path is the same case. The logic and current for Antenna Switch is given below Table 3-1. Table 3-1. The logic and current VC1 GSM TX DCS TX GSM/DCS RX 0V 2.7 V 0V VC2 2.7 V 0V 0V Current 10.0 mA max 10.0 mA max < 0.1 mA
These two paths are then connected to the LNAGSMN (#11) and LNADCSIN (#13) of CX74017 (U411), respectively. A low-noise bipolar RF amplifier, contained within the U411, amplifies the RF signal. The RF signals from the front-end pass to the receiver mixers within the U411 device.
B. Demodulator and baseband processing
In direct conversion receiver there is only one mixer down-converting received RF signal to BB signal directly. The gain down converting mixer is 40dB at high gain mode and 22dB at low gain mode. The Rx gain setting is done in the AGC algorithm. The nominal gain of the receiver is set as a function of the expected signal strength at the antenna input so that a desired level is reached at the Rx I/Q. 7 blocks in the receiver chain have variable gains, LNA, Mixer, LPF1, VGA1, gmC Filter, Auxiliary gain control and VGA2. The gain settings can be adjustable via 3-wire bus control lines. The baseband signals pass via integrated low-pass filters to the baseband A/D converters. The remainder of the channel filtering is performed by the baseband chipset. The demodulator contains switches to maintain the sense of the baseband I/Q outputs with respect to the incoming RF signal on both GSM900 and DCS 1800.
C. DC Offset Compensation
Three correction loops ensure that DC offsets, generated in the CX74017, do not overload the baseband chain at any point. After compensation, the correction voltages are held on capacitors for the duration of the receive slot(s). A rising edge on the RXEN signal, selected via the serial interface, placed the DC compensation circuitry in the track mode.
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3. TECHNICAL BRIEF
3.3 Transmitter Part
The Transmitter part contains CX74017 active parts and PAM, APC IC, coupler and Antenna Switch. The CX74017 active part consists of a vector modulator and offset phase-locked loop block(OPLL) including down-converter, phase detector, loop filter and dual band transmit VCO which can operate at either final RF output frequency. The RF GMSK outputs from the transmit VCO are fed directly to the RF power amplifiers.
TXIP TXIN
Figure 3-2. Transmitter Block diagram The peak output power and the profile of the transmitted burst are controlled by means of a closed feedback loop. A dual band directional coupler is used to sample the RF output from either PA. The PA outputs from the directional coupler pass to the antenna connector via Antenna Switch.
A. IF Modulator
The baseband converter(BBC) within the GSM chipset generates I and Q baseband signals for the transmit vector modulator. The modulator provides more than 40dBc of carrier and unwanted sideband rejection and produces a GMSK modulated signal. The baseband software is able to cancel out differential DC offsets in the I/Q baseband signals caused by imperfections in the D/A converters. The TX-Modulator implements a quadrature modulator. The IF-frequency input signal is split into two precise orthogonal carriers, which are multiplied by the baseband modulation signal IT/ITX and QT/QTX. It is used as reference signal for the OPLL.
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3. TECHNICAL BRIEF
B. OPLL
The offset mixer down converts the feedback Tx RF signal using LO to generate a IF modulating signal. The IF signal goes via external passive bandpass filter to one port of the phase detector. The other side of the phase detector input is LO signal. The phase detector generates an error current proportional to the phase difference between the modulated signal from the offset mixer and the reference signal from the LO. The error current is filtered by a second order low-pass filter to generate an output voltage which depends on the GMSK modulation and the desired channel frequency. This voltage controls the transmit VCO such that the VCO output signal, centered on the correct RF channel, is frequency modulated with the original GMSK data. The OPLL acts as a tracking narrowband band pass filter tuned to the desired channel frequency. This reduces the wideband noise floor of the modulation and up-conversion process and provides significant filtering of spurious products.
C. Synthesizer
The CX74017 includes a fully integrated UHF VCO with an on-chip LC tank. A single sigma-delta fractional-N synthesizer can phase lock the local osillator used in both transmit and receive path to a precision frequency reference input. Fractional-N operation offers low phase noise and fast setting times, allowing for multiple slot applications such as GPRS. The generated frequency is given by the following equation
=
where : f VCO = Generated VCO frequency N = N-divider ratio integer part FN = Fractional setting R = R-divider ratio f VCO = Reference Frequency
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3. TECHNICAL BRIEF
The counter and mode settings of the synthesizer are also programmed via 3-wire interface.
f ref
13MHz
Figure 3-3. Synthesizer Block diagram
D. TX APC Part
The AD8315[U412] is a dual band RF power controller for RF power amplifiers operating in the 850MHz to 2GHz range. The AD8315[U412] controls the power output of the selected RF channel. RF power is controlled by driving the RF amplifier power control pins and sensing the resultant RF output power via a directional coupler. The RF sense voltage is peak detected using an on-chip Schottky diode. This detected voltage is compared to the DAC voltage at the VSET pin to control the output power. An internal input signal[TXRAMP] is applied to the positive input of the AD8315 amplifier during the TXEN mode and a directional coupler near the antenna feeds a portion of the RF output signal back to the AD8315 peak detector converts this signal to a low frequency feedback signal that balances the amplifier when this signal equals the RAMP input signal level.
E. Power Amplifier
The PF08107B[U409] is Dual band amplifier for E-GSM(880 to 915MHz) and DCS1800(1710 to 1785MHz). The efficiency of module is the 50% at nominal output power for E-GSM and the 43% at 32dBm for DCS1800. This module should be operated under the GSM burst pulse. To avoid permanent degradation, CW operation should not be applied. To avoid the oscillation at no input power, before the input is cut off, the control voltage Vapc should be control to less than 0.5V. We have to improve thermal resistance, the through holes should be layouted as many as possible on PCB under the module. And to get good stability, all the GND terminals and the metal cap should be soldered to ground plane of PCB.
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3. TECHNICAL BRIEF
3.4 13 MHz Clock
The 13 MHz clock (VC-TCXO-208C) consists of a TCXO (Temperature Compensated Crystal Oscillator) which oscillates at a frequency of 13 MHz. It is used within the CX74017 RF Main Chip, BB Analog chip-set (AD6521), and Digital (AD6522).
.
Figure 3-4. VCTCXO Circuit.
3.5 Power Supplies and Control Signals
There are two regulators used in the phone to provide RF power. One is contained inside of ADP3408 (U101), power management IC to provide the power for the VCTXO (X302). The other is used to provide the power for remaining RF circuits. Table 3-2.
Regulator Regulator 1 (U1, 2V7_VTCXO) Regulator 2 (U414, RF2V8) Voltage 2.7 V 2.85 V 0.5 V 0.5 V VCTXO RF circuitry VSYNTHEN Powers Enable Signal
Figure 3-5. Regulator Circuit.
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3. TECHNICAL BRIEF
3.6 Digital Main Processor
The AD6522 is an ADI designed processor.
Figure 3-6. Top level block diagram of the AD6522 internal architecture. BUS Arbitration Subsystem It is to work as a cross point for data accesses between the three main busses. EBUS is for external accesses, primarily from Flash memory for code and data. RBUS is for internal RAM access. PBUS is for access to internal peripheral modules such as UART, RTC or SIM. In addition to the three main system busses, it has SBUS, IOBUS and DMABUS. DSP subsystem It consists of ADI DSP, Viterbi coprocessor, Ciphering unit and a cache memory/controller system. The DSP can run at a maximum clock frequency of 78 MHz at 2.45 V. The Viterbi and ciphering accelerators enable a very efficient implementation of the channel equalization, encryption and decryption tasks.
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3. TECHNICAL BRIEF
MCU subsystem It consists of an ARM7TDMI central processing unit, a boot ROM, a clock generation and access control module. The maximum clock frequency for the ARM7TDMI is 39 MHz at 2.45 V. The main clock is 13MHz and it is provided by VCTCXO. The Clock & BS(Bus Select) generator make internal clock by multiplying the main clock by 1X, 1.5X, 2X and 3X. The boot ROM contains MCU code for basic communication between the ARM and one of the serial ports in the Universal System Connector subsystem. Peripheral subsystem It contains four major groups of elements. The MMI group is a collection of all the functionality that are needed to implement a complete user interface including keyboard, display, backlight, RTC, general purpose I/O etc. House Keeping group consists of three different sub-modules: The Watch Dog Timer, the Interrupt Controller, and the general timers. GSM system group consists of the time base generation together with the synthesizer interface, which form the radio control. Direct Memory Access is located between the three system buses (PBUS, RBUS and EBUS) and can move any data from any address location on one system bus to any address location on another system bus.
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3. TECHNICAL BRIEF
Figure 3-7. System interconnection of AD6522 external interfaces
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3. TECHNICAL BRIEF
Interconnection with external devices RTC block interface Countered by external X-TAL The X-TAL oscillates 32.768KHz LCD module interface Controlled by LCD_MAIN/SUB_CS, LCD_RES, LCD_A0, /WR, /RD, DATA [00...07] ports Table 3-3.
Description
LCD_MAIN_CS LCD_SUB_CS LCD_RES LCD_A0 /WR, /RD DATA [00...07]
LCD chip enable. Each LCD has CS pin This pin resets LCD module. This pin determines whether the data to LCD module is display data or control data Read/Write control Parallel data line
RF interface The AD6522 control RF parts through TXEN, RXON1, RXON2, AGCEN, SDATA, SCLK, SEN etc. Table 3-4. Signal Name TXEN RXON1 RXON2 AGCEN SDATA SCLK SEN
Description
TX Enable/Disable LNA, Mixer1 On/Off Mixer 2 On/Off AGC Enable/Disable Serial Data to PLL Clock to PLL PLL Enable/Disable
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3. TECHNICAL BRIEF
SIM interface The AD6522 check status periodically in call mode if SIM card is inserted or not, but the AD6522 don't check in deep sleep mode. Interface by SIM_IO, SIM_CLK, SIM_RST Table 3-5.
Description
SIM_IO SIM_CLK SIM_RST
This pin receives and sends data to SIM card. G5200 support only 3.0 volt interface SIM card. Clock 3.5MHz frequency. Reset SIM block.
Figure 3-8. Key interface Include 5 column and 5 row The AD6522 detect key press by interrupt ADP3408 interrupt There are two interrupts EOC and CHARGEDETECT EOC: End of Charge. Charging would be stopped when AD6522 receive this input. CHARGEDETECT: This interrupt is generated when charge is inserted.
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3. TECHNICAL BRIEF
3.7 Analog Main Processor
AD6521
Figure 3-9. AD6521 function block diagram
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3. TECHNICAL BRIEF
BB Transmit section This section generates in-phase and quadrature BB modulated GMSK signals (BT = 0.3) in accordance with GSM 05.05 Phase 2 specifications The transmit channel consists of a digital GMSK modulator, a matched pair of 10-bit DACs and a matched pair of reconstruction filter BB Receive section This section consists of two identical ADC channels that process baseband in-phase(I) and quadrature(Q) input signals. Each channel consists of a coarse switched capacitor input filter, followed by a high-order sigmadelta modulator and a lowpass digital filter Auxiliary section This section contains two auxiliary DACs(AFC DAC, IDAC) for system control. This section also contains AUX ADC and Voltage Reference AUX ADC: 6 channel 10 bits AFC DAC: 13 bits IDAC: 10 bits Voiceband section Receive audio signal from MIC. G5200 use differential configuration. Send audio signal to Receiver. G5200 use differential configuration. It interconnect with external device like main microphone, main receiver, ear-phone and Hands free kit through the VINNORP, VINNORN, VOUTNORP, VOUTNORN, VINAUXP, VINAUXN, VOUTAUXP, VOUTAUXN VINNORP, VINNORN: Main MIC positive/negative terminal. VOUTNORP, VOUTNORN: Main Receiver positive/negative terminal. VINAUXP, VINAUXN: Hands free kit mic positive/negative terminal. VOUTAUXP, VOUTAUXON: Hands free kit speaker positive/negative terminal.
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3. TECHNICAL BRIEF
3.8 Power Management
ADP3408
Figure 3-10. ADP3408 inner block diagram. Power up sequence logic The ADP3408 controls power on sequence Power on sequence If a battery is inserted, the battery powers the 6 LDOs. Then if PWRONKEY is detected, the LDOs output turn on. REFOUT is also enabled Reset is generated and send to the AD6522
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3. TECHNICAL BRIEF
LDO block There are 6 LDOs in the ADP3408 Table 3-6.
Description
VSIM VCORE VRTC VAN VTCXO VMEM
2.86 V (is provided to SIM card) 2.45 V (is provided to the AD6522 & AD6521's digital core) 2.45 V (is provided to the RTC and Backup Battery) 2.45 V (is provided to the AD6521 I/O and used as microphone bias) 2.715 V (is provided to VCTCXO) 2.80 V (is provided to Flash)
Battery charging block It can be used to charge Lithium Ion and/or Nickel Metal Hydride batteries. G5200 use Li-Ion battery only. Charger initialization, trickle charging, and Li-Ion charging control are implemented in hardware. Charging Process Check charger is inserted or not If ADP3408 detects that Charger is inserted, the CC-CV charging starts. Exception: When battery voltage is lower than 3.2V, the precharge (low current charge mode) starts firstly. And the battery voltage reach to 3.2V the CC-CV charging starts. Pins used for charging CHARGERDETECT: Interrupt to AD6522 when charger is plugged. CHARGEEN: Control signal from AD6522 to charge Li+ battery EOC: Interrupt to AD6522 when battery is fully charged GATEIN: Control signal from AD6522 to charge NiMH battery. But, not used. MVBAT: Battery voltage divider. Divide ratio is 1:2.3 and it is sensed in AD6521 AUX_ADC TA (Travel Adaptor) Input voltage: AC 85V ~ 260V, 50~60Hz Output voltage: DC 5.2V ( ±0.2 V ) Output current: Max 850mA ( ±50mA ) Battery Li-ion battery (Max 4.2V, Nom 4.0V) Standard battery : Capacity - 750mAh, Li-ion
- 27 -
3. TECHNICAL BRIEF
3.9 Memories
64M flash memory + 16M SRAM 16 bit parallel data bus ADD01 ~ ADD21. RF Calibration data are stored in Flash
3.10 Display and Interface
Table 3-7 Main LCD 128 x 128 dots EL Backlight Sub LCD 96 x 64 dots EL Backlight
Display Format Back light
G5200 has dual type LCD. There are the control output LCD_MAIN/SUB_CS which is derived from AD6522, this acts as the chip select enable for the Main/Sub LCD. AD6522 uses DATA[00:07] pins to send data for displaying graphical text onto the each LCD ( Main/Sub ).
- 28 -
3. TECHNICAL BRIEF
3.11 Keypad Switches and Scanning
The key switches are metal domes, which make contact between two concentric pads on the keypad layer of the PCB when pressed. There are 25switches (S301-S325), connected in a matrix of 5 rows by 5 columns, as shown in Figure, except for the power switch (S310), which is connected independently. Functions, the row and column lines of the keypad are connected to ports of AD6522. The columns are outputs, while the rows are inputs and have pull-up resistors built in. When a key is pressed, the corresponding row and column are connected together, causing the row input to go low and generate an interrupt. The columns/rows are then scanned by AD6522 to identify the pressed key.
0
DOWN
Figure 3-11. Keypad Switches and Scanning.
- 29 -
3. TECHNICAL BRIEF
3.12 Microphone
The microphone is soldered to the main PCB. The audio signal is passed to VINNORP (#K8) and VINNORN (#K7) pins of AD6522. The voltage supply 2V45_VCORE is output from ADP3408, and is a bias voltage for both the VINNOR (through R105) and VINAUX (through R104) lines. The VINNOR or VINAUX signal is then A/D converted by the Voiceband ADC part of AD6521. The digitized speech is then passed to the DSP section of AD6522 for processing (coding, interleaving etc.).
Figure 3-12. Microphone. - 30 -
3. TECHNICAL BRIEF
3.13 Earpiece
The earpiece is driven directly from AD6521 VOUTNORP (#K8) and VOUTNORN (#K7) pins and the gain is controlled by the PGA in an AD6521. The earpiece is located in the handset floder front panel, and the signals are routed to it via FPCB connector between Main Board and FPCB board. But, The VOUTNORP signal has to be selected by the control signal "SPK_EN". If SPK_EN is low, VOUTNORP is directly connected to the Earpiece, else VOUTNOTP is connected to the Midi Chip(U203).
Figure 3-13. Earpiece & Handsfree Interface
- 31 -
3. TECHNICAL BRIEF
3.14 Hands-free Interface
The audio out (VOUTAUXP & VOUTAUXN) to the hands-free kit consists of a pair of differential signals from AD6521 auxiliary outputs (#K9, #K6), which are tracked down the board to carkit connector (CN301) at the base of the handset. The DC level of the signal is supplied to the VOUTAUX pin. And the EXT_IN signal is then input to the VINAUXP (#H10) and VINAUXN (#G10) of AD6521.
3.15 Headset Jack Interface
Headset Jack has the single-end structure in both audio in and out. The audio out to the headset jack is used only one line(VOUTAUXP/HEADSET_SPK_P1) which can be connected to the HEADSET_MIC_P or HFK_SPK_P by the analog switch(U204). If you put in the headset jack in the top of the handset, HEADSET_SPK_P1(VOUTAUXP) is connected to the HEADSET_SPK_P. And the audio in from the headset jack has also one line(VINAUXP/HEADSET_MIC_P). If the headset jack is put in, HEADSET_MIC_P is input from the MIC of headset jack, else HEADSET_MIC_P is connected to HFK_MIC_P which is input from the Hands-free Kit.
3.16 Key Back-light Illumination
In key back-light illumination, there are 12 Blue LEDs in Main Board, which are driven by KEY_BACKLIGHT line from AD6522.
Figure 3-14. Key Back-light Illumination.
- 32 -
3. TECHNICAL BRIEF
3.17 LCD Back-light Illumination
In LCD Back-light illumination, there is an EL driver in sub LCD side of LCD Module, which is driven by BACKLIGHT(EL_EN) line from AD6522.
Figure 3-15. LCD Back-light Illumination.
3.18 Multi-Color LED Illumination
In multi-color LED illumination, there is an LED chip and three TRs in sub LCD side of LCD Module, which is driven by LED_G, LED_B and LED_Main line from AD6522.
Figure 3-16. Multi-Color LED
- 33 -
3. TECHNICAL BRIEF
3.19 Speaker & MIDI IC
Figure 3-17. Speaker & MIDI IC MA-3 is a synthesizer LSI for mobile phones that realize advanced game sounds. This LSI has a built-in speaker amplifier, and thus, is an ideal device for outputting sounds that are used by mobile phones in addition to game sounds and ringing melodies that are replayed by a synthesizer. The synthesizer section adopts "stereophonic hybrid synthesizer system" that are given advantages of both FM synthesizers and Waveform table synthesizers to allow simultaneous generation of up to thirty-two FM tones and eight Waveform table tones. Since FM synthesizer is able to present countless tones by specifying parameters with only several tens of bytes, memory capacity and communication band can be saved, and thus, the device exhibits the features in operating environment of mobile phones such as allowing distribution of arbitrary melodies with tones. On the other hand , since Waveform table synthesizer complies with downloading of tones from host CPU, arbitrary ADCM/PCM tones can be treated from sequencer in addition to the use of tones that are built-in the LSI. MA-3 has a built-in circuit for controlling vibrators and LEDs synchronizing with play of music.
- 34 -
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.1 RF Components
SW401
U405 U401 N401 U407 U408 N409
U411
U412
U414
Y401
U413
RF components
Reference U401 U405 U407 U408 U409 U411
Description AND Gate Antenna Switch DCS RF SAW Filter GSM RF SAW Filter PAM RF Main Chip
Reference U412 U413 U414 SW401 Y401 N401
Description APC IC Inverter LDO Mobile Switch TXVCO Coupler
- 35 -
4. TROUBLE SHOOTING
RX Check Area
- 36 -
4. TROUBLE SHOOTING
4.1-1 Checking Regulator Circuit
U414.1
U414.6
- 37 -
4. TROUBLE SHOOTING
4.1-2 Checking VCTCXO Circuit
Y401.3
Y401.4
Graph 4-1. VCTCXO 13MHz
Graph 4-2. VCTCXO 2.7V
- 38 -
4. TROUBLE SHOOTING
4.1-3 Checking Control Signal
TP409(LE)
TP4043(RXEN)
TP407(Data) Graph 4-3. RF Control Signal
TP408(Clock)
- 39 -
4. TROUBLE SHOOTING
4-1-4 Checking Ant SW & Mobile SW
U405.10 SW401.2 U401.1 U405.2
R405
U401.6 SW401.1 U405.11 U405.1
Table 4-1. ANT SW Control Logic
- 40 -
4. TROUBLE SHOOTING
Graph 4-4. ANT SW Control GSM. DCS RX Mode
Graph 4-5. Dual AND Gate input For GSM RX Mode
Graph 4-6. Dual AND Gate input For DCS RX Mode
Table 4-2. ANT SW Control Logic
- 41 -
4. TROUBLE SHOOTING
4-1-5 Checking Saw Filter Circuit
U407.3
U407.1
U408.3 U408.1
- 42 -
4. TROUBLE SHOOTING
4-1-6 Checking RX IQ
RXIN RXQN RXIP RXQP
Graph 4-7. RX IQ Signal
Graph 4-8. RX I Signal (Extended)
- 43 -
4. TROUBLE SHOOTING
4.2 Tx Trouble
6
5
1 3
4
Rx Check Area
2
3
- 44 -
4. TROUBLE SHOOTING
4-2-1 Checking Regulator Circuit
If you already Check this point while checking RX part, You can Skip this Test
U414.1
U414. 2
U414.6
- 45 -
4. TROUBLE SHOOTING
4-2-2 Checking VCTCXO Circuit
If you already Check this point while checking RX part, You can Skip this Test
Y401. 3
Y401. 4
Graph 4-9. VCTCXO 13MHz
Graph 4-10. VCTCXO 2.7V
- 46 -
4. TROUBLE SHOOTING
4-2-3 Checking Control Signal.
Graph 4-11. RF Control Signal
Graph 4-12. TXEN, TXRAMP, TXPA
TP409(LE)
TP407(Data)
TP408(Clock)
TXPA (R405)
TXEN (R425) TXRAMP (R427)
- 47 -
4. TROUBLE SHOOTING
4-2-4 Checking TX IQ
TXQN C463 100P TXQP TXIN C464 100P TXIP
TXQN TXQP
TXIN TXIP
Graph 4-13. TX IQ Signal
- 48 -
4. TROUBLE SHOOTING
4-2-5 Checking RF TX Level
N401. 3
U409. 1
N401. 1 L405 L408 C432 U412. 1
R407
R411
U409. 8
R472
- 49 -
4. TROUBLE SHOOTING
4-2-6 Checking Ant SW & Mobile SW
SW401. 2
U405. 8
U405. 5
U405. 3 U401. 1
R405
U401. 6
SW401. 1
U405. 11
U405. 2
Table 4-1. ANT SW Control Logic
- 50 -
4. TROUBLE SHOOTING
4-2-6 Checking Ant SW & Mobile SW
Graph 4-14. ANT SW Control DCS TX Mode
Graph 4-15. ANT SW Control GSM TX Mode
Graph 4-16.Dual AND Gate input For DCS TX Mode
Graph 4-17.Dual AND Gate input For GSM TX Mode
Table 4-3. ANT SW Control Logic
- 51 -
4. TROUBLE SHOOTING
4-2-7 Receiver RF Level
GSM : CH.62, -60dBm DCS :CH.699, -60dBm
- 52 -
4. TROUBLE SHOOTING
3
1
4
2
Test Points of Rx Level
- 53 -
4. TROUBLE SHOOTING
GSM :Pwr Lvl 5,CH.62,32dBm DCS :Pwr Lvl 5,CH.699, 29dBm
GSM : 32dBm DCS : 29dBm
Mobile S/W f vco = (N+3.5+FN/2^22) f ref/R f vco
/R LF Fractional-N PLL
GSM : 32.5dBm DCS : 29.5dBm
f ref
X3MHz
13
2V7_VTCXO X3MHz
4-2-8 Transmitter RF Level
VCX
DCSSEL
AFC
TXPA
ANT S/W
REFCLK
PLL_DATA PLL_CLK PLL_LE
VC2
GSMSEL
LMG002S
Serial I/O
DCS : X7X0 ~ X785MHz GSM : 880 ~ 9 X5MHz
1
X0dBm
/3 X2 DCS
PLL_PD
Serial I/O
RXEN TXEN FEENA
- 54 f LO
X2 GSM
12 3
2dBm
f TX f
3X.5dBm 34dBm
PAM(PF08X22B) /D X
11
33.5dBm
BANDSELX BANDSEL2
Base Band Block
5
ATT
LF PFD
COUPLER (LDCX5D)
TXIP TXIN
ATT
TXVCO
/D2
0 90 TXQP TXQN
7
APCIC(AD83X5)
TXEN TXRAMP
8
GSM : X5dBm DCS : X8dBm 32dBm
6
4
0dBm
ATT
GSM : 975(-300mV) ~ X24(300mV) DCS : 5 X2(-750mV) ~ 885(750mV)
9
10
GSM : -6dBm DCS : -3dBm
2
8dBm
4. TROUBLE SHOOTING
4-2-8 Transmitter RF Level
11 5
13
12
3 1 2 4 6
7 , 8
9 , 10
Test Points of Tx Level
- 55 -
4. TROUBLE SHOOTING
4-2-9 Test Points for RF Components
VC2 U401. 3 VC1 U401. 7 TXPA (R405) TXEN(R425)
TXRAMP(R427) 13MHz CLock RF 2.85V 2V7_VCTCXO
TXQN TXQP TXIN RXIN TXIP RXIP
RXQN RXQP
Test Points for RF components
- 56 -
4. TROUBLE SHOOTING
· Test Points for RF Components
TP408(PLL_Clock)
TP409(PLL_LE) TP407(PLL_Data)
Test Points for RF components (Keypad Side/Lower)
- 57 -
4. TROUBLE SHOOTING
· Baseband components (Component Side)
U103
U101
U102 D101 D102 U201
X101 U105
CN101 Q302
U106 U203 U204
U205 U202 U302
CN302
Baseband components (Component Side)
Reference U101 U102 U103 U105 U106 U201 U202 U203 U204
Description PMIC P-Channel FET Analog Main Processor Digital Main Processor Memory Comparator Analog Switch MIDI IC Analog Switch
Reference U205 U302 D101 D102 X101 Q302 CN101 CN301
Description LDO Analog Switch Diode Dual Diode X-TAL Dual Transistor SIM Connector IO Connector
- 58 -
4. TROUBLE SHOOTING
· Baseband components (Keypad Side)
Q101
D301 Q301
MIC101
U301
Baseband components (Keypad Side)
Reference U301 Q301 Q302
Description Hall Sensor Transistor Transistor
Reference D301 MIC101
Description Dual Diode C-MIC
- 59 -
4. TROUBLE SHOOTING
4.3 Power on Trouble
Setting : Connect PIF, and set remote switch off at PIF.
- 60 -
4. TROUBLE SHOOTING
POWER-ON KEY signal input
These powers should be necessary to power on.
This signal should go HIGH when the power-on procedure is completed.
Pin 25 (VTCXO=2.7V)
Pin 22 (VCORE=2.45V)
Pin 21 (VMEM=2.8V)
Pin 1 (PWRON_EN)
Pin 2 (Power Key)
Pin 6 (VRTC>1.2V)
- 61 -
4. TROUBLE SHOOTING
4.4 Charging Trouble
Setting : Connect PIF, and set remote switch off at PIF.
- 62 -
4. TROUBLE SHOOTING
The charging current will flow into this direction.
R102
U102
D101
- 63 -
4. TROUBLE SHOOTING
4.5 LCD Trouble
Setting : Connect PIF and power on.
- 64 -
4. TROUBLE SHOOTING
CN301
Soldering Check
If the FPCB has a problem, the control signals for LCD cannot be transmitted properly.
- 65 -
4. TROUBLE SHOOTING
4.6 Receiver Trouble
Setting : After initializing GSM MS test equipmemt, connect PIF and power on. Make a test call to 112. Set audio part at test equipment as PRBS or continuous wave, not echo. Set the volumn max.
- 66 -
4. TROUBLE SHOOTING
PMIC (U101) RECEIVER
C206
YMU762 (U203)
U202. 4
Soldering Check
U202. 5
From the U103(AD6521) To Receiver at LCD module via CN301
C206
U202
From the U103(AD6521)
The Circuit Diagram of the receiver path. Refer to page 2 of the complete circuit diagram for detail.
- 67 -
4. TROUBLE SHOOTING
U202. 4
U202. 5
C206 (REC-)
The waveforms of the audio signals at each point
- 68 -
4. TROUBLE SHOOTING
4.7 Speaker Trouble
Setting : Connect PIF to the phone, and power on. Enter the engineering mode, and set "Melody on" at "BB Test-Buzzer" menu.
- 69 -
4. TROUBLE SHOOTING
C209, C211, R213, R215
U205
C221
U203
R222, R227 Speaker Pin 26
CN301
Pin 25
Soldering Check in LCD Module
- 70 -
4. TROUBLE SHOOTING
These four components make up the analog amplifier stage of melody. C209, R213, C211, R215 This is the melody IC. U203 To the speaker at LCD module via CN301.
R227
R222
The Power for analog part of the melody IC. The voltage is 3.3V
The Power for digital part of the melody IC. The voltage is 2.8V. It is from the PMIC(ADP3408, U101)
C221
U205
The circuit diagram of the part of the melody IC. Refer to the page 2 of the complete circuit diagram for detail.
- 71 -
4. TROUBLE SHOOTING
4.8 Mic Trouble
Setting : After initializing GSM MS test equipment, connect PIF to the phone, and power on. Make a test call to 112. Make a sound in front of microphone.
- 72 -
4. TROUBLE SHOOTING
R105 R108
C118
R110 R112
C132
C129
Q101.3
MIC101
- 73 -
4. TROUBLE SHOOTING
R105 C118 R108
MIC101
The voltage at this point goes to almost 0V when the mic is activated. Mic activating signal Mic is activated when this signal goes to HIGH
The signal flow of the microphone to U103(AD6521)
R110, R112 C129, C132
MIC+
MIC-
MIC+
MIC-
The waveforms at MIC+ and MIC-
- 74 -
4. TROUBLE SHOOTING
4.9 Vibrator Trouble
Setting : Connect PIF to the phone, and power on. Enter the engineering mode, and set "Vibrator On" at "BB Test-Vibrator" menu.
START
Is the voltage at pin 3 of Q301 near 0V?
No
Check the soldering of R309.
No
Resolder R309.
Yes Yes
Replace Q301.
Check the soldering of R301
No
Resolder R301.
Yes
Check the soldering of CN301
No
Resolder CN301.
Yes
Check the soldering of vibratior at LCD module
No
Resolder vibrator.
Yes
Replace Vibrator.
VIBRATOR WILL WORK PROPERLY.
- 75 -
4. TROUBLE SHOOTING
Pin 22
Soldering Check in LCD Module
CN301
Vibrator
R301 Q301.3
R309 Q301.2
When the vibrator works, the current flow in this directoin. When the vibrator works, the signal at this point goes to 2.8V.
From the vibrator at LCD module via CN301.
When the vibrator works, the voltage at this point goes to almost 0 V.
- 76 -
4. TROUBLE SHOOTING
4.10 Backlight Trouble
Setting : Connect PIF to the phone, and power on. Enter engineering mode, and set "Backlight on" at "BB test-Backlight" menu.
- 77 -
4. TROUBLE SHOOTING
R321 R319
Q302.2
- 78 -
4. TROUBLE SHOOTING
4.11 Folder on/off Trouble
Setting : Connect PIF to the phone, and power on.
- 79 -
4. TROUBLE SHOOTING
R310
U301.1
U301.2 The voltage at this point goes from 2.8V to 0 V when the folder is closed.
To U105(AD6522)
This component operate when a magnet get close here.
- 80 -
4. TROUBLE SHOOTING
4.12 SIM Detect Trouble
Setting : Insert the SIM into CN101. Connect PIF to the phone, and power on.
- 81 -
4. TROUBLE SHOOTING
PIN 5
PIN 7
PIN 3
PIN 1
- 82 -
4. TROUBLE SHOOTING
4.13 Earphone Trouble
Setting : After initializing GSM test equipment, connect PIF to the phone and power on.
- 83 -
4. TROUBLE SHOOTING
- 84 -
4. TROUBLE SHOOTING
- 85 -
4. TROUBLE SHOOTING
- 86 -
4. TROUBLE SHOOTING
4.14 HFK Trouble
R104
C168
R103 R106
C117
C124
R208
R209
R201
CN201
U201.1
R210 R211
R212 U204.6 U204.5 U204.1
L201
R230, R231
- 87 -
4. TROUBLE SHOOTING
This part makes the mic bias of the ear-mic.
Mic bias and path for the ear-mic Refer to the page 1 of the complete circuit diagram for detail. The direction of the audio
To U103(AD6521)
These resistors make the reference voltage.
The voltage input of ear-mic hook-detect The voltage input of ear-mic detect The reference voltage for the detect of earmic. The reference voltage for the hook-detect of
Ear-mic detection part Refer to the page 2 of the complete circuit diagram for detail.
The signal flow when the ear-mic is activated. U204 selects the path of audio signal for the ear-mic or the HFK. Refer to the page 2 of the complete circuit diagram for detail.
The circuit diagram of the ear-mic jack Refer to the page 2 of the complete circuit diagram for detail.
- 88 -
4. TROUBLE SHOOTING
Setting : After initializing GSM test equipment, connect PIF to the phone and power on.
- 89 -
4. TROUBLE SHOOTING
- 90 -
4. TROUBLE SHOOTING
- 91 -
4. TROUBLE SHOOTING
R333
U204.1 U204
U204.5
CN302
CN302.1
CN302.9 ~ CN302.12
R156 C171 R170
C168 R104 C117 R103 R106 C124
CN201 L201 R158 R328 Check Point
( 0V when HFK is 2.8V activated.)
R205
- 92 -
4. TROUBLE SHOOTING
The HFK detect signal CN302
R328 R333
The audio signals from & to the HFK The circuit diagram of the part of CN302 Refer to the page 3 of the complete circuit diagram.
The HFK detect signal This point goes to 0 V when the HFK is activated.
The HFK detect signal input to U105 (AD6522) Refer to the page 1 of the complete circuit diagram.
- 93 -
4. TROUBLE SHOOTING
The direction of the audio signal from the mic of the HFK
To U103 (AD6521)
The audio signal from the mic of the HFK to U103(AD6521) This part is same with that of the ear-mic. Refer to the page 1 of the complete circuit diagram for detail.
The signal flow when the HFK is activated. U204 selects the path of audio signal for the ear-mic or the HFK. Refer to the page 2 of the complete circuit diagram for detail.
- 94 -
5. ASSEMBLY INSTRUCTION
5. ASSEMBLY INSTRUCTION
5.1 Disassembly
1. Remove the battery, antenna and screws as shown above.
1
2
3
Figure 5-1. Removing Battery pack, screws and Antenna 2. Carefully lift up the bottom of Rare Cover first, then hold the covers and twist them.
Figure 5-2. Disassembly of Rear cover and Front cover
- 95 -
5. ASSEMBLY INSTRUCTION
3.Finally carefully remove the rear-cover from the hooks on the top of front-cover.
Figure 5-3. Disassembly from the hooks
- 96 -
5. ASSEMBLY INSTRUCTION
4. Remove the pin shown below to unlock the PCB.
Figure 5-4. Unlocking and removing the PCB
- 97 -
5. ASSEMBLY INSTRUCTION
5. Use a sharp awl to push away the antenna-bushing.
Figure 5-5. Removing Antenna-bushing 6. Use a tweezers to remove the Battery Locker.
1 1 2
3
Figure 5-6. Removing battery locker
- 98 -
5. ASSEMBLY INSTRUCTION
7. Remove the buttons.
Figure 5-7. Removing buttons 8. Push away the hinge to remove the folder.
Figure 5-8. Detaching Folder
- 99 -
5. ASSEMBLY INSTRUCTION
9. Remove a hinge from the folder. Then detach screw caps and screws
Figure 5-9. Removing hinge and screws 10. Place the folder on a desk. Then hold the hinge and push it down carefully. Finally, detach it from the rest hooks shown above.
Firure 5-10. Disassembly of Folder
- 100 -
5. ASSEMBLY INSTRUCTION
11. Detach the rest components as shown below.
Figure 5-11. Disassembly of Rest components 12. Use a ` - ' driver to lift up the end-side of sub-window.
Figure 5-12. Detaching sub-window.
- 101 -
6. DOWNLOAD
6. DOWNLOAD
6.1 Download Setup
PC
JIG
+ -
TA
Figure 6-1. Download Setup Condition. Disconnect TA to the Jig and phone have a battery Check the Battery up to two blocks more
- 102 -
6. DOWNLOAD
6.2 Download Procedure
(1)Select Erase. OWCD = Overwrite Cal Data
(2)Check!
1. Access Flash loader program in PC & Select Erase. (Don Check OWCD) 2. Check Address & Size (Addr. : 1004000, Size : 7FC000)
(3)Don t Check OWCD
Press Start & wait
3. Press Start & Wait Until Erase Completed
Select Start.
4. Press Write to start Download - 103 -
6. DOWNLOAD
5. Select
Key to Choose Mot. File
6. Select Mot. File & Press Open
7. Wait until MOT. To BIF. Converting is completed (Just Check Verify. Don't Check OWCD)
- 104 -
6. DOWNLOAD
Press Start & Power ON Using Jig
8. Press Start & Power on the phone Using Jig Remote Power On (Switch1)
Turn on Switch 1
9. Wait until Sending Block end
- 105 -
7. BLOCK DIAGRAM
7. BLOCK DIAGRAM
7.1 Main Board
The G5200 is made up of two PCBs. In lower part of the folder, there is a main board. And in the upper part of the folder, there is a FPCB. Below you can see the block diagram of both PCBs.
Figure 7-1. Main Blockdiagram.
- 106 -
7. BLOCK DIAGRAM
7.2 FPCB
Figure 7-2. FPCB Blockdiagram.
7.3 RF
Figure 7-3. RF Blockdiagram. - 107 -
7. BLOCK DIAGRAM
- 108 -
8. CIRCUIT DIAGRAM
8. CIRCUIT DIAGRAM
8.1 Baseband Interface
1 2 3 4 5 6 7 8
A
2V45_VAN
A
R105 1K
C123 NC
C118 10U (2012) A A A
VBAT 2V45_VCORE 2V8_VMEM 2V45_VCORE 2V45_VRTC C126 39P
A C163 39P
A
R108 2K R110 100 C129 100N
SP107 MIC101 OB-22S40-C33
C156
C155
C152
C150
C149
C147
C148
C146
C145
C109 100N
C110 10U (2012)
C151
C157
C144
47N
47N
47N
47N
47N
47N
47N
100P
47N
47N
47N
47N
C130 39P DATA(0:15)
TP133
B
23 20 VCHARGE 5 VBAT VBAT2 VRTCIN KEYROW(0) MVBAT R118 100 RESET ROWX MVBAT CHARGEIN ISENSE RESET VSIM GATEDRVE VMEM VBATSENSE VCORE RESCAP U101 VAN C165 100N ADP3408 VTCXO VRTC VBAT GATEIN EOC CHG_EN CHG_DET TCXO_EN PWRON_EN 25 6 2V7_VTCXO 2V45_VRTC 2V45_VAN 3 8 18 19 21 22 24 100K 2V9_SIM 2V45_VCORE 2V8_VMEM R177 C142 100P C143 100P ADD(0:21)
R112 100
C132 100N
C164 39P ACCESSORY MIC C116 R101 NC 1.2K
B
H1 VCC1 P7 VCC2 K14 VCC3 C8 VCC4
L9
L2 N5 N9
B14 VEXT1 B10 VEXT2 C6 VEXT3 D5 VEXT4
E3
N13
A2
C119 R102 0.33,1% (2012) 10U (2012) POWERKEY SIMEN 2 4 10 14
PWRONKEY SIMEN
U102 NDC652P 6 4 1 2 5 S2 S1 G D1 D2 D3 3
C127 1N
12 7 17
C111
C104
C103
C102
C114
C101
C140
DGND AGND
C
CRS08 D101
USC(0:5)
ADD(0) ADD(1) ADD(2) ADD(3) ADD(4) ADD(5) ADD(6) ADD(7) ADD(8) ADD(9) ADD(10) ADD(11) ADD(12) ADD(13) ADD(14) ADD(15) ADD(16) ADD(17) ADD(18) ADD(19) ADD(20) ADD(21) USC(0) USC(1) USC(2) USC(3) USC(4) USC(5)
J3 J2 J4 K3 K2 K4 L4 L1 L3 L5 M1 M2 N1 P1 N2 P2 N3 M3 P4 N4 M4 P5 C14 D12 A14 A13 E11 C12 B13
ADD1 ADD2 ADD3 ADD4 ADD5 ADD6 ADD7 ADD8 ADD9 ADD10 ADD11 ADD12 ADD13 ADD14 ADD15 ADD16 ADD17 ADD18 ADD19 ADD20 ADD21 ADD22 USC0 USC1 USC2 USC3 USC4 USC5 USC6
AVDD1 AVDD2 AVDD3
DVDD1 DVDD2 DVDD3
DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15
N6 P6 M6 N7 M7 L7 P8 N8 M8 P9 M9 P10 N10 M10 P11 N11
DATA(0) DATA(1) DATA(2) DATA(3) DATA(4) DATA(5) DATA(6) DATA(7) DATA(8) DATA(9) DATA(10) DATA(11) DATA(12) DATA(13) DATA(14) DATA(15)
VSIM
VMEM1 VMEM2 VMEM3
VMEM4
VPEG1
VDDRTC
2V45_VAN
2V45_VCORE
C135 39P 2V45_VAN A
R113 2K 2V45_VCORE
C162 39P
SP106 HEADSET HFK A A 100N 39P
C107
C106
C105
C137
C136
C131
R178 NC
R104 1K
Q101 C117 10U NC (2012) A HEADSET_MIC_P 1 R152 100K 3 2SC5585TL 2 R153 1.5K USC(3)
47N
47N
47N
47N
47N
47N
A
A
A F10 A9 J8 A1 G1 K5
A
A
A
C168 100N
R103 2K R106 100
R151
C124 39P F9 E9 C9 D9 E10 D10 C10 B10
JTAGEN
K11
TP105
GPIO_20 GPIO_21 GPIO_19 GPIO_18
J12 J11 H13 H14
TP106 TP107 TP103 TP104
TP102
B1 B2 C2 C1
ITXP ITXN QTXN QTXP IRXP IRXN QRXP QRXN
TXIP TXIN TXQN TXQP RXIP RXIN RXQP RXQN
A 2V45_VAN
TDO TDI TMS TCK
R156 100 C116 39P
C171 100N
R157 NC HEADSET_MIC_N R170 0
C
(2012) 220N
100N
(2012) 220N
(2012) 2.2U
(2012) 2.2U
(2012) 2.2U
100N
GPO_0 GPO_1 U105 AD6522
B1 C2
J4 K4
11 15 16 9 28 1
13 27
RXON TXON AFCDAC
A10
A TP119 TP114 TP115
AFC A
R101 2K
HOOK_DETECT R199 ACCESSORY_DETECT NC
TP136
KEYROW(0:4) KEYROW(0) KEYROW(1) KEYROW(2) KEYROW(3) KEYROW(4) KEYCOL(0:4) KEYCOL(0) KEYCOL(1) KEYCOL(2) KEYCOL(3) KEYCOL(4)
A6 F4 D4 B5 A5
K_ROW0 K_ROW1 K_ROW2 K_ROW3 K_ROW4
C115 (2012)
C120
AD6521 BSDO BSOFS BSDI BSIFS VSDI VSDO VSFS F3 G4 G2 G1 G3 H3 H2 G2 F2 F1 E2 D1 E1 D2 BSDI BSIFS BSDO BSOFS VSDO VSDI VSFS
100N
C4 E4 B4 A4 C3
AUXADC1 AUXADC2 AUXADC3 AUXADC4
39P
39P
1U
A6 A5 B5 A4
C121
C108
CLKOUT CLKOUT_GATE GPO_24 GPO_5 GPO_6 ASDI ASDO ASFS
D1 D2 E1 A1 C1 E2 F1 F2
J2 K2 K1 J3 K3 J1 H1 H2
MCLK MCLKEN RESET ARSM ATSM ASDO ASDI ASFS
RAMPDAC
H9
A 2V8_VMEM
TXRAMP C112 10P A R107 1K C122 39P R109 82K R111 120K BAT_TEMP
U103
REFCAP REFOUT
A8 A7
TP131
TP101
K_COL0 K_COL1 K_COL2 K_COL3 K_COL4
A VINAUXP VINAUXN VINNORP VINNORN BUZZER H10 G10 J10 K10 J6
A
A
A
A
A MVBAT R114 100
D
RPWRON TP132 R115 200K 13MHz D102 DAN222 ON_OFF
LCD_RS MIDI_A0 BACKLIGHT
H4 R131 0 A7 B2 G14 L12 B3 10M (1608)
LCD_MAIN_A0_ADD0 GPO_22 PWRON CLKON CLKIN OSCOUT
C153
1N X101 MC-146 4 3 R122 2 1
C154 NC
A3 RESET VIBRATOR RX LDO_SD TX FLIP _MIDI_IRQ SPK_EN JACK_DETECT LED_G LCD_RES LED_B LED_R N14 D11 D10 B12 C11 D9 B11 A11 C10 D8 A10 C9 C7 B9 A9 B8 A8 D6 B7 M12 L13 TP110 TP109 TP111 TP112 M14 M13 P14 P13 N12 M11
MICCAP
A
REFCAP2
OSCIN RESET GPIO_0 GPIO_1_DEB_RX LCD_EL_GPIO_2 GPIO_3_DEB_TX GPIO_4 GPIO_5 _MIDI_IRQ_GPIO_6 SPK_EN_GPIO_7 GPIO8 GPIO9 GPIO_10_ECLK GPIO_11_EDAT GPIO_12_EMEN GPIO_13 GPIO_14_DCLK GPIO_15_DA0 GPIO_16_DEN GPIO_17_DDATA LCD_SUB_CS_GPCS0 MIDI_CS_GPCS1 RAMCS ROMCS WE LWR HWR RD
TEMP1
TEMP2
GPO_2 GPO_3 GPO_4 GPO_7 GPO_8 GPO_9 GPO_10 GPO_11 GPO_16 GPO_17 GPO_18 GPO_19 GPO_20 GPO_21
G13 G12 H12 F14 F13 H11 F12 E14 E13 G11 E12 D14 D13 F11
TXEN RXEN BANDSEL1 T_H HEADSET_EN VSYNTHEN _MIDI_RESET TXPA GSMSEL DCSSEL ON_OFF PLL_LE PLL_DATA PLL_CLK 47 DSR LCD_MAIN_CS
B4 A3 B3 J7 B8 G9 A2 J5
IDACOUT IDACREF AGND4 AGND3 AGND2 AGND1 DGND1 DGND3 VOUTNORP VOUTNORN VOUTAUXP VOUTAUXN
C134 220n K8 K7 K9 K6 VOUTNORP VOUTNORN HEADSET_SPK_P1 HEADSET_SPK_N C125 C128
C133 NC
D
A
A
LCD_ID HFK_SPK_N C172 39P R179 NC 2V45_VCORE R137 A GPRS R137 430K,1% WAP 430K 430K R138 160K 56K
39P A B9 B6 B7 J9
A
2V8_VMEM
GPIO_32 LCD_MAIN_CS_DISPLAYCS
L14 R124 M5
39P
TP123
TP124
R158 DATA(0:15) 100K
GPO_23
C5
KEY_BACKLIGHT
2V9_SIM
2V9_SIM R116 0
C169 39P
R155 1K
R138 160K,1%
Toshiba
ADD(0:21) U106 ADD(0) ADD(1) ADD(2) ADD(3) ADD(4) ADD(5) ADD(6) ADD(7) ADD(8) ADD(9) ADD(10) ADD(11) ADD(12) ADD(13) ADD(14) ADD(15) ADD(16) ADD(17) ADD(18) ADD(19) ADD(20) ADD(21) G2 F2 E2 D2 F3 E3 D3 C3 C7 E7 F7 C8 D8 E8 F8 D9 G9 F4 E4 D7 E6 E9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 J3 DQ0 G4 DQ1 K4 DQ2 H5 DQ3 H6 DQ4 K7 DQ5 G7 DQ6 J8 DQ7 K3 DQ8 H4 DQ9 J4 DQ10 K5 DQ11 J7 DQ12 H7 DQ13 K8 DQ14 H8 DQ15 H9 K6 C6 H3 H2 J2 D6 D4 C4 DATA(0) DATA(1) DATA(2) DATA(3) DATA(4) DATA(5) DATA(6) DATA(7) DATA(8) DATA(9) DATA(10) DATA(11) DATA(12) DATA(13) DATA(14) DATA(15)
R136
10K
ACCESSORY_DETECT
R133
10K
GPIO_22 GPIO_23 GPIO_24 SIMCLK
J14 L10 K13 K12
PLL_PD R117 SIMEN 20K CN101 LG_AMP_SIM 3 2 1 VCC GND C160 C161 C159 SP105 SP103 SP104 CLK RST IO VPP 7 6
A
A
Unused
5 C141 SP102 SP101
VBAT
VBAT
VBAT
VBAT
NC
TP134
E
E
NC TP120 TP121 TP122
R154
R129
R130
LCD_SUB_CS _MIDI_CS 2V8_VMEM _RAMCS _ROMCS _WR _LBS _UBS _RD
NC
IRDA_SD
U104 HSDL_3201 8 7 6 5 4 3 2 1 VLED TXD RXD SD AGND VCC NC GND
NC
220N
NC
1N
USC(2) TX RX
R171 R172 R173 R174
NC NC NC NC
A GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 VSSRCT
R134 10K TP125 TP126
USC(1) R123 JP101 _WR _RD _ROMCS _RAMCS A _UBS _LBS R139 100K 100K IRDA_SD J1 K1 P3 L6 L8 P12 L11 C13 A12 D7 B6 D3
CIOF CIOS WE OE CEF CE1S CE2S UBS LBS
2V8_VMEM
C158 100N
J5 VCC-F J6 VCC-S J9 VSS1 G3 VSS2 D5 RESET C5 WP_ACC E5 RY_BY
C167 NC (1608)
F
RESET R128 R127 0 0
TH50VSF4683AASB
F
L
A
1
2
3
4
5
6
7
8
- 109 -
8. CIRCUIT DIAGRAM
8.2 MIDI
1 2 3 4 5 6 7 8
2V45_VCORE
2V45_VCORE
2V45_VCORE
2V8_VMEM
R210
R211 1M
R208 1M
U201 MAX9077 8 3 1 4 6 7 5 2 R231 0 JACK_DETECT R230 0 HOOK_DETECT
A
NC
A
R212 330K
R209 330K
VOUTNORN C206 1U (1608)
REC-
B
Receiver Path
B
REC+
Headset jack
CN201 HEADSET_MIC_P HFK_MIC_P HEADSET_SPK_P C138 10U (2012) L201 R205 R201 100nH 4.7 4.7 C201 C224 2 4 3 1 AVL5M02200 AVL5M02200 9001-8905-040
HSP201
HSP203
HSP202
V202
C
R218 47p 47p C203 47P A A 1M
V201
C
A
A
A
DATA(8:15) DATA(8) DATA(9) DATA(10) DATA(11) DATA(12) DATA(13) DATA(14) DATA(15) C212 22n 6 D0 D1 D2 D3 D4 D5 D6 D7 MTR 4 3 27 26 25 24 23 22 21 20 19 + R214 33K C209 10n R213 33K
2V8_VMEM
U202 MAX4624 5
2
VOUTNORP
D
1 SPK_EN
Speaker
18 SPOUT2 17 SPOUT1 SPKSPK+ 16 SPVSS 15 SPVDD
Speaker Path
D
C211 390p
R215 82K
12 EQ1 13 EQ2 14 EQ3 U203 TP128 TP129 28 29 30 31 32 _WR _CS A0 _RD IOVDD YMU762
AVL5M02200
C220 4.7U R222 0 A
VDD VSS
R227 0
VREF
CLK1 LED _IRQ _RST NC PLLC
47p
47p
2V8_VMEM
HSP205
10K
AVL5M02200
18p
V204
V203
11 HPOUT-R 10 HPOUT-L
TAN_CAP2012 13MHZ _MIDI_IRQ _MIDI_RESET 2V8_VMEM
A
A
A
A
A
A
1 2 3 4 5 6
7 8
C210
C214
TP117 100n 3.3K 100n
100n
E
HEADSET_SPK_P1
U204 MAX4624 5
C218
A
4.7U
TAN_CAP2012
TP130
R216
C217
C215
9
HSP204
R217
C219
C213
_WR _MIDI_CS MIDI_A0 _RD
C216
2 6 4 3 R223 NC 1 IN NC(4) OFF ON NO(6) 3 ON 5 L OFF VOUT VOUT_SENSE BYPASS VEN U205 LP3981 VIN 2 4 6 R221 LDO_SD 0 C221 2.2U (2012) C222 100N 7 C223 2.2U (2012) HEADSET_SPK_P HFK_SPK_P VBAT 1n +
E
1 HEADSET_EN
MAX4624 ACTIVE
R220
10K
H
F
F
L
1
2
3
4
5
6
7
8
- 110 -
8. CIRCUIT DIAGRAM
8.3 KEY, I/F & LCD CON
1
2
3
4
5
6
7
8
KEYPAD
POWERKEY
S310
A
1
SP332
ON/OFF
2V8_VMEM
I/F CONNECTOR
A
R332
S304 SIDEKEY 4 UP KEYROW(0:4) 1
S308 SIDEKEY 4 DOWN S325 MENU
R331 HKEYROW HKEYCOL 100K
R330
VBAT 100K 100K
VCHARGE CN302 19 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
KEYROW(0) SP336
S315 1
S314 2
S313 3
S302
S301 UP DSR USC(0) USC(1) USC(2) USC(3) USC(4) R323 R324 R325 R326 R327 R328 NC 47 47 NC 47 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
KEYROW(1) SP334
SOFT2
S318 4
S317 5
S316 6
S311
S306 RIGHT USC(5) ACCESSORY_DETECT RX TX HFK_SPK_N HFK_SPK_P HFK_MIC_P HEADSET_MIC_N RPWRON 1 3 5 7 2 4 6 8
KEYROW(2) SP333
SEND
S321 7
S320 8
B
KEYROW(3) SP328
S319 9
S303
S307 LEFT
MNR04 47R R333 0
B
SOFT1
R329
47
S324 *
S323 0
S322 #
S305
S309 DOWN
BAT_TEMP C170 NC SP341 SP342 SP343 SP344 SP345 SP347 SP352 SP354 SP340 SP346 SP351 SP353 SP349 U415 C314 C315 SP348
KEYROW(4) SP330
MODE
20 20 21 21 22 22 23 23 20_5123_018 I/F CON22P
SP337
SP335
SP338
SP331
SP329
A 39P 39P
KEYCOL(0:4) KEYCOL(0) KEYCOL(1) KEYCOL(2) KEYCOL(3) KEYCOL(4)
C
C
FLIP SWITCH
2V8_VMEM
VBAT
KEY BACKLIGHT
D313 D312 D311 D310 D308 D309 D306 D307 D304 D305 D302 D303
2V8_VMEM
LCD CONNECTOR
2V8_VMEM VBAT 2V45_VRTC R312 CN301 0 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
D
R310 68K FLIP KEY_BACKLIGHT C305 100n 1 2 U301 A3210 3 C306 100n R321 100K IMX9 R320 10 R322 10 SP339 R319 1.5K 2 1 6 Q302 4 3 5 HKEYCOL HKEYROW SPK+ SPKREC+ RECVIBRATORLCD_SUB_CS LED_B LED_G LED_MAIN BACKLIGHT LCD_RES LCD_ID _WR DATA(0) DATA(1) DATA(2) DATA(3) DATA(4) DATA(5) DATA(6) DATA(7) LCD_RS LCD_MAIN_CS
100K
R334
TP305 TP301
D
TP306
TP303
E
VIBRATOR
VBAT VBAT R307 0 2 D301 ISS302 3 2 5 LED_MAIN 15 Q301 R309 1K 2SC5585TL 2 3 U302 MAX4599 1 3 R317 4.7K C312 100n R318 10K 6 4 LED_R VCHARGE 1 C311 100n
R316 R306 R315 R304 R314 R303 R313 R302 TP304 TP302
1K 1K 1K 1K 1K 1K 1K 1K
E
30P_FPCB_CON
SP315
SP312
27P
27P
27P
27P
27P
27P
27P
VIBRATORR301
27P
SP301 SP316 SP308 SP317 SP302 SP318 SP309 SP319 SP303 SP320 SP310 SP321 SP304 SP311 SP322 SP305 SP323 SP350 SP306 SP324 SP313 SP325 SP307 SP326 SP314
C301
C308
C303
C307
C302
C304
C309
C310
SP327
F
VIBRATOR
F
1
R311 100K
RPWRON
L
1
2
3
4
5
6
7
8
- 111 -
8. CIRCUIT DIAGRAM
8.4 RF
1
2
3
4
5
6
7
8
RF2.85V RF2.85V R424 10 L410 U412 AD8315 1 RFIN VPOS 5 COMM ENBL 6 NC VSET 4 FLTR VAPC 10N 8 2 3 7 R428 20K C438 51P C430 22P R425 R427 100 2.2K TXEN TXRAMP C433 100N C465 100P RXQN C435 27P RF2.85V C428 100N RXIP C466 100P RXIN RXQP
ANT401 ANT_PAD_LGX
A
R421 51 R423 240 R420 L412 22nH R445 0 51
A
C442 150P R422 0
RF2.85V RF2.85V R472 0 R429 1.8K
C403 NA
R447 0
R419
C432 2P NC
C440 100N GSMSEL TP411 C426 33P C425 10P
C441 22P
C437 100N
N401 C404 NA LDC15D190A0007A 4 1 2 3 2 6 5 4 3 1 SW401 MHS-170 8 C414 C412 R403 51 7 6 5 L408 NC C407 L413 L405 NC 4 POUT_GSM 5 POUT_DCS
7
2
VCTL
VAPC
B
R407 51 1 8 R404 110 C431 12P R409 110
C445 10U
(2012)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50
C448 1U (1608)
R432 5.6K
B
PIN_GSM PIN_DCS
GND2 GND1 VDD2 VDD1
TxGSM NC1 NC2 NC3 VCCTxVCO VCC4 RxIP RxIN RxQP RxQN LON LOP VCC3 VCCUHF UHFTune
RF2.85V
C456 220P
PF08107B U409
10 9
6 3
VBAT R415 51 1 2 TP4043 4 TP4015 6 7 8 9 10 11 12 13 14 15 16 17
NA
NA
6.8nH
NA
C427 12P
C406 47P
C443 470u
C429 1n
C470 NC
R417 110
R411 110
RXEN TXEN BANDSEL1
TP402
R416 R446 51
510 C471 2P TP403
R414
390
C
C420 R413 390 (1608) 47P R412 L414 150N 10 C418 100N C419 22P RF2.85V
TxDCSPCS TxVCOTune RXEN TxEN PCO1 PCO2 TXBYPASS VCC1 TxCPO TxINP LNAGSMIN GNDLNAGSM LNADCSIN FEENA LNAPCSIN NC6 NC7
U411 CX74017
UHFBYP VDDBB LE CLK DATA LDMUX SXENA VCCFNCP UHFCPO GNDCP GNDFN FREF VCCF VCCD GNDD NC4 NC5
49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
RF2.85V TP409 TP408 TP407 TP405 TP406 PLL_LE PLL_CLK PLL_DATA PLL_PD
C455 680P
R436 2.2K
R435 10
C458 8.2N (2012 FILM)
C452
10P
C453 22P
C454 100N RF2.85V RF2.85V
R434 10
R431 10
C469 10P FILTN FILTP TxIP TxIN TxQP TxQN TxFP TxFN VCC2 CapIP CapIN CapQP CapQN LPFADJ T_H GND1 G1
C
ANT 4 6 7 9 12 13 14 GND1 DCS_TX 3 GND2 EGSM_TX 5 GND3 GND4 GND5 DCS_RX 1 GND6 EGSM_RX 10 GND7 VC2 VC1
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
8
U405 LMG002S-5008C
TP410 C439 C444 T_H R430 39K,1% 470P L411 82N
C451 22P
C450 100N
C447 22P
C446 100N
R410
1K
C411 1000P (1608) COG
C413 12P
(1608 COIL) C434 22P
11 2
RF2.85V
L404 2.7N
U408 SAFSE942MAL0T00R00 1 3 NT OUT 2 4 C410 1.5P C417 2.2P
L407 12N
C436 100N
D
470P
D
TXQN C463 100P
C405 NA
C467 NA
L403 1.8N
U407 SAFSE1G84KA0T00R00 1 3 NT OUT C409 NC 2