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CDX-3183
4-4. SCHEMATIC DIAGRAM -- CD MECHANISM SECTION -- · Refer to page 22 for Waveforms and Note and page 37 for IC Block Diagrams.
(Page 33)
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CDX-3183
4-6. SCHEMATIC DIAGRAM -- DISPLAY SECTION --
(Page 36)
Note: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · U : B+ Line. · Power voltage is dc 14.4V and fed with regulated dc power supply from ACC and BATT cords.
· C : panel designation. · Voltage is dc with respect to ground under no-signal (detuned) condition. no mark : FM · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances.
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CDX-3183
4-8. SCHEMATIC DIAGRAM -- MAIN SECTION (1/2) -- · Refer to page 39 for IC Block Diagrams.
(Page 26)
(Page 35)
Note: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. ¢ · : internal component. · C : panel designation. · U : B+ Line. · Power voltage is dc 14.4V and fed with regulated dc power supply from ACC and BATT cords. · Voltage is dc with respect to ground under no-signal (detuned) condition. no mark : FM ( ) : MW · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. · Signal path. F : FM f : MW J : CD
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CDX-3183
4-9. SCHEMATIC DIAGRAM -- MAIN SECTION (2/2) -- · Refer to page 34 for Note and page 39 for IC Block Diagrams.
(Page 34)
(Page 29)
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· IC Block Diagrams IC1 CXD2507AQ
XLON SPOD SPOC SPOB SPOA CLKO VDD XLTO DATO CNIN SEIN CLOK XLAT
64 63 62 61 60 59 58 57 56 55 54 53 52
FOK MON MDP MDS LOCK TEST FILO FILI PCO VSS AVSS CLTV AVDD
1 2 3 4 5 6 7 8 9 10 11 12 13
SERVO AUTO SEQUENCER
5
14
CPU INTERFACE
SUB CODE PROCESSOR 4 DIGITAL CLV
DIGITAL PLL
EFM DEMODULATOR
51 50 49 48 47 46 45 44 43 42 41 40
DATA XRST SENS MUTE SQCK SQSO EXCK SBSO SCOR VSS WFCK EMPH
3 ASYMMETRY CORRECTOR 5 D/A INTERFACE DIGITAL OUT
CLOCK GENERATOR
39 DOUT 38 37 36 35 34 C4M FSTT XTSL XTAO XTAI
RF BIAS ASYI ASYO ASYE
14 15 16 17 18
16K RAM
ERROR CORRECTOR 3
6
WDCK 19
33 MNTO
20 21 22 23 24 25 26 27 28 29 30 31 32
LRCK PCMD BCLK GTOP XUGF XPCK VDD GFS RFCK C2PO XROF MNT3 MNT1
CH3-IN CH2-IN
IC3 BA6796FP-T1
OP IN OP IN + CH1-IN CH1 + CH1 VREF CH3 CH2 CH2 + CH2 VCC CH1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LEVEL SHIFT
VCC LEVEL SHIFT
DRIVE BUFFER
DRIVE BUFFER
DRIVE BUFFER
DRIVE BUFFER
LEVEL SHIFT
THERMAL SHUT DOWN
LEVEL SHIFT
LOGIC CTL1 CTL2 FWD REV
V/I
DRIVE BUFFER
DRIVE BUFFER
DRIVE BUFFER
DRIVE BUFFER
DRIVE BUFFER
1
OPOUT
2
CH4-IN
3
CH4
4
CTL1
5
CTL2
6
FWD
7
REV
8
TRAY
9
GND
10
CH5
11
COM
12
CH4 +
13
CH3 +
14
CH3
37
IC2 CXA1782BQ
PHD 2 PHD 1 RF M RF O PHD RF I CC1 CC2
IIL DFCT TTL 23 C.OUT
36
35
34
33
32
31
30
29
28
27 26 25
APC
LEVEL S
FOK
MIRR RF IV AMP1
FOK
24
LD
CP
CB
SENS
TTL RF IV AMP2 FE BIAS 37 TTL IIL DATA REGISTER INPUT SHIFT REGISTER ADDRESS DECODER
22 21 20
XRST DATA XLT CLK
FE AMP
IIL IIL OUTPUT DECODER 19
F
38 F IV AMP TOG1-3 BAL1-3 FZC COMP FS1-4 TG1-2 TM1-7 PS1-4
E
39
18
VCC
E IV AMP EI 40 TE AMP
BAL1
BAL 3
BAL2
HPF COMP VEE
LPF COMP
TRACKING PHASE COMPENSATION TM6
ISET
17
ISET
41 TG1 16 SL O SL M
TED 42
TOG1
TOG2
TOG3
TM5 TM4 TZC COMP FCS PHASE COMPENSATION TM3 TM2
15
LPFI 43 TEI 44 WINDOW COMP ATSC DFCT
14
SL P
DFCT TM1 FS1 TM7 FS2 13 TA O
ATSC 45 TZC 46
TDFCT 47
TG2
VC
48
FS4
1
2
3
4
5
6
7
8 9
10
11
F SET
12
FEO
SRCH
FDFCT
FSET
FGD
FLB
FE O
TGU
TG2
FEI
38
TA M
FE M
IC401 LC75374E
LTOUT LSIN NC LVRIN LCOM NC LSB1 LT1 LT2 LT3 LSB2 23 22 LFIN + + + + + 21 LFOUT
33
32
31 30
29
28 27 26 25 24
DECODER
LATCH
1 RVRIN
2 RCOM
3 4 RT1 RT2
5 RT3
6 7 8 9 10 RTOUT RSIN NC NC RSB1
11 RSB2
IC701 SM5852FS-E2
LRCI 1 BCKI 2 DI 3 16 15 14 13 DB/DS MOD2 MOD1 OPT
IC702 SM5878AM-E2
24 ATCK 23 MODE
INPUT INTERFACE
DIGITAL SIGNAL PROCESSOR
MUTE
1
CLK 4 VSS 5 RSTN 6 TESTN 7 MUTEN 8
SYSTEM CLOCK
12 VDD
DEEN
2
R
SEQUENTIAL CONTROL MUTE CONTROL
OUTPUT INTERFACE
11 LRCO 10 BCKO 9 DOUT
L
R
L
MODE CONTROL
CKO DVSS BCKI DI
3 4 5 6
DVDD 7 LRCI 8 TSTN 9 TO1 10
AVDDL 11
LO 12
39
+
R1 R2 R3 R4 RSELO
40 41 42 43 44
+
+
+
+
VDD 39
+
LSELO L4 L3 L2 L1
34 35 36 37 38
+ +
20 LROUT
19 VREF CONTROL 18 CE 17 DI 16 CL 15 VSS 14 RROUT
+
+ SHIFT REGISTER +
13 RFOUT 12 RFIN
ATTENUATION COUNTER
FILTER & ATTENUATION OPERATION BLOCK
NOISE SHAPER OPERATION BLOCK
TIMING CONTROL
22 RSTN 21 DS 20 XVSS
INPUT INTERFACE
CLOCK GENERATOR
19 XTO 18 XTI 17 XVDD 16 MUTE
11 LEVEL DEM DAC LPF AMP
11 LEVEL DEM DAC
11 LEVEL DEM DAC LPF AMP
11 LEVEL DEM DAC
15
AVDDR
14 RO 13 AVSS