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SCHEMATIC DIAGRAM - 15
: +B SIGNAL LINE : -B SIGNAL LINE : DVD AUDIO SIGNAL LINE : MAIN SIGNAL LINE

ASP CIRCUIT

C233 0.1 C215 50V1
R171 R170 100K 100K

C216 16V10 R201 3.9K C221 16V10 C220 R204 50V1 1K R207 18K R205 3.9K C222 50V0.15

R246 1K R247 22K

R244

R200 1K R203 18K

C217 C218 0.15 C235 16V10 100P

C237 C223 100P 16V10 <-7.7V> ((-7.8V)) <7.7V> ((0V)) <7.7V> ((0V)) <7.7V> ((0V))

<7.74V> ((7.4V))

<0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V))
41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

42

25
AVSS

24
PORT6

23
PORT5

22
PORT4

GND2

GND3

AVDD

GND1

DATA

PORT1

PORT2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

<5.7V> ((4.96V))

<0V> ((7.7V))

<0V> ((7.7V))

<0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> <0V> ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) ((0V))

R259 6.8K

TO CP106 MAIN 1 CIRCUIT (W106) ON 2 SCHEMATIC DIAGRAM-25

6CHSR R261 6.8K
R262 3.3K

R210 12K C226 16V10 C238 220P
C227 16V10 R209 1.8 C225 50V1 C229 50V1

47K

47K

6CHSL R260 3.3K R257 12K 6CHC R263 8.2K
R258 1.8K

R215

R264 2.7K

6CHSW

R216

1 2 3 4 5 6 7 8 9 10

4CHVOL_LT 4CHVOL_CK 4CHVOL_DT DGND SW_5V SGND2 VR_ATT ASPECT SW_ATT1 SW_ATT2 6CHSW 6CHC 6CHSR 6CHSL DPLC DPLS DSPFR
<7.8V> ((-7.8V)) <7.7V> ((0V))

+7.5V

Q137
R245 1K

DSP MUTING CONTROL SWITCH

KRA111MTA

4CHVOL_CK

4CHVOL_DT

4CHVOL_LT

-7.5V

R217

R213 3.3K

D102 B0BC5R000009

2.2K

2.2K

4.7K

R211 1K

C231 16V10

R214 390

C242 0.1

R243 1.5K

SWCH CCH

IC108

Q137
<0V> ((0V))

<4.21V> ((4.2V))

TRIPLE 2CH ANALOG MULTIPLEXOR R241 1.5K C251 16V10

C0JBAR000292

TO DSP CIRCUIT (CN806) ON SCHEMATIC DIAGRAM-17

11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

R172 100K

<4.24V> ((4.24V))

R242 15K

R251 C253 100K 0.1

R252 470

DSPFL LINEOUTR LINEOUTL AUXR AUXL VCRR
X0 X1 C252 0.1 VDD

Y1

Y0

Z1

Z0

<0V> <0V> <0V> <0V> <0V> ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) 5 4 1 2 3 6

7
VSS

<0V> ((0V)) 8
G

<0.67V> ((0.67V))

<0V> ((0V))

Q142
<0V> ((0V))

R255 100K

INH

Q142

B1AAGC000007
MUTING SWITCH (DSP LCH)

IC108
16 <7.8V> ((7.8V)) 12 11 13 15 14 10 <0V> <0V> <0V> <0V> <0V> ((0V)) ((0V)) ((0V)) ((0V)) ((0V)) 9 <0V> ((7.7V))
<0.67V> ((0.67V)) <0V> ((0V))

VCRL TVR TVL

B

C

A

CN106

<0V> ((7.8V))

Q143
<0V> ((0V))

R254 100K

Q143

R256 1K

R253 470

B1AAGC000007
MUTING SWITCH (DSP RCH)

LINEOUTR

LINEOUTL AUXR

SW_ATT2

SW_ATT1

MUTE_S

R219

R220

R212 12K C230 16V10 C239 220P

R218

C241 47P

47K

C240 47P

<0V> ((5.1V))

ASPECT

PROGRESSIVE

SW_5V

SUR_R

DSPFR

SUR_L

DSPFL

DGND

<0V> ((7.7V))

PORT3

CCH

SWCH

SWCH

DGND

DVDD

CCH

CLOCK

LATCH

DPL SURROUND DECODER

M62444FPE1

IC106

OUT PUT PORT

AVDD

IC106

LCH

LCH

RCH

RCH

SWCH CCH

10

9

8

7

6

5

4

3

2

1

CN104

7

6

5

4

3

2

1

CN105

7

6

5

4

3

2

1

SGND

VCRR

VCRL

+7.5V

AUXL

-7.5V

TVR

TVL

CN103

TO INPUT CIRCUIT (CP104) ON SCHEMATIC DIAGRAM-14

TO INPUT CIRCUIT (CP105) ON SCHEMATIC DIAGRAM-14

TO INPUT CIRCUIT (CP103) ON SCHEMATIC DIAGRAM-14

1K

C243 0.01