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5
4
3
2
1
SOCKET-775
Note:
D
Do not include the schematic when create netlist.
D
Host Bus
AGP SLOT VGA PCI Slot 1
C
AGP BUS
AGP BUS
SiS648FX SIS661
DDR SDRAM
DIMM1 DIMM2
C
PCI Slot 2 PCI Slot 3 LAN
MuTIOL 1G
LAN PHY AC'97 Audio Codec
SiS964
IDE 1 IDE 2 Back Panel
B
Front Panel
B
SATAX2
KEYBOARD /MOUSE
PS/2 LPC Bus
USB 0 USB 1
USB 4 USB 5 USB 6 USB 7 USB 3
FAN 1
FAN CONTROL
USB 2
VOLTAGE MONITOR
FAN 2
LPC Super I/O
ISA Bus ISA ROM TEMPERATURE MONITOR
A
A
IR
PARALLEL
COM
FLOPPY
TECHNOLOGY COPR.
Title
Topology
Document Number Rev
648M06
Date:
5 4 3 2
B
Sheet
1
Wednesday, March 16, 2005
1
of
41
5
4
3
2
1
VCCP
VCCP
NORTHWOOD
CPUPWRGD CPURST_
VRD10/VRM9.X
D
VRMPWRGD
D
&
PWOK CPUPWRGD NBPWRGD CPURST_
ATX Power
PSON_
SiS648FX SiS661FX
NBRST_
C
AGP 8X SLOT
C
SiS963/SiS963L
SBPWRGD
PCI Slot 1 PCI Slot 2
NBRST_
PCI Slot 3
PCIRST_
Front Panel
PSON_
IDE CONN 1
B
RSTSW_ PWRBTN_
SIORST_
B
IDE CONN 2
PWRBTN_
SIORST_
SIORST_
Super IO
Media Interface
A
A
TECHNOLOGY COPR.
Title
Reset Map
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 2 of 41
B
5
4
3
2
1
14.318MHz
CPU
D
CPUCLK0
100/133/200 MHz
D
CPUCLK1
100/133/200 MHz
66 MHz AGPCLK1 133 MHz ZCLK0 66 MHz AGPCLK0
AGP 8x DDR CLOCK BUFFER
DIMM 1-2
SiS648FX
FWDSDCLK0
DDRCLK
CLOCK GENERATOR
C
C
33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M REFCLK 133 MHz
33 MHz PCICLK1-3
PCI Slot 1-3
SiS964
B
B
AUDIO_CLK 32.768KHz
AC'97
24.576MHz/NC 48 MHz SIO48M
Super I/O
A
A
TECHNOLOGY COPR.
Title
Clock Distribution
Document Number Rev
648M06
Date:
5 4 3 2
B
Sheet
1
Wednesday, March 16, 2005
3
of
41
5
4
3
2
1
DDR 2 DIMMS:
ATX SPS
5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V
ATX 12V P/S
+ 1 2 V MPGA478 +12V
VCC3
SB5V
> >
2.5V REGULATOR
S3AUXSW-
VCC2.5_MEM
> 2.5V +/-100mv
6.00A
D
REGULATOR
D
VCC2.5_MEM DDR_VTT_STR
DDR VTT
>
MIC5258
VRD 10
CORE_CPU_SYS
>
VCCVID
> >
VCCP 1.1V~1.85V 70A VCC_VID 1.2V 30mA
>
VCC3
1.25V REGULATOR
> 1.25V
2A
SIS648FX
VCC1.8V 1.8V 1389.5mA VDDQ: AGP 1.5V 35.1/21.7mA SB1.8V 1.8V 10mA
VCC3_DUAL PWRG_ATX 5V_DUAL VCC3
C
SB5V
AIC1086 VCC3
SB3V
PWRG_ATX
VCC3_DUAL
> > > >
VCC3: 3.3V 108mA VCC3_DUAL 33.4mA VCC2.5_MEM 2.5V 501.3mA
VCC1.8V VCCP
SB3V
3 VOLTS BATTERY
> OR >
VCC_RTC
VCC_RTC
> > > > >
SIS963L
VCC3: 3.3V
VCC3_DUAL
VCC1.8V 1.8V
RTCVDD
VCCP
C
AIC1084
VCC1.8V
CLK_GEN VCC3
> > > >
VCC5
VCCP VCC5_DUAL 5V_SYS VCC3 VCC5 +12V -12V VCC3_DUAL
B
3.3V 300mA
> > > > >
PCI PER SLOT: 3.3V 5V 12V -12V 3.3Vaux 0.375A 7.6A 5.0A 0.5A 0.1A
VCC3_DUAL
SUPER I/O VCC5_DUAL 5V VCC3_DUAL
>
VCC5_DUAL VCC5_DUAL
FWH
B
VCC5
PWRG_ATX
SB5V VCC3_DUAL
> LAN PHY
+12V AUDIO VREG VCC5A
> >
USB POWER 5V PS2 KB/MS POWER 5V
VCC3 VCC3 +12V
A
AIC1084
VDDQ 1.5V
VCC5 VCC3_DUAL
> > > > >
AGP
VCC3
> >
AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA
A
TECHNOLOGY COPR.
Title
Power Delivery Map
Document Number Rev
648M06
Date:
5 4 3 2
B
Sheet
1
Wednesday, March 16, 2005
4
of
41
5
4
3
2
1
9 HDJ[63..0] HDJ[63..0] 9
HAJ[31..3]
HAJ[31..3]
U11A U11B HDJ0 HDJ1 HDJ2 HDJ3 HDJ4 HDJ5 HDJ6 HDJ7 HDJ8 HDJ9 HDJ10 HDJ11 HDJ12 HDJ13 HDJ14 HDJ15 9 9 9 HDBIJ0 HDSTBNJ0 HDSTBPJ0 HDJ16 HDJ17 HDJ18 HDJ19 HDJ20 HDJ21 HDJ22 HDJ23 HDJ24 HDJ25 HDJ26 HDJ27 HDJ28 HDJ29 HDJ30 HDJ31 9 9 9 HDBIJ1 HDSTBNJ1 HDSTBPJ1 HDBIJ1 HDBIJ0 B4 C5 A4 C6 A5 B6 B7 A7 A10 A11 B10 C11 D8 B12 C12 D11 A8 C8 B9 G9 F8 F9 E9 D7 E10 D10 F11 F12 D13 E13 G13 F14 G14 F15 G15 G11 G12 E12 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1# 2 OF 7 HAJ3 HAJ4 HAJ5 HAJ6 HAJ7 HAJ8 HAJ9 HAJ10 HAJ11 HAJ12 HAJ13 HAJ14 HAJ15 HAJ16 9 HREQJ[4..0] HREQJ0 HREQJ1 HREQJ2 HREQJ3 HREQJ4 9 HAJ[31..3] HAJ[31..3] 9 HAJ17 HAJ18 HAJ19 HAJ20 HAJ21 HAJ22 HAJ23 HAJ24 HAJ25 HAJ26 HAJ27 HAJ28 HAJ29 HAJ30 HAJ31 HDBIJ3 HDSTBNJ3 HDSTBPJ3 9 9 9 TP10 TP5 TP7 TP6 TP_LAG775_PIN_AH4 TP_LAG775_PIN_AH5 TP_LAG775_PIN_AJ5 TP_LAG775_PIN_AJ6 HADSTBJ0 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AC4 AE4 AD5 A03# ADS# A04# BNR# A05# HIT# A06# RSP# A07# BPRI# A08# DBSY# A09# DRDY# A10# HITM# A11# IERR# A12# INIT# A13# LOCK# A14# TRDY# A15# BINIT# A16# DEFER# RSVD1 EDRDY# RSVD2 MCERR# REQ0# REQ1# AP0# REQ2# AP1# REQ3# REQ4# BR0# ADSTB0# TESTHI08 PCREQ# TESTHI09 TESTHI10 A17# A18# DP0# A19# DP1# A20# DP2# A21# DP3# A22# A23# GTLREF A24# A25# RESET# A26# A27# RS0# A28# RS1# A29# RS2# A30# A31# A32# A33# A34# A35# RSVD3 RSVD4 ADSTB1# D2 C2 D4 H4 G8 B2 C1 E4 AB2 P3 C3 E3 AD3 G7 F2 AB3 U2 U3 F3 G3 G4 H5 J16 H15 H16 J17 H1 G23 B3 F5 A3 HBR0J TESTHI_8 TESTHI_9 TESTHI_10 TP_DPJ0 TP_DPJ1 TP_DPJ2 TP_DPJ3 HGTLREF HCPURSTJ 9 HRSJ0 9 HRSJ1 9 HRSJ2 9 Place at CPU end of route HBR0J HADSJ HBNRJ HITJ HBPRIJ HDBSYJ HDRDYJ HITMJ INITJ HLOCKJ HTRDYJ TP_EDRDYJ 9 9 9 R255 9 9 9 9 14,31 9 9 TP_EDRDYJ
D
D
D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3#
G16 E15 E16 G18 G17 F17 F18 E18 E19 F20 E21 F21 G21 E22 D22 G22 D19 G20 G19 D20 D17 A14 C15 C14 B15 C18 B16 A17 B18 C21 B21 B19 A19 A22 B22 C20 A16 C17
HDJ32 HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDBIJ2
HIERRJ
20 R0603 +/-5%
HDEFERJ 9 GTLREF voltage 12 mils width, divider should caps should be 9 VTT_OUT_RIGHT should be 0.67*FSB_VTT 15 mils spacing be within 1.5" of the GTLREF pin placed near CPU pin
HDBIJ2 HDSTBNJ2 HDSTBPJ2
9 9 9
C
HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63 HDBIJ3
TP3 TP4 TP2 TP1
1) PLACE THOSE CIRCUITS < 1.5" FROM THE BALL 2) THE 220PF CAPS HAS TO BE CLOSED TO THE BALL AS POSSIBLE.
R264 100 +/-1% R0603
*
C315 1uF 10V, Y5V, +80%/-20% C0603
*
C317 220pF 50V, X7R, +/-10% C0603
R265 210 +/-1% R0603
C
GTLREF= 0.67 * VTT = 0.8V GTLREF GENERATION CIRCUITS
HCPURSTJ
TBD
TBD
Pin CRB Pin CRB D23 0.7: test point TP_VCCPLL AM5 0.7: test point TP_VID6
HBR0J CRB 0.7: 220 ohm, 5% DG 0.51: 62 ohm, 5%
CPU Prescott_Socket_LGA775_Rev0.5
TBD
Pin AL2 PROCHOT# CRB 0.7: pull up to VTT_OUT_RIGHT DG/611A: example VR thermal monitor circuit
9
HADSTBJ1
*
VTT_OUT_RIGHT
CPU Prescott_Socket_LGA775_Rev0.5 1 OF 7
C198 22pF 50V, NPO, +/-5% C0603 Dummy
U11C 14 14 14 14 14 14 14
B
3 OF 7 TESTHI00 TESTHI01 TESTHI11 TESTHI12 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHI06 TESTHI07 RSVD10 RSVD11 SLP# RSVD12 PWRGOOD PROCHOT# THERMTRIP# COMP0 COMP1 COMP2 COMP3 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 F26 W3 P1 W2 F25 G25 G27 G26 G24 F24 AK6 G6 L2 AH2 N1 AL2 M2 A13 T1 G2 R1 N5 AE6 C9 G10 D16 A20 E23 E24 F23 H2 J2 J3 Y1 V2 AA2 CPU_BOOT LL_ID0 HCOMP0 HCOMP1 HCOMP2 HCOMP3 TESTHI_0 TESTHI_1 TESTHI_11 TESTHI_12 TESTHI_0 6 FSB_VTT VTT_OUT_LEFT 10 mils width 7 mils spacing 100 R0603 +/-1% 100 R0603 +/-1% 60.4R0603 +/-1% 60.4R0603 +/-1% 10 mils width 7 mils spacing CPUSLPJ CPU_PWRG PROCHOTJ THERMTRIPJ 14 14 14 14 VTT_OUT_LEFT VTT_OUT_RIGHT FSB_VTT
SMIJ A20MJ FERRJ INTR NMI IGNNEJ STPCLKJ HVCCA HVSSA HVCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 VID0 VID1 VID2 VID3 VID4 VID5
P2 K3 R3 K1 L1 N2 M3 A23 B23 D23 C23 AM2 AL5 AM3 AL6 AK4 AL4 AM5 F28 G28 AE8 AL1 AK1 TP_VCCSENSE TP_VSSSENSE AN3 AN4 AN5 AN6
SMI# A20M# FERR#/PBE# LINT0 LINT1 IGNNE# STPCLK# VCCA VSSA RSVD5 VCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 RSVD6 BCLK0 BCLK1 SKTOCC# THERMDA THERMDC
TBD
Pin AK6, G6 refer to CRB 0.7 TESTHI_2_7 RSVD_AK6 RSVD_G6 R145 R139 62 62 R0603 +/-5% Dummy R0603 +/-5% TESTHI_0 TESTHI_2_7
R268 R272 R166 R271
HCOMP2 HCOMP3 HCOMP0 HCOMP1
*
C326 0.1uF 16V, Y5V, +80%/-20% C0603
*
C327 0.1uF 16V, Y5V, +80%/-20% C0603
B
6 6 6 7 7 7 7 7 7
*1
3 5 7 R279 R245 R251 R151 R267 R266 R270 VTT_OUT_RIGHT R286
RN12 +/-5% 8P4R0603 62 2 4 6 8 62 62 62 62 62 62 62 R0603 R0603 R0603 R0603 R0603 R0603 R0603 TESTHI_9 TESTHI_8 TESTHI_10 TESTHI_1 +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% Dummy +/-5% Dummy TESTHI_11 TESTHI_12 CPU_PWRG HCPURSTJ HBR0J RSVD_G6 CPU_BOOT R243 R252 R240 R246 62 62 130 62 R0603 R0603 R0603 R0603 +/-5% +/-5% +/-1% Dummy +/-5% Dummy HIERRJ THERMTRIPJ PROCHOTJ FERRJ
*
C316 0.1uF 16V, Y5V, +80%/-20% C0603
*
C320 0.1uF 16V, Y5V, +80%/-20% C0603
INTEL THERMTRIPJ, FERRJ PULL HIGH FSB_VTT
FSB_VTT VTT_OUT_RIGHT R263 R261 R262 R249 R250 R260 R254 R253 56R0603 56R0603 56R0603 56R0603 56R0603 56R0603 56R0603 56R0603 +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% A20MJ STPCLKJ CPUSLPJ SMIJ INITJ IGNNEJ INTR NMI
17 17
CPUCLK0 CPUCLK-0
DIFFERENTIAL CLOCKS RULE
32 32 THERMDA THERMDC TP9 TP8
A
TBD
Pin N5 ~ Pin J3 CRB 0.7: connections ok?
*
7 7
VCCSEN VSSSEN
BOOTSELECT LL_ID0 LL_ID1
R288 LL_ID0 7 R287
680 R0603 +/-5% 62 R0603 +/-5% Dummy
CPU Prescott_Socket_LGA775_Rev0.5
5 4 3 2
* *
VCCSENSE VSSSENSE VCC_MB_REG VSS_MB_REG Changed pin name F29 from RSV RSVD9
680 R0603 +/-5%
VID0 VID3 VID2 VID4 VID1 VID5
C331 0.1uF 16V, Y5V, +80%/-20% C0603
RN14 680 8P4R0603 +/-5% 8 6 4 2 7 5 3 1
NEAR CPU
A
TECHNOLOGY COPR.
Title
RSVD_AK6 Document Number
Clock Distribution
Rev
648M06
Date: Wednesday, March 16, 2005 Sheet
1
B
5 of 41
5
4
3
2
1
VCCP U11E AG22 K29 AM26 AL8 AE12 AE11 W23 W24 W25 T25 Y28 AL18 AC25 W30 Y30 AN14 AD28 Y26 AC29 M29 U24 J23 AC27 AM18 AM19 AB8 AC26 J8 J28 T30 AM9 AF15 AC8 AE14 N23 W29 U29 AC24 AC23 Y23 AN26 AN25 AN11 AN18 Y27 Y25 AD24 AE23 AE22 AN19 V8 K8 AE21 AM30 AE19 AC30 AE15 M30 K27 M24 AN21 T8 AC28 N25 AE18 W26 AD25 M8 N30 AD26 AJ26 AM29 M25 M26 L8 U25 Y8 AJ12 AD27 U23 M23 AG29 N27 AM22 U28 K28 U8 AK18 AD8 K24 AH28 AH21 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45 VCCP46 VCCP47 VCCP48 VCCP49 VCCP50 VCCP51 VCCP52 VCCP53 VCCP54 VCCP55 VCCP56 VCCP57 VCCP58 VCCP59 VCCP60 VCCP61 VCCP62 VCCP63 VCCP64 VCCP65 VCCP66 VCCP67 VCCP68 VCCP69 VCCP70 VCCP71 VCCP72 VCCP73 VCCP74 VCCP75 VCCP76 VCCP77 VCCP78 VCCP79 VCCP80 VCCP81 VCCP82 VCCP83 VCCP84 VCCP85 VCCP86 VCCP87 VCCP88 VCCP89 VCCP90 VCCP91 VCCP92 5 OF 7 VCCP93 VCCP94 VCCP95 VCCP96 VCCP97 VCCP98 VCCP99 VCCP100 VCCP101 VCCP102 VCCP103 VCCP104 VCCP105 VCCP106 VCCP107 VCCP108 VCCP109 VCCP110 VCCP111 VCCP112 VCCP113 VCCP114 VCCP115 VCCP116 VCCP117 VCCP118 VCCP119 VCCP120 VCCP121 VCCP122 VCCP123 VCCP124 VCCP125 VCCP126 VCCP127 VCCP128 VCCP129 VCCP130 VCCP131 VCCP132 VCCP133 VCCP134 VCCP135 VCCP136 VCCP137 VCCP138 VCCP139 VCCP140 VCCP141 VCCP142 VCCP143 VCCP144 VCCP145 VCCP146 VCCP147 VCCP148 VCCP149 VCCP150 VCCP151 VCCP152 VCCP153 VCCP154 VCCP155 VCCP156 VCCP157 VCCP158 VCCP159 VCCP160 VCCP161 VCCP162 VCCP163 VCCP164 VCCP165 VCCP166 VCCP167 VCCP168 VCCP169 VCCP170 VCCP171 VCCP172 VCCP173 VCCP174 VCCP175 VCCP176 VCCP177 VCCP178 VCCP179 VCCP180 VCCP181 VCCP182 VCCP183 VCCP184 AK12 AH22 T29 AM14 AM25 AE9 Y29 AK25 AK19 AG15 J22 T24 AG21 AM21 J25 U30 AL21 AG25 AJ18 J19 AH30 J15 AG12 AJ22 J20 AH18 AH26 W27 AL25 AN8 AH14 U27 T23 R8 AK22 AN29 AG11 AK26 J10 AJ15 AG26 AN9 AH15 AF18 AL15 J26 J18 J21 AG27 AK15 AF11 AD23 AM15 AF8 AK21 AG30 AJ21 AM11 AL11 AJ11 K30 AL14 AN30 AH25 AL12 AJ9 AK11 AG14 N29 AL30 AJ25 AH9 J29 J11 K25 P8 K23 AL19 AM8 T26 N28 AH12 AL22 AN15 AJ8 U26 AJ19 T27 AK8 AN12 AG9 N26
VCCP
VCCP U11F AF9 AF22 AH11 AJ14 AH19 AH29 AH27 AG28 AL26 AM12 J24 J13 T28 W28 J12 J27 AG19 AL9 AD30 AF21 Y24 AK14 J9 M27 AF14 J30 AG18 AA8 AG8 AL29 AD29 W8 AH8 N24 AN22 J14 K26 AF19 N8 AF12 M28 AK9 C10 D12 AM7 C24 K2 C22 AN1 B14 K7 AE16 B11 AL10 AK23 H12 AF7 AK7 H7 E14 L28 Y5 E11 AL16 AL24 AK13 AL3 D21 AL20 D18 AN2 AK16 AK20 AM27 AM1 AL13 AL17 C19 E28 AH7 AK30 D24 VCCP185 VCCP186 VCCP187 VCCP188 VCCP189 VCCP190 VCCP191 VCCP192 VCCP193 VCCP194 VCCP195 VCCP196 VCCP197 VCCP198 VCCP199 VCCP200 VCCP201 VCCP202 VCCP203 VCCP204 VCCP205 VCCP206 VCCP207 VCCP208 VCCP209 VCCP210 VCCP211 VCCP212 VCCP213 VCCP214 VCCP215 VCCP216 VCCP217 VCCP218 VCCP219 VCCP220 VCCP221 VCCP222 VCCP223 VCCP224 VCCP225 VCCP226 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 6 OF 7 AL23 A12 L25 J7 AE28 AE29 K5 J4 AE30 AN20 AF10 AE24 AM24 AN23 H9 H8 H13 AC6 AC7 AH6 C16 AM16 AE25 AE27 AJ28 AJ7 F19 AH13 AD7 AH16 AK17 E17 AH17 AH20 AE5 AH23 AE7 AM13 AH24 AJ30 AJ10 AF3 AK5 AJ16 AF6 AK29 AJ17 F22 AH3 AK10 AM10 F16 AJ23 F13 AG7 F10 L26 AD4 H11 L24 L23 AM23 A15 AH10 H29 B24 L3 H27 A21 AE2 AJ29 A24 AK27 AK28 B20 AM20 H26 B17 H25 H24 AA3 AA7 H23 AA6 H10 U11G H22 H21 H20 H19 H18 AB7 H17 AJ24 AM17 AC3 H14 P28 V6 AK2 P27 P26 AM28 AJ13 W4 P25 AJ20 W7 P23 AG13 AG16 AG17 C7 Y2 L30 L29 D15 AL27 Y7 L27 AA29 N6 N7 AA28 AN13 AA27 AA26 P4 AA25 AA24 P7 E26 V30 R2 V29 V28 R5 V27 R7 E20 AN10 V25 T3 V24 V23 T6 AL7 E25 U1 R29 R28 R27 R26 R25 U7 R24 R23 P30 V3 P29 AF16 AE10 AF13 H6 A18 A2 E2 D9 C4 A6 D6 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 7 OF 7 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 D5 A9 D3 B1 B5 B8 AJ4 AE26 AH1 E29 V7 C13 AK24 AB30 L6 L7 AB29 M1 AB28 E8 AG20 AN17 AB27 AB26 AN16 M7 AB25 AB24 AB23 N3 AA30 F4 AG10 AE13 AF30 H28 F7 AF29 AF28 G1 AF27 AF26 AF25 AN28 AN27 AF24 AF23 AG24 AF17 AN24 H3 AN7 P24 AE20 AE17 E27 T7 R30 AJ27 AB1 AM4 V26 AA23 AL28 AF20 AG23
D
C
VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125
VCCP Place these caps. inside CPU socket 10uF/SDK caps. co-layout
C235 C1206 10V, Y5V, +80%/-20%
C228 C1206 10V, Y5V, +80%/-20%
C224 C1206 10V, Y5V, +80%/-20%
C220 C1206 10V, Y5V, +80%/-20%
C225 C1206 10V, Y5V, +80%/-20%
C231 C1206 10V, Y5V, +80%/-20%
C234 C1206 10V, Y5V, +80%/-20%
C230 C1206 10V, Y5V, +80%/-20%
C227 C1206 C1206 10V, Y5V, +80%/-20%
C238 C1206 C1206 10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% R276 R277 R275 R278 R244 R274 R248 R269 R242 R241 R247
C221 C1206 10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20%
C237 C1206 10V, Y5V, +80%/-20%
C223 C1206 10V, Y5V, +80%/-20%
C219 C1206 10V, Y5V, +80%/-20%
C236 C1206 10V, Y5V, +80%/-20%
C233 C1206 10V, Y5V, +80%/-20%
C229 C1206 10V, Y5V, +80%/-20%
C226
D
*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF*10uF
C1206 10V, Y5V, +80%/-20%
note: 7/6-change termination 49.9 to RN702 47
Place BPM termination near CPU
VTT_OUT_RIGHT
62 62 62 62 62 62
R0603 R0603 R0603 R0603 R0603 R0603
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5%
HBPM5J HBPM4J HBPM3J HBPM2J HBPM1J HBPM0J
Intel Pull High RES 49.9Ohm.
VTT_OUT_RIGHT
C
62 62 62 62 62
R0603 R0603 R0603 R0603 R0603
+/-5% Dummy +/-5% +/-5% +/-5% +/-5%
HTDO HTMS HTDI HTCK HTRSTJ
GTLREF_SEL
Notes: 1. Cap. should be within 600 mils of the VCCA and VSSA pins 2. VCCA route should be parallel and next to VSSA route 3. Min. 12 mils trace from the filter to the processor pins 4. The inductors should be close to the cap.
GTLREF_SEL
9
FSB_VTT PLL Supply Filter
125mA
*L22
L0805 10uH 0805 +/-10%
125mA
*L23
L0805 10uH 0805 +/-10%
B
CPU Prescott_Socket_LGA775_Rev0.5
RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36
V1 F6 T2 Y3 AE3 W1 E7 B13 D14 E6 D1 E5
5
HVCCIOPLL C195 1uF 10V, Y5V, +80%/-20% C0603
*
5 HVCCA
*
R150 0 +/-5% R0603
B
CPU Prescott_Socket_LGA775_Rev0.5
HVCCA
ESL <= 5 nH, ESR < 0.3 ohm C194 10uF 10V, Y5V, +80%/-20% C1206 C191 10uF 16V, Y5V, +80%/-20% C1210 Dummy C197 10uF 10V, Y5V, +80%/-20% C1206 Dummy
*
5 HVSSA HVSSA
*
*
CPU Prescott_Socket_LGA775_Rev0.5
FSB_VTT U11D HTCK HTDI HTDO HTMS HTRSTJ HBPM0J HBPM1J HBPM2J HBPM3J HBPM4J HBPM5J 11,13 NBRSTAE1 AD1 AF1 AC1 AG1 AJ2 AJ1 AD2 AG2 AF2 AG3 AC2 AK3 AJ3
A
4 OF 7 A29 B25 B29 B30 C29 A26 B27 C28 A25 A28 A27 C30 A30 C25 C26 C27 B26 D27 D28 D25 D26 B28 D29 D30 AM6 AA1 J1 F27 VTT_OUT_RIGHT VTT_OUT_LEFT +12V VCC3 VTT_OUT_RIGHT R142 10K +/-5% R0603 D R141 249 +/-1% R0603 Q22 GTLREF_SEL TESTHI_0 G 2N7002 5 TESTHI_0 S R146 110 +/-1% R0603
TCK TDI TDO TMS TRST#
17 17
BSEL0 BSEL1
FSBSEL0 FSBSEL1 R138 1K +/-1% R0603 Dummy
G29 H30 G30
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 BPM0# VTT8 BPM1# VTT9 BPM2# VTT10 BPM3# VTT11 BPM4# VTT12 BPM5# VTT13 VTT14 DBR# VTT15 VTT16 ITPCLKOUT0 VTT17 ITPCLKOUT1 VTT18 VTT19 BSEL0 VTT20 BSEL1 VTT21 BSEL2 VTT22 VTT23 VTT24 VTTPWRGD VTT_OUT1 VTT_OUT2 VTT_SEL
*
C328 1uF 10V, Y5V, +80%/-20% C0603
*
VTTPWRGD 7 VTT_OUT_RIGHT VTT_OUT_LEFT
C193 0.1uF 16V, Y5V, +80%/-20% C0603
R144 62 +/-1% R0603
A
Place at CPU end of route
CPU Prescott_Socket_LGA775_Rev0.5 Title
FOXCONN PCEG
LGA775 -2
Size Date: Document Number
648M06
Sheet 6 of 41
1
Rev B
Wednesday, March 16, 2005
5
4
3
2
5
4
3
2
1
CPU Power Controller Intersil ISL6561 (VRD10.1)
VSSSEN
D
VSSSEN
*
DIFF
C242 82pF 50V, NPO, +/-5% C0603 Dummy
VCC5
* *
C282 0.1uF 16V, Y5V, +80%/-20% C0603
VSEN C245 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
VRM_PWRGD 38 C257 0.1uF VCC3 16V, Y5V, +80%/-20% C0603 Dummy R216 1K +/-5% R0603
D
*
*
Close to VRD Controller
C297 1uF 10V, Y5V, +80%/-20% 12V_POWER C0603 R213 5.6K +/-5% R0603
U13 32 5 5 5 5 5 5 5 VID4 VID3 VID2 VID1 VID0 VID5 VSSSEN 1 2 3 4 5 6 R173 Dummy 100 +/-5% R0603 VTTPWRGD C250 10nF 25V, Y5V, +80%/-20% C0603 Dummy 34 18 17 16 VCC VID4 VID3 VID2 VID1 VID0 VID5 (12.5) ENLL RGND VSEN DIFF PWM3 15 14 R189 1.5K +/-1% R0603 2.2Kohm R186 1K Dummy +/-5% R0603 C280 1nF 50V, X7R, +/-10% C0603 FB C269 27pF C0603 50V, NPO, +/-5% R199 22Kohm 11K R0603 +/-1% 6.8nF 11 REF FS 10 R210 1K +/-1% R0603 8 9 DAC OFS TCOMP 41 GND1 GND2 GND3 GND4 GND5 GND6 ISL6561 20K R0603 +/-5% Dummy R211 33.2K +/-1% R0603 47Kohm R209 3.9K +/-5% R0603 6 VTTPWRGD VTTPWRGD VTT_OUT_LEFT FB SB5V +12V R292 4.7K +/-5% R0603 Dummy G Q40 MMBT3904 Dummy R300 20K +/-5% R0603 Dummy Q41 2N7002 Dummy S R290 DIFF C323 22.1K +/-1% R0603 36 41 37 35 40 19 12 7 13 COMP IDROOP FB ISEN3+ ISEN3PWM4 ISEN4+ ISEN4OVP PGOOD EN PWM1 ISEN1+ ISEN1PWM2 ISEN2+ ISEN238 39 33 25 24 23 26 27 28 20 21 22 31 30 29 ISEN4+ ISEN3+ ISEN2+ ISEN1+ 820ohm R183
H : 1.25V
PWM1 360 R0603 +/-1% Phase1 8 VCCP Phase1_L 8 PWM2 360 R0603 +/-1% Phase2 8
R208
1K +/-5% R0603
TO CPU VCORE SENSE PIN
5
C
Close to VRD Controller
VCCP R176 Dummy 100 +/-5% R0603
*
VSSSEN VSEN DIFF
820ohm R184
VCCP Phase2_L 8 PWM3 8
C
VCCSEN
820ohm R182
360 R0603 +/-1% Phase3
VCCP Phase3_L 8
R205 R203 820ohm
*
PWM4 8 0 R0603 +/-5% VCC5 820 R0603 +/-1% Phase4 VCCP Dummy Phase4_L 8 Phase1 Phase2 Phase3 Phase4
*
*
C276
1.5nF C0603 50V, X7R, +/-10%
Switch Freq=280kHz
R220 C294 150K +/-1% R0603
1.5nF
*
C293 10nF 25V, X7R, +/-10% C0603 R217
*
*
1nF C0603 50V, X7R, +/-10%
C272 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
*
C254 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
*
C252 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
*
C253 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
Dummy
Close to VRD Controller
VCC5
B
B
nearby PWM
VTT_OUT_LEFT
SB5V R257 10K +/-5% R0603 G C Q38 MMBT3904 E S
R280 680 +/-5% R0603 D Q37 2N7002
R299 4.7K +/-5% R0603 Dummy R297 C Q43 MMBT3904 Dummy R298 4.7KB +/-5% R0603 Dummy
D
R284 2.74K +/-1% R0603
5
LL_ID0
10K B +/-5% R0603 Dummy
C
E
E
B
A
*
1uF C0603 10V, Y5V, +80%/-20%
A
FOXCONN PCEG
Title
Voltage Regulator Down 10.1
Size Document Number Custom Date:
5 4 3 2
648M06
Sheet
1
Rev B 7 of 41
Wednesday, March 16, 2005
5
4
3
2
1
VIN_PWM C144
L16 Dummy
*
Choke Coil 1.2uH
12V_POWER
*
12V_POWER
R81
4.7 +/-5% R0805 0 +/-5% R0805
*
D Q20 G R149 10K +/-5% R0603 S
C180 0.1uF 16V, Y5V, +80%/-20% C0603
*
C182 4.7uF 16V, Y5V, +80%/-20% C1206
*
EC15 1800uF 16V, +/-20% CE50D100H300 R175 15K R0603 +/-1%
R52
4.7 +/-5% R0805
BOOT1 R147
0.1uF C0603 16V, X7R, +/-10%
AOD412 L34
D
D
D
*
C132 1uF 16V, Y5V, +80%/-20% C0603 R152 0 +/-5% R0805
*
Phase1_L 7 C260 0.1uF C0603 16V, X7R, +/-10% VCCP
Q24 G S AOD412 G S
Q23 AOD412
R172 2.2 +/-5% R0805
Max Current-119A
Choke Coil 0.6uH
Thermal Current-101A
*
C110 4.7uF 16V, Y5V, +80%/-20% C1206
14
5
C244 1nF 50V, X7R, +/-10% C0805 VIN_PWM
U6 UGATE1 PHASE1 LGATE1 UGATE2 12 13 4 9 8 7 BOOT2 R45 0 +/-5% R0805 R82 4.7 +/-5% R0805
VCC
BOOT1
PVCC
BOOT1
11
C143
*
PWM1 BOOT2
1 10
PWM1 BOOT2 PGND GND
0.1uF C0603 16V, X7R, +/-10% R44
Q5
*
C106 0.1uF 16V, Y5V, +80%/-20% C0603
*
*
EC9 1800uF 16V, +/-20% CE50D100H300
D
R198
15K R0603 +/-1%
G 10K +/-5% R0603 S AOD412 R190 2.2 +/-5% R0805 L18
PHASE2 LGATE2
PWM2
2
*
PWM2
D
3
6
ISL6614A R49 0 +/-5% R0805
D
Q12 G S AOD412 G S
Q9 AOD412
Choke Coil 0.6uH
C
C
*
C112 4.7uF 16V, Y5V, +80%/-20% C1206
7 7 12V_POWER
PWM1 PWM2
PWM1 PWM2 R56 U8 4.7 +/-5% R0805 0 +/-5% R0805
C262 1nF 50V, X7R, +/-10% C0805 VIN_PWM
C136
*
D
Q4
PWM PHASE GND LGATE ISL6612
*
7
PWM3 R57 499K +/-1% R0603
3 4
8 5
R50
D
D
10K +/-5% R0603
S
AOD412 R171 2.2 +/-5% R0805
L17
Q8 R77 0 +/-5% R0805 G S AOD412 G S
Q11 AOD412
Choke Coil 0.6uH VCCP VCCP
Dummy
Close to U26
B
*
C243 1nF 50V, X7R, +/-10% C0805 VIN_PWM
*
C499 100uF 2V, +30%/-20% ctdh16
*
C494 100uF 2V, +30%/-20% ctdh16
C130
*
12V_POWER
R47 U5
4.7 Dummy +/-5% R0805 0 Dummy +/-5% R0805
Dummy D Q6
C134
PWM PHASE GND LGATE ISL6612 Dummy
D
D
2
Close to U27
VCCP
AOD412 Dummy
AOD412 Dummy
*
*
S
S
ATX12V_2X2 CN3 1 3
VCCP
A
4
R76 499K +/-1% R0603 Dummy
4
5
Q10
R73
0 Dummy +/-5% R0805
G
G
R187 2.2 +/-5% R0805 Dummy C263 1nF 50V, X7R, +/-10% C0805 Dummy
*
7
PWM4
3
8
R48 Dummy
AOD412 10K Dummy +/-5% R0603 Q13 S
L19
Choke Coil 0.6uH Dummy C149 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy FOR EMI ISSUE
*
EC20 560uF 4V, +/-20% CE35D80H200
*
EC21 560uF 4V, +/-20% CE35D80H200
*
EC19 560uF 4V, +/-20% CE35D80H200
*
EC22 560uF 4V, +/-20% CE35D80H200
*
EC30 560uF 4V, +/-20% CE35D80H200
*
EC17 1800uF 6.3V, +/-20% CE35D80H200
*
EC13 1800uF 6.3V, +/-20% CE35D80H200
*
EC16 820uF 2.5V, +/-20% CE35D80H130
*
EC12 1800uF 6.3V, +/-20% CE35D80H200
*
EC14 820uF 2.5V, +/-20% CE35D80H130
*
EC18 1800uF 6.3V, +/-20% CE35D80H200
Title
Put under CPU Heat-Sink 0.8V~1.55V/ 119A
Output CAP
Document Number Rev
648M06
Date:
5 4 3 2
Wednesday, March 16, 2005
Sheet
1
*
4.7 Dummy +/-5% 1uF C0603 R0805 Dummy 16V, Y5V, +80%/-20%
R61
7 6
PVCC VCC
BOOT UGATE
2 1
R46
0.1uF C0603 16V, X7R, +/-10%
*
G
C107 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
*
C111 4.7uF 16V, Y5V, +80%/-20% C1206 Dummy
*
EC10 1800uF 16V, +/-20% CE50D100H300 Dummy
R197
15K R0603 +/-1% Dummy
* *
4.7 +/-5% C150 1uF C0603 R0805 16V, Y5V, +80%/-20%
R88
7 6
PVCC VCC
BOOT UGATE
2 1
R54
0.1uF C0603 16V, X7R, +/-10%
*
C108 0.1uF 16V, Y5V, +80%/-20% C0603
*
*
EC8 1800uF 16V, +/-20% CE50D100H300
R174
15K R0603 +/-1%
G
* * *
D
Phase2_L 7 C270 0.1uF C0603 16V, X7R, +/-10% VCCP
Phase3_L 7 C259 0.1uF C0603 16V, X7R, +/-10% VCCP
* *
B
Phase4_L 7 C275 0.1uF C0603 16V, X7R, +/-10% Dummy VCCP 12V_POWER
*
A
TECHNOLOGY COPR.
B
8 of 41
8
7
6
5
4
3
AAD[0..31] SBA-[0..7] AC-BE[0..3] AAD[0..31] SBA-[0..7] AC-BE[0..3] ST[0..2] ADSTBF[0..1] ADSTBS[0..1]
2
19 19 19 19 19 19 A1XAVSS A1XAVDD CP1
1
X_COPPER VCC3 L27 DUMMY FB L0603 80 Ohm C209 10nF 25V, Y5V, +80%/-20% C0603 CP2 X_COPPER
*
5 5
HDBIJ[0..3] HDJ[0..63]
HDBIJ[0..3] ST[0..2] HDJ[0..63] C1XAVDD C1XAVSS C4XAVDD C4XAVSS HVREF HNCOMP HPCOMP AAD31 AAD30 AAD29 AAD28 AAD27 AAD26 AAD25 AAD24 AAD23 AAD22 AAD21 AAD20 AAD19 AAD18 AAD17 AAD16 AAD15 AAD14 AAD13 AAD12 AAD11 AAD10 AAD9 AAD8 AAD7 AAD6 AAD5 AAD4 AAD3 AAD2 AAD1 AAD0 ST2 ST1 ST0 SBA-0 SBA-1 SBA-2 SBA-3 SBA-4 SBA-5 SBA-6 SBA-7 ADSTBF[0..1] ADSTBS[0..1]
*
D
5
HAJ[31..3]
HAJ[31..3] HREQJ[4..0]
L26 DUMMY FSB_VTT
*
R159
FB L0603 80 Ohm
D
HNCOMP
AL36 AK34
AJ36 AK35
AA26 W26 U26 R26 L20
5 HREQJ[4..0]
D22 C22 B22
B6 F7 B5 Y5 W4 V2 W6 V4 U2 V5 U4 R2 T4 R3 T5 P2 R4 N2 R6 L3 L4 K2 L6 J2 J3 K4 J4 J6 H4 G3 H5 F2 G4 E2 G6 ST0 ST1 ST2 AAD0 AAD1 AAD2 AAD3 AAD4 AAD5 AAD6 AAD7 AAD8 AAD9 AAD10 AAD11 AAD12 AAD13 AAD14 AAD15 AAD16 AAD17 AAD18 AAD19 AAD20 AAD21 AAD22 AAD23 AAD24 AAD25 AAD26 AAD27 AAD28 AAD29 AAD30 AAD31
U12A 17 17 CPUCLK1 CPUCLK-1 CPUCLK1 CPUCLK-1 HLOCKJ HDEFERJ HTRDYJ HCPURSTJ CPUPWRGD_NB HBPRIJ HBR0J HRSJ2 HRSJ1 HRSJ0 HADSJ HITMJ HITJ HDRDYJ HDBSYJ HBNRJ HREQJ4 HREQJ3 HREQJ2 HREQJ1 HREQJ0 5 5 HADSTBJ1 HADSTBJ0 HADSTBJ1 HADSTBJ0 AJ31 AJ33 T33 T35 V32 B23 F22 R34 U31 R33 T32 U35 V35 R35 U34 W34 U33 V33 W35 Y33 W31 W33 Y35 AG31 AA33 R36 HAJ31 HAJ30 HAJ29 HAJ28 HAJ27 HAJ26 HAJ25 HAJ24 HAJ23 HAJ22 HAJ21 HAJ20 HAJ19 HAJ18 HAJ17 HAJ16 HAJ15 HAJ14 HAJ13 HAJ12 HAJ11 HAJ10 HAJ9 HAJ8 HAJ7 HAJ6 HAJ5 HAJ4 HAJ3 VCCP R143 619 +/-1% R0603 D Q21 6 GTLREF_SEL G S 2N7002 AH33 AG33 AJ35 AF32 AJ34 AH32 AG35 AE31 AH35 AF35 AE35 AE33 AE34 AF33 AG34 AC33 AD32 AD33 AC35 AD35 AC31 AC34 AB35 AB32 AB33 AA35 AA31 Y32 AA34 CPUCLK CPUCLK# HLOCK# DEFER# HTRDY# CPURST# CPUPWRGD BPRI# BREQ0# RS#2 RS#1 RS#0 ADS# HITM# HIT# DRDY# DBSY# BNR# HREQ4# HREQ3# HREQ2# HREQ1# HREQ0# HASTB1# HASTB0# DPWR#
HCOMP_P HCOMP_N HCOMPVREF_N
C1XAVSS C1XAVDD
C4XAVSS C4XAVDD
HVREF0 HVREF1 HVREF2 HVREF3 HVREF4
SBA7 SBA6 SBA5 SBA4 SBA3 SBA2 SBA1 SBA0
E3 F4 D2 F5 E4 B2 E6 B3
5 HLOCKJ 5 HDEFERJ 5 HTRDYJ 5 HCPURSTJ 14 CPUPWRGD_NB 5 HBPRIJ 5 HBR0J 5 5 5 5 5 5 5 5 5 HRSJ2 HRSJ1 HRSJ0
AC/BE3# AC/BE2# AC/BE1# AC/BE0# AREQ# AGNT# AFRAME# AIRDY# ATRDY# ADEVSEL# ASERR# ASTOP# APAR RBF# WBF# GC_DET# ADBIH/PIPE# ADBIL SB_STB SB_STB# AD_STB0 AD_STB0# AD_STB1 AD_STB1# AGPCLK
K5 M5 P4 U6 C6 E8 N6 M4 N4 L2 P5 M2 N3 D7 B4 C7 C4 D6 C2 D3 T2 U3 G2 H2 D8 W2 Y2 B8 C8 A7 B7 W3 Y4 D24 F30 G33 N31 E25 D30 H32 M32
AC-BE3 AC-BE2 AC-BE1 AC-BE0 AREQ AGNT AFRAME AIRDY ATRDY ADEVSEL ASERR ASTOP APAR RBF WBF GCDETDBI_HI DBI_LOW GCDETDBI_HI DBI_LOW SBSTBF SBSTBS ADSTBF0 ADSTBS0 ADSTBF1 ADSTBS1 AGPCLK0 AGPRCOMP AGPRCOMN A1XAVDD A1XAVSS A4XAVDD A4XAVSS AVREFGC 19 AGPCLK0 17 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19
14 R0603 +/-1% R49 change from 100 to 120 R158 HPCOMP 120 R0603 +/-1%
AGP
R159 648 661FX
R158
14 1% 120 1% 14 1% 120 1%
C
HADSJ HITMJ HITJ HDRDYJ HDBSYJ HBNRJ
AGP3.0 = 50 ohm R170 AGPRCOMN 51 R0603 +/-1% VDDQ
C
B
HD63# HD62# HD61# HD60# HD59# HD58# HD57# HD56# HD55# HD54# HD53# HD52# HD51# HD50# HD49# HD48# HD47# HD46# HD45# HD44# HD43# HD42# HD41# HD40# HD39# HD38# HD37# HD36# HD35# HD34# HD33# HD32# HD31# HD30# HD29# HD28# HD27# HD26# HD25# HD24# HD23# HD22# HD21# HD20# HD19# HD18# HD17# HD16# HD15# HD14# HD13# HD12# HD11# HD10# HD9# HD8# HD7# HD6# HD5# HD4# HD3# HD2# HD1# HD0#
DBI3# DBI2# DBI1# DBI0#
HA31# HA30# HA29# HA28# HA27# HA26# HA25# HA24# HA23# HA22# HA21# HA20# HA19# HA18# HA17# HA16# HA15# HA14# HA13# HA12# HA11# HA10# HA9# HA8# HA7# HA6# HA5# HA4# HA3# SIS648
AGPCOMP_P AGPCOMP_N A1XAVDD A1XAVSS A4XAVDD A4XAVSS AGPVREF AGPVSSREF HDSTBN3# HDSTBN2# HDSTBN1# HDSTBN0# HDSTBP3# HDSTBP2# HDSTBP1# HDSTBP0#
R168 AGPRCOMP 43.2 R0603 +/-1%
HDSTBNJ3 HDSTBNJ2 HDSTBNJ1 HDSTBNJ0 HDSTBPJ3 HDSTBPJ2 HDSTBPJ1 HDSTBPJ0
HDSTBNJ3 HDSTBNJ2 HDSTBNJ1 HDSTBNJ0 HDSTBPJ3 HDSTBPJ2 HDSTBPJ1 HDSTBPJ0
5 5 5 5 5 5 5 5
B
HOST
648C
A4XAVDD C24 E23 B24 D23 D25 F24 C26 B25 B26 D27 D26 E27 B27 D28 C28 B28 E29 F28 B29 C30 B30 B31 C32 D29 C33 B33 B35 D32 B34 E31 D31 D33 D35 G31 C35 F33 E33 D34 E35 F32 J34 G34 H35 F35 J33 J31 G35 H33 J35 K32 N33 K33 L31 L33 K35 L35 M35 M33 P32 P33 L34 N34 N35 P35 F26 B32 E34 R31
BC48, BC49 Change to 0.1uF?
CP3
X_COPPER
VCC3
*
A4XAVSS
FSB_VTT
L31 DUMMY FB L0603 80 Ohm C208 10nF 25V, Y5V, +80%/-20% C0603 CP4 X_COPPER
*
A
R52 change from 49.9 to 100 R154 100 +/-1% Rds-on(p) = 56 ohm R0603 HPCVERF = 2/3 VCCP HVREF C1XAVDD
HDJ0 HDJ1 HDJ2 HDJ3 HDJ4 HDJ5 HDJ6 HDJ7 HDJ8 HDJ9 HDJ10 HDJ11 HDJ12 HDJ13 HDJ14 HDJ15 HDJ16 HDJ17 HDJ18 HDJ19 HDJ20 HDJ21 HDJ22 HDJ23 HDJ24 HDJ25 HDJ26 HDJ27 HDJ28 HDJ29 HDJ30 HDJ31 HDJ32 HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63 CP5 C273 0.1uF 16V, Y5V, +80%/-20% CP7 C0603 L42 DUMMY L40 DUMMY X_COPPER VCC3 C4XAVDD FB L0603 80 Ohm X_COPPER FB L0603 80 Ohm
CP6 C271 0.1uF 16V, Y5V, +80%/-20% CP8 C0603 L35 DUMMY L37 DUMMY
HDBIJ0 HDBIJ1 HDBIJ2 HDBIJ3 X_COPPER VCC3
L28 DUMMY
*
FB L0603 80 Ohm
A
TECHNOLOGY COPR.
* *
* *
*
R54 change from 100 to 149
FB L0603 80 Ohm X_COPPER Title FB L0603 80 Ohm Document Number
R153 100 +/-1%
*
C213 10nF 25V, Y5V, +80%/-20% C0603
*
C502 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
*
C1XAVSS
*
C4XAVSS
661FX-1 HOST & AGP
Rev
place this capacitor under 661 solder side Date:
648M06
Wednesday, March 16, 2005 Sheet 9 of 41
B
8
MD[0..63] DQM[0..7] DQS[0..7] MA[0..14] CS-[0..3] CKE[0..3]
7
MD[0..63] DQM[0..7] DQS[0..7] MA[0..14] CS-[0..3] CKE[0..3] 21,23 21,23 21,23 21,23 21,23 21 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 DQM0 DQS0 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 DQM1 DQS1 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 DQM2 DQS2 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM3 DQS3 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 DQM4 DQS4 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 DQM5 DQS5 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 DQM6 DQS6 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 DQM7 DQS7
6
5
4
3
2
VCC2.5_MEM put bottom side
1
U12B AN35 MD0 AP36 MD1 AK33 MD2 AM33 MD3 AN34 MD4 AK32 MD5 AR34 MD6 AN33 MD7 AR35 DQM0 AP34 DQS0/CSB0# AM32 MD8 AL31 MD9 AR31 MD10 AL30 MD11 AN32 MD12 AR33 MD13 AN31 MD14 AM31 MD15 AR32 DQM1 AP32 DQS1/CSB1# AP30 MD16 AR30 MD17 AM29 MD18 AL27 MD19 AN30 MD20 AN29 MD21 AL28 MD22 AN28 MD23 AL29 DQM2 AR29 DQS2/CSB2# AP26 MD24 AN25 MD25 AR24 MD26 AL24 MD27 AL25 MD28 AR26 MD29 AM25 MD30 AN24 MD31 AP24 DQM3 AR25 DQS3/CSB3# AN21 MD32 AP20 MD33 AN20 MD34 AL18 MD35 AM21 MD36 AR21 MD37 AL19 MD38 AM19 MD39 AL20 DQM4 AR20 DQS4/CSB4# AL15 MD40 AL14 MD41 AN15 MD42 AR15 MD43 AN16 MD44 AM15 MD45 AN14 MD46 AL13 MD47 AP16 DQM5 AR16 DQS5/CSB5# AM13 MD48 AL12 MD49 AL11 MD50 AR12 MD51 AP14 MD52 AR14 MD53 AN13 SIS648 MD54 AP12 MD55 AN12 DQM6 AR13 DQS6/CSB6# AL10 MD56 AR11 MD57 AM9 MD58 AR9 MD59 AM11 MD60 AN11 MD61 AP10 MD62 AN9 MD63 AN10 DQM7 AR10 DQS7/CSB7#
648C
DDRVREFA
R417 150 +/-1% R0603 Bottom C510 10nF 25V, Y5V, +80%/-20% C0603 Bottom
D
D
R416 150 +/-1% R0603 Bottom
*
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 NC SRAS# SCAS# SWE# CS0# CS1# CS2# CS3# CS4# CS5#
AR23 AN23 AN22 AM23 AL23 AL26 AN26 AN27 AR27 AR28 AP22 AN18 AR22 AP28 AM27 AT14 AL17 AR19 AN19 AM17 AL16 AN17 AR17 AP18 AR18
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 SRASSCASSWECS-0 CS-1 CS-2 CS-3
VCC2.5_MEM
DDRVREFB
R414 150 +/-1% R0603 Bottom
*
/RSRAS/RSCAS/RSWE21,23 21,23 21,23
C
C507 10nF 25V, Y5V, +80%/-20% C0603 Bottom
R415 150 +/-1% R0603 Bottom
C
C296
VCC2.5_MEM C358 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy C356 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
*
*
CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 S3AUXSW#
AP4 AT3 AR3 AP3 AR2 AN4 AP2
CKE0 CKE1 CKE2 CKE3
*
R188 4.7K +/-5% R0603 Dummy CP9 S3AUXSW37 DDRAVDD
*
10pF C0603 50V, NPO, +/-5% VCC3 X_COPPER
SB3V
FWDSDCLKO
R218 FWDSDCLKO DRAMTEST AL21 AL22 22 R0603 +/-5% DLLAVDD DLLAVSS DDRAVDD DDRAVSS R237 DDRVREFA DDRVREFB TRAP2 DDRCOMP_P DDRCOMP_N AF16 AF23 AP1 AR8 AP8 DDRCOMP DDRCOMN DDRVREFA DDRVREFB DDRCOMP DLLAVSS 40.2 R0603 +/-1% DDRCOMN 40.2 R0603 +/-1% FWDSDCLKO FWDSDCLKO 18 DDRAVSS R238 VCC2.5_MEM
*
L46 DUMMY FB L0603 80 Ohm C286 0.1uF 16V, Y5V, +80%/-20% C0603 CP10 X_COPPER
*
B
*
C379 0.1uF 16V, Y5V, +80%/-20% C0603
*
C355 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy C359 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy C403 0.1uF 16V, Y5V, +80%/-20% C0603
L45 DUMMY
*
FB L0603 80 Ohm
B
DLLAVDD DLLAVSS DDRAVDD DDRAVSS
AL35 AL34 AM35 AN36
*
C353 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy C351 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy C340 0.1uF 16V, Y5V, +80%/-20% C0603
VCC3 CP11 DLLAVDD X_COPPER L44 DUMMY FB L0603 80 Ohm C281 0.1uF 16V, Y5V, +80%/-20% C0603 CP12 X_COPPER
*
*
*
*
*
L43 DUMMY
*
FB L0603 80 Ohm
*
A
*
C366 0.1uF 16V, Y5V, +80%/-20% C0603
A
TECHNOLOGY COPR.
Title
661FX-2 DDR
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 10 of 41
B
8
7
6
5
ROUT GOUT C535 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy C536 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy
4
BOUT C537 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy
3
2
1
*
*
*
Enable RSYNC VGA panel link VB 1 1 1 LSYNC CSYNC
Disable 0 0 0
D
17 13 VCC1.8V ZAD[0..16] ZAD[0..16] 13 13 13 13 13 13 ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 ZVREF VCC3 CP15 X_COPPER Z4XAVDD FB L0603 80 Ohm Z1XAVDD Z1XAVSS X_COPPER Z4XAVSS FB L0603 80 Ohm Z4XAVDD Z4XAVSS ZCMP_N ZCMP_P ZCLK0 ZUREQ ZDREQ ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 ZCLK0 ZUREQ ZDREQ ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 AL6 AL4 AK5 AJ2 AJ3 AE3 AF2 AH5 AK2 AJ4 AJ6 AH2 AH4 AG3 AG6 AF4 AG2 AF5 AG4 AD2 AE6 AE2 AE4 AL3 AK4 AD5 AD4 AN1 AM2 AL2 AL1
U12C ZCLK VOSCI ZUREQ ZDREQ ZSTB0 ZSTB0# ZSTB1 ZSTB1# ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 ZVREF ZCOMP_N ZCOMP_P Z1XAVDD Z1XAVSS PCIRST# PWROK AUXOK Z4XAVDD Z4XAVSS SIS648 TRAP1 TRAP0 ROUT GOUT BOUT HSYNC VSYNC VGPIO0 VGPIO1 INT#A CSYNC RSYNC LSYNC VCOMP VRSET VVBWN DACAVDD1 DACAVSS1 DACAVDD2 DACAVSS2 DCLKAVDD DCLKAVSS DLLEN# ENTEST ECLKAVDD ECLKAVSS B12 B13 A13 ROUT GOUT BOUT 20 20 20 20 20 20 20 13,19,24,25
D
A15
REFCLK2
17
VCC3 RSYNC ENTEST LSYNC CSYNC RSYNC RN6 1 3 5 7
** **
*
VGA
R212 150
A11 B11 E13 C11 C10 D12 E12 D11 E15 D15 E14 D13 C12 D14 C13 B15 C15 B14 C14
33 33
R155 R160
* *
HSYNC VSYNC DDC1CLK DDC1DATA INT-A
100 R156 100 R161
8P4R0603 4.7K +/-5% 2 4 6 8 4.7K DUMMY
R157
ZVREF
*
R214 51.1
*
C295 0.1uF 16V, Y5V, +80%/-20% C0603
AUXOK VCOMP VRSET VVBWN DACAVDD DACAVSS
C284
**
HyperZip
CSYNC RSYNC LSYNC
NBPWRGD
C288
0.1uF C0603 16V, Y5V, +80%/-20% 0.1uF C0603 16V, Y5V, +80%/-20%
C
C
CP13 X_COPPER VCC3
DACAVDD DACAVSS DCLKAVDD DCLKAVSS ECLKAVDD ECLKAVSS
DCLKAVDD
*
TESTMODE2 TESTMODE1 TESTMODE0
L38 DUMMY C283 0.1uF 16V, Y5V, +80%/-20% CP17 C0603 L36 DUMMY
* *
*
DCLKAVSS
C212 0.1uF 16V, Y5V, +80%/-20% C0603
L33 DUMMY CP14 L29 DUMMY
* *
FB L0603 80 Ohm X_COPPER FB L0603 80 Ohm
AN2 AM4 AN3
F9 D10
C9 B9 B10
E10 D9
648C
ECLKAVDD ENTEST ECLKAVSS
CP16 C210 0.1uF 16V, Y5V, +80%/-20% C0603 L32 DUMMY CP18 L30 DUMMY
X_COPPER
VCC3
6,13 38 NBPWRGD 14,40
NBRSTAUXOK
NBPWRGD AUXOK
* *
FB L0603 80 Ohm X_COPPER FB L0603 80 Ohm
*
VCC3
CP39 L39 DUMMY CP40 L41 DUMMY
X_COPPER Z1XAVDD FB L0603 80 Ohm X_COPPER FB L0603 80 Ohm
B
* *
B
*
C277 0.1uF 16V, Y5V, +80%/-20% C0603 Z1XAVSS
VRSET
* *
VVBWN VCOMP
C201 C200
0.1uF C0603 16V, Y5V, +80%/-20% VCC1.8V 0.1uF C0603 16V, Y5V, +80%/-20% CP19 C493 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom C492 1uF 10V, Y5V, +80%/-20% CP20 C0603 Bottom L24 DUMMY L25 DUMMY X_COPPER FB L0603 80 Ohm X_COPPER FB L0603 80 Ohm
VCC1.8V DACAVDD
*
R148 130
*
R177
56 +/-5% R0603
ZCMP_N
* *
*
*
C255 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy R178
*
DACAVSS 56 ZCMP_P
*
+/-5% R0603
Put the cap bottom side
A
TECHNOLOGY COPR.
Title
A
661FX-3 VGA & MUTIOL
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 11 of 41
B
8
FSB_VTT
7
VCC1.8V VCC1.8V
6
5
VCC1.8V VCC3
4
648C
3
2
1
A17 A18 A19 A20 A21 B17 B18 B19 B20 B21 C17 C18 C19 C20 C21 D17 D18 D19 D20 D21 E17 E18 E19 E20 E21 F17 F18 F19 F20 F21 N13 N14 N16 N18 N19 N20 N21 N22 N23 N24 P13 P24 R24 T13 T24 U24 V13 V24 W13 W24 Y13 Y24 AA24 AB13 AC24 AD13 AD15 AD17 AD19 AD21 AD23 AD24 N15 R13 U13 AA13
AH3 AJ1 AK3 AM3 W11 W12 Y11 Y12 AA12 AD3 AE1 AF3 AG1
D4 D5 AM5
L17 M17 N17
SB3V SB1.8V
SB1.8V
U12D
IVDD, AUX_IVDD 1.8V
AUX_IVDD AUX3.3 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ IVDD IVDD IVDD IVDD IVDD NC4 NC5 NC6 NC7 NC8 NC9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AB12 AC12 AA1 AA2 AA3 AA4 AA5 AA6 AB1 AB2 AB3 AB4 AB5 AB6 AC1 AC2 AC3 AC4 AC5 AC6 L11 L12 L13 M11 M12 M13 M14 M15 M16 N11 N12 P12 R12 T12 U12 V12 B16 C16 D16 E16 F15 E11 F11 F13 AL33 AM34 A9 A3 A5 C1 C3 C5 E1 E5 E7 E9 F3 G1 G5 H3 J1 J5 K3 L1 L5 M3 N1 N5 P3 R1 R5 T3 U1 U5 V3 W1 W5 Y3 AE5 AG5 AJ5 AL5 A22 A24 A26 A28 A30 A32 A34 C23 C25 C27 C29 C31 C34 C36 E22 E24 E26 E28 E30 E32 E36 F34 G32 G36 H34 J32 J36 K34 L32 L36 M34 N32 N36 P34 R32 T34 U32 U36 V34 W32 W36 Y34 AA32 AA36 AB34
Place these capacitors under 660 solder side VCC1.8V C505 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom C498 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom VDDQ VCC1.8V VCC2.5_MEM C343 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
D
VCC2.5_MEM
L25 L26 M18 M19 M20 M21 M22 M23 M24 M25 M26 N25 P25 R25 T25 U25 V25 W25 Y25 AA25 AL7 AL8 AL9 AM6 AM7 AM8 AN5 AN6 AN7 AN8 AP5 AP6 AP7 AR4 AR5 AR6 AR7 AT4 AT5 AT6 AT7 AB25 AC25 AD12 AD25 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AE26 AF11 AF12 AF25 AF26 AB24 AC13 AD14 AD16 AD18 AD20 AD22 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 U14 U15 U16 U17 U18 U19 U20 U21 U22 U23 V14 V15 V16 V17 V18 V19 V20 V21 V22 V23 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
VDD3.3 VDD3.3 VDD3.3
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT IVDD IVDD IVDD IVDD IVDD PVDD IVDD PVDD IVDD IVDD IVDD IVDD PVDD PVDD IVDD PVDD PVDD IVDD IVDD PVDD PVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD PVDD IVDD IVDD IVDD
VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ
NC1 NC2 NC3
*
SB3V VDDQ
C504 1uF 10V, Y5V, +80%/-20% C0603 Bottom
*
C503 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
D
FSB_VTT C188 1uF 10V, Y5V, +80%/-20% C0603 C207 1uF 10V, Y5V, +80%/-20% C0603 VCC1.8V C265 0.1uF 16V, Y5V, +80%/-20% C0603 C261 0.1uF 16V, Y5V, +80%/-20% C0603
*
*
*
*
VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM SIS648 VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM PVDDM PVDDM PVDDM PVDDM PVDDM PVDDM PVDDM VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
*
C214 1uF 10V, Y5V, +80%/-20% C0603
*
C187 10uF 10V, Y5V, +80%/-20% C1206 Dummy
*
C506 1uF 10V, Y5V, +80%/-20% C0603 Bottom
*
C264 10uF 10V, Y5V, +80%/-20% C1206 Dummy
Power
*
*
C380 0.1uF 16V, Y5V, +80%/-20% C0603
*
C344 1uF 10V, Y5V, +80%/-20% C0603 Dummy
C
C
*
C291 1uF 10V, Y5V, +80%/-20% C0603
*
C298 10uF 10V, Y5V, +80%/-20% C1206 Dummy
VDDQ C247 1uF 10V, Y5V, +80%/-20% C0603 C246 1uF 10V, Y5V, +80%/-20% C0603
*
*
*
C248 1uF 10V, Y5V, +80%/-20% C0603
*
C251 10uF 10V, Y5V, +80%/-20% C1206 Dummy
VCC2.5_MEM C500 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom C497 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom C511 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom C509 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
B
B
*
*
*
*
*
*
*
C495 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
*
C501 10uF 10V, Y5V, +80%/-20% C1206 Bottom
*
C496 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
*
C508 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
FSB_VTT C526
FSB_VTT C527
FSB_VTT
FSB_VTT
FSB_VTT C530 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
*
4.7uF C0805 10V, Y5V, +80%/-20% Bottom
*
4.7uF C0805 10V, Y5V, +80%/-20% Bottom
*
C528 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
*
C529 0.1uF 16V, Y5V, +80%/-20% C0603 Bottom
*
VCC1.8V C531
VCC1.8V C532
VCC2.5_MEM C533 10uF 10V, Y5V, +80%/-20% C1206 Bottom
*
A
4.7uF C0805 10V, Y5V, +80%/-20% Bottom
*
4.7uF C0805 10V, Y5V, +80%/-20% Bottom
*
A
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AM10 AM12 AM14 AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM30 AP9 AP11 AP13 AP15 AP17 AP19 AP21 AP23 AP25 AP27 AP29 AP31 AP33 AP35 AT8 AT10 AT12
Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22 Y23 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB23 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC22 AC23
AC32 AC36 AD34 AE32 AE36 AF34 AG32 AG36 AH34 AJ32
AT16 AT18 AT20 AT22 AT24 AT26 AT28 AT30 AT32 AT34 AL32
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
TECHNOLOGY COPR.
Title
661FX-4 Power
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 12 of 41
B
8
VCC3 RN4 INT-A INT-B INT-C INT-D 2 4 6 8
7
24,25,35 AD[0..31] VCC3
6
AD[0..31]
5
4
3
2
1
*1 3
5 7
CP21 L48 DUMMY
X_COPPER FB L0603 80 Ohm
VCC1.8V
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
*
*
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
D
8.2K +/-5% 8P4R0603 35 25 24 24 35 25 24 24 PREQ-3 PREQ-2 PREQ-1 PREQ-0 PGNT-3 PGNT-2 PGNT-1 PGNT-0
R293 4.7K +/-5% R0603 Dummy PREQ-4 PREQ-3 PREQ-2 PREQ-1 PREQ-0 PGNT-3 PGNT-2 PGNT-1 PGNT-0 C/BE-3 C/BE-2 C/BE-1 C/BE-0 F1 F2 F3 F4 E1 H4 G1 G2 G3 G4 K3 M2 P1 U4 F5 E4 E3 E2 M1 N4 N3 P4 P3 P2 N2 N1 PREQ4# PREQ3# PREQ2# PREQ1# PREQ0# PGNT4# PGNT3# PGNT2# PGNT1# PGNT0# C/BE3# C/BE2# C/BE1# C/BE0# INTA# INTB# INTC# INTD# FRAME# IRDY# TRDY# STOP# SERR# PAR DEVSEL# PLOCK# PCICLK PCIRST#
H3 H2 H1 J4 J3 J2 J1 K4 K2 K1 L4 L3 L2 L1 M4 M3 R4 R3 R2 R1 T4 T3 T2 T1 U3 U2 U1 V4 V3 V2 V1 W4
*
U15A IDEAVDD IDEAVSS ICHRDYA IDREQA IIRQA CBLIDA IIORA# IIOWA# IDACKA# IDSAA2 IDSAA1 IDSAA0 IDECSA1# IDECSA0# ICHRDYB IDREQB IIRQB CBLIDB W1 W2 AE15 AD14 AC15 AE16 AF15 AC14 AD15 AC16 AF16 AD16 AE17 AF17 AE22 AD21 AC22 AE23 AF22 AC21 AD22 AF24 AF23 AD23 AF25 AE24 AF14 AD13 AF13 AD12 AF12 AD11 AF11 AF10 AE10 AE11 AC11 AE12 AC12 AE13 AC13 AE14 AF21 AD20 AF20 AD19 AF19 AD18 AF18 AD17 AC17 AE18 AC18 AE19 AC19 AE20 AC20 AE21 IDESAB2 IDESAB1 IDESAB0 IDECS-B1 IDECS-B0 IDEDA0 IDEDA1 IDEDA2 IDEDA3 IDEDA4 IDEDA5 IDEDA6 IDEDA7 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15 IDEDB0 IDEDB1 IDEDB2 IDEDB3 IDEDB4 IDEDB5 IDEDB6 IDEDB7 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 IDESAA2 IDESAA1 IDESAA0 IDECS-A1 IDECS-A0
C338 0.1uF 16V, Y5V, +80%/-20% C0603
D
ICHRDYA IDEREQA IDEIRQA CBLIDA IDEIOR-A IDEIOW-A IDACK-A ICHRDYA IDEREQA IDEIRQA CBLIDA IDEIOR-A IDEIOW-A IDACK-A IDESAA[0..2] IDECS-A[0..1] 26 26 26 26 26 26 26 26 26
PCI
C/BE-[0..3] 24,25,35 C/BE-[0..3]
IDESAA[0..2] IDECS-A[0..1]
11,19,24,25 19,24,25 24,25 24,25,35
INT-A INT-B INT-C INT-D
INT-A INT-B INT-C INT-D FRAMEIRDYTRDYSTOPSERRPAR DEVSELPLOCK96XPCLK PCIRSTR239 R235 R231 33 33 33
C
24,25,35 FRAME24,25,35 IRDY24,25,35 TRDY24,25,35 STOP24,25,35 SERR24,25,35 PAR 24,25,35 DEVSEL24,25 PLOCK17 19,24,25,26 28,31,35 6,11 96XPCLK PCIRSTSIORSTNBRST-
ICHRDYB IDEREQB IDEIRQB CBLIDB IDEIOR-B IDEIOW-B IDACK-B IDESAB[0..2] IDECS-B[0..1]
ICHRDYB IDEREQB IDEIRQB CBLIDB IDEIOR-B IDEIOW-B IDACK-B IDESAB[0..2] IDECS-B[0..1] 26 26
26 26 26 26 26 26 26
IDE
IIORB# IIOWB# IDACKB# IDSAB2 IDSAB1 IDSAB0 IDECSB1# IDECSB0# IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15 IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15
C
ZCLK1 17 11 11 11 11 11 11 ZCLK1 ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 ZUREQ ZDREQ ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 ZUREQ ZDREQ
***
W3 B3
964/964L -1
AB26 V24 W26 R25 T26 Y24 Y23
ZCLK ZSTB0 ZSTB0# ZSTB1 ZSTB1# ZUREQ ZDREQ
B
VCC1.8V
SZCMP_N SZCMP_P
AA24 AA25
IDEDA[0..15] VCC1.8V CP23 X_COPPER
26
B
ZCMP_N ZCMP_P
*
R302 150 +/-1% R0603 SZVREF
SZ1XAVDD SZ1XAVSS SZ4XAVDD SZ4XAVSS SZVREF
AC26 AB25 Y22 AA23 AA26 ZAD16 Y26
Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS ZVREF ZAD16 ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15
L50 DUMMY FB L0603 80 Ohm
*
*
R305 49.9 +/-1% R0603
*
C339 0.1uF 16V, Y5V, +80%/-20% C0603
HyperZip
W24 W25 V22 V23 V26 U22 U25 U24 T22 U26 T23 R22 T24 R24 R26 P22
*
CP26
X_COPPER
SZ4XAVDD C363 0.1uF 16V, Y5V, +80%/-20% C0603 SZ4XAVSS
IDEDB[0..15] SiS964
26
ZAD15 ZAD14 ZAD13 ZAD12 ZAD11 ZAD10 ZAD9 ZAD8 ZAD7 ZAD6 ZAD5 ZAD4 ZAD3 ZAD2 ZAD1 ZAD0
VCC1.8V Analog Power supplies of Transzip function for 96X Chip.
VCC1.8V
A
11
ZAD[0..16]
L51 DUMMY
*
FB L0603 80 Ohm
*
CP25 X_COPPER
*
SZ1XAVDD C365 0.1uF 16V, Y5V, +80%/-20% C0603 SZ1XAVSS
For EMI
SIORST-
*
*
C534 0.1uF 16V, Y5V, +80%/-20% C0603
C337 0.1uF 16V, Y5V, +80%/-20% C0603 R311 SZCMP_P 56 +/-5% R0603
*
CP22
X_COPPER
CP24
X_COPPER
R303 SZCMP_N 56 +/-5% R0603
A
TECHNOLOGY COPR.
Title
964_I
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 13 of 41
B
8
7
6
5
U15B OSC25MHI D7 C7
4
MCLK25I R224
3
4.7K R0603 +/-5%
2
1
D
5,31 5 5 5 5 5 5 5 5 5
INITJ A20MJ SMIJ INTR NMI IGNNEJ FERRJ STPCLKJ CPUSLPJ VCC3 PROCHOTJ R320
INITJ A20MJ SMIJ INTR NMI IGNNEJ FERRJ STPCLKJ CPUSLPJ 10K R0603 +/-5%
AB23 AD26 AE25 AC24 AD25 AD24 AE26 AB22 AC23 AF26 AC25 AB24
INIT# A20M# SMI# INTR NMI IGNNE# FERR# STPCLK# CPUSLP#
OSC25MHO TXCLK
For Prescott C-step PWRGD circuit
D10 E10 E11 D12 C12 E13 D13 E14 C14 D15 VCC3
CPU_S APIC
TXEN TXD0 TXD1 TXD2 TXD3 NC34 NC31 NC32 NC30
? ?
GPWAK-
STHERMTRIP-
APICCK/LDTREQ# APICD0/THERM2# APICD1/GPIOFF#
E
R0603 +/-5% 470 R233
CPUPWRGD_NB 9
D
R236 B 1K R0603 +/-5% C MMBT3904 Q36
28,31
LAD[0..3] LAD0 LAD1 LAD2 LAD3 AC4 AC3 AE1 AF1 AD3 AE2 AF2 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# SIRQ
CPU_PWRG
5
28,31 28 28
LFRAMELDRQSIRQ
LFRAMELDRQSIRQ
LPC
RXCLK C13 A12 A13 B12 A11 B11 C11 A10 C10 A9 B9 A14 PMECOL B14 C15 VCC3 MDC C9 E9 B7 A6 VCC3 BIOS_TBL_PROTECT RINGJ R230 R226 R425 4.7K R0603 +/-5% 4.7K R0603 +/-5% Dummy 4.7K R0603 +/-5% OSC32KHO OSC32KHI R258 10M R0603 +/-5%
964/964L-2
MII RTC
RXDV RXER
OSC32KHI OSC32KHO 40 BATOK 17,38 SBPWRGD BATOK SBPWRGD C329 0.1uF 16V, Y5V, +80%/-20% C0603 RTCVDD
C2 C1 D4 D2
OSC32KHI OSC32KHO BATOK PWROK
C
*
C3 D3
RTCVDD RTCVSS
RXD0 RXD1 RXD2 RXD3 NC36 NC35 NC38 NC37 NC33
X4-1
XTAL-32.768kHz X4 1 2
*
Crystal Retainer
C318 15pF 50V, NPO, +/-5% C0603
*
C319 15pF 50V, NPO, +/-5% C0603 SB3V
3
4
C
17,18,21,35 SMBDAT 17,18,21,35 SMBCLK
SMBDAT SMBCLK
AB1 AB2
GPIO20 GPIO19
GPIO
CRS
?
SB3V R319 1K +/-5% R0603 R318 330 +/-1% R0603 STHERMTRIPC Q45 MMBT3904 E
33 33 33 33 33
SDATI0 SDATO SYNC AC_RESETBIT_CLK
SDATI0 SDATO SYNC AC_RESETBIT_CLK
E6 B4 AB3 AC1 B5 AC2
AC_SDIN0 AC_SDIN1 AC_SDOUT AC_SYNC AC_RESET# AC_BIT_CLK
MDIO MIIAVDD MIIAVSS
AC97
GPIO0/SPDIF
Y3 R321 C AE3 Y4 AA1 AA2 AA3 AA4 A4 C6 C5 C4 F6 E5 BIOS_TBL_PROTECT BIOS_PROTECT GPIO12 Title GPWAKID1 R312 4.7K +/-5% R0603 Dummy 4.7K R0603 +/-5% Dummy THERMID2 R314 B 4.7K R0603 +/-5% E
B Q48 MMBT3904
B
17 33,40
REFCLK1 SPKR
REFCLK1 SENTEST SPKR PWRBTNPMEPSONAUXOK ACPILED C313 0.1uF 16V, Y5V, +80%/-20% C0603 LAN_DISABLEJ S3_LED
AD2 D1 AD1 D5 A7 D8 A3 B6
OSCI ENTEST SPK PWRBTN# PME# PSON# AUXOK ACPILED
GPIO1/LDRQ1# GPIO2/THERM#
5
THERMTRIPJ
B
40 PWRBTN19,24,25,28,35 PME38 PSON11,40 40 AUXOK ACPILED
ACPI /others
THERM- 28
GPIO
GPIO3/EXTSMI# GPIO4/CLKRUN# GPIO5/PREQ5#
VCC3
R313 INTRUDER 2 1M 1 R0603 +/-5% Dummy Dummy
BAT
VCC3
*
35 LAN_DISABLEJ
THERM-
R316
4.7K R0603 +/-5% 4.7K R0603 +/-5% Dummy 4.7K R0603 +/-5% 4.7K R0603 +/-5% R419 4.7K R0603 +/-5% Dummy
BIOS_PROTECT R228 SMBDAT SMBCLK GPIO12 R346 R349
B2 A5
GPIO13 GPIO14
GPIO6/PGNT5# GPIO7 GPIO8/RING
?
A
40
S3_LED
29 29 29 29
KBDAT KBCLK PMDAT PMCLK SB3V R411 4.7K S3_LED
KBDAT KBCLK PMDAT PMCLK
B8 A8 C8 D6
RINGJ
25,30 SENTEST R282 0 R0603 +/-5%
GPIO15/KBDAT GPIO16/KBCLK GPIO17/PMDAT GPIO11/OSC25M/STP_PCI# GPIO18/PMCLK GPIO12/CPUSTP# SiS964 Document Number BIOS_PROTECT 31
KBC
GPIO9/AC_SDIN2 GPIO10/AC_SDIN3
BIOS_TBL_PROTECT 31
A
TECHNOLOGY COPR.
SIGNAL S3_LED
STATE S3 OTHERS
LEVEL LOW HIGH
964_2
Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 14 of 41
B
VCC1.8V
8
1
L52 2
7
6
5
4
3
2
1
FB L0603 80 Ohm CP27
*
C368 10nF 25V, Y5V, +80%/-20% C0603
*
X_COPPER VCC5
SATACMPAVDD C369 0.1uF 16V, Y5V, +80%/-20% C0603 SATACMPAVSS U15C
C249
D
0.1uF Dummy C0603 16V, Y5V, +80%/-20% C116 0.1uF Dummy C0603 16V, Y5V, +80%/-20% C364 0.1uF Dummy C0603 16V, Y5V, +80%/-20% C410 0.1uF Dummy C0603 16V, Y5V, +80%/-20%
27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27
UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5UV6+ UV6UV7+ UV7OC0123-
UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5UV6+ UV6UV7+ UV7-
G26 G25 H24 H23 C21 D21 A22 B22 C19 D19 A20 B20 C17 D17 A18 B18 C26 C24 D26 D25 D24 E24 E23 F22 E18 E20 E22 F17 F18 F19 F20 F21 G22 H22 AA6 AA7 AA8 AA9 AA10 AB6 AF3 AD4 Y2 Y1 AB5 AD5
R221 E25 E26 A24 F24 F23 A25 B24 D23 C23 G16 G18 H20 G21 H21 OSC12MHI OSC12MHO R234 127 +/-1% R0603 0 R0603 +/-5% USB12M 17
UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5UV6+ UV6UV7+ UV7OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7# UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 IVDD IVDD IVDD IVDD IVDD IVDD IVDD VSS IVDD VSS IVDD VSS
OSC12MHI OSC12MHO USBREF USBPVDD18 USBPVSS18 USBCMPAVDD18 USBCMPAVSS18
D
USBPVDD1.8 USBPVSS1.8 USBCMPAVDD1.8 USBCMPAVSS1.8 USBCMPAVDD3.3 C311 0.1uF
USB
USBCMPAVDD33 USBCMPAVSS33 UVDD33 UVDD33 UVDD33 IVDD_AUX IVDD_AUX
*
USBCMPAVSS3.3
*
* * * * * * * *
SB1.8V
USBREF
SB3V C0603 CP28 L47 X_COPPER 1 2 C310 0.1uF 16V, Y5V, +80%/-20% FB L0603 80 Ohm C0603
27
OC4567-
IVDD_AUX IVDD_AUX
*
SB3V
C
VCC1.8V L54 1 2 FB L0603 80 Ohm
*
C312 10nF 25V, Y5V, +80%/-20% C0603
*
C309 0.1uF 16V, Y5V, +80%/-20% C0603
964-3
SATA
NC NC NC NC NC NC NC NC NC GPIO21/EESK GPIO22/EEDI GPIO23/EEDO GPIO24/EECS IPB_OUT0/PLLENN AD7 AC7 AF6 AE6 AD9 AC9 AF8 AE8 AB4 A16 A15 B16 B15 A26 B25
R256 R259 IPB_OUT1
C
4.7K 4.7K Dummy Dummy SB1.8V CP45 X_COPPER USBCMPAVDD1.8 C314 0.1uF 16V, Y5V, +80%/-20% C0603 USBCMPAVSS1.8
**
IPB_OUT0
*
STX1P STX1N SRX1P SRX1N STX2P STX2N SRX2P SRX2N SATA_LED 2 D6 CP46 X_COPPER
*
C376 10nF 25V, Y5V, +80%/-20% C0603
*
C374 1uF 16V, Y5V, +80%/-20% C0805 SATARXAVDD SATARXAVSS
VCC1.8V L49 1 2 FB L0603 80 Ohm CP29 X_COPPER C361 10nF 25V, Y5V, +80%/-20% C0603 SATATXAVDD C345 1uF 16V, Y5V, +80%/-20% C0805 SATATXAVSS
FDLL4148 1 HDDLED 26,40
SATATXAVDD SATATXAVSS SATACMPAVDD SATACMPAVSS
*
*
R223 IPB_OUT0 IPB_OUT1
4.7K R0603 +/-5% SB1.8V IVDD_AUX CP41 X_COPPER
B
17 17
CLK_SATAJ CLK_SATA
SATACMPAVSSR317 SATACLKSATACLK
*
374
AC5 AE4 AF4
NC NC NC
IPB_OUT1/ZCLKSEL
SB3V R273 TRAP0 TRAP1 SiS964 R281 22 +/-5% R0603 R283 22 +/-5% R0603 USBPVDD1.8 R289
*
C303 0.1uF 16V, Y5V, +80%/-20% C0603 CP42 X_COPPER
B
**
B26 C25
4.7K 4.7K
Dummy Dummy
SB1.8V CP43 X_COPPER
@SHIELD,ORANGE SATA1 SATA 8 VCC1.8V L53 1 2 FB L0603 80 Ohm CP30 X_COPPER C372 10nF 25V, Y5V, +80%/-20% C0603 SATARXAVDD C371 1uF 16V, Y5V, +80%/-20% C0805 SATARXAVSS 9 1 2 3 4 5 6 7 1 2 3 4 5 6 7 OSC12MHO STX1P STX1N SRX1N SRX1P USBPVSS1.8 OSC12MHI R222 1M +/-5% R0603
A
*
*
SATA2 SATA 8 9
*
Dummy X3 STX2P STX2N SRX2N SRX2P 1 2 XTAL-12MHz C299 10pF C0603 50V, NPO, +/-5% Dummy
* *
C300 10pF Dummy C0603 50V, NPO, +/-5% Dummy
**
*
C330 0.1uF 16V, Y5V, +80%/-20% C0603 CP44 X_COPPER
A
TECHNOLOGY COPR.
Title
* *
964_3
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 15 of 41
B
8
7
VCC1.8V
6
5
4
VCC1.8V
3
P26 P21 R21 T25 V25 V21 W21 Y25 Y21 M21 N21 T21 U21 AB18 AB16 AB14 AB11 AA5 Y5 T5 R5 L5 G5 L21 AA21 AB19 AB13 U5 M5 H5 K21 J21 AB20 AB17 AB15 AB12 AB10 W5 V5 P5 N5 K5 J5 VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD
2
U15D
1
L10 L11 L12 M10 M11 M12 N10 N11 N12 N13 N14 N15 N16 P10 P11 P12 P13 P14 R10 R11 R12 R13 R14 T10 T13 T14 U10 U13 U14 U15 P15 P16 R15 R16 T15 T16 U16 F25 F26 G23 G24 H25 H26 J23 J24 A23 B23 C22 D22 A21 B21 E21 C20 D20 A19 B19 E19 C18 D18 A17 B17 E17 C16 D16 L13 L14 L15 L16 M13 M14 M15 M16 AD10 AC10 AF9 AE9 AB9 AD8 AC8 AB8 AF7 AE7 AB7 AD6 AC6 AF5 AE5 T11 T12 U11 U12
SB1.8V
D
FSB_VTT VCC3 C334 0.1uF C0603 16V, Y5V, +80%/-20% C336 C307 0.1uF C0603 16V, Y5V, +80%/-20% C308
*
C360 0.1uF 16V, Y5V, +80%/-20% C0603
C362 0.1uF C0603 16V, Y5V, +80%/-20%
0.1uF C0603 16V, Y5V, +80%/-20% C325 0.1uF C0603 16V, Y5V, +80%/-20% C324 0.1uF C0603 16V, Y5V, +80%/-20%
0.1uF C0603 16V, Y5V, +80%/-20% C278
VCC3
VCC3
VCC5
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA
SiS964
D
* * * *
* *
*
* * * *
0.1uF C0603 16V, Y5V, +80%/-20%
*
964-4
Power
C
C
FSB_VTT FSB_VTT SB1.8V C524
AA22 AB21 F9 F12 F15 B10 B13 E7 E12 E15 F10 F11 F13 F7 G20 E8 F14
VTT VTT IVDD_AUX IVDD_AUX IVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX PVDD_AUX PVDD_AUX
* *
Put under 96X solder side
Bottom SB3V
0.1uF C0603 16V, Y5V, +80%/-20% VCC1.8V C520 0.1uF C0603 16V, Y5V, +80%/-20% C523 Bottom 0.1uF C0603 16V, Y5V, +80%/-20% C518 Bottom 0.1uF C0603 16V, Y5V, +80%/-20% C519 Bottom 0.1uF C0603 16V, Y5V, +80%/-20% C521 Bottom 0.1uF C0603 16V, Y5V, +80%/-20% VCC3 SB3V C516 C512
* *
Bottom 0.1uF C0603 16V, Y5V, +80%/-20% C513 Bottom
C306 10nF 25V, Y5V, +80%/-20% C0603
*
C305 0.1uF 16V, Y5V, +80%/-20% C0603
*
* *
Bottom
Bottom
B
0.1uF C0603 16V, Y5V, +80%/-20% C517 Bottom 0.1uF C0603 16V, Y5V, +80%/-20% C525 Bottom 0.1uF C0603 16V, Y5V, +80%/-20% C522 Bottom 0.1uF C0603 16V, Y5V, +80%/-20%
B
K26 K25 K24 K23 J26 J25 J22 K22 F16 E16
A
D9 D11 D14 R23 U23 W23
VSS VSS VSS VSSZ VSSZ VSSZ
NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29
* * * *
* * * * * *
0.1uF C0603 16V, Y5V, +80%/-20% SB3V C515 0.1uF C0603 16V, Y5V, +80%/-20% C514 Bottom 0.1uF C0603 16V, Y5V, +80%/-20%
* * *
Bottom
W22 P25 P24 P23 N26 N25 N24 N23 N22 M26 M25 M24 M23 M22 L26 L25 L24 L23 L22
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19
A
TECHNOLOGY COPR.
Title
964_4
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 16 of 41
0.6 B
8
7
6
VCC3
5
4
3
2
1
D
*
3D3V_CLKM
CP33 X_COPPER
CP34 X_COPPER
L21 FB L0603 80 Ohm Dummy 1 11 13 19 28 29 42 48
U9
C179
*
4.7uF C0805 10V, Y5V, +80%/-20% Dummy
*
C151 0.1uF 16V, Y5V, +80%/-20% C0603
*
C174 0.1uF 16V, Y5V, +80%/-20% C0603
*
C163 0.1uF 16V, Y5V, +80%/-20% C0603
*
C160 0.1uF 16V, Y5V, +80%/-20% C0603
VDD_REF VDDZ VDD_PCI VDD_PCI VDD48 VDDAGP VDDCPU VDDSRC
D
CPUCLK0 CPUCLK#0 CPUCLK1 CPUCLK#1 40 39 44 43 R106 R110 R99 R103 33 33 33 33 R0603 +/-5% R0603 +/-5% R0603 +/-5% R0603 +/-5% R105 49.9 +/-1% R0603 R111 49.9 +/-1% R0603 R98 49.9 +/-1% R0603 R102 49.9 +/-1% R0603 CPUCLK0 CPUCLK-0 CPUCLK1 CPUCLK-1 5 5 9 9
*
C159 0.1uF 16V, Y5V, +80%/-20% C0603
*
C172 0.1uF 16V, Y5V, +80%/-20% C0603
*
C166 0.1uF 16V, Y5V, +80%/-20% C0603
*
C152 0.1uF 16V, Y5V, +80%/-20% C0603 5 8 18 23 24 32 41 45 VSSREF VSSZ VSSPCI VSSPCI VSS48 VSSAGP VSSCPU VSSSRC
AGPCLK0 AGPCLK1 ZCLK0 ZCLK1
** **
31 30 9 10
R118 R124 R104 R108
22 22 22 22
AGPCLK0 AGPCLK1 ZCLK0 ZCLK1
AGPCLK0 AGPCLK1 ZCLK0 ZCLK1
9 19 11 13
VCC3 VCCP VCC3
*
C
R123 10K Dummy
* *
SIOPCLK PCICLK_LAN USB12M PCICLK_FWH
VttPWR_GD/PD#
C
***
33 C
*
B E
Q17 MMBT3904 Dummy
IREF **FS0/REF0 **FS1/REF1
E
2 3
FS0 FS1
14,38 SBPWRGD C176 10pF 50V, NPO, +/-5% C0603 Dummy C175 10pF 50V, NPO, +/-5% C0603 Dummy VCC3 L20 FB L0603 80 Ohm Dummy CP35 X_COPPER C162 4.7uF 10V, Y5V, +80%/-20% C0805 Dummy CLK_PLLVCC
4
Reset# ~**Sel24_48#/24_48MHz
26
X1
*
AUDIO_CLK
C102
10pF C165 10pF 50V, NPO, +/-5% C0603 Dummy
X2
6
By-Pass Capacitors Dummy Place near to the Clock Outputs
X2 1 2 XTAL-14.318MHz C155 C157 22pF 22pF 50V, NPO, +/-5% 50V, NPO, +/-5% C0603 C0603
PCICLK1
PCICLK2
PCICLK3
* *
C173 10pF 50V, NPO, +/-5% C0603 Dummy C168 10pF 50V, NPO, +/-5% C0603 Dummy C153 10pF 50V, NPO, +/-5% C0603 Dummy
7
ICS952017
*
B
C177 10pF 50V, NPO, +/-5% C0603 Dummy C158 10pF 50V, NPO, +/-5% C0603 Dummy
*
*
C161 0.1uF 16V, Y5V, +80%/-20% C0603 37 VSSA
SCLK SDATA SRCCLK SRCCLK# 12_48MHz/SEL12_48#** 48MHz
47 46 27 25 R126 R129
R97 R101
** *
*
36
VDDA
35 34
R117
***
B
Q16 MMBT3904 Dummy
R109
475 38
R91 R92 R94
33R0603 +/-5% 22 CK_48M_SIO
*
*
AUDIO_CLK CK_48M_SIO
A
C178 10pF 50V, NPO, +/-5% C0603 Dummy
* *
R128 1K +/-5% R0603 Dummy
R121 1K +/-5% R0603 Dummy
**FS_3/PCICLK6 **FS_4/PCICLK7 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 *FS2/PCICLK5
14 15 16 17 20 21 22 12
FS3 FS4 RN5 7 33_PCI3 5 33_PCI1 3 33_PCI2 1 33_964 R130 33_PCI_LAN R131 FS2 R100
8 33 6 4 2 33 33 33 22 22 33
8P4R0603 +/-5%
SIOPCLK PCICLK3 PCICLK1 PCICLK2 96XPCLK PCICLK_LAN REFCLK2 REFCLK1 AUDIO_CLK
SIOPCLK PCICLK3 PCICLK1 PCICLK2 96XPCLK PCICLK_LAN PCICLK_FWH REFCLK2 REFCLK1 AUDIO_CLK
28 25 24 24 13 35 31 11 14 33
C
*
0 33 33
SMBCLK SMBDAT CLK_SATA CLK_SATAJ
14,18,21,35 14,18,21,35 15 15
* * * * * * * * * *
* * *
*
USB12M 15 CK_48M_SIO 28
R96 49.9 +/-1% R0603
*
R95 49.9 +/-1% R0603
B
VCC3
*
6 6 BSEL0 BSEL1 BSEL0 BSEL1
R113 10K +/-5% R0603
*
R116 10K +/-5% R0603 R107 R122 2.7K 2.7K FS3 FS2
*
R112 10K +/-5% R0603 Dummy
A
TECHNOLOGY COPR.
Title
Clock Gen
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 17 of 41
B
8
7
6
5
4
3
2
1
CP36 VCC2.5_MEM L55 Dummy
X_COPPER CBVDD FB L0603 80 Ohm
*
D
*
C402 0.1uF 16V, Y5V, +80%/-20% C0603
*
C425 0.1uF 16V, Y5V, +80%/-20% C0603
*
C408 0.1uF 16V, Y5V, +80%/-20% C0603
*
C429 10uF 10V, Y5V, +80%/-20% C1206 Dummy
D
Clock Buffer (DDR)
VCC2.5_MEM CBVDD 3 12 23 U17 VDD VDD VDD DDRCLK[0..5] DDRCLK-[0..5] 21 21
C
*
CP37 X_COPPER
L56 FB L0603 80 Ohm Dummy C420 0.1uF 16V, Y5V, +80%/-20% C0603 C421 0.1uF 16V, Y5V, +80%/-20% C0603
C
*
C423 10uF 10V, Y5V, +80%/-20% C1206 Dummy
10
AVDD
*
*
11
AGND
CLK0 CLK1 CLK2 CLK3 CLK4 CLK5
2 4 13 17 24 26
DDRCLK0 DDRCLK1 DDRCLK2 DDRCLK3 DDRCLK4 DDRCLK5
DDRCLK0 DDRCLK1 DDRCLK2 DDRCLK3 DDRCLK4 DDRCLK5
21 21 21 21 21 21
14,17,21,35 SMBCLK 14,17,21,35 SMBDAT 10 FWDSDCLKO
SMBCLK SMBDAT
R348 R355
0 R0603 +/-5% Dummy 0 R0603 +/-5% Dummy
7 22 8
SCLK SDATA CLK_IN
FWDSDCLKO
CLK#0 CLK#1 CLK#2 CLK#3 CLK#4 CLK#5
1 5 14 16 25 27
DDRCLK-0 DDRCLK-1 DDRCLK-2 DDRCLK-3 DDRCLK-4 DDRCLK-5
DDRCLK-0 DDRCLK-1 DDRCLK-2 DDRCLK-3 DDRCLK-4 DDRCLK-5
21 21 21 21 21 21
I2C SB5V 1 3 4 5 Header_1X5_2
18
NC1 FB_OUT NC3 19 21
B
*
R363
0 C416 10pF C0603 50V, NPO, +/-5%
SMBCLK SMBDAT
20
FB_IN
B
9
NC2 GND GND GND
close to clock buffer
ICS93732
6 28 15
A
TECHNOLOGY COPR.
Title
* *
FB_OUT
A
DDR Clock Buffer
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 18 of 41
B
8
9 9 9 9 9 9 SBA-[0..7] ST[0..2] AC-BE[0..3] AAD[0..31] ADSTBF[0..1] ADSTBS[0..1] SBA-[0..7] ST[0..2] AC-BE[0..3]
7
VCC5
6
5
+12V VDDQ
4
3
2
GCDET- on card GND OPEN GCDET0V 1.47V
1
AVREFCG 0.35V 0.75V APERR 0V 1.5V
AAD[0..31] ADSTBF[0..1]
SB3V VCC3
NOTE: This AGP slot support both AGP3.0 display card and SiS301 video bridge card.
ADSTBS[0..1]
VDDQ
VCC3
D
AGP B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 OVRCNT# +5V +5V USB+ GND INTB# CLK REQ# VCC3.3 ST0 ST2 RBF# GND RESERVEDB14 SBA0 VCC3.3 SBA2 SB_STB GND SBA4 SBA6 DBI_LO GND VCC3_AUX VCC3.3 AD31 AD29 VCC3.3 AD27 AD25 GND AD_STB1 AD23 VDDQ AD21 AD19 GND AD17 C/BE#2 VDDQ IRDY# +12V TYPEDET# GC_AGP8X_DET USBGND INTA# RST# GNT# VCC3.3 ST1 MB_AGP8X_DET PIPE# GND WBF# SBA1 VCC3.3 SBA3 SB_STB# GND SBA5 SBA7 DBI_HI GND RESERVEDA24 VCC3.3 AD30 AD28 VCC3.3 AD26 AD24 GND AD_STB1# C/BE3# VDDQ AD22 AD20 GND AD18 AD16 VDDQ FRAME# A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 GCDETINT-A PCIRSTAGNT ST1 DBI_HI WBF SBA-1 SBA-3 SBSTBS SBA-5 SBA-7 DBI_HI WBF 9 9 GCDETINT-A PCIRSTAGNT 9 11,13,24,25 13,24,25,26 9
D
13,24,25 INT-B 17 AGPCLK1 9 AREQ
INT-B AGPCLK1 AREQ ST0 ST2
9 9
RBF DBI_LOW SBA-0 SBA-2 SBSTBF SBA-4 SBA-6
RBF
close to AGP SLOT
SBSTBS 9 VCC3 VCC5 VDDQ
9
SBSTBF
C
*
AAD30 AAD28 AAD26 AAD24 ADSTBS1 AC-BE3 AAD22 AAD20 G C S
AAD31 AAD29 AAD27 AAD25 ADSTBF1 AAD23 AAD21 AAD19 AAD17 AC-BE2 9 AIRDY AIRDY
*
R125 10K
*
R185 10K
R207 124 +/-1% R0603 AVREFCG R204 124
C
D
*
R202 54.9 Q30
*
2N7002
*
C285 10nF 25V, Y5V, +80%/-20% C0603
*
AAD18 AAD16 AFRAME
GCDET-
R127
4.3KB E
Q34 MMBT3904
AFRAME
9 VDDQ
9
ADEVSEL APERR
9
ASERR
AC-BE1 AAD14 AAD12 AAD10 AAD8 ADSTBF0 AAD7 AAD5 AAD3 AAD1 AVREFCG
B
1 2 3
B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66
DEVEL# VDDQ PERR# GND SERR# C/BE1# VDDQ AD14 AD12 GND AD10 AD8 VDDQ AD_STB0 AD7 GND AD5 AD3 VDDQ AD1 VREF_CG -
TRDY# STOP# PME# GND PAR AD15 VDDQ AD13 AD11 GND AD9 C/BE0# VDDQ AD_STB0# AD6 GND AD4 AD2 VDDQ AD0 VREF_GC
A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
ATRDY ASTOP PMEAPAR AAD15 AAD13 AAD11 AAD9 AC-BE0 ADSTBS0 AAD6 AAD4 AAD2 AAD0
*
ATRDY ASTOP PMEAPAR 9 9 14,24,25,28,35 9 G S D
R164 8.2K APERR Q31 2N7002
B
*
R200 1K
AVREFGC
9
*
C241 0.1uF 16V, Y5V, +80%/-20% C0603 VDDQ
AGP CONNECTOR DECOUPLING
put CAP close to AGP slot each POWER PIN
1 2 3
close to 660
*
VCC3 +12V VCC5 SB3V C183 10nF 25V, Y5V, +80%/-20% C0603 Dummy C304 10nF 25V, Y5V, +80%/-20% C0603 Dummy C215 10nF 25V, Y5V, +80%/-20% C0603 Dummy C164 10nF 25V, Y5V, +80%/-20% C0603 Dummy C167 10nF 25V, Y5V, +80%/-20% C0603 Dummy C204 10nF 25V, Y5V, +80%/-20% C0603 Dummy Title
EC28 1000uF 6.3V, +/-20% ce35d80h140
VDDQ
A
*
C240 10nF 25V, Y5V, +80%/-20% C0603 Dummy
*
C218 10nF 25V, Y5V, +80%/-20% C0603 Dummy
*
C256 10nF 25V, Y5V, +80%/-20% C0603 Dummy
A
TECHNOLOGY COPR.
*
*
*
*
*
*
AGP
Document Number Rev
648M06
Date: Wednesday, March 16, 2005 Sheet 19 of 41
B
5
4
3
2
1
D
D
VGA CONNECTOR
VCC5
F1
VCC5
C
ET1206L 19ohm@100MHz?
L5 L4 L3 R16 75 +/-1% R0603 Dummy C44 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy R15 75 +/-1% R0603 Dummy C43 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy R14 75 +/-1% R0603 Dummy
*
L0603 0.047uH Dummy L0603 0.047uH Dummy L0603 0.047uH Dummy C29 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy
C84 0.1uF 16V, Y5V, +80%/-20% C0603 Dummy
*
F1210_1.1A Dummy R25 2.2K +/-5% R0603 Dummy R24 2.2K +/-5% R0603 Dummy
CONNECTOR TOP VIEW VGA VGA15P
C
11 11 11
ROUT GOUT BOUT
***
DDC1DATA HSYNC VSYNC C30 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy C31 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy
DDC1DATA HSYNC VSYNC DDC1CLK
11 11 11 11
*
*
*
C42 6.8pF 50V, NPO, +/-0.5pF C0603 Dummy
*
*
*
DDC1CLK Dummy
*
close to GND gap
C51 470pF 50V, X7R, +/-10% C0603 Dummy
*
C66 470pF 50V, X7R, +/-10% C0603 Dummy
*
C68 470pF 50V, X7R, +/-10% C0603 Dummy
*
C58 470pF 50V, X7R, +/-10% C0603 Dummy
For EMI.
B
B
A
A
TECHNOLOGY COPR.
Title
VGA
Document Number Rev
648M06
Date:
5 4 3 2
B
Sheet
1
Wednesday, March 16, 2005
20
of
41
10,23 MD[0..63] 10,23 MA[0..14] 10,23 DQM[0..7] 10,23 DQS[0..7]
8
MD[0..63] MA[0..14]
7
VCC2.5_MEM
6
5
MD[0..63] MA[0..14]
4
VCC2.5_MEM
3
2
1
DQM[0..7]