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WD90COO

TABLE OF CONTENTS
Section Title Page
1.0 Introduction ........................................................... 12-1
1.1 Features ........................................................ 12-1
1.2 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-2
2.0 Architecture ........................................................... 12-4
3.0 WD90COO Interfaces .................................................... 12-6
3.1 CPU and BIOS ROM Interface ....................................... 12-6
3.2 DRAM Display Buffer Interface ....................................... 12-6
3.3 Video and RAMDAC Interface ........................................ 12-7
3.4 Clocklnterface .................................................... 12-7
3.5 WD90COO Power-Up Configuration ................................... 12-7
4.0 Pin Description ......................................................... 12-8
5.0 Absolute Maximum Ratings .............................................. 12-16
6.0 Standard Test Conditions ............................................... 12-17
7.0 DC Characteristics ..................................................... 12-18
8.0 AC Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-19
9.0 WD90COO Registers ................................................... 12-31
9.1 VGA Registers Summary .......................................... 12-31
9.2 PR Registers Summary ............................................ 12-32
9.3 Compatibility Registers Summary .................................... 12-32
9.4 VGA Registers ................................................... 12-33
9.5 General Registers ................................................ 12-33
9.6 Sequencer Registers .............................................. 12-35
9.7 CRT Controller Registers .......................................... 12-39
9.8 Graphics Controller Registers ....................................... 12-49
9.9 Attribute Controller Registers ....................................... 12-55
9.10 Compatibility Registers ............................................ 12-59
9.11 WD90COO PR Registers ........................................... 12-64
9.12 Internal 110 Ports ................. '" " .... , ...................... 12-79
9.13 Video RAMDAC Ports ............................................. 12-81 ..
9.14 External I/O Port Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-83

APPENDICES
Section Title Page
A.1 EGA Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-84
A.2 General Registers ..................................................... 12-86
A.3 Sequencer Registers ................................................... 12-87
A.4 CRT Controller Registers ................................................ 12-88
A.5 Graphics Controller Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-90
A.6 Attribute Controller Registers ............................................ 12-90
A.7 Applications .......................................................... 12-92


10-25-90 12-i
WD90COO

A.8 WD90COO Power-Up Configuration ....................................... 12-102
A.9 References .......................................................... 12-106



LIST OF ILLUSTRATIONS
Figure Title Page

1 PLCC and PQFP Pin Diagrams ............................................ 12-2
2 System Block Diagram ................................................... 12-4
3 WD90COO Block Diagram ................................................ 12-5
4 Reset TIming ......................................................... 12-25
5 Clock and Video Timing ................................................. 12-25
6 AT Mode liD and Memory ReadlWrite Timing ................................ 12-26
7 Micro Channel liD and Memory ReadlWrite Timing ........................... 12-27
8 CPU ReadlWrite DRAM Timing ........................................... 12-28
9 DRAM Page Mode Read TIming .......................................... 12-29
10 DRAM Refresh TIming .................................................. 12-30
11 WD90COO Processor, Memory, and liD Interfaces ............................ 12-92
12 8-Bit PCIAT Interface with 8-Bit BIOS ...................................... 12-93
13 16-Bit PCIAT Interface with 8-Bit BIOS ..................................... 12-94
14 16-Bit PCIAT Interface with 16-Bit BIOS .................................... 12-96
15 16-Bit Micro Channel Interface ........................................... 12-98
16 1 Mbyte DRAM Configuration ............................................ 12-99
17 RAMDAC Interface .................................................... 12-99
18 WD90COO TTL Monitor Connections ...................................... 12-100
19 Clock Interface ....................................................... 12-101
20 External Multiplexing of the Video Clocks .................................. 12-101
21 100-Pin PLCC Package Dimensions ...................................... 12-103
22 1OO-Pin JEDEC Plastic Quad Flat Package (PQFP) .......................... 12-104
23 1OO-Pin JEDEC (PQFP) Packaging Dimensions ............................. 12-105



LIST OF TABLES
Table Title Page

Pin Assignments ....................................................... 12-3
2 DC Characteristics ..................................................... 12-18
3 AC Timing Characteristics ............................................... 12-19
4 VGA Registers Summary ......................................... , ...... 12-31
5 PR Registers Summary ................................................. 12-32
6 Compatibility Registers Summary ......................................... 12-32
7 CRT Controller Registers ................................................ 12-39




12-ii 10-25-90
INTRODUCTION WD90COO

1.0 INTRODUCTION
Many applications require greater graphics