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2 2




Tang/TangBTO Schematics Document
uFCBGA/uFCPGA Coppermine-T or Tualatin


2001-11-16
3 3




REV: 2.0




4 4




Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AN
D CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF MPETENT DIVISION OF R&D
THE CO
Cover Sheet
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFO CONTAINS MAY BE Size
RMATION Document Number Rev
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMP
AL ELECTRONICS,INC. ADY11 LA-1181 2

Date: Friday, November 16, 2001 Sheet 1 of 41
A B C D E
A B C D E




Compal confidential Block Diagram
Model Name :ADY11(Tang)
File Name : LA-1181
CPU Bypass Coppermine-T or
& CPUVID Tualatin Thermal Sensor Clock Generator
1
page 6 uFCBGA/uFCPGA CPU MAX6654 W320-04 1



page 4,5
page 5 page 14
Fan Control ITP Connector HA#(3..31)
PSB HD#(0..63)
page 7 page 7
133MHz


CRT Connector Almador-M Memory BUS SO-DIMM X2
page 15 GMCH-M 3.3V 133MHz BANK 0, 1, 2, 3 page 12,13

DVO Link 625 BGA
VCH VCH Conn page 8,9,10
Board
page 15



2 HUB Link 2

1.8V 66MHz
PCI debug
port
page 27

PCI BUS ICH3-M 3.3V 48MHz
USB conn
IDSEL:AD20 3.3V 33MHz page 30
IDSEL:AD17
(PIRQA#,GNT# 3,REQ#3)
(PIRQA/B#,GN T#2,REQ#2)
421 BGA 3.3V 24.576MHz AC-LINK
MDC
LAN CardBus Controller 3.3V ATA100
page 25
3COM -3C920 page 16,17
OZ 6912
page 20 page 21



RJ45 Slot 0 LPC BUS IDE Connector AC97
3
page 20 3.3V 33MHz (HDD/CR-ROM) Codec 3

page 22
STAC9700
page 19 page 23


Power On/Off X BUS NS PC87393
Reset & RTC LPC to X-BUS AMP& Phone
& Super I/O Jack
page 30
14M_5V page 26 page 24
EC 87570
DC/DC Interface page 28 PIO SIO
Suspend page 27 page 27
Touch Pad
page 31 page 27

EC I/O Buffer Int.KBD FDD
4
page 29 page 19 4
page 29
Power Circuit
DC/DC
page BIOS PS/2 conn
32,33,34,35,36,37 page 29 page 27
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I CONTAINS CONFIDENTIAL
NC. AND Block Diagram
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D
INFORMATION CONTAINS MAY BE Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE Document Number Rev
ADY11 LA-1181 2
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF
COMPAL ELECTRONICS,INC.
Date: Friday, November 16, 2001 Sheet 2 of 41
A B C D E
5 4 3 2 1
Note:"@" means all model depop
"#" means Tang depop



Model CHIPS Rev CHIPS Rev 3C920-ST06
Function M2P3 Tang FW82830MG FW82801CAM Lot:M28010
DC:C0117
SST-Build QB88 QB63
Lot:M28010
D FDD YES NO SST2-Build QC34 QB62 DC:C0117 D



QC34 QB62 Lot:M28010
PS/2 YES YES PT-Build DC:C0117
QC34 QC42 Lot:M28010
ST-Build DC:C0117
Series port NO NO


Parallel port YES YES


RJ45 YES NO


3Com Lan YES NO
chipset(3C920)


Note:"@" means all model depop
"&" means M2P3 depop
C "#" means Tang depop C




B B




A A




Compal Electronics, Inc.
Title
Note & Revision
Size Document Number Rev
ADY11 LA-1181 2

Date: Friday, November 16, 2001 Sheet 3 of 41
5 4 3 2 1
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1 1




+CPU_CORE




AC21




AC19




AC17




AC15




AC13




AC11
AB22
AA21




AB20
AA19




AB18
AA17




AB16
AA15




AB14
AA13




AB12
AA11




AB10
W21
M22




AC9




AC7
G21




AA9




AB8
AA7
D22


H22




N21

R21

U21




D20




D18




D16




D14




D12




D10
E21


K22



P22



V22

Y22




E19




E17




E15




E13




E11
F22




T22




F20




F18




F16




F14




F12




F10
L21
J21




G5
D8




D6


H6



N5
E9




E7




E5


K6



V6
F8




F6




T6
J5
HA#[3..31] U5A HD#[0..63]
<8> HA#[3..31] HD#[0..63] <8>




VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
HA#3 K1 A16 HD#0
HA#4 A#3 D#0 HD#1
J1 B17
HA#5 A#4 D#1 HD#2
G2 A17
HA#6 A#5 D#2 HD#3
K3 D23
HA#7 A#6 D#3 HD#4
J2 B19
HA#8 A#7 D#4 HD#5
H3 C20
HA#9 A#8 D#5 HD#6
G1
A#9 VCC D#6
C16
HA#10 A3 A20 HD#7
HA#11 A#10 D#7 HD#8
J3 A22
HA#12 A#11 D#8 HD#9
H1 A19
HA#13 A#12 D#9 HD#10
D3 A23
HA#14 A#13 D#10 HD#11
F3 A24
HA#15 A#14 D#11 HD#12
G3 C18
HA#16 A#15 D#12 HD#13
C2 D24
HA#17 A#16 D#13 HD#14
B5 B24
HA#18 A#17 D#14 HD#15
B11 A18
2 HA#19 A#18 D#15 HD#16 2
C6 E23
HA#20 A#19 D#16 HD#17
B9 B21
HA#21 A#20 D#17 HD#18
B7 B23
HA#22 A#21 D#18 HD#19
C8 E26
HA#23 A#22 D#19 HD#20
A8 C24
HA#24 A#23 D#20 HD#21
A10
A#24 Address D#21
F24
HA#25 B3 Lines D25 HD#22
HA#26 A#25 D#22 HD#23
A13 E24
HA#27 A#26 D#23 HD#24
A9 B25
HA#28 A#27 D#24 HD#25
C3 G24
HA#29 A#28 D#25 HD#26
C12 H24
HA#30 A#29 D#26 HD#27
C10 F26
HA#31 A#30 D#27 HD#28
A6 L24
A#31 D#28 HD#29
A15 H25
A14
B13
A12
A#32
A#33
A#34
Mobile Data
Signals
D#29
D#30
D#31
C26
K24
G26
HD#30
HD#31
HD#32
<8> HREQ#[0..4] HREQ#[0..4]

HREQ#0 R1
A#35


REQ#0
Tualatin D#32
D#33
D#34
D#35
K25
J24
K26
HD#33
HD#34
HD#35
HREQ#1 L3 F25 HD#36
HREQ#2 REQ#1 D#36 HD#37
T1
REQ#2 Request D#37
N26
HREQ#3 U1 Signals J26 HD#38
HREQ#4 REQ#3 D#38 HD#39
L1 M24
REQ#4 D#39 HD#40
T4 U26
RP# D#40 HD#41
<8> HADS# AA3 P25
ADS# D#41 HD#42
L26
D#42 HD#43
R24
D#43 HD#44
W2 R26
AERR# D#44 HD#45
AB3 M25
AP#0 D#45 HD#46
+1.5VS
P3
AP#1 Error D#46
V25
C14 Interface T24 HD#47
3 R108 1.5K BERR# D#47 HD#48 3
AF23 M26
BINIT# D#48 HD#49
1 2 AF4 P24
IERR# D#49 HD#50
AA26
R121 10_0402 D#50 HD#51
T26
D#51 HD#52
1 2 A7 U24
BREQ0# D#52 HD#53
C4
NC Arbitration D#53
Y25
C22 Signals W26 HD#54
NC D#54 HD#55
AD23 V26
NC D#55 HD#56
<8> HBPRI# R2 AB25
BPRI# D#56 HD#57
<8> HBNR# L2 T25
BNR# D#57 HD#58
<8> HLOCK# V3
LOCK# Snoop VSS VCC D#58
Y24
Signals W24 HD#59
D#59 HD#60
Y26
D#60 HD#61
<8> HIT# AA2 AB24
HIT# D#61 HD#62
<8> HITM# U2 AA24
HITM# D#62 HD#63
<8> HDEFER# T3 V24
DEFER# D#63




VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
AA25VSS_10
AC25VSS_11
AF25VSS_12
AE26VSS_13
C23 VSS_14
F23 VSS_15
H23 VSS_16
K23 VSS_17
M23 VSS_18
P23 VSS_19
T23 VSS_20
V23 VSS_21
Y23 VSS_22
AB23VSS_23
AE23VSS_24
B22 VSS_25
D21 VSS_26
F21 VSS_27
E22 VSS_28
H21 VSS_29
G22 VSS_30
K21 VSS_31
J22 VSS_32
M21 VSS_33
L22 VSS_34
P21 VSS_35
N22 VSS_36
T21 VSS_37
R22 VSS_38
V21 VSS_39
U22 VSS_40
Y21 VSS_41
W22 VSS_42
AB21VSS_43
AA22VSS_44
AC22VSS_45
AE21VSS_46
B20 VSS_47
D19 VSS_48
AB19VSS_49
AA20VSS_50
AC20VSS_51
AE19VSS_52
B18 VSS_53
D17 VSS_54
F17 VSS_55
E18 VSS_56
AB17VSS_57
E16 VSS_0
R4 VSS_1
E25 VSS_2
G25 VSS_3
J25 VSS_4
L25 VSS_5
N25 VSS_6
R25 VSS_7
U25 VSS_8
W25 VSS_9