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1




Compal confidential 1




Schematics Document
Mobile Penryn uFCPGA with Intel
2 Cantiga_GM+ICH9-M SFF core logic 2




SKYY
2008-07-29
3 3




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-4021P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401554 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, June 03, 2009 Sheet 1 of 36
A B C D E
A B C D E



Compal confidential
File Name : LA-4021P SKYY
CK505 Accelerometer
Docking CONN.(Opus 1.0)
Thermal Sensor Mobile Penym
1 *RJ-45(LED*2) EMC2103 LV/ULV Dual Core Clock Generator LIS302DLTR 1

*CRT uFCPGA-956 CPU - SFF ICS9LPRS397
*LINE IN page 4
page 16 page 26
*LINE OUT page 4,5,6,7
*USB x4
*DC JACK Fan Control
*Power on signal page 4 H_A#(3..35) FSB
H_D#(0..63)
*Docked indicator 667/800/1066MHz 1.05V
signal
*AC present indicator LCD conn
page 18
signal
CRT
Intel Cantiga GMS DDR2 800MHz 1.8V
DDR2-SO-DIMM X 2
page 17 BANK 0, 1, 2, 3 page 14,15
FCBGA 1363 - SFF Dual Channel
CRT to docking
page 34

page 8,9,10,11,12,13
S-Video to 34
page
Docking USB x1(Docking) page 34

2
Express Card 54 WWAN Card 2
WWAN + PCIE X1 FingerPrinter AES2810
PCIE X1 + USB X1 daughter board
+ USB X1 DMI X4 USBx1
page 25 page 25 page 31

USB conn x 3(For I/O)
PCI-E BUS USB2.0 BT Conn USB x 1 page 31
Intel ICH9-M Azalia

WBMMAP-569 - SFF
SATA0 USB x1(Camara)
10/100/1000 LAN CardBus Controller PCI BUS
SATA1 page 18
Intel Boaz GbE Rico R5C833
page 20,21,22,23
PHY MDC V1.5
page 30
page 24 page 27

Audio CKT TPA6043
SPI
AD1984HD page 28 AMP & Audio Jack page 29
24HST1041A-3
3 RJ45 CONN 1394 port SD/MMC Slot 2.5" SATA HDD Connector
3

page 25
SPI ROM OR
AT26DF321 SATA ODD Connector
page 21
LED LPC BUS page 32
page 19
1.8" SATA HDD Connector
page 21

RTC CKT.
TPM1.2 SMSC KBC 1091
page 21
SLB9635TT page 33
page 32

Power OK CKT.
page 35 Touch Pad CONN. Int.KBD
page 30 page 30


4
Power On/Off CKT. TrackPoint CONN. 4

page 30
page 30


Security Classification Compal Secret Data Compal Electronics, Inc.
2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
SCHEMATIC, M/B LA-4021P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
page 36 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401554 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, June 03, 2009 Sheet 2 of 36
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A




( O MEANS ON X MEANS OFF )
Voltage Rails
Symbol Note :
+B +5VALW +1.8V +5VS
+3VALW +3VS
+3VM +1.5VS
: means Digital Ground
power
plane +1.05VM +0.9V
+VCCP
+CPU_CORE : means Analog Ground
+0.9V
@ : means just reserve , no build
CONN@ : means ME part.
State
45@ : means install after SMT.




S0
O O O O
S1
O O O O
S3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
1
don't exist X X X X SMBUS Control Table
1




SERIAL THERMAL
SOURCE INVERTER BATT EEPROM SENSOR SODIMM CLK CHIP MINI CARD LCD
(CPU)

SMB_EC_CK1
SMB_EC_DA1
KB926 X V V X X X X X
SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X
SMB_CK_CLK1
SMB_CK_DAT1 ICH9 X X X X V V V X
LCD_CLK
LCD_DAT Cantiga
X X X X X X X V




I2C / SMBUS ADDRESSING

DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 10100000
CLOCK GENERATOR (EXT.) D2 11010010
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-4021P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401554 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, June 03, 2009 Sheet 3 of 36
A
5 4 3 2 1




XDP Connector
JP1
1 2 +VCCP
XDP_BPM#5 GND0 GND1
3 OBSFN_A0 OBSFN_C0 4
XDP_BPM#4 5 6
OBSFN_A1 OBSFN_C1 XDP_TDI R2 54.9_0402_1%
7 GND2 GND3 8 1 2
XDP_BPM#3 9 10
XDP_BPM#2 OBSDATA_A0 OBSDATA_C0 XDP_TMS R3 54.9_0402_1%
11 OBSDATA_A1 OBSDATA_C1 12 1 2
13 GND4 GND5 14
XDP_BPM#1 15 16 XDP_TDO R4 1 2 54.9_0402_1%
XDP_BPM#0 OBSDATA_A2 OBSDATA_C2
17 OBSDATA_A3 OBSDATA_C3 18
D XDP_BPM#5 R5 54.9_0402_1% D
19 GND6 GND7 20 1 2
21 OBSFN_B0 OBSFN_D0 22
23 24 XDP_HOOK1 R6 1 2 @ 54.9_0402_1%
OBSFN_B1 OBSFN_D1
25 GND8 GND9 26
27 28 XDP_TRST# R7 1 2 51_0402_1%
+VCCP OBSDATA_B0 OBSDATA_D0
Place close to U1. 29 OBSDATA_B1 OBSDATA_D1 30
31 32 XDP_TCK R8 1 2 54.9_0402_1%
GND10 GND11
<8> H_A#[3..16] 33 OBSDATA_B2 OBSDATA_D2 34
U1A R9 35 36 This shall place near CPU
H_A#3 1K_0402_5% OBSDATA_B3 OBSDATA_D3
P2 A[3]# ADS# M4 H_ADS# <8> 37 GND12 GND13 38
H_A#4 V4 J5 <5,21> H_PWRGOOD 2 1 H_PWRGOOD_R 39 40 CLK_CPU_XDP <16>
A[4]# BNR# H_BNR# <8> PWRGOOD/HOOK0 ITPCLK/HOOK4
H_A#5 W1 L5 XDP_HOOK1 41 42 CLK_CPU_XDP# <16>
A[5]# BPRI# H_BPRI# <8> HOOK1 ITPCLK#/HOOK5




2



2
56_0402_5%
H_A#6 T4 +VCCP 43 44 +VCCP
A[6]# VCC_OBS_AB VCC_OBS_CD




ADDR GROUP 0
H_A#7 AA1 N5 R609 2 1 45 46 H_RESET#_R R11 1 2 22.6_0402_1% H_RESET#
A[7]# DEFER# H_DEFER# <8> HOOK2 RESET#/HOOK6
H_A#8 AB4 F38 51_0402_1% C1 0.1U_0402_16V4Z 47 48 XDP_DBRESET#
A[8]# DRDY# H_DRDY# <8> HOOK3 DBR#/HOOK7
H_A#9 T2 J1 49 50
A[9]# DBSY# H_DBSY# <8> GND14 GND15




R10
H_A#10 AC5 9/20 51 52 XDP_TDO




1



1
A[10]# SDA TD0




CONTROL
H_A#11 AD2 M2 53 54 XDP_TRST#
A[11]# BR0# H_BR0# <8> SCL TRST#
H_A#12 AD4 55 56 XDP_TDI R14
H_A#13 A[12]# XDP_TCK TCK1 TDI XDP_TMS 0_0402_5%
AA5 A[13]# IERR# B40 57 TCK0 TMS 58 Place R191 within 200ps
H_A#14 AE5 D8 59 60 XDP_PRE 1 2 (~1") to CPU
A[14]# INIT# H_INIT# <21> GND16 GND17
H_A#15 AB2
H_A#16 A[15]# CONN@ SAMTE_BSH-030-01-L-D-A
AC1 A[16]# LOCK# N1 H_LOCK# <8>
<8> H_ADSTB#0 Y4 ADSTB[0]#
G5 H_RESET#
RESET# H_RESET# <8>
<8> H_REQ#0 R1 REQ[0]# RS[0]# K2 H_RS#0 <8>
<8> H_REQ#1 R5 REQ[1]# RS[1]# H4 H_RS#1 <8>
<8> H_REQ#2 U1 REQ[2]# RS[2]# K4 H_RS#2 <8>
P4 L1
<8>
<8>
H_REQ#3
H_REQ#4 W5
REQ[3]#
REQ[4]#
TRDY#
H2
H_TRDY# <8>
+3VS
Thermal Sensor EMC2103-2 with CPU PWM FAN
<8> H_A#[17..35] HIT# H_HIT# <8>
H_A#17 AN1 A[17]# HITM# F2 H_HITM# <8> Change R18 to 2.94k_1% to change initial
C H_A#18 C
AK4 A[18]# Add 0 ohm per EMI request. Correct to Swap DN&DP. (11/26) thermal shutdown temp to 85C. 2/13
H_A#19 AG1 AY8 XDP_BPM#0
A[19]# BPM[0]#




2
ADDR GROUP 1




H_A#20 AT4 BA7 XDP_BPM#1 10/17 U2
H_A#21 A[20]# BPM[1]# XDP_BPM#2 R15
AK2 A[21]# BPM[2]# BA5 Change R17 to 10K for HW critical
H_A#22 AT2 AY2 XDP_BPM#3 R48 68_0402_5% H_THERMDC 1 16 REMOTE2+
H_A#23 A[22]# BPM[3]# XDP_BPM#4 0_0402_5% DN DP2/DN3 shutdown to internal diode
AH2 AV10
XDP/ITP SIGNALS




H_A#24 A[23]# PRDY# XDP_BPM#5_R XDP_BPM#5
AF4 AV2 1 2 1 2 H_THERMDA 2 15 REMOTE2- temperature. 4/23




1
H_A#25 A[24]# PREQ# XDP_TCK C3 2200P_0402_50V7K DP DN2/DP3
AJ5 A[25]# TCK AV4
H_A#26 AH4 AW7 XDP_TDI +3VS_THER 3 14 R18 1 2 2.05K_0402_1%
H_A#27 A[26]# TDI XDP_TDO VDD TRIP_SET @ R643 1
AM4 A[27]# TDO AU1 2 10K_0402_5%
H_A#28 XDP_TMS +5VS
AP4 A[28]# TMS AW5 1 C2 R24 4 GPIO1 SHDN_SEL 13 R17 1 2 10K_0402_5% +3VS
H_A#29 AR5 AV8 XDP_TRST# 0.1U_0402_16V4Z 10K_0402_5%
H_A#30 A[29]# TRST# XDP_DBRESET# JP2
AJ1 A[30]# DBR# J7 XDP_DBRESET# <22> +3VS 1 2 5 GPIO2 GND 12 1 2
H_A#31 AL1 9/14 R13 10K_0402_5% 1 4
A[31]# H_PROCHOT# <42> 2 1 4
H_A#32 AM2 6 11 FAN_PWM 2 5
A[32]# <22> THERM_SCI# ALERT# PWM 2 G5
H_A#33 AU5 A[33]# THERMAL Place Close to U1. +VCCP 1 2 +3VS 3 3 G6 6
H_A#34 AP2 +3VS 1 2 7 10 TACH R16 10K_0402_5%
H_A#35 A[34]# R20 SYS_SHDN# TACH
AR1 D38 1 2 68_0402_5% R23 @ 10K_0402_5% CONN@ ACES_85205-04001




GND
A[35]# PROCHOT# H_THERMDA_R R21 H_THERMDA
<8> H_ADSTB#1 AN5 ADSTB[1]# THERMDA BB34 1 2 0_0402_5% <22,26> ICH_SM_DA 8 SMDATA SMCLK 9 ICH_SM_CLK <22,26>
BD34 H_THERMDC_R R22 1 2 0_0402_5% H_THERMDC Chnage JP2 to 4pin. 12/06
THERMDC EMC2103-2-AX_QFN16_4X4
<21> H_A20M# C7 <37,39> MAINPWON 1 2




17
A20M# H_THERMTRIP# R324 @ 0_0402_5%
<21> H_FERR# D4 FERR# THERMTRIP# B10 H_THERMTRIP# <8,21>
ICH




F10 H_THERMTRIP# 1 2
<21> H_IGNNE# IGNNE#
H_THERMDA, H_THERMDC routing together, R641 0_0402_5%
<21> H_STPCLK# F8 STPCLK# Add R641 per HP request. 3/28
<21> H_INTR C9 H CLK Trace width / Spacing = 10 / 10 mil
LINT0
<21> H_NMI C5 LINT1 BCLK[0] A35 CLK_CPU_BCLK <16>
<21> H_SMI# E5 SMI# BCLK[1] C35 CLK_CPU_BCLK# <16> Change R23, R24 connect to +3VS and add PU/PD for U2. (9/3)
PAD T97 V2 RSVD01 NI R23, reserve R324 and connect to MAINPWON. (10/5)
PAD T98 Y2 RSVD02
AG5
PAD T99 RSVD03
REMOTE thermal sensor
RESERVED
RESERVED




B B
PAD T100 AL5 RSVD04
PAD T101 J9 RSVD05
PAD T102 F4 RSVD06
PAD T103 H8 RSVD07




1
C
REMOTE2+ 2 Q45
B MMBT3904W_SOT323-3
E




3
PENRYN SFF_UFCBGA956 2 Layout Note:
C314
2200P_0402_50V7K place near the hottest spot area for
1 NB & top SODIMM.
REMOTE2-




A A




Security Classification Compal Secret Data Compal Electronics, Inc.