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MDS-DRE1
SERVICE MANUAL
US Model Canadian Model AEP Model UK Model

U.S. and foreign patents licensed form Dolby Laboratories Licensing Corporation.

Model Name Using Similar Mechanism MD Mechanism Type Base Unit Name Optical Pick-up Name

MDS-JA3ES MDM-2CR MBU-2B KMS-210A/J-N

SPECIFICATIONS

­ Continued on next page ­

MINIDISC RECORDER/PLAYER
MICROFILM

TABLE OF CONTENTS

1. 2. 3. 4. 5. 6.
6-1. 6-2. 6-3. 6-4. 6-5. 6-6. 6-7. 6-8. 6-9. 6-10. 6-11. 6-12. 6-13. 6-14. 6-15. 6-16. 6-17. 6-18. 6-19. 6-20. 6-21. 6-22. 6-23. 6-24.

SERVICING NOTES ............................................... 3 GENERAL ................................................................... 7 DISASSEMBLY ......................................................... 9 TEST MODE .............................................................. 12 ELECTRICAL ADJUSTMENTS ......................... 15 DIAGRAMS
Block Diagram ­ SERVO Section ­ .............................. Block Diagram ­ MAIN Section (1/2) ­ ....................... Block Diagram ­ MAIN Section (2/2) ­ ....................... Block Diagram ­ DISPLAY/KEY/POWER SUPPLY Section ­ ............. Notes for Printed Wiring Board and Schematic Diagram .................................................. Printed Wiring Board ­ BD Board (SIDE A) ­ ............. Printed Wiring Board ­ BD Board (SIDE B) ­ ............. Schematic Diagram ­ BD Section (1/2) ­ ..................... Schematic Diagram ­ BD Section (2/2)­ ...................... Printed Wiring Boards ­ DETECTION SW Board, MOTOR Board ­ ............... Schematic Diagram ­ DETECTION SW/MOTOR Section ­ ........................ Printed Wiring Board ­ DIGITAL Board (SIDE A) ­ ... Printed Wiring Board ­ DIGITAL Board (SIDE B) ­ ... Schematic Diagram ­ DIGITAL Section (1/4) ­ .......... Schematic Diagram ­ DIGITAL Section (2/4) ­ .......... Schematic Diagram ­ DIGITAL Section (3/4) ­ .......... Schematic Diagram ­ DIGITAL Section (4/4) ­ .......... Printed Wiring Board ­ PANEL Section (1) ­ .............. Schematic Diagram ­ PANEL Section (1) ­ ................. Printed Wiring Boards ­ PANEL Section (2) ­ ............. Schematic Diagram ­ PANEL Section (2) ­ ................. Printed Wiring Boards ­ POWER Section ­ ................. Schematic Diagram ­ POWER Section ­ ..................... IC Pin Function Description ........................................... 21 23 25 27 30 31 33 35 37 39 41 43 45 47 49 51 53 56 57 59 61 63 65 77

7. 8.

EXPLODED VIEWS ................................................ 88 ELECTRICAL PARTS LIST ............................... 93

SAFETY-RELATED COMPONENT WARNING!! COMPONENTS IDENTIFIED BY MARK ! OR DOTTED LINE WITH MARK ! ON THE SCHEMATIC DIAGRAMS AND IN THE PARTS LIST ARE CRITICAL TO SAFE OPERATION. REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.

ATTENTION AU COMPOSANT AYANT RAPPORT À LA SÉCURITÉ! LES COMPOSANTS IDENTIFIÉS PAR UNE MARQUE ! SUR LES DIAGRAMMES SCHÉMATIQUES ET LA LISTE DES PIÈCES SONT CRITIQUES POUR LA SÉCURITÉ DE FONCTIONNEMENT. NE REMPLACER CES COMPOSANTS QUE PAR DES PIÈCES SONY DONT LES NUMÉROS SONT DONNÉS DANS CE MANUEL OU DANS LES SUPPLÉMENTS PUBLIÉS PAR SONY.

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SECTION 1 SERVICING NOTES
SAFETY CHECK-OUT After correcting the original service problem, perform the following safety check before releasing the set to the customer: Check the antenna terminals, metal trim, "metallized" knobs, screws, and all other exposed metal parts for AC leakage. Check leakage as described below. LEAKAGE TEST The AC leakage from any exposed metal part to earth ground and from all exposed metal parts to any exposed metal part having a return to chassis, must not exceed 0.5 mA (500 microampers.). Leakage current can be measured by any one of three methods. 1. A commercial leakage tester, such as the Simpson 229 or RCA WT-540A. Follow the manufacturers' instructions to use these instruments. 2. A battery-operated AC milliammeter. The Data Precision 245 digital multimeter is suitable for this job. 3. Measuring the voltage drop across a resistor by means of a VOM or battery-operated AC voltmeter. The "limit" indication is 0.75 V, so analog meters must have an accurate lowvoltage scale. The Simpson 250 and Sanwa SH-63Trd are examples of a passive VOM that is suitable. Nearly all battery operated digital multimeters that have a 2 V AC range are suitable. (See Fig. A)
To Exposed Metal Parts on Set

CAUTION Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used batteries according to the manufacturer's instructions. ADVARSEL! Lithiumbatteri-Eksplosionsfare ved fejlagtig håndtering. Udskiftning må kun ske med batteri af samme fabrikat og type. Levér det brugte batteri tilbage til leverandøren.

ADVARSEL Eksplosjonsfare ved feilaktig skifte av batteri. Benytt samme batteritype eller en tilsvarende type anbefalt av apparatfabrikanten. Brukte batterier kasseres i henhold til fabrikantens instruksjoner. VARNING Explosionsfara vid felaktigt batteribyte. Använd samma batterityp eller en likvärdig typ som rekommenderas av apparattillverkaren. Kassera använt batteri enligt gällande föreskrifter. VAROITUS Paristo voi räjähtää, jos se on virheellisesti asennettu. Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiin. Hävitä käytetty paristo valmistajan ohjeiden mukaisesti.

0.15 µF

1.5 k

AC voltmeter (0.75 V)

Earth Ground Fig. A. Using an AC voltmeter to check AC leakage.

NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK OR BASE UNIT The laser diode in the optical pick-up block may suffer electrostatic break-down because of the potential difference generated by the charged electrostatic load, etc. on clothing and the human body. During repair, pay attention to electrostatic break-down and also use the procedure in the printed matter which is included in the repair parts. The flexible board is easily damaged and should be handled with care. NOTES ON LASER DIODE EMISSION CHECK The laser beam on this model is concentrated so as to be focused on the disc reflective surface by the objective lens in the optical pick-up block. Therefore, when checking the laser diode emission, observe from more than 30 cm away from the objective lens.

MODEL IDENTIFICATION
-- LOWER SIDE CABINET (BOTTOM VIEW) --
Front Side

Part No. 4-210-100-1 : AEP and UK models 4-210-100-2 : US and Canadian models

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CAUTION Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.

This appliance is classified as a CLASS 1 LASER product. The CLASS 1 LASER PRODUCT MARKING is located on the rear exterior.

Laser component in this product is capable of emitting radiation exceeding the limit for Class 1. The following caution label is located inside the unit.

Flexible Circuit Board Repairing · Keep the temperature of the soldering iron around 270 °C during repairing. · Do not touch the soldering iron on the same conductor of the circuit board (within 3 times). · Be careful not to apply force on the conductor when soldering or unsoldering. Notes on chip component replacement · Never reuse a disconnected chip component. · Notice that the minus side of a tantalum capacitor may be damaged by heat.

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FORCED RESET
The system microprocessor can be reset in the following way. Use these methods when the unit cannot be operated normally due to the overrunning of the microprocessor, etc. Method 1: Set TP (RESET) of the DIGITAL board to ground momentarily. Method 2: Disconnect the power plug, and short-circuit CN451 of the POWER board with a pair of tweezers, etc. [POWER board] (Component Side)

[DIGITAL board] (Side A)
CN1 TP (RESET)

IC101

BT451 1 2

CN901

CN451 (RESET)

RETRY CAUSE DISPLAY MODE
· In this test mode, the causes for retry of the unit during recording can be displayed on the fluorescent display tube. This is useful for locating the faulty part of the unit. · The retry cause, number of retries, and number of retry errors are displayed. Each is displayed in hexadecimal number. Method: 1. Load a recordable disc whose contents can be erased into the unit. 2. Press the [STOP] button, [ EJECT] button, [PAD1] button simultaneously. § 3. Press the [ REC] button, and start recording. r 4. The ## value increases with each retry. If an error occurs after a retry, the @@ count will also increase. U 5. To exit the test mode, press the [ ] (POWER) button.

Fig. 1 Reading the Test Mode Display
R.T s c # # e @@ Fluorescent Display Tube Signs

: Cause of retry

# # : Number of retries @@ : Number of retry errors All three displays above are in hexadecimal numbers.

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Reading the Retry Cause Display Higher Bits Hexadecimal 8 Bit Binary 0 0 0 0 0 0 0 1 4 0 0 0 0 0 0 1 0 2 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 Lower Bits 8 0 0 0 1 0 0 0 0 4 0 0 1 0 0 0 0 0 2 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 Hexadecimal 01 02 04 08 10 20 40 80

Cause of Retry shock *1 ader5 Discontinuous address (Not used) FCS incorrect IVR rec error Spindle is slow Access fault

Occurring conditions When more than 3.5 shocks are detected When ADER was counted more than five times continuously When ADIP address is not continuous (Not used) When not in focus When ABCD signal level exceeds the specified range When spindle rotation is detected as slow When access operation is not performed normally

b7 b6 b5 b4 b3 b2 b1 b0

*1 Some displays are not used depending on the microprocessor version. Reading the Display: Convert the hexadecimal display into binary display. If more than two causes, they will be added. Example When 42 is displayed: Higher bit : 4 = 0100 n b6 Lower bit : 2 = 0010 n b1 In this case, the retry cause is combined of "spindle is slow" and "ader5". When A2 is displayed: Higher bit : A = 1010 n b7+b5 Lower bit : 2 = 0010 n b1 The retry cause in this case is combined of "access fault", "IVR rec error", and "ader5".

Hexadecimal n Binary Conversion Table
Hexadecimal 0 1 2 3 4 5 6 7 Binary 0000 0001 0010 0011 0100 0101 0110 0111 Hexadecimal 8 9 A B C D E F Binary 1000 1001 1010 1011 1100 1101 1110 1111

Reference: In this test mode, when the [PLAY/PAUSE] button is pressed, and the disc is played back, the "PLAYBACK MODE" is set. The display becomes as shown in Fig. 2. The playback mode is not used in particular during servicing. 44 ¢¢¢¢¢¢ p

Fig. 2 Display during Playback Mode 4 : Parts No. (Name of area named on TOC) ¢¢¢¢¢¢ : Address (Physical address on disc) p : Track mode (Copyright information of each part, information on copyright, etc.)

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SECTION 2 GENERAL
This section is extracted from instruction manual.

NAMES AND FUNCTIONS OF PARTS

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SECTION 3 DISASSEMBLY
Note: Follow the disassembly procedure in the numerical order given.

UPPER CABINET SECTION

4 two connectors (CN801, 802)

6 upper cabinet section

4 two connectors (CN701, 751) 3 Open the upper cabinet section in arrow direction.

2 two screws (BV3 × 8)

1 three screws (BV3 × 10) 1 five screws (BV3 × 10)

5 flat wire (CN902)

MD ASSEMBLY

4 MD assembly 3 two screws (BVTP3 × 8)

3 two screws (BVTP3 × 8)

1 connector (CN3)

2 two flat wires (CN4, 5)

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BRACKET (MD)
1 Rotate the pully (BD) in arrow direction A and move the slider assembly in arrow direction B. A

2 two screws (B2.6 × 18)

2 two screws (B2.6 × 18)

3 two collars

slider assembly

3 two collars

B 4 insulator (MD) 4 insulator (MD) 5 compression spring 5 compression spring

6 bracket (MD)

5 two compression springs

4 two insulators (MD)

SLIDER (M) ASSEMBLY

claw B claw A
1 Disengage a coil spring from the claw A. 2 Disengaging the claw B, raise the lever (SLM) upwards to remove. C 3 Rotate the pully (BD) in arrow direction C.

claw C

A B

4 Move the claw C on the slider up to the base groove in arrow direction A, and raise it in arrow direction B to remove.

Base groove

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BASE UNIT AND LOADING MOTOR ASSEMBLY

3 belt

4 two screws (B2.6 × 5)

1 screw (BV3 × 6)

6 loading motor assembly 5 connector (CN192) 2 base unit 1 two screws (BV3 × 6)

SLIDER ASSEMBLY MOUNTING

3 Move the slider assembly in arrow direction B, and lock it to the lever (SLM).

1 Rotate fully the lever (SLM) in arrow direction A. B A

C

2 Rotate the pully (BD) in arrow C direction.

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SECTION 4 TEST MODE
4-1. Setting the Test Mode U Press [ ] (POWER) switch while pressing the [AMS] knob to turn POWER ON. 4-2. Exiting the Test Mode Press the [REPEAT] button. Unplug the power plug from an outlet. 4-3. Basic Operations of the Test Mode All operations are performed using the [AMS] knob, [ENTER/YES] button, and [EDIT/NO] button.
The functions of these buttons are as follows. Function Contents

Changes parameters and modes [AMS] knob [ENTER/YES] button Proceeds onto the next step. Finalizes input. Returns to previous step. Stops operations. [EDIT/NO] button

4-4. Selecting the Test Mode
Eight test modes are selected by turning the [AMS] knob. Display TEMP ADJUS LDPWR ADJUS EFBAL ADJUS FBIAS ADJUS FBIAS CHECK CPLAY MODE CREC MODE EEP MODE Contents Temperature compensation offset adjustment Laser power adjustment Traverse adjustment Focus bias adjustment Focus bias check Continuous playback mode Continuous recording mode Non-volatile memory mode *

For detailed description of each adjustment mode, refer to 5. Electrical Adjustments. If a different adjustment mode has been selected by mistake, press the [EDIT/NO] button to exit from it. * The EEP MODE is not used in servicing. If set accidentally, press the [EDIT/NO] button immediately to exit it. 4-4-1. Operating the Continuous Playback Mode 1. Entering the continuous playback mode 1 Set the disc in the unit (either MO or CD).(MO: Recordable disc, CD: Disc for playback only) 2 Rotate the [AMS] knob and display "CPLAY MODE". 3 Press the [ENTER/YES] button to change the display to "CPLAY IN". 4 When access completes, the display changes to "C1 = AD = ".
Note: The " " displayed are arbitrary numbers.

2. Changing the parts to be played back 1 Press the [ENTER/YES] button during continuous playback to change the display to "CPLAY MID", "CPLAY OUT". When pressed another time, the parts to be played back can be changed. 2 When access completes, the display changes to "C1 = AD = ".
Note: The " " displayed are arbitrary numbers.

3. Ending the continuous playback mode 1 Press the [EDIT/NO] button. The display will change to "CPLAY MODE". 2 Press the [ EJECT] button and remove the disc. §
Note 1: The playback start addresses for IN, MID, and OUT are as follows.

IN MID OUT

40h cluster 300h cluster 700h cluster

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4-4-2. Operating the Continuous Recording Mode 1. Entering the continuous recording mode 1 Set the MO disc in the unit. 2 Rotate the [AMS] knob and display "CREC MODE". 3 Press the [ENTER/YES] button to change the display to "CREC IN". 4 When access completes, the display changes to "CREC ( " and REC lights up.
Note : The " " displayed are arbitrary numbers.

2. Changing the parts to be recorded 1 When the [ENTER/YES] button is pressed during continuous recording, the display changes to "CREC MID", "CREC OUT" and REC goes off. When pressed another time, the parts to be recorded can be changed. 2 When access completes, the display changes to "CREC ( " and REC lights up.
Note : The " " displayed are arbitrary numbers.

3. Ending the continuous recording mode 1 Press the [EDIT/NO] button. The display changes to "CREC MODE" and REC goes off. 2 Press the [ EJECT] button and remove the disc. §
Note 1: The recording start addresses for IN, MID, and OUT are as follows.

IN 40h cluster MID 300h cluster OUT 700h cluster Note 2: The [EDIT/NO] button can be used to stop recording anytime.
Note 3: During the test mode, the erasing-protection tab will not be detected. Therefore be careful not to set the continuous recording mode when a disc not to be erased is set in the unit. Note 4: Do not perform continuous recording for long periods of time above 5 minutes. Note 5: During continuous recording, be careful not to apply vibration.

4-4-3. Non-Volatile Memory Mode (EEP MODE) This mode reads and writes the contents of the non-volatile memory. It is not used in servicing. If set accidentally, press the [EDIT/NO] button immediately to exit it.

4-5. Functions of Other buttons
Function PLAY/PAUSE STOP ) 0 r REC BANK PLAY MODE DISPLAY Contents Sets continuous playback when pressed in the STOP state. When pressed during continuous playback, the tracking servo turns ON/OFF. Stops continuous playback and continuous recording. The sled moves to the outer circumference only when this is pressed. The sled moves to the inner circumference only when this is pressed. Turns recording ON/OFF when pressed during continuous playback. Switches between the pit and groove modes when pressed. Switches the spindle servo mode (CLVS and A). Switches the display when pressed.Returns to previous step. Stops operations.

Note: The erasing-protection tab is not detected during the test mode. Recording will start regardless of the position of the erasing-protection tab when the r [ REC] button is pressed.

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4-6. Test Mode Displays Each time the [DISPLAY] button is pressed, the display changes in the following order.
MODE display n Error rate display n Address display 1. MODE display Displays "TEMP ADJUS", "CPLAY MODE", etc. 2. Error rate display Error rates are displayed as follows. C1 = AD = C1 = : Indicates C1 error AD = : Indicates ADER 3. Address display Addresses are displayed as follows. "h = s= " (MO pit and CD) "h = a= " (MO groove) h = : Header address s = : SUBQ address a = :ADIP address
Note: "--" is displayed when the address cannot be read.

4-7. Meanings of Other Displays
Display · P REC CLOCK TRACK DISC DATE A. PAUSE A­B Contents Light During continuous playback Tracking servo OFF Recording mode ON CLV LOCK Pit High reflection CLV-S ABCD adjustment completed Focus auto gain successful Tracking auto gain successful Focus auto gain successful Tracking auto gain failed STOP Tracking servo ON Recording mode OFF CLV UNLOCK Groove Low reflection CLV-A Off Blinking

4-8. Precautions for Use of Test Mode
1 As loading related operations will be performed regardless of the test mode operations being performed, be sure to check that the disc is stopped before setting and removing it. § Even if the [ EJECT] button is pressed while the disc is rotating during continuous playback, continuous recording, etc., the disc will not stop rotating. Therefore, it will be ejected while rotating. § Always press the [EDIT/NO] button first before pressing the [ EJECT] button. 2 The erasing-protection tab is not detected in the test mode. Therefore, when modes which output the recording laser power such as continuous recording mode and traverse adjustment mode, etc. are set, the recorded contents will be erased regardless of the position of the tab. When using a disc that is not to be erased in the test mode, be careful not to enter the continuous recording mode and traverse adjustment mode.

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SECTION 5 ELECTRICAL ADJUSTMENTS
Precautions for Checking Laser Diode Emission
To check the emission of the laser diode during adjustments, never view directly from the top as this may lose your eye-sight.

Precautions for Adjustments
1) When replacing the following parts, perform the adjustments and checks with ® in the order shown in the following table.
Optical Pick-up IC171 1. Temperature compensation offset adjustment 2. Laser power adjustment 3. Traverse adjustment 4. Focus bias adjustment 5. Error rate check G ¬ ¬ ¬ ¬ ¬ BD Board D101 ¬ IC101, IC121, IC191 ¬

Precautions for Use of optical pick-up (KMS-210A)
As the laser diode in the optical pick-up is easily damaged by static electricity, solder the laser tap of the flexible board when using it.Before disconnecting the connector, desolder first. Before connecting the connector, be careful not to remove the solder. Also take adequate measures to prevent damage by static electricity. Handle the flexible board with care as it breaks easily.

G ¬ ¬ ¬

G G G G

¬ ¬ ¬ ¬

laser tap

Optical pick-up flexible board
· Abbreviation MO: Recordable disc CD: Disc for playback only

2) Set the test mode when performing adjustments. After completing the adjustments, exit the test mode. 3) Perform the adjustments in the order shown. 4) Use the following tools and measuring devices. · Check Disc (MD) TDYS-1 (Parts No. 4-963-646-01) · Laser power meter LPM-8001 (Parts No. J-2501-046-A) or MD Laser power meter 8010S (Parts No. J-2501-145-A) · Oscilloscope · Digital voltmeter · Thermometer 5) When observing several signals on the oscilloscope, etc., make sure that VC and ground do not connect inside the oscilloscope. (VC and ground will become short-circuited.) Laser power meter When performing laser power checks and adjustment (electrical adjustment), use of the new MD laser power meter 8010S (J-2501145-A) instead of the conventional laser power meter is convenient. It sharply reduces the time and trouble to set the laser power meter sensor onto the objective lens of the pick-up. Creating Continuously Recorded Disc * This disc is used in focus bias adjustment and error rate check. The following describes how to create a continuous recording disc. 1. Insert a MO disc (blank disc) commercially available. 2. Rotate the [AMS] knob and display "CREC MODE". 3. Press the [ENTER/YES] button and display "CREC IN". 4. Press the [ENTER/YES] button again to display "CREC MID". "CREC (0300" is displayed for a moment and recording starts. 5. Complete recording within 5 minutes. 6. Press the [EDIT/NO] button and stop recording . § 7. Press the [ EJECT] button and remove the MO disc. The above has been how to create a continuous recording data for the focus bias adjustment and error rate check.
Note: · Be careful not to apply vibration during continuous recording.

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Temperature Compensation Offset Adjustment
Save the temperature data at that time in the non-volatile memory as 25 °C reference data.
Note: 1. Usually, do not perform this adjustment. 2. Perform this adjustment in an ambient temperature of 22 °C to 28 °C. Perform it immediately after the power is turned on when the internal temperature of the unit is the same as the ambient temperature. 3. When D101 has been replaced, perform this adjustment after the temperature of this part has become the ambient temperature.

Laser Power Adjustment
Connection:
Laser power meter

Optical pick-up objective lens

Adjusting Method: 1. Rotate the [AMS] knob and display "TEMP ADJUS". 2. Press the [ENTER/YES] button and select the "TEMP ADJUS" mode. 3. "TEMP = " and the current temperature data will be displayed. 4. To save the data, press the [ENTER/YES] button. When not saving the data, press the [EDIT/NO] button. 5. When the [ENTER/YES] button is pressed, "TEMP = SAV" will be displayed for some time, followed by "TEMP ADJUS". When the [EDIT/NO] button is pressed, "TEMP ADJUS" will be displayed. Specifications: The "TEMP = " should be within "E0 - EF", "F0 - FF", "00 0F", "10 - 1F" and "20 - 2F".

Digital voltmeter

BD board TP57 (I + 5V) TP58 (IOP)

Adjusting Method: 1. Set the laser power meter on the objective lens of the optical pick-up. (When it cannot be set properly, press the [ ] but0 ) ton or [ ] button and move the optical pick-up.) Connect the digital volt meter to TP58 (IOP) and TP57 (I+5V). 2. Rotate the [AMS] knob and display "LDPWR ADJUS". (Laser power : For adjustment) 3. Press the [ENTER/YES] button twice and display "LD $ 4B = 3.5 mW". 4. Adjust RV102 of the BD board so that the reading of the laser 0.1 power meter becomes 3.4 + 0 mW. ­ 5. Press the [ENTER/YES] button and display "LD $ 96 = 7.0 mW". (Laser power: MO writing) 6. Check that the laser power meter and digital voltmeter readings satisfy the specified value. Specification: Laser power meter reading: 7.0 ± 0.3 mW Digital voltmeter reading: Optical pickup displayed value ± 10% (Optical pickup label)
KMS

lop = 82.5 mA in this case lop (mA) = Digital voltmeter reading (mV)/ 1 ()

7. Press the [ENTER/YES] button and display "LD $ 0F = 0.7 mW". (Laser power: MO reading) 8. Check that the laser power meter at this time satisfies the specified value. Specification: Laser power meter reading: 0.70
+ 0.05 ­ 0.1 mW

9. Press the [EDIT/NO] button and display "LDPWR ADJUS", and stop laser emission. (The [EDIT/NO] button is effective at all times to stop the laser emission.)

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n

210A 27X40 B0825

Traverse Adjustment
Connection:
Oscilloscope

11. Rotate the [AMS] knob until the waveform of the oscilloscope moves closer to the specified value. In this adjustment, waveform varies at intervals of approx. 3%. Adjust the waveform so that the specified value is satisfied as much as possible. (Traverse Waveform)
A VC B

BD board TP75 (TEO) TP31 (VC)

Adjusting method: 1. Connect an oscilloscope to TP75 (TEO) and TP31 (VC) of the BD board. 2. Load a MO disc (any available on the market). (Refer to Note 1) 0 ) 3. Press the [ ] button or [ ] button and move the optical pick-up outside the pit. 4. Rotate the [AMS] knob and display "EFBAL ADJUS". 5. Press the [ENTER/YES] button and display "EFBAL MO-W". (Laser power WRITE power/Focus servo ON/tracking servo OFF/spindle (S) servo ON) 6. Adjust RV101 of the BD board so that the waveform of the oscilloscope becomes the specified value. (MO groove write power traverse adjustment) (Traverse Waveform)
A VC B

Specification A = B

12. Press the [ENTER/YES] button, display "EFB = $ SAV" for a moment and save the adjustment results in the non-volatile memory. Next "EFBAL CD" is displayed. The disc stops rotating automatically. § 13. Press the [ EJECT] button and remove the MO disc. 14. Load the check disc (MD) TDYS-1. 15. Press the [ENTER/YES] button and display "EFB = $ CD". Servo is imposed automatically. 16. Rotate the [AMS] knob so that the waveform of the oscilloscope moves closer to the specified value. In this adjustment, waveform varies at intervals of approx. 3%. Adjust the waveform so that the specified value is satisfied as much as possible. (Traverse Waveform)
A

Specification A = B

VC B

7. Press the [ENTER/YES] button and display "EFB = $ MOR". (Laser power: MO reading) 8. Rotate the [AMS] knob so that the waveform of the oscilloscope becomes the specified value. (When the [AMS] knob is rotated, the of "EFB = $ " changes and the waveform changes.) In this adjustment, waveform varies at intervals of approx. 3%. Adjust the waveform so that the specified value is satisfied as much as possible. (MO groove read power traverse adjustment) (Traverse Waveform)
A VC B

Specification A = B

17. Press the [ENTER/YES] button, display "EFB = $ SAV" for a moment and save the adjustment results in the non-volatile memory. Next "EFBAL ADJUS" is displayed. § 18. Press the [ EJECT] button and remove the test disc TDYS-1.
Note 1: Data will be erased during MO reading if a recorded disc is used in this adjustment. Note 2: If the traverse waveform is not clear, connect the oscilloscope as shown in the following figure so that it can be seen more clearly.

Oscilloscope 330 k 10 pF

Specification A = B

9. Press the [ENTER/YES] button, display "EFB = $ SAV" for a moment and save the adjustment results in the non-volatile memory. Next "EFBAL MO-P" is displayed. 10. Press the [ENTER/YES] button and display "EFB = $ MOP". The optical pick-up moves to the pit area automatically and servo is imposed.

BD board TP75 (TEO) TP31 (VC)

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Focus Bias Adjustment
Adjusting Method: 1. Load a continuously recorded disc (Refer to "Page 15 Creating Continuously Recorded Disc"). 2. Rotate the [AMS] knob and display "CPLAY MODE". 3. Press the [ENTER/YES] button twice and display "CPLAY MID". 4. Press the [EDIT/NO] button when "C1 = AD = " is displayed. 5. Rotate the [AMS] knob and display "FBIAS ADJUS". 6. Press the [ENTER/YES] button and display " / a = ". The first four digits indicate the C1 error rate, the two digits after [/] indicate ADER, and the 2 digits after [a =] indicate the focus bias value. 7. Rotate the [AMS] knob in the clockwise direction and find the focus bias value at which the C1 error rate becomes about 200 (Refer to Note 2) . 8. Press the [ENTER/YES] button and display " / b = ". 9. Rotate the [AMS] knob in the counterclockwise direction and find the focus bias value at which the C1 error rate becomes about 200. The C1 error rate at this time should be almost same as the value set in step 7. 10. Press the [ENTER/YES] button and display " / c = ". 11. Check that the C1 error rate is below 50 and ADER is 00. Then press the [ENTER/YES] button. 12. If the "( " in " ( " is above 20, press the [ENTER/YES] button. If below 20, press the [EDIT/NO] button and repeat the adjustment from step 2 again. § 13. Press the [EDIT/NO] button and press the [ EJECT] button to remove the continuously recorded disc.
Note 1: The relation between the C1 error and focus bias is as shown in the following figure. Find points a and b in the following figure using the above adjustment. The focal point position C is automatically calculated from points a and b. Note 2: As the C1 error rate changes, perform the adjustment using the average value.

Error Rate Check
CD Error Rate Check Checking Method: 1. Load a check disc (MD) TDYS-1. 2. Rotate the [AMS] knob and display "CPLAY MODE". 3. Press the [ENTER/YES] button twice and display "CPLAY MID". 4. "C1 = AD = " is displayed. 5. Check that the C1 error rate is below 20. § 6. Press the [EDIT/NO] button, stop playback, press the [ EJECT] button, and remove the check disc. MO Error Rate Check Checking Method: 1. Load a continuously recorded disc (Refer to "Page 15 Creating Continuously Recorded Disc"). 2. Rotate the [AMS] knob and display "CPLAY MODE". 3. Press the [ENTER/YES] button twice and display "CPLAY MID". AD = " is displayed. 4. "C1 = 5. If the C1 error rate is below 50, check that ADER is 00. § 6. Press the [EDIT/NO] button, stop playback, press the [ EJECT] button, and remove the continuously recorded disc.

Focus Bias Check
Change the focus bias and check the focus tolerance amount. Checking Method: 1. Load a continuously recorded disc (Refer to "Page 15 Creating Continuously Recorded Disc"). 2. Rotate the [AMS] knob and display "CPLAY MODE". 3. Press the [ENTER/YES] button twice and display "CPLAY MID". 4. Press the [EDIT/NO] button when "C1 = AD = " is displayed. 5. Rotate the [AMS] knob and display "FBIAS CHECK". / c = ". 6. Press the [ENTER/YES] button and display " The first four digits indicate the C1 error rate, the two digits after [/] indicate ADER, and the 2 digits after [c =] indicate the focus bias value. Check that the C1 error is below 50 and ADER is 00. 7. Press the [ENTER/YES] button and display " / b = ". Check that the C1 error is not below about 200 and ADER is not above 00 every time. 8. Press the [ENTER/YES] button and display " / a = ". Check that the C1 error is not below about 200 and ADER is not above 00 every time. § 9. Press the [EDIT/NO] button, next press the [ EJECT] button, and remove the continuously recorded disc.
Note 1: If the C1 error and ADER are above 00 at points a or b, the focus bias adjustment may not have been carried out properly. Adjust perform the beginning again.

C1 error about 200

b

c

a

Focus bias value (F. BIAS)

­ 18 ­

Adjusting Points and Connecting Points
[BD Board] (Side A)

D101

IC191

[BD Board] (Side B)

TP58 (IOP) TP57 (I + 5V) IC101 RV101 TP31 (VC) IC171 RV102 TP75 (TEO)

IC121

­ 19 ­

MDS-DRE1 SECTION 6 DIAGRAMS
6-1. BLOCK DIAGRAM ­ SERVO Section ­
OVER WRITE HEAD DRIVE IC181, Q181, 182 HR901 OVER WRITE HEAD 4 RF AMP, FOCUS/TRACKING ERROR AMP IC101 MORFI I J I 47 J 48 45 IC182 2 DIGITAL SIGNAL PROCESSOR, EFM/ACIRC ENCODER/DECODER IC121 (1/2) EFMO EFM 45 MODULATOR FILI CLTV PCO FILO 34MHz PLL DODT REGISTER PEAK DETECT DIGITAL AUDIO IN/OUT DIDT DIN DOUT DIFO SUBCODE Q READER/ GENERATOR DICV DIN PLL (22MHz) 27 28 21 20 53 51 49 52 29 30 DATA SCTX

A B

(Page 23)

DODT

(Page 23)

62

SUBCODE P TO W PROCESSOR

FILTER

60 61 63

INTERNAL BUS

DIPD DIFI DTI

I-V AMP IC172

RF AMP

MORFO 46 RFO 44

FILTER

43

AGCI

RF AGC & EQ

RF

41

58

RFI

COMPARATOR

EFM DEMODULATOR

REGISTER

AUDIO DATA CONTROL ECC ENCODER/ DECODER

C

(Page 23)

DTO

56 F B C D B A A E DETECTOR C D E F RV101 E-F BALANCE RV102 LASER POWER PD LASER DIODE AUTOMATIC POWER CONTROL Q162, 163 A 2 B 3 C 4 D 5 6 7 8 9 E F FI FO AT AMP I-V AMP ABCD AMP I-V AMP FOCUS ERROR AMP TRACKING ERROR AMP ABCD 37 ADFM 30 31 PEAK & BOTTOM B.P.F. AUX SWITCH AUX PEAK BOTM 34 39 38 44 55

ASYI ASYO EFM DIGITAL PLL XPLCK EFM-SYNC DETECTOR/ PROTECTOR 32K RAM C2PO 31 BCK, LRCK, C2PO

D

(Page 23)

TIMING GENERATOR

33 TLB 27 4 IC102 2

ADFG

ADIN

I

J

WFCK 41 GTOP 42 GFS 43 22 FMCK ADIP DEMODULATOR

TIMING GENERATOR

LRCK BCK MCLK XBCK WDCK RFCK FS4

33 32 36 37 39 40 90 512FS

FE TE SE

35 82 26 29

ADFG

ADIP DECODER

OPTICAL PICK-UP (KMS-210A/J-N)

DIGITAL CLV PROCESSOR

CLOCK GENERATOR

XTAI 35 XTAO 34

E

(Page 24)

SPRD SPFD

DQSY

ADSY

SQSY

ATER

CPU INTERFACE

SWDT SCLK XLAT SRDT

XRST

SERIAL TO PARALLEL DECODER

ILCC PD LD

14

AAPC

APC

APCREF

SWDT 18 SCLK 19 XLAT 20 XRST 17

8 9 10 11

16 24 SWDT, SCLK, XLAT, SRDT

REC

LASER ON SWITCH Q101

10

PD

23 13

93 94

14 15

F

(Page 23)

11 XRST

G H

(Page 24)

4 SPINDLE/SLED MOTOR DRIVE, FOCUS/TRACKING COIL DRIVE IC151 Q151 2 IC122 DIGITAL SERVO SIGNAL PROCESSOR IC121 (2/2) 6 67 77 76 66 64 65 68 78 71 79 5 65

SCL

(Page 23)

WPOWER

REC/PB

LD-ON

SQSY

WRPWR

FE TE SE ABCD

PEAK BOTM AUX1 AUX2

OE 33 FO4 RO4 SPINDLE MOTOR DRIVE RI4 F/R4 SPFD

SYSTEM CONTROLLER IC101 (1/4)

SCL 75 SDA 74

6 SCL 5 SDA EEPROM IC171

LIMIT-IN

84

MOD

24

20

APC PWM GENERATOR

APC COMP./ FILTER

FG FOK SHOCK SENSE

SPRD

68 69 70 76 66 A/D CONVERTER M101 (SLED) 2-AXIS DEVICE

80

58

57

59

REC SW

ANALOG MUX

77 78

REFLECT

OUT SW

M

PLAY SW

PROTECT

LDDR

M102 (SPINDLE)

61 60

M

15 13

FO2 RO2 SLED MOTOR DRIVE

FI2 RI2

17 18

92 91

SFDR SRDR OFTRK 98 DFCT 3 FOK 2 COUT 99 SHCK 4 FS256 1 S101 (LIMIT) S191 S192 S193 S102 LOADING MOTOR DRIVE IC901 IN1 IN2 MOTOR DRIVE OUT1 OUT2

TRK+

29 26

FO3 RO3 TRACKING COIL DRIVE

FI3 RI3

31 32

86 85

TFDR TRDR

SERVO SIGNAL PROCESSOR

PWM GENERATOR

(TRACKING)

OFTRK/ DFCT/FOK/ COUT/SHCK/ FS256 PROCESSOR

(FOCUS)

S192 S191 S193 (PLAY POSITION) (PACK OUT) (REC POSITION) S102 (REFLECT/PROTECT DETECT) LOW REFELECT RATE/ HIGH REFELECT RATE/ UN-PROTECT WRITE PROTECT

LOAD OUT LOAD IN

22

19

9 10

4 2

M

M191 (LOADING)

TRK­ FCS+ FCS­

8 11

FO1 RO1 FOCUS COIL DRIVE

FI1 RI1

6 5

87 89

FFDR FRDR SERVO AUTO SEQUENCER SENS

CLK 3

SENS CONTROL

12

WRPWR HF MODULE 05 MOD HF MODULE SWITCH Q164

· SIGNAL PATH : PLAY : REC

­ 21 ­

­ 22 ­

MDS-DRE1
6-2. BLOCK DIAGRAM ­ MAIN Section (1/2) ­
6 5 4 2 IC151 (1/4) DODT 40 34 SHOCK PROOF MEMORY CONTROLLER, ATRAC ENCODER IC501 DIDT SDTO (Page 25)

J K
(Page 25)

F86
95 DODT

B
(Page 22)

1 3 2 1

EXE

RAM R/W CONTROLLER

CD-ROM ENCODER

EFM ENCODER INTERFACE

1/2 DIVIDER

BCK LRCK

CLK

DODT SELECTOR IC153 (1/2)

BCK LRCK C2PO

DATA 93 BCK 91 LRCK 90 C2PO 92

ATRAC ENCODER INTERFACE

MEMORY CONTROLLER INTERFACE

AUDIO INTERFACE

DIDT 94 DIN 42 DOUT 41 ABCK 43 ALRCK 44 LATCH BCK PARALLEL SHIFT REGISTER DATA & LATCH IC256, 257 SDO1 (DATA) SDO2 (ENABLE) VCO OUT VCO IN WAVE SHAPER IC252 PFD OUT FINB PFD FINA 5 4

COUNTER IC259, 260

3

VCO

12

6

12

TX

DATA MEMORY ATRAC ENCODER ADDRESS GENERATOR

COUNTER IC253 ­ 255

VCO IC251 (1/2)

PLL IC251 (2/2)

SERIAL DATA SELECTOR IC154 3 4

IC271 (1/2) 10 LRCK OSCI 37 CLOCK GENERATOR OSCO 36 8 BCK X501 45.1584MHz 11 IC271 (2/2) 9 13 12 9 FLIP-FLOP IC202 (1/2) 11 3 12 IC201 (1/4) 4 1 IC201 (3/4) 5 2 BCK, LRCK BCK LATCH IC258

CPU INTERFACE

SWDT SCK XLAT SRDT

SENSE XINT XRST

XWE XRAS XCAS XOE

5

SPO

C

DATA

8 IC151 (2/4) 9 2 1

D0 ­ D3 69, 68, 70, 71

A00 ­ A11

LRCK

(Page 22)

55 ­ 52, 56 ­ 60, 65, 49, 48

67 66 62 61

2 3 4 5

6 9 17

87

BCK FS128 LRCK

IC201 (2/4) 6 3 DIVIDER 5 IC202 (1/2)

(Page 25) MCLK

SWDT SCLK

L M
(Page 25)

2, 3, 22, 23 13 DQ1 ­ DQ4

8 ­ 11, 14 ­ 19, 7, 6 A0 ­ A11 D-RAM IC502

4 5 21 20

XWE XRAS XCAS XOE

EXTAL 27 GPIO2 74 BCK, LRCK, C2PO 40 34 SHOCK PROOF MEMORY CONTROLLER, ATRAC DECODER IC601 DSP IC701 73 GPIO3 75 GPIO1

13 OSC IC201 (4/4)

D

(Page 22)

SDO1 46 SDO2 45

8

95

DODT

EXE

F86

LINE OUT SELECTOR IC153 (2/2) 9 8

SAMPLING RATE CONVERTER IC751

RAM R/W CONTROLLER

CD-ROM DECODER

ATRAC DECODER INTERFACE

EFM DECODER INTERFACE

INPUT INTERFACE

DOUT 41 ABCK 43 ALRCK 44

OUTPUT INTERFACE

DATA 93 BCK BCK 91 LRCK LRCK 90 C2PO C2PO 92

MEMORY CONTROLLER INTERFACE

AUDIO INTERFACE

DIDT 94 DIN 42

BCK LRCK FS128

BCK LRCK

BCK LRCK

33 XTLI 86 SI 87 BCK 88 LRCK KEY CONTROL IC801

10

57 SDI0 SDO0 47 51 SCKR SCKT 49 WST 50 55 WSR

1 3 2

DATAI BCKI LRCKI

SAMPLING RATE CONVERTER

DATAO 30 BCKO 31 LRCKO 32 XI

SDTI SO 12 12 11

N
(Page 25)

A
(Page 22)

SCTX

12

TX

DATA MEMORY ATRAC DECODER ADDRESS GENERATOR OSCI

7

FSI28 ATT/MODE CONTROL

FRAME COUNTER

13 SWDT 3 RVDT SCLK 4 SCK SRDT 7 TRDT 5 XLAT

REDY 6 13 XWO 8 IC151 (4/4) 3 4 XRST XRST

SWDT SCK XLAT

INIT

XRST 10

G
(Page 22)

CPU INTERFACE

37 CLOCK GENERATOR OSCO 36

42 41 40

10

SWDT SCK XLAT SRDT

SENSE XINT XRST

XWE XRAS XCAS XOE

SWDT SCLK XLAT

X601 90.3168MHz

O
(Page 25)

D0 ­ D3 SWDT, SCLK, XLAT, SRDT 69, 68, 70, 71

A00 ­ A11

55 ­ 52, 56 ­ 60, 65, 49, 48

67 66 62 61

2 3 4 5

6 9 17

SPO
87

F

512FS SRDT SELECTOR IC152

E
(Page 22)

(Page 22)

SWDT SCLK XLAT SRDT

2, 3, 22, 23

8 ­ 11, 14 ­ 19, 7, 6 A0 ­ A11 D-RAM IC602

4 5 21 20

IC152 2 3 1 5 6 4

XWE XRAS XCAS XOE

SCL SDA GPIO0 SDI1 RESET

I

MWR MRAS MCAS

SWDT, SCLK, XLAT, SRDT

DQ1 ­ DQ4

512FS MD0 ­ MD3 71, 69 ­ 67 MA00 ­ MA09 25 ­ 22, 20 ­ 18, 16, 14, 13

P
(Page 25)

(Page 25)

26 35 76 56 36 6 5 IC151 (3/4)

78 79 80

1, 2, 18, 19

6 ­ 9, 11 ­ 15, 5 D-RAM IC702 A0 ­ A9

SWDT SCLK XLAT

3 4 17

· SIGNAL PATH : PLAY : REC (ANALOG IN) : REC (DIGITAL IN)

SRDT

H
(Page 22)

SCL

52 53 67

31 33 39 40

85 32

23 24 47

72 81 56 41

WE RAS CAS

DQ1 ­ DQ4

43

44 45 54

48

LAT-KEY

XWO-KEY READY-KEY AOUT-SEL

DSEL DODT-SEL SCTX

SRDT-SEL SRDT

SWDT SCLK XLAT-DEC XLAT-ENC

13 XOUT X101 10MHz 15 XIN 05

SYSTEM CONTROLLER IC101 (2/4)

SDA-CDSP RVS RPD0 RST-DSP

XINT-DEC XINT-ENC RST-37

RST-DIG

MDS-DRE1
6-3. BLOCK DIAGRAM ­ MAIN Section (2/2) ­
DIGITAL AUDIO INTERFACE RECEIVER IC401 J601 COAXIAL IN WAVE SHAPER IC602

SAMPLING RATE CONVERTER IC451

(Page 24)

J

OUTPUT INTERFACE

DIDT BCK LRCK

INPUT INTERFACE

DATAO 30 BCKO 31 LRCKO 32

SAMPLING RATE CONVERTER

DATAI

1

23

DATA OUT

DATA DEMODULATOR

INPUT INTERFACE

DIN1 1 DIN2 2

BCKI 3 LRCKI 2 FI128 7

BCKO 21 LRCKO 22 20 FS128

(Page 24)

P

512FS

13

XI

FRAME COUNTER ATT/MODE CONTROL SWDT SCK XLAT

TIMING

LOCK ERROR DETECT

OPTICAL RECEIVER IC601

IC601 OPTICAL IN DIGITAL

CPU INTERFACE PLL XMODE 10 ERROR AVOCK SWDT SCK XLAT SRDT 16 14 15 17 SWDT SCLK XLAT SRDT BUFFER IC311 J701 MODULATOR AINL+ AINL­ 5 6 10 AOUTL+ 9 AOUTL­ INL­ 4 LINE AMP IC701 RV701 REC VOL R-CH L IN R LINE (ANALOG) MODULATOR AOUTL LOW-PASS FILTER AOUTR 26 27 R-CH BUFFER IC342 (1/2) LOW-PASS FILTER IC342 (2/2) R-CH MUTING Q352 L OUT R R-CH MUTING CONTROL SWITCH Q101 D101 DQSY 18

(Page 23)

I O

SWDT, SCLK, XLAT, SRDT

INIT 10

42 41 40 SWDT SCLK XLAT

11

24

(Page 24)

(Page 24)

M

BCK, LRCK LRCK BCK

12 11 LRCK SCLK

23 24 PWDA PWAD

A/D, D/A CONVERTER IC301

(Page 24)

K

SDTO

14

SDTO

DECIMATION FILTER

SERIAL I/O INTERFACE

(Page 24)

N

SDTI

13

SDTI

INTERPOLATOR

(Page 24)

L

MCLK

15

MCLK

CLOCK DIVIDER DEM0 16

LRCK

XRST

R-CH

HEADPHONE AMP IC751 RV751 PHONE LEVEL

J751 PHONES

(Page 27)

Q

POWER DOWN

42 DEEMP-ADA

49 AMUTE

50 19 ERROR DQSY

· SIGNAL PATH : PLAY : REC (ANALOG IN) : REC (COAXIAL DIGITAL IN) : REC (OPTICAL DIGITAL IN)

SYSTEM CONTROLLER IC101 (3/4)

05

­ 25 ­

­ 26 ­

MDS-DRE1

6-4.

BLOCK DIAGRAM ­ DISPLAY/KEY/POWER SUPPLY Section ­
(Page 25)

Q
POWER DOWN

J851 FOOT SW 2

FL DRIVER CONTROL, KEY CONTROL, LED DRIVE IC201

FL DRIVER IC101

FLUORESCENT INDICATOR TUBE FL101

REC/PAUSE

PLAY/PAUSE

1

FSW0

SWDT SCLK FLCS FL-RES

31 33 34 46 D102

16 15 14 13

SDATA SCK CS RST

D1 ­ D16 12 ­ 1, 64 ­ 61

FSW1

+5V MD SERVO SECTION B+

+5V REGULATOR IC191

+5V/+7V REGULATOR IC411 10 OUT 7V VCC 7

S1 ­ S36 59 ­ 33, 31 ­ 23

D101 JOG DIAL DETECT SENSOR PH381, 382 24 JOG0 23 JOG1 RESET 12 XIN

HEAD/PWM +5V

6

OUT 5V

S305 AMS ± PUSH ENTER 4

ROTARY ENCODER

A B

21 1 3 25 JOGA 26 JOGB OSC C107, R101 5

20 DIG +5V +5V REGULATOR IC421 +10V REGULATOR IC422 RECT D205, 206

XOUT

LED-PP 30 89 ­ 94 S301 ­ 304, 306, S311 ­ 316, 361 ­ 365, S371 ­ 376 KEY0 ­ KEY3, KEY6, KEY7

LED DRIVE Q363, 364

D364 ­ 366 PLAY/PAUSE

POWER DOWN DETECT IC431 D431

5V ON/OFF 7V ON/OFF 1 2 D432

RECT D207, 208

LED-CUE 29 PAD UNIT

LED DRIVE Q361, 362

D361 ­ 363 CUE

2

INI RESET SIGNAL GENERATOR VCC 5 IC451

66, 68, 70, 72, 74, 76, 78, 80

3 LED1-O ­ LED8-O LED-R.PAUSE 28 LED DRIVE Q371 D371 REC PAUSE

RST

S601 INPUT ANLG COAX OPT INPUT-SEL0 88 LED1-G ­ LED8-G INPUT-SEL1 87 LDDRV +7V LOADING MOTOR DRIVE (IC901) B+

+5V/+7V REGULATOR IC401 10 OUT 7V VCC 7 RECT D210, 211

SYS +5V

6

OUT 5V

XIN 15 X201 10MHz

MCU +5V SYSTEM CONTROLLER (IC101) B+

D451 D453 BT451 LITHIUM BATTERY

RV392 PITCH

97 KEY-CONT

XOUT 13

5V ON/OFF 7V ON/OFF 1 2

LED DRIVE IC421, 431

65, 67, 69, 71, 73, 75, 77, 79

­32V FL DRIVER (IC101) B­ RV391 SPEED 95 SPEED-CONT

­32V REGULATOR IC501

RECT D209 T901 POWER TRANSFORMER

DTIN DTOUT DTCK RTS DTCS

HEADPHONE AMP (IC751) FAN MOTOR DRIVE Q801, 802

B+ B­ S801 U (POWER) RECT D201 ­ 204 NOISE FILTER

35 36 37 38 20

M

M801 (FAN)

+5V A/D, D/A CONVERTER (IC301) B+

+5V REGULATOR IC302 A+6V +6V REGULATOR IC301 ­6V REGULATOR IC302

36 35 37 38 34 DTIN DTOUT DTCK PMCU-REF DTCS

87 FAN CONT SYSTEM CONTROLLER IC101 (4/4)

7 PDOWN

51 STB

12 RESET A­6V ~ AC IN AC TO FL101 AC

05

­ 27 ­

­ 28 ­

MDS-DRE1

· Circuit Boards Location

6-5.

NOTES FOR PRINTED WIRING BOARD AND SCHEMATIC DIAGRAM
(In addition to this, the necessary note is printed in each block)
Note on Printed Wiring Board: · X : parts extracted from the component side. · Y : parts extracted from the conductor side. ® · : Through hole. · b : Pattern from the side which enables seeing. (The other layers' patterns are not indicated.) Caution: Pattern face side: (Side B) Parts face side: (Side A) Parts on the pattern face side seen from the pattern face are indicated. Parts on the parts face side seen from the parts face are indicated.

PSW board DISPLAY board

DETECTION SW board

MOTOR board REC board JOG board

Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · % : indicates tolerance. ¢ : internal component. · · 2 : nonflammable resistor. · C : panel designation. Note: The components identified by mark ! or dotted line with mark ! are critical for safety. Replace only with part number specified. · · · · Note: Les composants identifiés par une marque ! sont critiques pour la sécurité. Ne les remplacer que par une piéce portant le numéro spécifié.

· Indication of transistor.

C Q B E
Q B C E These are omitted.

These are omitted.

CENTER board EJECT board POWER board BD board FADER board

·

DIGITAL board

·

· ·

U : B+ Line. V : B­ Line. H : adjustment for repair. Voltages and waveforms are dc with respect to ground under no-signal conditions. no mark : STOP ( ) : PLAY : REC : Impossible to measure Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. Circled numbers refer to waveforms. Signal path. E : PLAY j : REC (ANALOG IN) k : REC (DIGITAL IN) f : REC (COAXIAL DIGITAL IN) h : REC (OPTICAL DIGITAL IN)

­ 29 ­

­ 30 ­

MDS-DRE1
6-6. PRINTED WIRING BOARD ­ BD Board (SIDE A) ­
· Semiconductor Location
Ref. No. D101 D181 D183 IC191 Q181 Q182 Location A-7 B-2 A-2 G-6 B-1 A-1

· See page 29 for Circuit Boards Location.

­ 31 ­

­ 32 ­

MDS-DRE1
6-7. PRINTED WIRING BOARD ­ BD Board (SIDE B) ­ · See page 29 for Circuit Boards Location.
· Semiconductor Location
Ref. No. D155 D161 IC101 IC102 IC121 IC122 IC151 IC171 IC172 IC181 IC182 Q101 Q151 Q162 Q163 Q164 Location E-2 A-6 C-4 C-2 F-5 C-5 G-2 C-6 B-4 B-2 A-3 A-6 E-2 A-4 A-6 A-6

(Page 43)

(Page 43)

­ 33 ­

­ 34 ­

MDS-DRE1
6-8. SCHEMATIC DIAGRAM ­ BD Section (1/2) ­ · See page 67 for Waveforms. · See page 70 for IC Block Diagrams.

(Page 37)

The components identified by mark ! or dotted line with mark ! are critical for safety. Replace only with part number specified.

Les composants identifiés par une marque ! sont critiques pour la sécurité. Ne les remplacer que par une piéce portant le numéro spécifié.

­ 35 ­

­ 36 ­

MDS-DRE1
6-9. SCHEMATIC DIAGRAM ­ BD Section (2/2) ­ · See page 67 for Waveforms. · See page 70 for IC Block Diagrams.

(Page 47)

(Page 36)

(Page 47)

­ 37 ­

­ 38 ­

MDS-DRE1
6-10. PRINTED WIRING BOARDS ­ DETECTION SW Board, MOTOR Board ­ · See page 29 for Circuit Boards Location.

DETECTION SW BOARD
1 CN193 4

MOTOR BOARD
1

D

(Page 40)

(Page 39)

D
4

CN192

C199

S191 (PLAY POSITION)

6 ­ CN191 M +

S192 (PACK OUT) S193 (REC POSITION) 05 1­ 653 ­ 411­ 1
(Page 43)

M191 (LOADING)

12 (12)

C
05 1­ 653 ­ 412 ­

12 (12)

­ 39 ­

­ 40 ­

MDS-DRE1
6-11. SCHEMATIC DIAGRAM ­ DETECTION SW/MOTOR Section ­

(Page 47)

­ 41 ­

­ 42 ­

MDS-DRE1
6-12.
· Semiconductor Location
Ref. No. D101 IC101 IC201 IC251 IC252 IC253 IC254 IC255 IC302 IC341 IC342 IC451 IC501 IC601 IC701 IC801 IC901 Q101 Q351 Q352 Location B-5 D-4 I-8 G-9 F-8 F-10 H-10 I-10 D-8 C-8 C-10 E-6 L-6 L-3 L-9 H-6 C-1 B-5 B-8 B-9 (Page 40)

PRINTED WIRING BOARD ­ DIGITAL Board (SIDE A) ­

· See page 29 for Circuit Boards Location.
(Page 63)

(Page 63)

TP (RESET)

(Page 33)

(Page 33)

­ 43 ­

­ 44 ­

MDS-DRE1
6-13. PRINTED WIRING BOARD ­ DIGITAL Board (SIDE B) ­ · See page 29 for Circuit Boards Location.
· Semiconductor Location
Ref. No. D311 D312 IC151 IC152 IC153 IC154 IC202 IC256 IC257 IC258 IC259 IC260 IC271 IC301 IC311 IC401 IC502 IC602 IC702 IC751 Location B-9 B-9 H-4 H-2 I-4 I-2 I-7 H-10 G-10 H-7 I-8 I-10 H-8 E-9 C-9 D-6 K-6 K-3 K-9 H-6

­ 45 ­

­ 46 ­

MDS-DRE1
6-14. SCHEMATIC DIAGRAM ­ DIGITAL Section (1/4) ­ · See page 68 for Waveforms. · See page 71 for IC Block Diagrams.

(Page 42)

(Page 38)
(Page 49)

(Page 38)

(Page 51)

­ 47 ­

­ 48 ­

MDS-DRE1
6-15. SCHEMATIC DIAGRAM ­ DIGITAL Section (2/4) ­ · See page 68 for Waveforms. · See page 71 for IC Block Diagrams.

(Page 48)

(Page 65)

(Page 53)

­ 49 ­

­ 50 ­

MDS-DRE1
6-16. SCHEMATIC DIAGRAM ­ DIGITAL Section (3/4) ­ · See page 68 for Waveforms. · See page 71 for IC Block Diagrams.

(Page 47)

(Page 53)

­ 51 ­

­ 52 ­

MDS-DRE1
6-17. SCHEMATIC DIAGRAMS ­ DIGITAL Section (4/4) ­ · See page 68 for Waveforms. · See page 71 for IC Block Diagrams.

(Page 49)

(Page 65)

(Page 52)

­ 53 ­

­ 54 ­

MDS-DRE1
6-18.
· Semiconductor Location
Ref. No. D101 D102 IC201 IC421 IC431 Location G-5 H-5 H-2 E-4 D-2

PRINTED WIRING BOARD ­ PANEL Section (1) ­

· See page 29 for Circuit Boards Location.

(Page 63)

(Page 60)

(Page 59)

(Page 60)

­ 55 ­

­ 56 ­

MDS-DRE1
6-19. SCHEMATIC DIAGRAM ­ PANEL Section (1) ­ · See page 69 for Waveform. · See page 75 for IC Block Diagram.

(Page 61)

(Page 61) (Page 62)

(Page 65)

­ 57 ­

­ 58 ­

MDS-DRE1
6-20. PRINTED WIRING BOARDS ­ PANEL Section (2) ­
· Semiconductor Location ­ JOG Board­
Ref. No. D361 D362 D363 D364 D365 D366 D371 PH381 PH382 Q361 Q362 Q363 Q364 Q371 Location G-3 G-3 G-3 G-1 G-1 G-1 H-4 D-2 E-3 H-2 H-3 G-2 F-2 H-3 (Page 56)
(Page 60)

· See page 29 for Circuit Boards Location.

(Page 63)

(Page 59)

(Page 56) (Page 60) (Page 59)

(Page 64)

(Page 56)

­ 59 ­

­ 60 ­

MDS-DRE1
6-21. SCHEMATIC DIAGRAM ­ PANEL Section (2) ­ · See page 76 for IC Block Diagram.

(Page 58)

(Page 57)

(Page 66)

(Page 58)

(Page 65)

­ 61 ­

­ 62 ­

MDS-DRE1
6-22. PRINTED WIRING BOARDS ­ POWER Section ­ · See page 29 for Circuit Boards Location.
(Page 56) (Page 44) (Page 60)

· Semiconductor Location ­ POWER Board­
Ref. No. D201 D202 D203 D204 D205 D206 D207 D208 D209 D210 D211 D301 D302 D431 D432 D451 D452 D453 D501 D851 D852 D853 D854 IC301 IC302 IC401 IC411 IC421 IC422 IC431 IC451 IC501 IC601 IC602 IC701 IC751 Q801 Q802 Location H-5 H-5 H-5 H-5 G-5 G-5 H-4 H-5 H-4 H-4 H-4 D-3 C-4 B-1 B-1 D-2 D-2 D-2 B-1 E-3 E-5 E-3 F-5 D-3 C-3 F-2 E-2 E-4 F-4 A-3 C-2 A-2 D-5 D-5 B-4 C-4 D-5 D-5

(Page 60)

(Page 44)

(Page 64)

(Page 63)

­ 63 ­

­ 64 ­

MDS-DRE1
6-23. SCHEMATIC DIAGRAM ­ POWER Section ­ · See page 70 for IC Block Diagrams.

(Page 62)

(Page 54)

(Page 61)

(Page 50)

(Page 57)

The components identified by mark ! or dotted line with mark ! are critical for safety. Replace only with part number specified.

Les composants identifiés par une marque ! sont critiques pour la sécurité. Ne les remplacer que par une piéce portant le numéro spécifié.

­ 65 ­

­ 66 ­

· Waveforms ­ BD Board ­
1 IC101 $¶, $· (I, J) (Play mode) 6 IC121 $¢ (XPLCK) !¡ IC121 # (XTAI)

­ DIGITAL Board ­
1 IC501 (º (LRCK), IC601(º (LRCK) 6 IC451 #TM (LRCKO), IC501 $¢ (ALRCK) IC751 #TM (LRCKO), IC801 *· (LRCK) !¡ IC451 !£ (XI), IC751 !£ (XI)

Approx. 0.35 Vp-p

5.2 Vp-p

4 Vp-p

5.4 Vp-p 5 Vp-p

3.2 Vp-p

4.3218 MHz

44.1 kHz
46 ns

44.1 kHz
2 IC501 (¡ (BCK), IC601 (¡ (BCK) 7 IC451 #¡ (BCKO), IC501 $£ (ABCK) IC701 @¶ (EXTAL), IC751 #¡ (BCKO) IC801 *¶ (BCK)

43.8 ns
!TM IC451 7 (FI128)

2 IC101 2 (A) (Play mode)

7 IC121 $¡ (WFCK)

!TM IC121 #¢ (XTAO)

Approx. 0.18 Vp-p

5.2 Vp-p

3.1 Vp-p

5 Vp-p

4.5 Vp-p 5.2 Vp-p

7.35 kHz
46 ns
3 IC101 6, 7 (E, F) (Play mode) 8 IC121 #ª (WDCK) !£ IC121 #£ (LRCK)

2.8224 MHz

59 ns
3 IC601 $¢ (ALRCK), IC701 % (WSR)

2.8224 MHz
8 IC501 #§ (OSCO)

!£ IC451 3 (BCKI)

Approx. 0.08 Vp-p

5.2 Vp-p

5.2 Vp-p

5 Vp-p

6.7 Vp-p 6.6 Vp-p

88.2 kHz
4 IC121 (º (FS4), IC151 3 (CLK) 9 IC121 #TM (BCK), #¶ (XBCK)

44.1 kHz

88.2 kHz
4 IC601 $£ (ABCK), IC701 %¡ (SCKR)

45.1584 MHz
9 IC701 %º (WST), IC751 2 (LRCKI)

120 ns !¢ IC451 2 (LRCKI)

5.2 Vp-p

5.2 Vp-p

5.2 Vp-p

5 Vp-p

5 Vp-p

2.8224 MHz
5.8 µs
5 IC121 @TM (FMCK) !º IC121 #§ (MCLK)

5.6448 MHz

7.7 µs
5 IC601 #¶ (OSCI)

44.1 kHz
!º IC701 $ª (SCKT), IC751 3 (BCKI)

! IC101 ! (XIN)

5.2 Vp-p

3.4 Vp-p

2.3 Vp-p

3.6 Vp-p

4.9 Vp-p

90.3168 MHz

10 MHz

0.16 ms

46 ns

2.8224 MHz

­ 67 ­

­ 68 ­

­ CENTER Board ­
1 IC201 !£ (XOUT)

5 Vp-p

10 MHz

­ 69 ­

· IC Block Diagrams ­ BD Board ­ IC121 CXD2535CR
AUX FE ABCD BOTM DVDD ADRB AVDD ASYO ADRT AVSS AVSS PEAK FILO FILI PCO CLTV ADIO DICV ASYI BIAS DIFO BIA2 DIFI RFI 58 VC

75 74 73 72 71 70

69 68 67 66 65 64 63 62 61 60

59

57

56 55

54

53 52 51 50 DVSS

SE 76 TE 77 TENV 78 MID 79 APC 80 TEST1 81 ADFG 82 TS25 83 LDDR 84 TRDR 85 TFDR 86 FFDR 87 DVDD 88 TRACKING PWM FOCUS PWM SLED PWM PWM GENERATOR

ANALOG MUX OP AMP A/D CONVERTER

34 MHz PLL

COMP ECC ENCODER/ DECODER REGISTER 32K RAM

DIN PLL (22 MHz)

49 DIPO 48 TEST2 47 MVC1 46 RAOF EFM MODULATOR

45 EFMO

REGISTER SERVO DSP TRACKING SERVO FOCUS SERVO SLED SERVO

EFM DEMODULATOR

TIMING GENERATOR

EFM DIGITAL PLL EFM SYNC DETECTOR/ PROTECTOR

44 XPLCK 43 GFS 42 GTOP 41 WFCK

40 RFCK 39 WDCK SUBCODE Q READER/ GENERATOR TIMING GENERATOR 38 DVDD 37 XBCK 36 MCLK CLOCK GENERATOR 35 XTAI 34 XTAO 33 LRCK

FRDR 89 FS4 90 SRDR 91 SFDR 92 SPRD 93 SPFD 94 DCLO 95 DCLI 96 XDCL 97

ADIP DEMODULATOR

ADIP DECODER

DIGITAL CLV PROCESSOR

APC COMP./ FILTER

APC PWM GENERATOR

SUBCODE P~W PROCESSOR AUDIO DATA CONTROL

32 BCK 31 C2PO 30 DTO 29 DTI 28 DIDT 27 DODT 26 DOVF

SERVO AUTO SEQUENCER

SENS CONTROL

OFTRK 98 COUT 99 DVSS 100

OFTRK/DFCT/ FOK/C OUT/ SHCK/TEOK PROCESSOR

DIGITAL AUDIO IN/OUT SERVO CONTROL CPU I/F PEAK DETECT

1 2 3 4 TEOK FOK DFCT SHCK

5 SSTOP

6 WRPWR

7 DIRC

8 9 10 11 SCLK XLAT SRDT SWDT

12 SENS

13 ADSY

14 15 16 DQSY XRST SQSY

17 18 19 SBOCK SBODT SBIOT

20 21 22 23 24 25 DOUT DIN FMCK DVSS ADER REC

­ 70 ­

IC151

MPC17A38VMEL
PGND PGND PGND PGND PGND PGND
23 4 35

RO1

RO2

RO3

36

7

12

16

8

11

9

10

15

13

14

21

25

30

29

26

27

28

22

G 1 DC/DC CONVERTER

DRIVER

DRIVER

DRIVER

DRIVER

PRE-DRIVER VC CLOCK CLK DETECTOR VC CONTROL VC VC VC

PRE-DRIVER VC

PRE-DRIVER VC

PRE-DRIVER

CONTROL VC

CONTROL VC

CONTROL

VC 2 3 34 6 5 33 17 18 31 32 20 19

RO4
24

FO1

FO2

FO3

FO4

VG

VD

VD

VD

VD

VD

VD

­ DIGITAL Board ­ IC152, 153 SN74HC125ANS IC202, 258
14 13 12 11 VCC
1 OE 1 14 VCC

SN74HC74ANS
10 PR D CK CLR Q Q 9 8

1A 2

13 4 OE

12 4A 1Y 3

D CK

PR

Q Q

CLR
11 4Y

1 2 3
2 OE 4

4 5 6

GND 7

2A 5

10 3 OE

9 3A 2Y 6

GND 7

8 3Y

IC251
LOGIC VDD 1

TLC2932IPW
SELECT 2 VCO OUT 3 FIN-A 4 FIN-B 5 PFD OUT 6 LOGIC GND 7

1/2 DIVIDER VCO PFD

14 VCO VDD

13 R BIAS

12 VCO IN

11 VCO GND

10 VCO INHIBIT

GND

F/R4

GND
9 PFD INHIBIT

RI1

RI2

CLK

RI3

PI4

FI1

FI2

FI3

VC

PS

OE

8 NC

­ 71 ­

IC256, 257
PARALLEL DATA OUTPUT SERIAL DATA INPUT

SN74HC595ANS
SERIAL DATA OUTPUT

IC301
VCOM AOUTR AOUTL

AK4520A-VF-E2
CMODE PWDA PWAD DGND MCLK DEM1 DEM0 TST1 TST2 TST3 VD

OUTPUT ENABLE

LATCH CLOCK

SHIFT CLOCK

QA

SQH

16 15 VCC

14
A

13

12

11

10

RESET

28 27 26

25

24

23

22

21

20

19

18

17

16

15

9
LPF

MODULATOR MODULATOR

8× INTERPOLATOR 8× INTERPOLATOR COMMON VOLTAGE SERIAL I/O INTERFACE

CLOCK DIVIDER

LPF

SHIFT REGISTER

MODULATOR

DECIMATION FILTER DECIMATION FILTER 8
AGND

LATCH

MODULATOR
QG QH QF

QD

QC

QB

QE

1 2
VREFH VREFL

3
AINR+

4
AINR­

5 6
AINL+ AINL­

7
VA

9 10 11 12
DIF0 DIF1 LRCK SCLK
TEST 12 11 10 9 PLL 4 INPUT SECTION

13 14
SDTI SDTO
TST1 AVOCK XMODE CKSEL 8 GND 7 VCO 6 VIN 5 R VDD 3 E/DOUT 2 DIN2 1 DIN1

GND 1 2 3 4 5 6 7 8

PARALLEL DATA OUTPUT

IC311
VREF

CXA8054M
OUTR­ OUTR+ VREFR AINR+ AINR­ AVDD OUTR

IC401

LC89051V-TLM

TST2 13 SCLK/CL XLAT/CE SWDT/DI SRDT/DO DQSY/LD 14 15 16 17 18 SUB-Q DET MICOM INTERFACE C BIT DET

20

19

18 ­ +

17

16

15

14

13

12

11

­ +

CKOUT 19 FS128 20 BCK 21 LRCK 22 TIMING

+ ­ + ­ 1
VREF

DATAOUT 23

DATA DEMODURATE MUTE OUTPUT LOCK ERROR DET

ERROR 24

2
AVSS

3
AINL+

4
AINL­

5
OUTL

6
VREFL

7

8

9
OUTL­

10
OUTL+

­ 72 ­

IC451, 751

CXD8517Q
LRCKO BCKO DATAO TEST3 TEST2 TEST1 STA NC VDD NC NC
23 22 NC 21 TEST RES SAMPLING RATE POINTER GENERATOR 20 FIS1 19 FIS0 18 PASS 20 bit ADD 20 bit ADD REGISTER 25 bit ACCUMLATOR L-CH RAM A R-CH RAM A REGISTER 15 VDD FLAME COUNTER 14 XO 13 XI 19 bit ADD 19 bit ADD 17 GND 16 XO2 12 GND 1 2 3 4 5 6 7 8 9 10 11

33

32 31 30

29 28

27

26 25 24

NC 34 MUTE 35 DEMP 36 FS1 37 FS2 38 GND 39 XLAT 40 SCK 41 SWDT 42 COEFFIENT ROM OUTPUT I/F (P1-S0) FIR FILTER CONTROL (RAM/ROM/ACC)

ATT/MODE REGISTER MPY REGISTER

L-CH RAM B

R-CH RAM B

REGISTER

REGISTER

OVER FLOW LIMITER

SLAVE 43

NC 44 INPUT I/F (S1-P0)

DATAI LRCKI BCKI MI0 MI1

VDD

REGISTER

FI128 MO0 MO1

­ 73 ­

INIT NC

IC501, 601

CXD2537R
EXTCBR DIRCPB CTMD0 CTMD1 TST18 TST17 MDSY MDLK DODT BUSY CPSY DATA LRCK C2PO DIDT EMP SPO ERR 77 BCK MIN EOL FUL Vss Vss

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

80

79

78

D7 76

VDD SWDT SCLK XLAT SRDT SENS SMD0 SMD1 XINT

1 2 3 4 5 Audio I/F 6 7 CPU Command I/F 8 9 Memory Controller I/F Data Memory ATRAC Encoder/Decoder

75 Vss 74 D6 73 D5 72 D4 71 D3 70 D2 69 D0 68 D1 67 XWE 66 XRAS 65 AD9 64 XCS ATRAC Encoder/Decoder I/F 63 Vss 62 XCAS 61 XOE RAM R/W Controller Address Generator 60 A08 59 A07 58 A06 57 A05 56 A04 55 A00 54 A01 53 A02 Clock Generator 52 A03 51 VDD

RCPB 10 WRMN 11 TX 12 Vss 13 TST0 14 TST1 15 TST2 16 XRST 17 TS0 18 TS1 19 TS2 20 TS3 21 TST3 22 TST4 23 TST5 24 Vss 25

ATRAC Block DI Block EFM Encoder/Decoder I/F AI Block

CD-ROM Encoder/Decoder

26 AIRCPB

27 TST6

28 TST7

29 TST8

30 TST9

31 TST10

32 TST11

RAM Controller Block 33 TST12

34 TST13

35 TST14

36 OSCO

37 OSCI

38 Vss

39 TST15

40 TST16

41 DOUT

42 ADIN

43 ABCK

44 ALRCK

45 SA2

46 SA1

47 SA0

48 A11

49 A10

50 Vss

­ 74 ­

IC801

CXD2720Q
VDD2 VSS5 VSS6 NC 79 ­ 71 NC 68 ­ 54 VSS4 NC NC 53 52 51 44 ­ 50 NC VDD1 VSS3 AVS5 AO2P AVD5 AVD2 AIN2 AVS2 XVSS XTLI CLOCK GENERATOR/ TIMING CIRCUIT

80

70 69

X768 BFOT INVI NC NC SI BCK LRCK XMST VSS7

81 82 83 84 85 86 87 88 89 90 98 ­ 91

128K BIT DELAY RAM

43 42 41 40

DAC2

39 AO2N

SERIAL DATA INTERFACE

DAC1 DSP

NC

ADC1 ADC2

VDD3 99 AVD0 100

ADC3

38 37 36 35 34 33

CPU INTERFACE

32 XTLO 31 XVDD

1 2 3 4 5 6 7 AVS0 VSS0 RVDT SCK XLAT REDY TRDT

8 9 10 11 12 13 XWO XRST VSS1 VDD0 SO XS24

14 ­ 19 TST0 ­ TST5

20 21 22 23 24 25 26 27 28 29 30 VSS2 AVS3 AIN3 AVD3 AVD4 AO1P AO1N AVS4 AVS1 AIN1 AVD1

IC901
IN2 10

LB1830M-S-TE-L
IN1 9 VM 8 VREF VREF 7 VCONT 6

­ CENTER Board ­ IC421, 431
VCC G2

SN74HC541ANS
Y5 Y6 Y2 Y3 Y4 Y7
12

20 19

18

Y1

17

16

15

14

13

11

LOGIC PREDRIVER

1

2

3

4

5

6

Y8
9 10

7

8

A1

1 VCC

2 OUT2

3 GND

4

5

OUT1 VS

­ 75 ­

GND

A3

A5

A7

A0

A2

A4

A6

A8

­ DISPLAY Board ­ IC101 M66004M8FP

­ POWER Board ­ IC401, 411 BA3963

DIG11 1 | | DIG0 12 RES 13 CS 14 CLK 15 DATA 16

DIGITAL OUTPUT CIRCUIT

64 DIG12 | | 61 DIG15

MODE1(5V) 1

MODE2(7V) 2
INDICATION CONTROLLER

SERIAL RECEIVE CIRCUIT

C 3 OVER CURRENT PROTECT

­ +

RRC 4
INDICATION CONTROL RESISTOR
CODE SELECT

P1 17 P0 18 VCC1 19 XOUT 20 XIN 21 VSS 22

OUTPUT PORT (2BIT)

RESET 5

5V 6

CLOCK GENERATOR CIRCUIT RAM WRITE CODE WRITE
(35BIT x 16)

CODE/COMMAND CONTROL CIRCUIT

VCC 7

REF. V ­

NC 8 OVER CURRENT PROTECT

+

NC 9
(35BIT x 16) DECODER

DECODER

INDICATION CODE RESISTOR (8BIT x 16)

7V 10 PRE GND 11
60 VCC2

SEG35 23 | | SEG27 31 VP 32

SEGMENT OUTPUT CIRCUIT

59 SEG0 | | 33 SEG26

GND 12

IC451

M62005L

INTERRUPT SIGNAL GENERATOR

RESET SIGNAL GENERATOR

1 GND

2 INT

3 RESET

4 Cd

+ ­

+ ­

5 VCC

IC501

M5293L

GND

2 5k 5 27k + 3 OUT REFERENCE VOLTAGE

ON/OFF

4

REFERENCE VOLTAGE

­ OVERHEAT PROTECTION OVERCURRENT LIMITTER

IN

1

­ 76 ­

6-24. IC PIN FUNCTION DESCRIPTION
· BD BOARD IC101 CXA1981AR (RF AMP, FOCUS/TRACKING ERROR AMP) Pin No. 1 2 to 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name VC A to F FI FO PD APCREF TEMPI GND AAPC DAPC TEMPR XRST SWDT SCLK XLAT VREF TENV THLD VCC TFIL TE TLB CSLED SE ADFM ADIN ADAGC ADFG AUX FE FLB ABCD BOTM PEAK RFAGC RF ISET AGCI RFO MORFI MORFO I J I/O O I I O I I I -- O O O I I I I O O I -- I O I I O O I I O O O I O O O I O I I O I O I I Function Middle point voltage (+2.5V) generation output terminal Signal input from the optical pick-up detector Operational input for the F signal Operational output for the F signal Light amount monitor input from the optical pick-up block laser diode Reference voltage input terminal for setting laser power Connected to the temperature sensor Ground terminal Laser amplifier output terminal to the automatic power control circuit Not used (open) Output terminal for a temperature sensor reference voltage Reset signal input from the system controller (IC101) "L": reset Writing serial data input from the system controller (IC101) Serial data transfer clock signal input from the system controller (IC101) Serial data latch pulse signal input from the system controller (IC101) Reference voltage output terminal Not used (open) Not used (open) Connected to the external capacitor for set the internal circuit Power supply terminal (+5V) Connected to the external capacitor for set the internal circuit Tracking error signal output to the CXD2535CR (IC121) Adder signal input of the tracking error Connected to the external capacitor for low-pass filter of the sled error signal Sled error signal output to the CXD2535CR (IC121) FM signal output of the ADIP Receives a ADIP FM signal in AC coupling Connected to the external capacitor for ADIP AGC ADIP duplex signal (22.05 kHz ± 1 kHz) output to the CXD2535CR (IC121) Auxiliary signal (I3 signal/temperature signal) output to the CXD2535CR (IC121) Focus error signal output to the CXD2535CR (IC121) Adder signal input of the focus error Not used (open) Light amount signal (ABCD) output to the CXD2535CR (IC121) Light amount signal (RF/ABCD) bottom hold output to the CXD2535CR (IC121) Light amount signal (RF/ABCD) peak hold output to the CXD2535CR (IC121) Connected to the external capacitor for RF auto gain control circuit Playback EFM RF signal output to the CXD2535CR (IC121) Connected to the external capacitor for set the internal circuit 22 kHz, BPF center frequency Receives a RF signal in AC coupling RF signal output terminal Receives a MO RF signal in AC coupling MO RF signal output terminal I-V converted RF signal I input from the optical pick-up block detector I-V converted RF signal J input from the optical pick-up block detector

­ 77 ­

· BD BOARD IC121 CXD2535CR (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, EFM/ACIRC ENCODER/DECODER Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Pin Name FS256 FOK DFCT SHCK SHCKEN WRPWR DIRC SWDT SCLK XLAT SRDT SENS ADSY SQSY DQSY XRST TEST4 CLVSCK TEST5 DOUT DIN FMCK ATER REC DVSS DOVF DODT DIDT DTI DTO I/O O O O O I I I I I I O O (3) O O O I I O I O I O O I -- I I O I O (3) Function Clock signal (11.2896 MHz) output terminal (MCLK system) Not used (open) Focus OK signal output to the system controller (IC101) "H" is output when focus is on ("L": NG) Defect on/off selection signal output terminal Not used Track jump detection signal output to the system controller (IC101) Track jump detect enable input terminal Fixed at "H" in this set Laser power selection signal input from the system controller (IC101) "L": playback mode, "H": recording mode Not used (fixed at "H") Writing serial data input from the system controller (IC101) Serial data transfer clock signal input from the system controller (IC101) Serial data latch pulse signal input from the system controller (IC101) Reading serial data output to the system controller (IC101) Internal status (SENSE) output to the system controller (IC101) ADIP sync signal output terminal Not used (open) Subcode Q sync (SCOR) output to the system controller (IC101) "L" is output every 13.3 msec Almost all, "H" is output Digital In U-bit CD format subcode Q sync (SCOR) output terminal "L" is output every 13.3 msec Almost all, "H" is output Not used (open) Reset signal input from the system controller (IC101) "L": reset Input terminal for the test (fixed at "L") System clock signal output of the CLV Not used (open) Input terminal for the test (fixed at "L") Digital audio signal output terminal when playback mode (for digital optical out/digital coaxial out) Not used Digital audio signal input terminal when recording mode (for digital optical in/digital coaxial in) Not used (fixed at "L") FM demodulation clock signal output of the ADIP Not used (open) ADIP CRC flag output terminal Error present when "H" output Not used (open) Recording/playback selection signal input from the system controller (IC101) "L": playback mode, "H": recording mode Ground terminal (digital system) Validity flag input for the digital audio output Fixed at "L" in this set Serial data input from the ATRAC encoder (IC501) Serial data output terminal Not used Recording audio data input from the ATRAC encoder (IC501) Playback audio data output to the ATRAC decoder (IC601) C2PO signal (indicate output of the data error status) output to the ATRAC encoder (IC501) and ATRAC decoder (IC601) Playback mode: C2PO ("H"), Digital recording mode: digital in validity flag, Analog recording mode: "L" Serial in/out data bit clock signal (2.8224 MHz) output to the ATRAC encoder (IC501) and ATRAC decoder (IC601) (MCLK system) L/R sampling clock signal (44.1 kHz) output to the ATRAC encoder (IC501) and ATRAC decoder (IC601) (MCLK system) System clock signal (512Fs=22.5792 MHz) output terminal Not used (open) System clock signal (512Fs=22.5792 MHz) input from the ATRAC encoder (IC501)

31

C2PO

O

32 33 34 35

BCK LRCK XTAO XTAI

O O O I

* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.

­ 78 ­

Pin No. 36 37 38 39 40 41 42

Pin Name MCLK XBCK DVDD0 WDCK RFCK WFCK GTOP

I/O O O -- O O O O

Function MCLK clock signal (22.5792 MHz) output terminal Not used (open) Invert output of the BCK (pin #TM) Not used (open) Power supply terminal (+5V) (digital system) Word clock signal (88.2 kHz) output terminal (MCLK system) Not used (open) Read frame clock signal (7.35 kHz) output terminal (MCLK system) Not used (open) Write frame clock signal (7.35 kHz) output terminal (EFM decoder PLL system when playback mode, EFM encoder PLL system when recording mode) Not used (open) GTOP signal output terminal Open the playback EFM sync protection window when "H" output Not used (open) Guard frame sync signal output terminal The GFS signal becomes "H" when the playback EFM frame sync and interpolation protection timing match "L": NG, "H": OK Not used (open) EFM decoder PLL clock signal (98Fs=4.3218 MHz) output terminal PLL is made for XPLCK so that changes