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Engineering Specification
Engineering Specification
14.1 inches XGA Color TFT/LCD Module
Model Name:ITXG76
Document Control Number : OEM76-05
Note:Specification is subject to change without notice. Consequently it is better to contact to IBM
before proceeding with the design of your product incorporating this module.
Display Business Unit
International Business Machines Corporation
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 1/23
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Engineering Specification
i Contents
i Contents
ii Record of Revision
1.0 Handling Precautions
2.0 General Description
2.1 Characteristics
2.2 Functional Block Diagram
3.0 Absolute Maximum Ratings
4.0 Optical Characteristics
5.0 Signal Interface
5.1 Connectors
5.2 Signal Pin
5.3 Signal Description
5.4 Signal Electrical Characteristics
5.5 Signal for Lamp connector
6.0 Pixel format image
7.0 Parameter guide line for CFL Inverter
8.0 Interface Timings
8.1 Timing Characteristics
8.2 Timing Definition
9.0 Power Consumption
10.0 Power ON/OFF Sequence
11.0 Mechanical Characteristics
12.0 National Test Lab Requirement
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 2/23
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Engineering Specification
ii Record of Revision
Date Document Revision Page Summary
March 15,1999 OEM76-01 All First Edition for customer.
(Preliminary) Based on Initial Internal Spec. as of March 8,1999.
Based on Mechanical Drawing as of February 25,1999.
March 17,1999 OEM76-02 5,8,15 To update White Luminance for Uniformity.
(Preliminary)
June 21, 1999 OEM76-03 4 To add pricautions.
This module has a plan to get UL certification in July.
1999.
5 To update White Luminance, Optical Rise Time/Fall
Time, and Weight.
7 To update Absolute Maximum Ratings.
8 To update Optical Characteristics.
6,9 To update a connector name for Lamp.
15 To update parameter guide line for Inverter.
16 To add for your refernce data.
19 To add PDD/IDD value.
Based on Internal specification EC F58922 as of June
7, 1999.
Based on Mechanical Drawing as of May 26,1999.
October 7,1999 OEM76-04 5 To update Logic Power Consumption.
17 To update Timing Characteristics.
19 To update Power Consumption.
21,22 To add unspecified tolerance.
May 24,2000 OEM76-05 4 To update Handling Precautions.
17 To update Timing Characteristics.
19 To update Power Consumption.
23 To add National Test Lab Requirement.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 3/23
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Engineering Specification
1.0 Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth
when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) In case if a Module has to be put back into the packing container slot after once it was taken out
from the container, do not press the center of the CFL Reflector edge.
Instead, press at the far ends of the CFL Reflector edge softly. Otherwise the TFT Module may
be damaged.
10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the
Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure ( Notebook PC Bezel, for example),
do not twist nor bent the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are applied
to the TFT Module from outside. Otherwise the TFT Module may be damaged.
12) The fluorescent lamp in the liquid crystal display(LCD) contains mercury. Do not put it in trash that is
disposed of in landfills. Dispose of it as required by local ordinances or regulations.
13) Small amount of materials having no flammability grade is used in the LCD module.
The LCD module should be supplied by power complied with requirements of
Limited Power Source (2.11, IEC60950 or UL1950), or be applied exemption
conditions of flammability requirements (4.4.3.3, IEC60950 or UL1950) in an end product.
14) The LCD module is designed so that the CFL in it is supplied by Limited Current Circuit
(2.4, IEC60950 or UL1950). Do not connect the CFL in Hazardous Voltage Circuit.
y The information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by IBM for any infringements of patents or other right
of the third partied which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of IBM or others.
y The information contained herein may be changed without prior notice. It is therefore
advisable to contact IBM before proceeding with the design of equipment incorporating this
product.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 4/23
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Engineering Specification
2.0 General Description
This specification applies to the 35.7cm(14.1") Color TFT/LCD Module 'ITXG76'.
This module is designed for a display unit of notebook style personal computer.
The screen format and electrical interface are intended to support the XGA (1024(H) x 768(V))screen.
Support color is native 262k colors ( RGB 6-bit data driver ).All input signals are LVDS interface compatible.
This module does not contain a inverter card for backlight.
2.1 Characteristics
The following items are characteristics summary on the table under 25 degree C condition:
ITEMS SPECIFICATIONS
Screen Diagonal [mm] 357 (14.1")
Active Area [mm] 285.7(H) x 214.3(V)
Pixels H x V 1024(x3) x 768
Pixel Pitch [mm] 0.279(per one triad) x 0.279
Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
Typical White Luminance [cd/m 2]
Design Point 1:(ICFL=3.8mA) 90 Typ.(Center), 85 Typ.(5 points average)
Design Point 2:(ICFL=6.5mA) 150 Typ.(Center),140 Typ.(5 points average)
Contrast Ratio 250 : 1 Typ.
Optical Rise Time/Fall Time [msec] 30 Typ. ,50Max.(each)
Nominal Input Voltage [Volt] VDD +3.3 Typ.
Logic Power Consumption[watt] 1.5 Typ.
(VDD line)
Lamp Power Consumption [watt]
Design Point 1:(ICFL=3.8mA) 2.5 Typ.
Design Point 2:(ICFL=6.5mA) 3.8 Typ.
Weight [grams] 535 Typ.(w/o Inverter)
Physical Size [mm] 298.5(W) x 226.5(H) x 6.1(5.8)(D) Typ.
Electrical Interface 6-bit digital video for each color R/G/B, 3 sync, Clock
4 pairs LVDS
Support Color Native 262K colors ( RGB 6-bit data driver )
Temperature Range (degree C)
Operating 0 to +50
Storage (Shipping) -20 to +60
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 5/23
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Engineering Specification
2.2 Functional Block Diagram
The following diagram shows the functional block of the 35.7cm Color TFT/LCD Module:
X-Driver
<4 pairs LVDS> LCD DRIVE
CARD
RxIN0
RxIN1
RxIN2
LCD TFT ARRAY/CELL
Controller
RxCLKIN 1024(R/G/B) x 768
DC-DC
Converter
Ref circuit
Y-Driver Backlight Unit
VDD
Lamp
GND
Connector
JAE FI-SEB20P-HF (2pin)
Mating JAE FI-S20S or FI-SE20M JST BHSR-02VS-1
FI-C3-A1 Mating JST SM02B-BHSS-1-TB
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 6/23
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Engineering Specification
3.0 Absolute Maximum Ratings
Absolute maximum ratings of the module is as follows :
Item Symbol Min Max Unit Conditions
Supply Voltage VDD -0.3 +4.0 V
Logic/LCD Drive Voltage
Input Voltage of Signal Vin -0.3 VDD+0.3 V
CFL Inrush current ICFLL - 20 mA Note 2
CFL Current ICFL - 7 mArms
CFL Ignition Voltage Vs - 1,600 Vrms
Operating Temperature TOP 0 +50 deg.C Note 1
Operating Relative Humidity HOP 8 95 %RH Note 1
Storage Temperature TST -20 +60 deg.C Note 1
Storage Relative Humidity HST 5 95 %RH Note 1
Vibration 1.5 10-200 G Hz
Shock 50 18 G ms Half sine wave.
Note 1 : Maximum Wet-Bulb should be 39 degree C and No condensation.
Note 2 : Duration=50 msec Max.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 7/23
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Engineering Specification
4.0 Optical Characteristics
The optical characteristics are measured under stable conditions as follows under 25 degree C condition:
Item Conditions Specification
Typ. Note
Viewing Angle Horizontal (Right) 40 -
(Degrees) KP10 (Left) 40 -
Vertical (Upper) 15 -
K:Contrast Ratio KP10 (Lower) 30 -
Contrast ratio 250 -
Response Time Rising 30 50(Max)
(ms) Falling 30 50(Max)
Color Red x 0.612 -
Chromaticity Red y 0.341 -
(CIE) Green x 0.294 -
Green y 0.568 -
Blue x 0.156 -
Blue y 0.133 -
White x 0.310 -
White y 0.346 -
White Luminance 150
(cd/m 2) CFL 6.5mA Center
140
5 points
average
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 8/23
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Engineering Specification
5.0 Signal Interface
5.1 Connectors
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
Connector Name / Designation For Signal Connector
Manufacturer JAE
Type / Part Number FI-SEB20P-HF
Mating Housing/Part Number FI-S20S or FI-SE20M or FI-S20S with shell.
Mating Contact/Part Number FI-C3-A1
Connector Name / Designation For Lamp Connector
Manufacturer JST
Type / Part Number BHSR-02VS-1
Mating Type / Part Number SM02B-BHSS-1-TB
5.2 Signal Pin
Pin# Signal Pin# Signal
1 VDD 11 RxIN2-
2 VDD 12 RxIN2+
3 GND 13 GND
4 GND 14 RxCLKIN-
5 RxIN0- 15 RxCLKIN+
6 RxIN0+ 16 GND
7 GND 17 Reserved
8 RxIN1- 18 Reserved
9 RxIN1+ 19 GND
10 GND 20 GND
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 9/23
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Engineering Specification
5.3 Signal Description
The module uses a LVDS compatible receiver. LVDS is a differential signal technology for LCD interface and high
speed data transfer device. Transmitter shall be SN75LVDS84(negative edge sampling) or compatible.
Signal Name Description
RxIN0+, RxIN0- LVDS differential data input (Red0-Red5, Green0)
RxIN1+, RxIN1- LVDS differential data input (Green1-Green5,Blue0-Blue1)
RxIN2+, RxIN2- LVDS differential data input (Blue2-Blue5, HSync, VSync, DSPTMG)
RxCLKIN+, RxCLKIN- LVDS differential clock input
VDD +3.3V Power Supply
GND Ground
Note: Input signals shall be low or Hi-Z state when VDD is off.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 10/23
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Engineering Specification
Internal circuit of LVDS inputs are as follows:
Signal Input SN75LVDS86 Com pat ible
Pin No.
5 RxIN0- +Red 0
+Red 1
R +Red 2
+Red 3
6 RxIN0+ +Red 4
+Red 5
+Green 0
8 RxIN1- +Green 1
+Green 2
R +Green 3
+Green 4
+Green 5
9 RxIN1+
+Blue 0
+Blue 1
11 RxIN2- +Blue 2
+Blue 3
+Blue 4
R
+Blue 5
12 RxIN2+ HSYNC
VSYNC
14 RxCLKIN- DSPTMG
R -DTCLK
15 RxCKLIN+
The module uses a 100ohm resistor between positive and negative data lines of each receiver input.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 11/23
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Engineering Specification
SIGNAL NAME Description
+RED5 Red Data 5 (MSB) Red-pixel Data
+RED4 Red Data 4 Each red pixel's brightness data consists of these 6 bits
+RED3 Red Data 3 pixel data.
+RED2 Red Data 2
+RED1 Red Data 1
+RED0 Red Data 0 (LSB)
Red-pixel Data
+GREEN 5 Green Data 5 (MSB) Green-pixel Data
+GREEN 4 Green Data 4 Each green pixel's brightness data consists of these 6 bits
+GREEN 3 Green Data 3 pixel data.
+GREEN 2 Green Data 2
+GREEN 1 Green Data 1
+GREEN 0 Green Data 0 (LSB)
Green-pixel Data
+BLUE 5 Blue Data 5 (MSB) Blue-pixel Data
+BLUE 4 Blue Data 4 Each blue pixel's brightness data consists of these 6 bits
+BLUE 3 Blue Data 3 pixel data.
+BLUE 2 Blue Data 2
+BLUE 1 Blue Data 1
+BLUE 0 Blue Data 0 (LSB)
Blue-pixel Data
-DTCLK Data Clock The typical frequency is 65.0 MHz. The signal is used to
strobe the pixel data and DSPTMG signals. All pixel data
shall be valid at the falling edge when the DSPTMG signal
is high.
DSPTMG Display Timing This signal is strobed at the falling edge of -DTCLK. When
the signal is high, the pixel data shall be valid to be
displayed.
VSYNC Vertical Sync The signal is synchronized to -DTCLK .
HSYNC Horizontal Sync The signal is synchronized to -DTCLK .
Note: Output signals from any system shall be low or Hi-Z state when VDD is off.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 12/23
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Engineering Specification
5.4 Signal Electrical Characteristics
Input signals shall be low or Hi-Z state when VDD is off.
It is recommended to refer the specifications of SN75LVDS86DGG(Texas Instruments) in detail.
Signal electrical characteristics are as follows;
Parameter Condition Min Max unit
Vth Differential Input High Voltage 100 mV
(Vcm=+1.2V)
Vtl Differential Input High Voltage -100 mV
(Vcm=+1.2V)
LVDS Macro AC characteristics are as follows:
Min. Max.
Clock Frequency (T) 50MHz 67MHz
Data Setup Time (Tsu) 600ps
Data Hold Time (Thd) 600ps
T
Input Clock
Input Data
Tsu Thd
5.5 Signal for Lamp connector
Pin # Signal Name
1 Lamp High Voltage
2 Lamp Low Voltage
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 13/23
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Engineering Specification
6.0 Pixel format image
Following figure shows the relationship of the input signals and LCD pixel format image.
0 1 1022 1023
1st Line R GB R G B RG B R G B
768th Line RG B R G B RG B R G B
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 14/23
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Engineering Specification
7.0 Parameter guide line for CFL Inverter
PARAMETER MIN DP-1 DP-2 MAX UNITS CONDITION
White Luminance - - cd/m 2 (Ta=25 deg.C)
center 90 150
5 points average 85 140
CFL current(ICFL) 3.0 3.8 6.5 7.0 mArms (Ta=25 deg.C)
Note 4
CFL Frequency(FCFL) 40 50 50 60 KHz (Ta=25 deg.C
Note 1
CFL Ignition Voltage(Vs) 1,400 - - - Vrms (Ta= 0 deg.C)
Note 3
CFL Voltage (Reference)(VCFL) - 670 585 - Vrms (Ta=25 deg.C)
Note 2
CFL Power consumption(PCFL) - 2.5 3.8 - W (Ta=25 deg.C)
Note 2
Note 1: CFL discharge frequency should be carefully determined to avoid interference between inverter and TFT
LCD.
Note 2: Calculated value for reference (ICFL x VCFL = PCFL).
Note 3: CFL inverter should be able to give out a power that has a generating capacity of over 1,400 voltage.
Lamp units need 1,400 voltage minimum for ignition.
Note 4: It should be employed the inverter whitch has "Duty Dimming", if ICFL is less than 4 mA.
Note 5: DP-1 and DP-2 are IBM recommended Design Points.
*1 All of characteristics listed are measured under the condition using the IBM Test inverter.
*2 In case of using an inverter other than listed, it is recommended to check the inverter
carefully. Sometimes, interfering noise stripes appear on the screen, and substandard
luminance or flicker at low power may happen.
*3 In designing an inverter, it is suggested to check safety circuit very carefully.
Impedance of CFL, for instance, becomes more than 1 [M ohm] when CFL is damaged.
*4 Generally, CFL has some amount of delay time after applying kick-off voltage. It is recommended
to keep on applying kick-off voltage for 1 [Sec] until discharge.
*5 CFL discharge frequency must be carefully chosen so as not to produce interfering noise stripes
on the screen.
*6 Reducing CFL current increases CFL discharge voltage and generally increases CFL discharge
frequency. So all the parameters of an inverter should be carefully designed so as not to produce
too much leakage current from high-voltage output of the inverter.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 15/23
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Engineering Specification
The following chart is CFL current versus the luminance for your reference.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 16/23
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Engineering Specification
8.0 Interface Timings
Basically, interface timings should match the VESA 1024x768 / 60 Hz (VG901101) manufacturing guide line
timing.
8.1 Timing Characteristics
Symbol MIN TYP MAX Unit Note
fdck DTCLK Frequency 65.00 MHz
tck DTCLK cycle time 15.38 nsec
tx X total time 1206 1344 2047 tck
tacx X active time 1024 1024 1024 tck
tbkx X blank time 90 320 tck 1
Hsync H frequency 48.363 KHz
Hsw H-Sync width 2 136 tck 2
Hbp H back porch 1 160 tck 2
Hfp H front porch 0 24 tck
ty Y total time 777 806 1023 tx
tacy Y active time 768 768 768 tx
Vsync Frame rate (55) 60 61 Hz
Vw V-sync Width 1 6 tx
Vfp V-sync front porch 1 3 tx
Vbp V-sync back porch 7 29 63 tx 3
Note1 : tbkx = Hfp + Hsw + Hbp
Note2 : Hsw + Hbp should be less than 515 [tck].
Note3 : Vbp should be static.
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 17/23
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Engineering Specification
8.2 Timing Definition
1344 dot
H-Sync
24 dot 160 dot
136 dot
DSPTMG
1024 dot
V-Sync
3H 29H
6H
DSPTMG
38H 768H
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 18/23
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Engineering Specification
9.0 Power Consumption
Input power specifications are as follows;
SYMBOL PARAMETER Min Typ Max UNITS CONDITION
VDD Logic/LCD Drive 3 3.3 3.6 V Load Capacitance 20uF
Voltage
PDD VDD Power 1.5 W All Black Pattern Note2
PDD VDD Power 1.82 W Max Pattern Note1
IDD VDD Current 450 mA All Black Pattern Note2
IDD VDD Current 530 mA Max Pattern Note3
VDDrp Allowable Logic/LCD 100 mVp-p
Drive Ripple Voltage
VDDns Allowable Logic/LCD 100 mVp-p
Drive Ripple Noise
Note1 : VDD = 3.6 V
Note2 : VDD = 3.3 V
Note3 : VDD = 3.0 V
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 19/23
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Engineering Specification
10.0 Power ON/OFF Sequence
VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from
any system shall be Hi-Z state or low level when VDD is off.
150ms min.
90% 90%
VDD
10% 10% 10%
0V
10ms max.
0 min. 0 min.
Signals 10%
10%
0V
180ms min. 0 min.
Lamp On 10% 10%
0V
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 20/23
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Engineering Specification
11.0 Mechanical Characteristics
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 21/23
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Engineering Specification
(C) Copyright IBM Corp. 1999,2000 All Rights reserved.
May 24,2000 OEM76-05 22/23
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Engineering Specification
12.0 National Test Lab Requirement
The display module satisfied all requirements for compliance to
UL 1950, 3rd Edition U.S.A. Information Technology Equipment
****** End Of Page ******
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