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54191 DM54191 DM74191 Synchronous Up Down 4-Bit Binary Counter with Mode Control
June 1989
54191 DM54191 DM74191 Synchronous Up Down
4-Bit Binary Counter with Mode Control
General Description
This circuit is a synchronous reversible up down counter Two outputs have been made available to perform the cas-
The 191 is a 4-bit binary counter Synchronous operation is cading function ripple clock and maximum minimum count
provided by having all flip-flops clocked simultaneously so The latter output produces a high-level output pulse with a
that the outputs change simultaneously when so instructed duration approximately equal to one complete cycle of the
by the steering logic This mode of operation eliminates the clock when the counter overflows or underflows The ripple
output counting spikes normally associated with asynchro- clock output produces a low-level output pulse equal in
nous (ripple clock) counters width to the low-level portion of the clock input when an
The outputs of the four master-slave flip-flops are triggered overflow or underflow condition exists The counters can be
on a low-to-high level transition of the clock input if the easily cascaded by feeding the ripple clock output to the
enable input is low A high at the enable input inhibits count- enable input of the succeeding counter if parallel clocking is
ing Level changes at either the enable input or the down used or to the clock input if parallel enabling is used The
up input should be made only when the clock input is high maximum minimum count output can be used to accom-
The direction of the count is determined by the level of the plish look-ahead for high-speed operation
down up input When low the counter counts up and when
high it counts down Features
This counter is fully programmable that is the outputs may Y Single down up count control line
be preset to either level by placing a low on the load input Y Count enable control input
and entering the desired data at the data inputs The output Y Ripple clock output for cascading
will change independent of the level of the clock input This Y Asynchronously presettable with load control
feature allows the counters to be used as modulo-N dividers Y Parallel outputs
by simply modifying the count length with the preset inputs Y Cascadable for n-bit applications
The clock down up and load inputs are buffered to lower Y Alternate Military Aerospace device (54191) is avail-
the drive requirement which significantly reduces the num- able Contact a National Semiconductor Sales Office
ber of clock drivers etc required for long parallel words Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6562