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STL75NH3LL
N-channel 30 V, 0.004 20 A, PowerFLATTM (6x5)
,
ultra low gate charge STripFETTM Power MOSFET
Features
RDS(on)
Type VDSS ID
max
STL75NH3LL 30V < 0.0057 20 A (1)
1. This value is according Rthj-pcb
Improved die-to-footprint ratio
Very low profile package (1mm max)
s)
PowerFLATTM(6x5)
t(
Very low thermal resistance
uc
Very low gate charge
Low threshold device
d
Application
P ro
Switching applications Figure 1.
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Internal schematic diagram
Description
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This application specific Power MOSFET is the
latest generation of STMicroelectronics unique
"STripFETTM" technology. The resulting transistor -
(s)
is optimized for low on-resistance and minimal
ct
gate charge. The chip-scaled PowerFLATTM
package allows a significant board space saving,
still boosting the performance.
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e Pr
o let
bs
Table 1. Device summary
Order code Marking Package Packaging
O STL75NH3LL L75NH3LL PowerFLATTM (6 x 5) Tape and reel
June 2008 Rev 1 1/12
www.st.com 12
Contents STL75NH3LL
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
3 Test circuits .............................................. 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
t( s)
d uc
P ro
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- Ob
ct (s)
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e Pr
o let
O bs
2/12
STL75NH3LL Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage (VGS = 0) 30 V
VGS Gate-source voltage