Text preview for : 74ls147.pdf part of datasheets 74ls147 . Electronic Components Datasheets Various datasheets 74ls147.pdf
Back to : 74ls147.pdf | Home
SN54/74LS147
10-LINE-TO-4-LINE SN54/74LS148
AND 8-LINE-TO-3-LINE SN54/74LS748
PRIORITY ENCODERS
The SN54 / 74LS147 and the SN54 / 74LS148 are Priority Encoders. They
provide priority decoding of the inputs to ensure that only the highest order 10-LINE-TO-4-LINE
data line is encoded. Both devices have data inputs and outputs which are
AND 8-LINE-TO-3-LINE
active at the low logic level.
The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied
PRIORITY ENCODERS
decimal zero condition does not require an input condition because zero is LOW POWER SCHOTTKY
encoded when all nine data lines are at a high logic level.
The LS148 encodes eight data lines to three-line (4-2-1) binary (octal). By
providing cascading circuitry (Enable Input EI and Enable Output EO) octal
expansion is allowed without needing external circuitry.
The SN54 / 74LS748 is a proprietary Motorola part incorporating a built-in
J SUFFIX
deglitcher network which minimizes glitches on the GS output. The glitch
CERAMIC
occurs on the negative going transition of the EI input when data inputs 0