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Philips Semiconductors Product specification

PowerMOS transistor PHB2N50

GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
field-effect power transistor in a
plastic envelope suitable for surface VDS Drain-source voltage 500 V
mounting featuring high avalanche ID Drain current (DC) 2 A
energy capability, stable off-state Ptot Total power dissipation 50 W
characteristics, fast switching and RDS(ON) Drain-source on-state resistance 5
high thermal cycling performance
with low thermal resistance. Intended
for use in Switched Mode Power
Supplies (SMPS), motor control
circuits and general purpose
switching applications.

PINNING - SOT404 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION d
mb
1 gate
2 drain
g
3 source
2
mb drain
1 3 s

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
ID Continuous drain current Tmb = 25