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Cover Sheet
888Z4.5 / LA-1302 Mother Board Rev : 0.5 for Layout
Intel (Northwood) with Intel 845M+ICH3
1 1
SHEET TITLE
1 Cover Page
2 Block Diagram
3,4 Northwood CPU / Fan / Thermal
5 CPU Decoupling
6,7,8 North Bridge Intel 845MP
9,10,11 DDR-SODIMM
12 Clock Generator
13,14,15 VGA ATI M7C/ Penal interface
2
16, 17 VGA DDR SGRAM/ CRT & TVOUT CONNECTOR 2
18,19,20 South Bridge ICH3M
21 Card Bus Controller / Card Bus Socket
22 IEEE1394 VT6306 / PHY
23 LAN Controller RTL8100BL
24 Audio DJ OZ163
25 AC97 Codec_ALC201
26 Audio EQ_TAS3002
27 AMP & Audio Jack stencil not open:
28 HDD/CDROM J1
29 LPC EC_PC87591 U24
3
30 PJP2 3
BIOS & I/O Port PJP4
31 Printer/USB Port/TP C715
32 C716
Dot Matrix LCD/FIR/Reset/PS PC155
33 DC/DC Interface C72
34 C94
Mimi-PCI & Docking
35 SIO VT1211
36 SD CONTROLLER/SOCKET/UNSED GATES
37 5V/3V/12V
38 CHARGER
39 CPU_CORE
4 40 DETECTOR 4
41 DDR/Connector
42 Notes & PIR List
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 1 of 45
A B C D E
A B C D E
Compal confidential Block Diagram
Model Name : 888Z4/LA-1301 (Intel Northwood) +CPU_CORE +1.2VS
Intel Y1
14.318MHZ
Northwood Micro-FCPGA +3VS
Power On/Off VID SELECT page 3,4,5 Clock Generator
1 Reset Circuit /CPU_CORE Decouple W320-04/9508-05 1
CAP.
New
page 29 page 5 page12 +3VSUS
+3VRUN
+1.8VS +1.5VS +CPU_CORE
+3VS CRT Connector
page 17 Brookdale-M
MCH-M
LCDVDD +5VS FOR INVERTER +3VS +1.8VS page6,7,8
+2.5V
DC/DC Interface TFT/HPA Panel
RTC Battery Interface
ATI M7C
MA(0..13)
page +1.5VS
MD(0..63)
page 30 page 13 13,14,15 +2.5VS
+2.5VS page 16 +2.5V +3VS +2.5V +3VS +1.25VS
TV OUT SGRAM DDR page 9 DDR page 10 TERMINATION
Connector 8/16MB SO-DIMM 0 SO-DIMM 1 RESISTORS
page 17
2
(Bank 0,1) (Bank 2,3) 2
PCI BUS HUB LINK
AC Link AD(0..31) DDR page 11
Decoupling
+3VS +5VS +3VALW +3V +3VS +1.8VS +CPU_CORE +3VS +1.8VALW +3VALW
Mini PCI PCMCIA VIA VT6306 ICH3-M
Socket CB1410 1394 Controller
page 31 page 21 page 22 421 BGA
page 18,19,20
S1_VCC +3VALW +5VS +5VALW +3VALW
+5VALW
* HSP Modem Card
Slot 0 +12VALW USB USB
* Combo for HSP Modem and page 21 Port 0,1 Port 2
802.11b page 31
* Controllerless Modem S1_VPP Bluetooth
page 31
* Combo for Controllerless
3 Modem and 802.11b LPC BUS 3
+5VCD +5VS
AC Link HDD Docking Connector
+3VALW OR +2.5VALW +3VS +3VALW
14M_5V
RJ45/RJ11 Super I/O KeyBoard Connector * DC-IN
Jack LAN OZ163 page 28 * 2 USB Port
* TV Out (S Video)
page 23 RTL8100BL SMC47N227 NS87591 AC Link * VGA Out
page 24
page 23 page 35 page 29 * 2 PS/2
+3VS AVDD +5VALW * LAN
AC97 +5VS
* Parallel Port
* Serial Port
6-7A 6-7A 3A 50mA
+5VS
Touch Pad KBD
page 29
Codec
page 25
* Line Out
+3VALWP +5VALWP +2.5VALWP +12VALWP page 31 * Headphone
* Microphone
+1.25VP 3A
Power Circuit I/O Buffer page 34
DC/DC +1.2VP 300mA
PIO page 30 +3VCD +5VAMP +5VCD +5VCD +5VALW
page 37,38,39,40,41 page 31
Audio AMP CD-ROM +3VCD +3VALW
+3VALW EQ Jack Connector +5VAMP +5VALW
4 BIOS page 26 page 27 page 28 4
page 30
EN_CDPLAY#
PCB1
+3VS +3VS,+5VS Speaker
page 27
Smart Card SD Compal Electronics, Inc.
Title
LA-1302 PCB Connector CONTROLLER THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
page 36 page 36
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 2 of 45
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5 4 3 2 1
+CPU_CORE
AC10
AC12
AC14
AC16
AC18
AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18
AB11
AB13
AB15
AB17
AB19
AE10
AE12
AE14
AE16
AE18
AE20
AF11
AF13
AF15
AF17
AF19
AF21
AC8
AD7
AD9
AA8
AB7
AB9
AE6
AE8
AF2
AF5
AF7
AF9
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20
B11
B13
B15
B17
B19
E10
C8
D7
D9
A8
B7
B9
HA#[3..31] U13A HD#[0..63]
6 HA#[3..31] HD#[0..63] 6
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
HA#3 K2 B21 HD#0
HA#4 A#3 D#0 HD#1
K4 B22
D HA#5 A#4 D#1 HD#2 D
L6 A23
HA#6 A#5 D#2 HD#3
K1 A25
HA#7 A#6 D#3 HD#4
L3 C21
HA#8 A#7 D#4 HD#5
M6 D22
HA#9 A#8 D#5 HD#6
L2 B24
HA#10 A#9 D#6 HD#7
M3 C23
HA#11 A#10 D#7 HD#8
M4 C24
HA#12 A#11 D#8 HD#9
N1 B25
HA#13 A#12 D#9 HD#10
M1 G22
HA#14 A#13 D#10 HD#11
N2 H21
HA#15 A#14 D#11 HD#12
N4 C26
HA#16 A#15 D#12 HD#13
N5 D23
HA#17 A#16 D#13 HD#14
T1 J21
HA#18 A#17 D#14 HD#15
R2 D25
HA#19 A#18 D#15 HD#16
P3 H22
HA#20 A#19 D#16 HD#17
P4 E24
HA#21 A#20 D#17 HD#18
R3 G23
HA#22 A#21 D#18 HD#19
T2 F23
HA#23 A#22 D#19 HD#20
U1 F24
HA#24 A#23 D#20 HD#21
P6 E25
HA#25 A#24 D#21 HD#22
U3 F26
HA#26 A#25 D#22 HD#23
T4 D26
HA#27 A#26 D#23 HD#24
V2 L21
HA#28 A#27 D#24 HD#25
R6 G26
HA#29 A#28 D#25 HD#26
W1 H24
HA#30
HA#31
T5
U4
V3
A#29
A#30
A#31
Mobile D#26
D#27
D#28
M21
L22
J24
HD#27
HD#28
HD#29
A#32 D#29 HD#30
W2 K23
A#33 D#30 HD#31
Y1 H25
A#34 D#31 HD#32