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MCE-SV7
SERVICE MANUAL
Ver 1.1 2002.10

E Model

MCE-SV7 is the Video CD/CD player section in MHC-SV7AV.

Model Name Using Similar Mechanism CD Mechanism Type Base Unit Name Optical Pick-up Name

NEW CDM63B BU-30BD61A OP Assy (A-MAX.3)

SPECIFICATIONS
VIDEO CD/CD player section
System Laser Compact disc and digital audio system Semiconductor laser (=795 nm) Emission duration: continuous 2 Hz ­ 20 kHz (±0.5 dB) More than 90 dB More than 90 dB NTSC, PAL

Frequency response Signal-to-noise ratio Dynamic range Video color system format OPTICAL OUT (Square optical connector jack, rear panel)

General
Dimensions (w/h/d) Mass Approx. 280 x 108 x 330 mm Approx. 2.8 kg

Design and specifications are subject to change without notice.

VIDEO CD/CD PLAYER
9-873-155-02
2001J0500-1 C 2002.10

Sony Corporation
Home Audio Company Published by Sony Engineering Corporation

MCE-SV7

NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK OR BASE UNIT The laser diode in the optical pick-up block may suffer electrostatic break-down because of the potential difference generated by the charged electrostatic load, etc. on clothing and the human body. During repair, pay attention to electrostatic break-down and also use the procedure in the printed matter which is included in the repair parts. The flexible board is easily damaged and should be handled with care. NOTES ON LASER DIODE EMISSION CHECK The laser beam on this model is concentrated so as to be focused on the disc reflective surface by the objective lens in the optical pick-up block. Therefore, when checking the laser diode emission, observe from more than 30 cm away from the objective lens. LASER DIODE AND FOCUS SEARCH OPERATION CHECK Carry out the "S curve check" in "CD section adjustment" and check that the S curve waveforms is output three times. Notes on chip component replacement · Never reuse a disconnected chip component. · Notice that the minus side of a tantalum capacitor may be damaged by heat. Flexible Circuit Board Repairing · Keep the temperature of the soldering iron around 270 °C during repairing. · Do not touch the soldering iron on the same conductor of the circuit board. (within 3 times) · Be careful not to apply force on the conductor when soldering or unsoldering.

CAUTION Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.

This appliance is classified as a CLASS 1 LASER product. The CLASS 1 LASER PRODUCT MARKING is located on the rear exterior.

Laser component in this product is capable of emitting radiation exceeding the limit for Class 1. The following caution label is located inside the unit.

SAFETY-RELATED COMPONENT WARNING!! COMPONENTS IDENTIFIED BY MARK 0 OR DOTTED LINE WITH MARK 0 ON THE SCHEMATIC DIAGRAMS AND IN THE PARTS LIST ARE CRITICAL TO SAFE OPERATION. REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.

2

MCE-SV7

TABLE OF CONTENTS 1. 2. 3.
3-1. 3-2. 3-3. 3-4. 3-5. 3-6. 3-7.

SERVICING NOTES ............................................... 4 GENERAL ................................................................... 5 DISASSEMBLY
Disassembly Flow ........................................................... Cover ............................................................................... CD Mechanism Deck (CDM63B) .................................. MAIN Board ................................................................... Front Panel Section ......................................................... PANEL Board, SUB PANEL Board ............................... Lid (CD) .......................................................................... 6 7 7 8 8 9 9

4. 5.

TEST MODE .............................................................. 10 ELECTRICAL ADJUSTMENTS
CD Section ...................................................................... 11 VIDEO Section ............................................................... 11

6.
6-1. 6-2. 6-3. 6-4. 6-5. 6-6. 6-7. 6-8. 6-9. 6-10. 6-11. 6-12. 6-13. 6-14. 6-15. 6-16. 6-17.

DIAGRAMS
Block Diagram ­ CD SERVO Section ­ ....................... Block Diagram ­ AUDIO/VIDEO Section ­ ................ Block Diagram ­ MAIN Section ­ ................................ Note For Printed Wiring Boards and Schematic Diagrams ................................................ Printed Wiring Board ­ BD Section ­ ........................... Schematic Diagram ­ BD Section ­ .............................. Printed Wiring Boards ­ CD CHANGER Section ­ ............................................ Schematic Diagram ­ CD CHANGER Section ­ ......... Printed Wiring Boards ­ AUDIO/VIDEO Section ­ ..... Schematic Diagram ­ AUDIO/VIDEO Section (1/3) ­ .................................. Schematic Diagram ­ AUDIO/VIDEO Section (2/3) ­ .................................. Schematic Diagram ­ AUDIO/VIDEO Section (3/3) ­ .................................. Printed Wiring Boards ­ MAIN Section ­ .................... Schematic Diagram ­ MAIN Section ­ ......................... Printed Wiring Boards ­ PANEL Section ­ .................. Schematic Diagram ­ PANEL Section ­ ....................... IC Pin Function Description ........................................... 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 32

7.
7-1. 7-2. 7-3. 7-4. 7-5.

EXPLODED VIEWS
Cover, Front Panel Section ............................................. Chassis Section ............................................................... CD Mechanism Deck Section-1 (CDM63B) .................. CD Mechanism Deck Section-2 (CDM63B) .................. Base Unit Section (BU-30BD61A) ................................ 41 42 43 44 45

8.

ELECTRICAL PARTS LIST ............................... 46

3

MCE-SV7 SECTION 1 SERVICING NOTES
This set is a component of the MHC-SV7AV. The MHC-SV7AV system configuration is as shown below, and therefore it does not operate normally unless all four components are connected. In performing the repair, connect all components with the system cables. Note: The precaution to the users is described on the label stuck on the back panel (Video CD player) and in the troubleshooting section in the Operation Manual. System Configuration:

CD-TEXT TEST DISC
This unit is able to display the test data (character information) written in the CD on its fluorescent indicator tube. The CD-TEXT TEST DISC (TGCS-313:4-989-366-01) is used for checking the display. To check, perform the following procedure. Checking Method: 1. Press the I/1 button to turn the power on, set the disc to the disc table with the "test disc" label facing up, and chuck the disc. 2. Press the [CD] button to set CD function, and press the N button to playback the disc. 3. The following will be displayed on the liquid crystal display. Display : 1KHZ/0DB/L R 4. Pressing the [-- .] or [> +] button, select the track. The text data of each track will be displayed. For details of the displayed contents for each track, refer to "Table 1 : CD-TEXT TEST DISC TEXT Data Contents". Restrictions in CD-TEXT Display In this unit, some special characters will not be displayed properly. These will be displayed as a space or a character resembling it. Table 1 : CD-TEXT TEST DISC TEXT Data Contents (TRACKS No. 1 to 20:Normal Characters) TRACK No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Displayed Contents 1kHz/0dB/L&R 20Hz/0dB/L&R 40Hz/0dB/L&R 100Hz/0dB/L&R 200Hz/0dB/L&R 500Hz/0dB/L&R 1kHz/0dB/L&R 5kHz/0dB/L&R 7kHz/0dB/L&R 10kHz/0dB/L&R 16kHz/0dB/L&R 18kHz/0dB/L&R 20kHz/0dB/L&R 1kHz/0dB/L&R 1kHz/­1dB/L&R 1kHz/­3dB/L&R 1kHz/­6dB/L&R 1kHz/­10dB/L&R 1kHz/­20dB/L&R 1kHz/­60dB/L&R

TA
POWER SUPPLY

AC IN

ST
MASTER & GRAPHIC µcon DISPLAY

MCE
HTC & VMP µcon

TC
TC µcon

Note: Track No. 21 to 99 are not displayed.

4

MCE-SV7 SECTION 2 GENERAL
Parts Identification
The items are arranged in alphabetical order. Refer to the pages indicated in parentheses ( ) for details.

This section is extracted from instruction manual.

Main unit
VIDEO CD/CD player
wk wle; ea es

Remote Control
1 2 345
CHECK qd (17) CLEAR qs (17, 19) CLOCK/TIMER SELECT 3 (26, 35) CLOCK/TIMER SET 2 (13, 25, 34) DBFB ej (27) DIGITAL r; (36, 40) DISPLAY rd (13, 18, 33, 40) D.SKIP 9 (14, 16, 20, 21) ENTER wf (11, 13, 15, 17, 21, 22, 25, 26, 30­33, 35) EQ wh (31) EQ ON/OFF wa (32) FILE SELECT +/­ wd (27, 28, 32) FUNCTION el (10, 14­17, 24, 25, 34, 36) GROOVE ek (27) KARAOKE PON qk (33) KEY CONTROL / ql (33) MD rs (36) Numeric buttons 8 (15, 16, 19, 20, 21) ON SCREEN wk (18) PICTURE EFFECT wl (21) PRESET ­/+, PREV/NEXT ea (14, 15, 20, 22) REPEAT q; (15, 16) RETURN O eg (15) PLAY MODE qa (14, 16, 17, 25) SELECT CD N es (14­17, 19, 21) SET UP w; (11, 13, 30, 32, 33) SLEEP 1 (34) SPECIAL MENU e; (19, 20, 21) SPECTRUM ANALYZER rf (33) SUR wj (30) TAPE A nN ef (23) TAPE B nN qf (23, 24) TUNER/BAND ed (22) TUNING ­/+ qh (22) TV CH +/­ 7 (10) TV VOL +/­ 6 (10) TV @/1 4 (10) TV/VIDEO rg (10) VIDEO ra (36) VOL +/­ ws

rf
m M . >

rg rd

6 7 8 9 q; qa qs qd qf qg qh qj qk ql w; wa ws
B v b

1

2

3

H

S

x

ed ef

rs

ra

el ej eg r; ek eh

DISC 1­3 rs (14, 16, 17, 25) DISC 1­3 indicators ra DISC 1­3 Z (eject) e; (14­16) NEXT ek (14, 15) PLAY MODE wk (14, 16, 17, 25) PREV r; (14, 15) REPEAT wl (15, 16) RETURN O eh (15) N SELECT (play) el (14­17, 19, 21, 34) X (pause) ej (14, 16) x (stop) eg (14­16, 19, 21, 24, 34) . (go back) ef (14­17, 21, 25) > (go forward) ed (14­17, 21, 25) m (rewind) ea (14, 16) M (fast forward) es (14, 16)

rs ra r; el ek ej eh eg ef ed es ea e; wl wk wj wh

O

nN

nN

x

.

>

m

M

X

V

wg

wd wf

BUTTON DESCRIPTIONS @/1 (power) 5 X (pause) qj x (stop) qg ./> (go back/go forward) ea m/M (rewind/fast forward) qh O/o/P/p wg >10 eh

5

MCE-SV7 SECTION 3 DISASSEMBLY
· This set can be disassembled in the order shown below.

3-1.

DISASSEMBLY FLOW

SET

3-2. COVER (Page 7)

3-3. CD MECHANISM DECK (CDM63B) (Page 7)

3-4. MAIN BOARD (Page 8)

3-5. FRONT PANEL SECTION (Page 8)

3-6. PANEL BOARD, SUB PANEL BOARD (Page 9)

3-7. LID (CD) (Page 9)

6

MCE-SV7

Note: Follow the disassembly procedure in the numerical order given.

3-2.

COVER

3 cover

2 screw (BVTT3 × 6)

1 two screws (case 3 TP2)

1 two screws (case 3 TP2)

3-3.

CD MECHANISM DECK (CDM63B)

4 CD mechanism deck (CDM63B)

2 connector (CN701)

3 four screws (BVTP3 × 8)

1 wire (flat type) (25 core) (CN501)

7

MCE-SV7

3-4.

MAIN BOARD
2 two connectors (CN101, 102)

5 MAIN board 1 wire (flat type) (13 core) (CN301)

2 connector (CN401)

3 screw (BVTP3 × 8) 3 two screws (BVTP3 × 8)

4 lug

2 connector (CN701)

3 screw (BVTP3 × 8)

3-5.

FRONT PANEL SECTION

1 connector (CN401)

3 claw 4 front panel section

3 two claws 2 three screws (BVTP3 × 8)

8

MCE-SV7

3-6.

PANEL BOARD, SUB PANEL BOARD

4 four screws (BVTP2.6 × 8) 6 SUB PANEL board

5 two claws 1 five screws (BVTP2.6 × 8)

3 PANEL board

2 two claws

3-7.

LID (CD)

2 bracket (LID) assy

1 screw (BVTP2.6 × 8)

4 spring (CD)

3 lid (CD)

9

MCE-SV7 SECTION 4 TEST MODE
Note: Use following buttons in the test mode. no mark : Button of video CD unit (MCE-SV7) *1 : Button of amplifier unit (TA-SV7AV) *2 : Button of tuner unit (ST-SV7)

[CD Delivery Mode] · This mode moves the optical pick-up to the position durable to vibration. Use this mode when returning the set to the customer after repair. Procedure: 1. Press the I/1 *1 button to turn the power on. 2. Turn the [FILE SELECT] *1 knob to set the CD function. 3. While pressing the [EQ ON/OFF] *1 button, press the I/1 *1 button. 4. The message "LOCK" is displayed on the fluorescent indicator tube of tuner unit and turn the power off automatically, and the CD delivery mode is set. [GC Test Mode] Enter the GC Test Mode Procedure 1: 1. Press the I/1 *1 button to turn the power on. 2. While pressing the both [PLAY MODE] and [x] buttons, press the [Z] (DISC 1) button. 3. LEDs and fluorescent indicator tube are all turned on of all units. Procedure 2: 1. Press the I/1 *1 button to turn the power on. 2. While pressing the both [STEREO/MONO] *2 and [CINEMA STUDIO C] *1 buttons, press the [CLOCK/TIMER] *2 button. 3. LEDs and fluorescent indicator tube are all turned on of all units. Version Display Mode Procedure: 1. Enter the GC test mode. 2. Each time the [DISC 1] or [TUNER MEMORY] *2 button is pressed, microcomputer or mechanism deck version is displayed of each unit. 3. Press the [DISC 3] or [TUNING +] *2 button to detail is displayed the version. Key Check Mode Procedure: 1. Enter the GC test mode. 2. Press the [DISC 2] or [TUNING --] *2 button to set the key check mode, and displays "K 0 J 0 V 0" on the fluorescent indicator tube of tuner unit. 3. All buttons are pressed of video CD unit, all LEDs are blinking of video CD unit. (not change the display of fluorescent indicator tube) Releasing the GC Test Mode To release from this mode, press three buttons in the same manner as entering this mode or disconnect the power cord.

[CD Service Mode] · This mode can run the CD sled motor optionally. Use this mode, for instance, when cleaning the optical pick-up. Procedure: 1. Press the I/1 *1 button to turn the power on. 2. Turn the [FILE SELECT] *1 knob to set the CD function. 3. While pressing the both [PLAY MODE] and [x] buttons, press the [.] button. 4. Set to the CD service mode. 5. With the CD in stop status, press the [M] button to move the optical pick-up to outside track, or press the [m ] button to inside track. 6. To release from this mode, perform as follows. 1) Move the optical pick-up to the most inside track. 2) Disconnect the power cord.
Notes: · Always move the optical pick-up to most inside track when releasing from this mode. Otherwise, a disc will not be unloaded. · Do not run the sled motor excessively, otherwise the gear can be chipped.

[CD Cancellation Mode of Repeat Limitation] · This mode can cancel the CD repeat limitation (5 times). Procedure: 1. Press the I/1 *1 button to turn the power on. 2. Turn the [FILE SELECT] *1 knob to set the CD function. 3. While pressing the both [PLAY MODE] and [x] buttons, press the [REPEAT] button. 4. CD repeat limitation is canceled. 5. To release this mode, disconnect the power cord.

10

MCE-SV7 SECTION 5 ELECTRICAL ADJUSTMENTS
CD SECTION
Note :

Note: Clear RF signal waveform means that the shape "" can be clearly distinguished at the center of the waveform.
RF signal waveform
VOLT/DIV : 200mV TIME/DIV : 500ns

Checking Location : [ BD BOARD ] -- SIDE B --

VIDEO SECTION Video Frequency Adjustment
Connection:
frequency counter VMP board TP (27MHz) TP (GND)

1. CD Block is basically designed to operate without adjustment. Therefore, check each item in order given. 2. Use YEDS-18 disc (3-702-101-01) unless otherwise indicated. 3. Use an oscilloscope with more than 10M impedance. 4. Clean the object lens by an applicator with neutral detergent when the signal level is low than specified value with the following checks. S-Curve Check

level : 1.1 ± 0.3Vp-p

R120

E-F Balance (1 Track jump) Check
Oscilloscope BD board
BD board oscilloscope

TP (FEI)

TP (DVC) TP (FEO) TP (TEO)

TP(FEO) TP(DVC)

TP (RFDC)
TP (TEO) TP (DVC) + ­

IC101

TP (XPCK)

IC103

Procedure : 1. Connect an oscilloscope to TP (FEO) and TP (DVC). 2. Connect between TP (FEI) and TP (VC) by lead wire. 3. Turn Power switch on. 4. Load the disc (YEDS-18) and actuate the focus search. (In consequence of open and close the disc tray, actuate the focus search) 5. Confirm that the oscilloscope waveform (S-curve) is symmetrical between A and B. And confirm peak to peak level within 4 ±1 Vp-p.
S-curve waveform symmetry

TP (RFAC)

Procedure: 1. Connect a frequency counter to TP (27MHz) and TP (GND). 2. Turn power switch on. 3. Turn the [FUNCTION] knob of amplifier unit (TA-SV7AV) to set the CD function. 4. Adjust CT503 on the VMP board so that the frequency counter reading 27.0 MHz ± 80 Hz at stop status. Adjustment Location:

Procedure: 1. Connect an oscilloscope to TP (TEO) and TP (DVC). 2. Turn Power switch on. 3. Load the disc (YEDS-18) and playback the number five track. 4. Press the X button. (Becomes the 1track jump mode.) 5. Confirm that the level B and A (DC voltage) on the oscilloscope waveform.
1 track jump waveform
Center of waveform B

[VMP BOARD] (SIDE A)
TP (VC)

J301

IC507

A within 4 ±1Vp-p B
0V A (DC voltage)

CN501
level=1.3 ±0.6Vp-p Symmetry

7. After check, remove the lead wire connected in step 2.
Note : · Try to measure several times to make sure than the ratio of A : B or B : A is more than 10 : 7. · Take sweep time as long as possible and light up the brightness to obtain best waveform.

TP (GND) CT503 Video Frequency Adjustment

Specification level: A x 100=less than ±22% B 6. After check, remove the lead wire connected in step 1.

TP (27MHz)

RF Level Check
oscilloscope BD board TP (RFAC) or TP(RFDC) TP(DVC)

RF PLL Free-run Frequency Check Procedure : 1. Connect a frequency counter to TP (XPCK) and GND.
BD board TP (XPCK) frequency counter

CN502
+ ­

Procedure : 1. Connect an oscilloscope to TP (RFAC) and TP (DVC). 2. Turn Power switch on. 3. Load the disc (YEDS-18) and playback. 4. Confirm that the oscilloscope waveform is clear and check RF signal level is correct or not. 5. Measure the RFDC in the same way.

2. 3. 4.

Turn Power switch on. Load the disc (YEDS-18) and playback the number five track. Confirm that the reading on frequency counter is 4.3218MHz.

11

11

MCE-SV7 SECTION 6 DIAGRAMS
6-1. BLOCK DIAGRAM ­ CD SERVO Section ­
FILTER 16 RF AMP, FOCUS/TRACKING ERROR AMP IC103 DIGITAL SIGNAL PROCESSOR IC101 (1/2)
C4M

69 XTSL XTAO CLOCK GENERATOR XTAI 72 71 MCLK 33.8MHz DATA, BCK, LRCK, C2PO

DETECTOR

CD +5V

53 55 52 54 12
FILO PCO CLTV FILI XPCK

A 6 B 7 8
I-V AMP

OSC BUFFER IC106 DATA BCK LRCK C2PO

A B

(Page 13)

A B C D

INTERNAL BUS

RF SUMMING AMP

AC SUM

4

3

EQ IN

RFAC VCA

EQ

RFAC

15

50 49

RFAC ASYI ASYO

ASYMMETRY CORRECTOR

DIGITAL PLL

EFM DEMODULATOR

FOCUS ERROR AMP

FE FEI

32K RAM ERROR CORRECTOR

D/A DIGITAL INTERFACE

16 17 28 29

48

PCMD BCK LRCK C2PO WDCK

66 67 65 14 17

(Page 13)

9

RF DC AMP 11 F E F I-V AMP E I-V AMP TRACKING ERROR AMP

RFDCO RFDCI

TO SERVO AUTO SEQUENCER

F E 10

SUBCODE PROCESSOR DIGITAL DOUT 64 OUT MD2 63 XRST 2 OPTICAL TRANSCEIVER IC102 CD +3.3V OPTICAL OUT TO ST-SV7

TE

18

DIGITAL CLV PROCESSOR
DATA CLOK XLAT MDP

CPU INTERFACE
MUTING WFCK XUGF GFS EMPH SBSO EXCK SQSO SQCK SCOR SENS

OPTICAL PICK-UP BLOCK (A-MAX. 3) LASER DIODE AUTOMATIC POWER CONTROL Q101 LD SW 12

25

4 6 5

7

15 79 80 76 77

10 11 13 68

3

SENSE

DSP MUTING

SCOR

SUBQ DATA

DSP DATA DSP CLK DSP LATCH

SUBQ CLK

1

APC LD AMP

PD

2 82 LD ON

95 5 97

1

18

84 83

10 CTRL1 11

PD

LD

FOCUS/TRACKING COIL DRIVE, SPINDLE/SLED MOTOR DRIVE IC102 VO4+ VO4­ MOTOR DRIVE IN4R 24

SENSE CLK

28 PWM1 26 PWM2 24 PWM3

VIDEO CD CONTROLLER IC502 (1/2)

DEVICE RESET 77 M-RESET

XRESET 12

C

(Page 14)

2 M101 (SPINDLE) 5 10

M

40 41 39 43 DIGITAL SERVO PROCESSOR IC101 (2/2) M102 (SLED)
SE TE FE RFDC

M

1 2

VO3+ VO3­ MOTOR DRIVE

IN3+ IN3­

27 26

A/D CONVERTER

2-AXIS DEVICE 55
(FOCUS) (TRACKING)

30 VO2+ VO2­ COIL DRIVE IN2+ IN2­ 32 31 31 32 33 34 47 52 VO1+ VO1­ COIL DRIVE STBY 8 IN1+ IN1­ 35 34

SRDR TFDR TRDR FFDR FRDR

FOCUS/TRACKING/SLED PWM GENERATOR

29

SFDR

FOCUS/ TRACKING/SLED SERVO DSP

MIRR, DFCT, FOK DETECTOR

FOK 22 MIRR 20 DFCT 21 COUT

56

SERVO INTERFACE

19 8

SCLK

SERVO AUTO SEQUENCER
SSTP

TO CPU INTERFACE

26 LIMIT SWITCH

· SIGNAL PATH : CD PLAY (ANALOG OUT) : CD PLAY (DIGITAL OUT)

12

12

MCE-SV7

6-2.

BLOCK DIAGRAM ­ AUDIO/VIDEO Section ­
DIGITAL FILTER, D/A CONVERTER IC509 CN102 (1/2) MPEG VIDEO/AUDIO DECODER, VIDEO SIGNAL PROCESSOR IC505 MPEG AUDIO DECODER AUDIO INTERFACE CIRCUIT DA-DATA 110 DA-BCK 111 DA-LRCK 108 DATA 18 BCK 17 LRCK 19 INPUT INTERFACE CIRCUIT DIGITAL FILTER, NOISE SHAPER CIRCUIT VOUTL D/A CONVERTER LOW-PASS FILER VOUTR 14 11 1 LOW-PASS FILER IC101 3 VCD R-IN VCD L-IN SYSTEM CONTROL 3 TO ST-SV7

A

MCLK 33.8MHz

(Page 12)

DA-XCLK DATA, BCK, LRCK, C2PO

86

B

(Page 12)

DATA BCK LRCK

LEVEL SHIFT IC501

CD-DATA 4 CD-BCK 3 CD-LRCK 5

OSC BUFFER IC504

20

384FSO

XT1

RSTB

XT2

MD

MC ML

CD-ROM INTERFACE CIRCUIT

MPEG SYSTEM DECODER

4

MCKO TIMING CONTROL/ CLOCK GENERATOR

MPEG VIDEO DECODER

VIDEO PROCESS CIRCUIT

Y-OUT C-OUT VCK-IN VSYNC/CSYNC HSYNC

MODE CONTROL

69 75 106 93 101 CT503 VIDEO FREQUENCY

C2PO

6

CD-C2PO

· SIGNAL PATH : CD PLAY (AUDIO) : CD PLAY (VIDEO)

24

1

9 8 7

10

D-RAM/ROM INTERFACE

CPU INTERFACE

X503 27MHz

MA0 ­ MA10 58 ­ 56, 54, 52 ­ 50, 48, 46 ­ 44

MD0 ­ MD15 10 ­ 15, 17, 19, 21, 23 ­ 29

37 38 42 40

60

D0 ­ D15

A0 ­ A10

HRDY HINT HSEL HD-OUT HD-IN HCK
113 114 121 112 119 117

MCE MWE RAS0 CAS

RESET

BUFFER Q501 DATA CLK

BUFFER Q502

ADDRESS BUS

DATA BUS

D0 ­ D15

D8 ­ D14

A0 ­ A10

D0 ­ D7

A0 ­ A8

Y AMP IC303

Y/C DECODER IC304

16 ­ 19, 22 ­ 26 A0 ­ A8

2 ­ 5, 7 ­ 10, 31 ­ 34, 36 ­ 39 DQ1 ­ DQ16

12 ­ 5, 27, 26, 23 A0 ­ A10 PROGRAM ROM IC510

13 ­ 15, 17 ­ 21 O0 ­ O7

25, 4, 28, 29, 3, 2, 30 A11 ­ A17 B.P.F. 10 VIN VOUT 1 CONT 5 2 Y IN Y OUT1 15 Y OUT2 14 2 4 C AMP IC302 3 1 J801 S VIDEO OUT

UCAS LCAS RAS WE

D-RAM IC507

28 29 14 13

22

CE

B.P.F.

1

VIN

VOUT 6

7

C IN

C OUT 9 J802 VIDEO OUT

TINT

BGP

86

85 20 87 36 35 37

21

45

88

66

3

8

5

CL680 RESET

CL680 HRDY CL680 HINT CL680 SEL

DATAI DATAO CLK1

H. SYNC IN

VSYNC

DAC RESET

DF LATCH

RESOLUTION

MIX OUT1 12 MIX OUT2 11

13 XOUT X501 10MHz 15 XIN

Q301 BGP 22

VIDEO CD CONTROLLER IC502 (2/2) IIC-DATA, IIC-CLK

V. MUTING 65

D
(Page 14)

IIC-DATA IIC-CLK

30 I2C_DATA 29 I2C_CLK

13

13

MUTE A MUTE B
1 8

CHOMA LEVEL

4

MCE-SV7

6-3.

BLOCK DIAGRAM ­ MAIN Section ­

SYSTEM CONTROLLER IC401 CN103 S701 ­ 708, S711 ­ 720
KEY0, KEY1 97, 95

EXP-OUT DATA EXP-IN DATA EXP-CLK EXP-LAT

85 84 87 86

DATA-OUT DATA-IN CLK LAT KEY2

DATA-OUT DATA-IN CLK LAT KEY2

10 DATA-OUT 9 8 7 6 4 5 11 12 13 14 3 ATRIG BTRIG REC/PB/PAS ASHUT BSHUT BHALF UNREG CN102 (2/2) 7 UNREG (TC) DATA-IN CLK LAT KEY2 SYSTEM CONTROL 5 FROM TC-S3

KEY2 (TC) 94 A-TRIG B-TRIG R/PB/PASS A-SHUT B-SHUT B-HALF 55 53 59 89 90 91

D701 ­ 705

LED_DISC1 LED_DISC2 LED_DISC3 LED_PLAY LED_PAUSE

ATRIG BTRIG REC/PB/PAS ASHUT BSHUT BHALF

65 ­ 83, 88

ATRIG BTRIG REC/PB/PAS ASHUT BSHUT

13 X-OUT X401 16MHz 15 X-IN D512
T-SENS1 ­ TSENS3

BHALF

EVER+5V D513 D514 D+5V CN101 A+5V (SW) B+ SWITCH Q501, 502 D511 5 EVER +5V +5.7V REGULATOR IC502

SUB TRAY1 ­ 3 HEIGHT SENSOR IC731 ­ 733

DISC IN DETECT IC751

Q701 52 DISC-SENS

48 ­ 50

OPT B+ ON: WHEN SUB TRAY SLIDES OUT OF THE CHUCKING POSITION S741 (IN) 47 CLOSE S742 (OUT) 46 OPEN CD +3.3V LOADING MOTOR DRIVE IC701 M721 (LOADING) VIDEO +3.3V +3.3V REGULATOR Q531 +3.3V REGULATOR Q301

ON: WHEN SUB TRAY IS CHUCKING POSITION

SYSTEM CONTROL 3 TO ST-SV7 +5V REGULATOR IC501

M

4 OUT1 2 OUT2

FIN 7 RIN 9

45 LOAD-OUT 44 LOAD-IN CD POWER 38

D+5V (SW)

M+7V

+7V REGULATOR IC503

8 RECT D501 ­ 504 9

AC AC

IIC-DATA 30 IIC-CLK 29 D105 RESET 12
IIC-DATA

2 BUFFER IC504 1

4

MRESET

IIC-CLK

IIC-DATA, IIC-CLK

D C

(Page 13)

M-RESET

(Page 12)

14

14

MCE-SV7

6-4.

NOTE FOR PRINTED WIRING BOARDS AND SCHEMATIC DIAGRAMS (In addition to this, the necessary note is printed in each block)
Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. f · : internal component. · C : panel designation. Note: The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified. · A : B+ Line. · H : adjustment for repair. · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. · Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. · Circled numbers refer to waveforms. · Signal path. J : CD PLAY (ANALOG) c : CD PLAY (DIGITAL) g : VIDEO

· Circuit Boards Location

Note on Printed Wiring Boards: · X : parts extracted from the component side. · Y : parts extracted from the conductor side. f : internal component. · · : Pattern from the side which enables seeing. (The other layers' patterns are not indicated.) Caution: Pattern face side: (Side B) Parts face side: (Side A)

VIDEO board VMP board REG board

Parts on the pattern face side seen from the pattern face are indicated. Parts on the parts face side seen from the parts face are indicated.

· Indication of transistor.
C Q B E These are omitted.

SUB PANEL board MAIN board

Q B C E These are omitted.

PANEL board

TRAY SENSOR board IN OUT SW board

BD board

DRIVER board

MOTOR board DISC SENSOR board

15

15

MCE-SV7

6-5.

PRINTED WIRING BOARD ­ BD Section ­

· See page 15 for Circuit Boards Location.

1

2

3

4

5

6

7

8

9

10

11

12

13

A

B
IC102

C

TP (DVC) TP (FEI) TP (FEO)

D

IC104 TP (TEO)

TP (RFAC)

TP (RFDC)

IC101
TP (XPCK)

E

IC103

A
VMP BOARD CN501

(Page 20)

F

TP (VC)

G
· Semiconductor Location

IC106
(A-MAX.3)

H

Ref. No. D101 IC101 IC102 IC103 IC106 Q101 Q103

Location F-10 E-10 B-11 E-8 H-11 F-8 G-10

There are a few cases that the part printed on this diagram isn't mounted in this model.

16

16

25

MCE-SV7

6-6.

SCHEMATIC DIAGRAM ­ BD Section ­

· See page 28 for Waveforms. · See page 29 for IC Block Diagrams.

TP (RFAC)

TP (FEI)

IC 106
OSC BUFFER TP (TEO) 3.2 TP (FEO) TP (DVC)

TP (RFDC) Q101 2SB710A TP (VC)

RF AMP, FOCUS/TRACKING ERROR AMP Q101 AUTOMATIC POWER CONTROL

FOCUS/TRACKING COIL DRIVE, SPINDLE/SLED MOTOR DRIVE DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR IC101 CXD3068Q Q103 2SD1664 +3.3V REGULATOR

A
VMP BOARD (1/3) CN501

(Page 21)

TP (XPCK)

M102 (SLED)

M101 (SPINDLE)

The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified.

17

17

MCE-SV7

6-7.

PRINTED WIRING BOARDS ­ CD CHANGER Section ­

· See page 15 for Circuit Boards Location.

1

5

C
MAIN BOARD NO202

(Page 24)

18

18

MCE-SV7
Ver 1.1 6-8. SCHEMATIC DIAGRAM ­ CD CHANGER Section ­ · See page 29 for IC Block Diagram.

RPI-321

IC731 SUB TRAY1 HEIGHT SENSOR

RPI-321

IC732 SUB TRAY2 HEIGHT SENSOR

RPI-321

IC733 SUB TRAY3 HEIGHT SENSOR

C
MAIN BOARD NO202

(Page 25)

IC751 DISC IN DETECT

· Voltages and waveforms are dc with respect to ground under no-signal conditions. no mark : CD STOP

19

19

MCE-SV7

6-9.

PRINTED WIRING BOARDS ­ AUDIO/VIDEO Section ­

· See page 15 for Circuit Boards Location.

1

2

3

4

5

6

7

8

9

10

11

VIDEO BOARD
A

VMP BOARD (SIDE A)
1 14

VMP BOARD (SIDE B)
IC303

1 NO801

5 J801 S VIDEO OUT CN302 1 5 7

8 1

IC304
16

B

1 3 4 2
JW506

IC302
8 9

C801 CLP801

(CHASSIS) E E

C

(CHASSIS) VIDEO OUT

IC507

J802

IC510

C579

C802

(CHASSIS)

IC505
24 25

1-680-998-

D

12 (22)

IC501

A
E
BD BOARD CN101

TP (GND)

(Page 16)
TP (27MHz)

IC509

IC504
2 1

30 31

1 100

IC502

F

· Semiconductor Location
Ref. No. D501 IC101 IC302 IC303 IC304 IC501 IC502 IC504 IC505 IC507 IC509 IC510 Q301 Q501 Q502 Q531 Location C-11 F-6 B-11 A-6 B-9 D-10 F-10 E-5 D-5 C-6 F-6 D-8 C-11 C-4 C-3 C-11
50 51 80 81

IC101
(FOR WRITE FLASH)

G

H

B
MAIN BOARD CN301

(Page 24)

20

20

MCE-SV7

6-10. SCHEMATIC DIAGRAM ­ AUDIO/VIDEO Section (1/3) ­

· See page 28 for Waveform.

VMP

LEVEL SHIFT

CL680 RESET

VIDEO CD CONTROLLER IC502 M30622MGA-A59FP

A
BD BOARD CN101

(Page 17)

CL680 HINT

3
VMP BOARD (3/3)

B
MAIN BOARD CN301

(Page 23)

(Page 25)

1
VMP BOARD (2/3)

2
VMP BOARD (3/3)

(Page 22)

(Page 23)

21

21

MCE-SV7
6-11. SCHEMATIC DIAGRAM ­ AUDIO/VIDEO Section (2/3) ­ · See page 28 for Waveforms.

1
VMP BOARD (1/3)

(Page 21)

VMP

4
Q502 DTC114EKAT146 BUFFER VMP BOARD (3/3)

(Page 23)

D-RAM

Q531 2SD999-T1CLCK +3.3V REGULATOR

Q501 DTC114EKAT146 BUFFER

VIDEO SIGNAL PROCESSOR MPEG VIDEO/AUDIO DECODER

IC510 LC372100PM -K98-TLA PROGRAM ROM NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND VCC NC A17 A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3

0.3

4.9 4.9

5
VMP BOARD (3/3)

(Page 23)

22

22

6-12. SCHEMATIC DIAGRAM ­ AUDIO/VIDEO Section (3/3) ­

· See page 28 for Waveforms.

· See page 29 for IC Block Diagrams.

MCE-SV7

VMP
CN302 5P

VIDEO
V NO801 5P Y
4 2

J802 VIDEO OUT

J801 S VIDEO OUT
3 1

C CLP801 (CHASSIS) (CHASSIS) (CHASSIS)

C801 0.1 C802 0.1

CT503

Q301 DTC114EK INVERTER

VIDEO FREQUENCY

C AMP Y AMP

JW501 0

L504 0

TP (GND)

2
VMP BOARD (1/3) TP (27MHz)

(Page 21)

OSC BUFFER

3
VMP BOARD (1/3)

4
VMP BOARD (2/3)

5
VMP BOARD (2/3)

(Page 22)

(Page 21)

(Page 22)

23

23

MCE-SV7

6-13. PRINTED WIRING BOARDS ­ MAIN Section ­

· See page 15 for Circuit Boards Location.

1

2
B

3
(Page 20)
VMP BOARD CN502

4

5

6
(Page 18)

7
C
DRIVER BOARD CN701

8
SYSTEM CONTROL 3 TO ST-SV7

9

10

A

MAIN BOARD
C357 C359 FB305 R357

JW158

1

12

JW137

FB314
1 12

C117

JW141

JW139

VCD403

JW138 FB315 NO202 R484 R486

IC503
C532
3

R359

VCD413

VCD412

JW175

FB311 FB312

FB310

C304

13 C312

CN301

JW143

JW140

JW142

JW178

CLP102
(CHASSIS)

C303

VCD411

JW154

JW108

JW112

JW111

JW110

JW109

C523

1

JW172

R440

JW151

R437

C311

JW132

JW130

C531 VCD101

8

CN102

JW135

FB313
9

VCD402

C255

C260

JW160

JW107

R436 C310 C306

R430

JW103

B

R429

C261

D514 D123

JW102

R419

1 2

C251

R485

R487

VCD401

JW161

CN103
SYSTEM CONTROL 5 TO TC-S3

JW159

JW155 JW156 JW157 JW165

C411

JW120

JW127

JW126

R432 R438 R443 C462 R413

JW113

JW136 R411 C425

JW114

JW134 JW133 C427 R122 JW123

JW129

JW163

JW128

JW125

R417

D513

C524 C522

C501

R435

JW153

FB304

JW145

JW144

C416 X401

R433
1

JW124 C541

IC502
15 3

14

C513

Q501

JW164

JW162

C

CN401

R425 JW171

R441 R442

FB410 R456

R445 R453 C499

R427 R482 R412 R491

R121
4

5

R501

R460

+
C540
E Q502

R409

C521
1 E D511

C498

1 1 8

R465 R469 R473 R477 R457 R447 R450 R444 R448 JW148 R451 R500 R492 C463 R497 R483

R494 R489 C400 R490

D503

D502

JW100

IC401

R134

IC504
R542

NO501

L125 R123 C125 CN101 D504 C122 C124
3

JW104

JW131
9

JW169

JW168

JW167

JW177

JW176

R481

JW170

JW149

JW150

JW146 R480 R493 R495 R496

JW119 JW118

D512

JW147

FB416 R132 R133

5

IC102
OPTICAL OUT TO ST-SV7

C512 C500 C103 D105 C107
1

D501

1

R452

R446

R449

R459

+
C399

JW117 JW116

R541

JW115

D

C102

C101

CLP101
12 1-680-994(22)

D

PANEL BOARD NO703

REG BOARD IC501
CN502
1 5 2 4

(Page 26)

E

C525

C526

12 1-680-997(22)

· Semiconductor Location
Ref. No. D103 D104 D105 D123 D501 D502 D503 D504 D511 D512 D513 D514 Location D-9 D-9 D-7 B-8 D-9 D-9 D-9 D-9 C-8 D-7 B-8 B-8 Ref. No. IC102 IC401 IC501 IC502 IC503 IC504 Q501 Q502 Location D-10 C-4 E-9 C-8 B-8 C-7 C-8 C-8

24

24

MCE-SV7
6-14. SCHEMATIC DIAGRAM ­ MAIN Section ­ · See page 28 for Waveform.

OPTICAL OUT TO ST-SV7

GND

+3.3V

SIG

CN301 13P I2C.DATA I2C.CLK D+5V(UNSW) D+5V(SW) D.OUT D.GND LCH A.GND RCH A+5V(SW) JW313 C311 0.01 C312 0.022 VCD411 FB312 0µH 12 C310 0.022 C303 0.01 C304 0.022 VCD401 VCD402 VCD403 FB310 0µH FB304 0µH FB305 0µH 30 29

IC102 TOTX140

C122 0.022

C103 0.022 C102 0.1 C101 0.1

CLP102

C125 220 10V C124 0.1 R123 100

OPTICAL TRANSCEIVER L125 220µH D123 MTZA-2.2A D503 21DQ04 C501 4700 16V D504 21DQ04 D502 21DQ04 D501 21DQ04

(CHASSIS)

CN101 9P C500 0.1 AC AC HESO-GND HESO-GND EVER+5V SYSTEM CONTROL 3 TO ST-SV7

FB410 0µH Q501 RT1P137S

D511 11ES2

Q501,502 B+ SWITCH

(Page 21)

XRST MG(+7) M+7V

D512 11ES2 D105 1SS133 D513 11ES2 +5.6V REGULATOR BUFFER O G C524 220 10V C523 220 10V D514 11ES2 C522 470 10V I IC504 BA8274K NC LX SX VCC R541 10k R542 10k C107 J W

MRESET TP107 V-MUTE I2C-DATA I2C-CLK

Q502 BA1A4M C306 0.022 JW311

VCD413

VCD412

C513 470 10V

IC502 TA78057S

C521 0.1

CN102 8P DGND(TC)

LY SY

VCD101 UNREG(TC) MGND(TC)

JW315 FB314 0µH C532 470 10V NO202 12P DISC-SENS IN-SW OUT-SW TRAYSENS3 TRAYSENS2 TRAYSENS1 DGND D+5V C255 0.022 45 44 C399 100 10V C463 10 50V C261 0.022 C260 0.022 52 47 46 50 49 C359 10 50V R359 100 C512 470 10V C117 0.022 +7V REGULATOR O G IC503 BA07T C531 0.1 R121 100 C541 0.1 C540 100 10V I GND NC

MGND(TC) R122 100 SHASSIS GND VCD R-IN AGND(CD) VCD L-IN

29

38

(Page 19)

LOD-POS LOD-NEG MGND M+7V C251 0.022

C400 0.1

51

53

52

59

30

12

48

FB416 0 H

C357 R357 10 50V 100

R453 100

R452 100

R500 10k

R460 10k

R459 100

R451 100

65

69

73

77

TP461

TP457

TP463

TP458

TP460

TP456

R132 75k R457 10k R456 10k

R134 1k

C462 0.022

R133 75k

CN103 15P DGND

C401 0.022

91 90

BHALF BSHUT ASHUT REC/PB/PAS DATA-OUT DATA-IN SYSTEM CONTROL 5 CLK LAT KEY2 BTRIG ATRIG UNREG TO TC-S3

SOFT-TEST

PLAY

VSS

LED_PLAY

LED_PLAY

LED_DISC2

LED_DISC2

LED_DISC2

LED_DISC2

R/PB/PAS

VCC

LED_DISC1

LED_DISC1

LED_DISC1

LED_DISC1

LED_DISC3

LED_DISC3

LED_DISC3

LED_DISC3

ECO CHECK

LED_ PLAY 81

DISC-SENS

LED_

A-TRIG

B-TRIG

89 59 R450 100 T-SENS3 R449 100 T-SENS2 R448 100 48 87 R447 100 47 86 R446 100 46 94 R445 100 45 53 R444 100 44 51 R443 100 43 42 R442 100 T-SENS1 CLOSE OPEN LOAD-OUT LOAD-IN XRST XLT R441 10k 49 84 50 85

LED_PAUSE LED_PAUSE R484 100 R485 100 EXP-OUT DATA 86 87 R486 100 EXP-LAT R487 100 EXP-CLK 89 90 91 R489 100 R490 100 B-SHUT R491 100 B-HALF R493 330 R492 4.7k R482 10k 94 95 R494 100 KEY2(TC) R495 100 KEY1(CD) R483 10k 97 R497 100 KEY0(CD) VREF R496 10k AVSS TP493 KEY3 MODEL-IN LED_PAUSE A-SHUT R480 100k LED_PAUSE EXP-IN DATA 85

84

MGND SGND

SYSTEM CONTROLLER IC401 M30620MAA-B31FP

R440 100 HOLD TP439 R438 100 CD POWER CD-CLK SENS CD-DATA RTS1 SQ-CLK

40

38

BU PWM 3

BU PWM 1

BU PWM 2

AVCC

SQ-

CNVSS

RESET

X-OUT

SCOR

BYTE

X-IN

VCC

VSS

97

TP411

R429 100

CN401 9P

IIC-

C499 0.022

NMI

DATA

C498 0.022

IIC-CLK

TP500

DATA-IN

TP422

TP421

TP427

TP404

TP423

TP402

TP420

TP425

TP401

TP418

OUT

GND

NC

R413 330

C425 100p R430 100 R425 4.7k R427 4.7k C427 100p

IC501 BA05ST

R477 150 R473 150 R469 150

77 73 69 65 R409 10k

R411 100

X401 16MHz

R481 150

81

R417 10k

12

29

(Page 27)

R465 150

30

NO501 5P C411 1 50V C416 10 50V

CN502 5P C526 100 10V C525 100 10V

R412 10k

R501 100

25

25

· Voltages and waveforms are dc with respect to ground under no-signal conditions. no mark : CD PLAY

IN

95

TP407

TP403

TP405

TP406

SW

+5V REGULATOR

MCE-SV7

6-15. PRINTED WIRING BOARDS ­ PANEL Section ­

· See page 15 for Circuit Boards Location.

(Page 24)

D
PANEL BOARD
9

MAIN BOARD CN401

SUB PANEL BOARD
1 NO703 R712 R711 R710
m REPEAT S707 PLAY MODE

S712
M

S711

S708

R706
> . Z (DISC 3) Z (DISC 2) Z (DISC 1)

R707 R704

R705

S713

S714

S706 R713 D701 D702 D702, S717 R715
N

S705

S704

D703

D704

D705

1 2

NO701
1 2
DISC 3 DISC 2 DISC 1

NO702

3

2

1

R700

S701

R701

S702

R702

S703

R703

S715 x

S716 R714 D701, S716
X

R716

S717

R717

S718 RETURN

S720 NEXT

R718

S719 PREV

R719
12 1-680-995(22) 1-680-99612 (22)

26

26

MCE-SV7

6-16. SCHEMATIC DIAGRAM ­ PANEL Section ­

R707 1.8k

R706 1.2k

R705 1k

R704 680

R703 560

R702 470

R701 330

R700 270

S708

S707

S706

S705

S704

S703

S702

S701

CN701 2P

PLAY MODE

REPEAT (DISC 3) (DISC 2) (DISC 1)

DISC 1

DISC 2

DISC 3

R716 1.2k

R715 1k

R714 680

R713 560

R712 470

R711 330

R710 270

S717

S716

S715

S714

S713

S712

S711

CN702 2P

R717 1.8k

R718 2.7k

R719 3.3k CNW703 9P

S718 RETURN

S719 PREV

S720 NEXT

D701 SEL5923A

(Page 25)
D702 SEL5423E

D703 SEL5923A

D704 SEL5923A

D705 SEL5923A

27

27

MCE-SV7
· Waveforms ­ BD Board ­
1 IC101 t; (RFAC) (CD Play mode)

­ VMP Board ­
1 IC502 qd (XOUT) 6 IC505 (DA-LRCK) qa J801 4 (YOUT)

­ MAIN Board ­
qa IC401 qd (X-OUT)

1.3 Vp-p

4.6 Vp-p

4.5 Vp-p

2.0 Vp-p

2.6 Vp-p

10 MHz
2 IC101 ra (TE) (CD Play mode) 2 IC505 ih (DA-XCLK)

H
22.7 µs
7 IC505 (DA-BCK) qs J801 3 (COUT)

63 ns

Approx. 0.5 Vp-p

3.6 Vp-p

4.5 Vp-p

2.0 Vp-p

17 MHz
3 IC101 el (FE) (CD Play mode) 3 IC505 od (VSYNC)

H

472 ns
8 IC509 w; (384FSO) qd J802 (VIDEO OUT)

Approx. 0.4 Vp-p
3.5 Vp-p

5.0 Vp-p

1.3 Vp-p

H
20 ms
4 IC101 wh (MDP) 4 IC505 (HSYNC)

59 ns
9 IC509 wf (XT2)

2.3 Vp-p
2.0 Vp-p
3.2 Vp-p

7.5 µs

64 µs
5 IC505 (VCK-IN)

37 ns
0 IC509 4 (MCKO)

5.4 Vp-p

5.2 Vp-p

37 ns

37 ns

28

28

MCE-SV7

· IC Block Diagrams ­ BD Board ­ IC101 CXD3068Q
BIAS AVDD1 PCO FILI FILO CLTV AVDD0 IGEN AVSS0 ADIO RFDC CE TE 47 46 45 44 43 42 41 OPERATIONAL AMPLIFIER & ANALOG SWITCH A/D CONVERTER AVSS1 RFAC ASYI ASYO 51 50 49 48 ASYMMETRY CORRECTOR V16M VPCO VCTL

60

59 58

57 56 55 54 53 52

DVDD2 61 ASYE 62 MD2 63 DOUT 64 DIGITAL OUT

OSC DIGITAL PLL

LRCK 65 PCMD 66 BCK 67

D/A DIGITAL INTERFACE

EFM DEMODULATOR

32K RAM

ERROR CORRECTOR

EMPH XTSL DVSS2 XTAI XTAO

68 69 70 71 72

CLOCK GENERATOR SUBCODE PROCESSOR

FOCUS SERVO DSP TRACKING SERVO DSP SLED SERVO DSP

FOCUS PWM GENERATOR TRACKING PWM GENERATOR SLED PWM GENERATOR

40 39 38 37 36 35 34

SE TE VC TES1 TEST1 DVSS1 FRDR

33 FFDR 32 TRDR 31 TFDR 30 SRDR 29 SFDR

SOUT 73 SOCK 74 XOLT 75

SERVO INTERFACE DIGITAL CLV PROCESSOR

28 DVDD1 27 FSTO 26 SSTP 25 MDP 24 LOCK 23 PWMI

SERVO AUTO SEQUENCER SQSO SQCK SCSY SBSO EXCK 76 77 78 79 80

CPU INTERFACE

MIRR, DFCT, FOK DETECTOR

22 FOK 21 DFCT

1 DVDD0

2 XRST

3 MUTE

4 DATA

5 XLAT

6 CLOK

7 SENS

8 9 10 11 12 13 14 15 16 17 18 19 20 SCLK ATSK WFCK XUGF XPCK GFS C2PO SCOR C4M WDCK DVSS0 COUT MIRR

29

MCE-SV7

­ DRIVER Board ­ IC103 CXA2581N-T4
RW/ROM

IC701

BA6956AN

TSD
A B C D DVC DVC VCC 30 DC OFST 29 RFDCI + ­ VC VC + ­ DVC VOFST RW/ROM 27 VC EQ PD 2 APC AMP RFAC VCA VCC B C A A A B C D 6 7 8 9 A B C D B C D D DVC VC RW/ROM RW/ROM 19 TE BAL VOFST + ­ + ­ VC SW 12 DVCC 13 B DVC DVC 14 D A C DVC VC RW/ROM RFAC 15 VOFST + ­ + ­ 17 FEI APC-OFF (Hi-Z) RW/ROM (H/L) RW/ROM RW/ROM + ­ EQ ON/OFF EQ IN 3 RW/ROM AC SUM 4 RFAC SUMMING AMP 23 RFG 22 VCC 21 CEI + ­ 28 RFDCO

CONTROL LOGIC

1
VREF

2
OUT2

3
RNF

4
OUT1

5
VM

6
VCC

7
FIN

8
GND

9
RIN

VC LD 1 26 RFC 25 VFC 24 BST

GND

5

20 CE

E 10

GM 18 TE

F 11

GM

16 FE

30

MCE-SV7

­ VMP Board ­ IC302
TINT

NJM2255M (TE2)
V OUT GND BGP

IC303

NJM2209M (TE2)
FREQUENCY CHARACTERISTIC COMPENSATION
8 CLAMP

PHASE DELAY

8

7

6

5

VIDEO INPUT

GND

N.C

N.C



SATURATION ADJUST (COLOR BURST)

14

13

12

11

10

HUE ADJUST SATURATION ADJUST ­X (COLOR BURST)

LPF SECONDARY DIFFERENTIATION GAIN ADJ LOWER LIMITER (1)

N.C
9

(SYNC) CHIP

1
V IN

2
COLOR OFFSET

3
COLOR

4
V+

LOWER LIMITER (2) 1 2 3

SWITCH CONTROL

4

5

6

7

DIFFERENTIATION INPUT

IC304

BA7665FS-E2
MUTE

IC509

PCM1727E-2/T2
384fs

MUTEA

1

16 VCC1
XT1 1 CLOCK MANAGER · DUAL PLL 24 XT2

INA

2

6dB

75

15 OUTA1

DIFFERENTIATION OUTPUT
23 22 21 20 DGND VDD SCKO1 SCKO2 19 LRCK 18 DATA 17 BCK 16 ZERO 15 CAP 14 VOUTL 13 VCA

CONTROL

VIDEO OUTPUT

N.C

GND

3

14 OUTA2

PGND 2 VCP 3

POWER SUPPLY

GND

4

13 VCC2

GND

5

6dB

75

12 MIXOUT1

MCKO 4 RSV 5 SCKO3 6 ML MC MD RSTB 7 8 9 10

AUDIO DATA INPUT INTERFACE MODE CONTROL

N.C.

6 20k

11 MIXOUT2

INB

7

6dB

75

10 N.C.

MUTEB

8

CHROMA MUTE

9

OUTB

8 TIME OVER SAMPLING DIGITAL FILTER · FUNCTION CONTROL

BPZ CONTROL

MULTI LEVEL MODULATOR

MULTI LEVEL MODULATOR

5 LEVEL DAC CR LPF · OUTPUT AMP

5 LEVEL DAC CR LPF · OUTPUT AMP

VOUTR 11

AGND 12

N.C
OPEN

V+

31

MCE-SV7

6-17.

IC PIN FUNCTION DESCRIPTION

· BD BOARD IC101 CXD3068Q (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Pin Name DVDD0 XRST MUTING DATA XLAT CLOK SENS SCLK ATSK WFCK XUGF XPCK GFS C2PO SCOR C4M WDCK DVSS0 COUT MIRR DFCT FOK PWMI LOCK MDP SSTP FSTO DVDD1 SFDR SRDR TFDR TRDR FFDR FRDR DVSS1 TEST TES1 VC FE SE TE CE RFDC ADIO I/O -- I I I I I O I I/O O O O O O O O O -- O O I/O O I O O I O -- O O O O O O -- I I I I I I I I O Description Power supply terminal (+3.3V) (digital system) Reset signal input from the video CD controller (IC502) "L": reset Muting on/off control signal input from the video CD controller (IC502) "H": muting on Serial data input from the video CD controller (IC502) Serial data latch pulse signal input from the video CD controller (IC502) Serial data transfer clock signal input from the video CD controller (IC502) Internal status (SENSE) signal output to the video CD controller (IC502) SENSE serial data reading clock signal input from the video CD controller (IC502) Input/output terminal for anti-shock Not used (pull down) Write frame clock signal output terminal Not used (open) RFCK signal output terminal Not used (open) XPCK signal output terminal Not used (open) Guard frame sync signal output terminal Not used (open) C2 pointer signal output to the CL680T (IC505) Subcode sync (S0+S1) detection signal output to the video CD controller (IC502) 4.2336 MHz clock signal output terminal Not used (open) Guard subcode sync (S0+S1) detection signal output terminal Not used (open) Ground terminal (digital system) Numbers of track counted signal output terminal Not used (open) Mirror signal output terminal Not used (open) Defect signal input/output terminal Not used (open) Focus OK signal output terminal Not used (open) Spindle motor external control signal input terminal Not used (fixed at "L") GFS is sampled by 460 Hz "H" output when GFS is "H" Spindle motor (M3) servo drive signal output to the AN41020A (IC102) Detection signal input from limit in switch of the optical pick-up block The optical pick-up is inner position when "H" 2/3 divider output terminal Not used (open) Power supply terminal (+3.3V) (digital system) Sled servo drive PWM signal (+) output to the AN41020A (IC102) Sled servo drive PWM signal (­) output to the AN41020A (IC102) Tracking servo drive PWM signal (+) output to the AN41020A (IC102) Tracking servo drive PWM signal (­) output to the AN41020A (IC102) Focus servo drive PWM signal (+) output to the AN41020A (IC102) Focus servo drive PWM signal (­) output to the AN41020A (IC102) Ground terminal (digital system) Input terminal for the test (fixed at "L") Input terminal for the test (fixed at "L") Middle point voltage (+1.65V) input from the CXA2581N (IC103) Focus error signal input from the CXA2581N (IC103) Sled error signal input from the CXA2581N (IC103) Tracking error signal input from the CXA2581N (IC103) Middle point servo analog signal input from the CXA2581N (IC103) RF signal input from the CXA2581N (IC103) Output terminal for the test Not used (open)

32

MCE-SV7

Pin No. 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Pin Name AVSS0 IGEN AVDD0 ASYO ASYI RFAC AVSS1 CLTV FILO FILI PCO AVDD1 BIAS VCTL V16M VPCO DVDD2 ASYE MD2 DOUT LRCK PCMD BCLK EMPH XTSL DVSS2 XTAI XTAO SOUT SOCK XOLT SQSO SQCK SCSY SBSO EXCK

I/O -- I -- O I I -- I O I O -- I I O O -- I I O O O O O I -- I O O O O O I I O I Ground terminal (analog system)

Description Stabilized current input for operational amplifiers Power supply terminal (+3.3V) (analog system) EFM full-swing output terminal Asymmetry comparator voltage input terminal EFM signal input from the CXA2581N (IC103) Ground terminal (analog system) Internal VCO control voltage input Filter output for master PLL Filter input for master PLL Charge pump output for master PLL Power supply terminal (+3.3V) (analog system) Asymmetry circuit constant current input terminal VCO control voltage input terminal for the wideband EFM PLL Not used (fixed at "H") VCO oscillation output terminal for the wideband EFM PLL Not used (open) Charge pump output terminal for the wideband EFM PLL Not used (open) Power supply terminal (+3.3V) (digital system) Asymmetry circuit on/off control signal input terminal "L": off, "H": on Not used (fixed at "H") Digital out on/off control signal input from terminal Not used (fixed at "H") "L": digital out off, "H": digital out on Digital audio signal output to the OPTICAL OUT (IC102) L/R sampling clock signal (44.1 kHz) output to the CL680T (IC505) Serial data output to the CL680T (IC505) Bit clock signal (2.8224 MHz) output to the CL680T (IC505) "L" is output when playback disc is emphasis off "H" is output when playback disc is emphasis on Not used (open) System clock frequency setting signal input from the CL680T (IC505) "L": 16.9344 MHz, "H": 33.8688MHz (fixed at "H" in this set) Ground terminal (digital system) System clock input terminal (33.8688 MHz) System clock output terminal (33.8688 MHz) Not used (open) Serial data output terminal Not used (open) Serial data reading clock signal output terminal Not used (open) Serial data latch pulse signal output terminal Not used (open) Subcode Q data output to the video CD controller (IC502) Subcode Q data reading clock signal input from the video CD controller (IC502) Input terminal for resynchronism of guard subcode sync (S0+S1) Not used (fixed at "L") Subcode serial data output terminal Not used (open) Subcode serial data reading clock signal input terminal Not used (open)

33

MCE-SV7

· VMP BOARD IC502 M30622MGA-A59FP (VIDEO CD CONTROLLER) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42, 43 44 45 Pin Name SENSE SENSE CLK RESOLUTION CROMA LEVEL DSP CLK TSENS REMOTE IN BYTE CNVSS DSP MUTING CTRL1 XRESET XOUT VSS XIN VCC NMI SCOR DSENS CL680 HINT H.SYNC IN BGP -- PWM3 -- PWM2 -- PWM1 I2C.CLK I2C.DATA DATA1O DATA1I CLK1 RTSI DATAO DATAI CLKI P.ON BUS XRDY BUS BUS XHOLD BUS
OSD.LANGUAGE

I/O I O O O O I I I -- O O I O -- I -- I I I I O O -- O -- O -- O I/O I/O O I O I O I O O I O I O I I

Description Internal status (SENSE) signal input from the CXD3068Q (IC101) Sense serial data reading clock signal output to the CXD3068Q (IC101) Serial data output to the Y amplifier (IC303) Serial data latch pulse output to the C amplifier (IC302) Serial data transfer clock signal output to the CXD3068Q (IC101) Disc tray status detection signal input terminal Remote control signal input terminal Not used (open) Not used (open)

External data bus line byte selection signal input terminal "L": 16 bit, "H": 8 bit (fixed at "L") Ground terminal Not used Muting on/off control signal output to the CXD3068Q (IC101) "H": muting on Clock selection signal output to the CXD3068Q (IC101) "L": 16.9344 MHz (double speed), "H": 33.8688 MHz Reset signal input from the tuner unit (ST-SV7) "L": reset Main system clock output terminal (10 MHz) Ground terminal Main system clock input terminal (10 MHz) Power supply terminal (+5V) Non-maskable interrupt input terminal (fixed at "H" in this set) Subcode sync (S0+S1) detection signal input from the CXD3068Q (IC101) Disc status detection signal input terminal Not used (open) Interrupt request signal input from the CL680T (IC505) Horizontal synchronized signal input from the CL680T (IC505) BGP signal output to the C amplifier (IC302) Not used (open) RFDC PWM signal output to the CXA2581N (IC103) Not used (open) PWM signal output to the CXA2581N (IC103) Not used (open) Focus servo drive PWM signal output to the CXA2581N (IC103) Communication data reading clock signal input or transfer clock signal output with the system controller (IC401) and tuner unit (ST-SV7) Communication data bus with the system controller (IC401) and tuner unit (ST-SV7) Serial data output terminal Serial data input terminal Reset signal input terminal Not used Not used Not used Not used

Serial data transfer clock signal output terminal

Serial data output to the CL680T (IC505) and D/A converter (IC509) Serial data input from the CL680T (IC505) Serial data transfer clock signal output to the CL680T (IC505) and D/A converter (IC509) Power on/off control signal output terminal Ready signal input terminal Not used (open) Hold signal input terminal Not used (open) Destination setting terminal "L": chinese, "H": others (fixed at "H" in this set) Vertical synchronized signal input from theCL680T (IC505) "L" active Not used (fixed at "H") Not used (open) Not used (fixed at "H")

VSYNC

34

MCE-SV7

Pin No. 46 47 48 49 50 51 52 53 54 55 56 57 to 59 60, 61 62 63 64 65 66 67 to 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 to 92 93 94 95 96 97 98 99 100

Pin Name BUS XWRL LO.BOOST
AUDIO MUTING

I/O O O O O O I I I I O O I O -- O -- O O O O I I I O O O O O O O I I O O O O I I I O -- O I -- O Not used Low boost control signal output terminal

Description Not used (open) Not used (open) Not used (open) Not used (open) Not used (fixed at "H") Not used (open)

Audio muting on/off control signal output terminal "L": muting on Loading motor drive signal output terminal Loading motor drive signal output terminal Disc detection (load in) switch input terminal Disc detection (load out) switch input terminal Destination setting terminal (open) Destination setting terminal (open) Table motor drive signal output terminal Table motor drive signal output terminal Not used (open) Power supply terminal (+5V) Not used (open) Ground terminal Not used (open) Not used (open) Not used (open)

LOAD OUT LOAD IN INSW OUTSW MODEL1 MODEL2 TBLL TBLR ENC1 to ENC3 -- VCC -- VSS V.MUTE DAC RESET A5 to A0 TEST LED TEST1 TEST2 TEST3 DEVICE RESET STANDBY FL CS OFF OUT LPH LD ON SUBQ CLK SUBQ DATA CL680 HRDY CL680 RESET CL680 HSEL DF LATCH MIC CTRL KEY1 to KEY3 NT/PAL MUSIC VOL DSP DATA AVSS DSP LATCH VREF AVCC AMP.ON

Disc tray address detection signal input terminal

Video muting on/off control signal output to the Y/C decoder "L": muting on Reset signal output to the D/A converter (IC509) Address signal output for the external device Not used (open) Normally: "L" (LED on) LED drive signal output for the self diagnosis indicator Setting terminal for the test mode 1 (for VCD check) Normally: fixed at "H" ("L": test mode) Setting terminal for the test mode 2 (for SERVO check) Normally: fixed at "H" ("L": test mode) Setting terminal for the test mode 3 Not used (fixed at "H") Normally: fixed at "H" ("L": test mode)

System reset signal output to the CXD3068Q (IC101) and AN41020A (IC102) "L": reset Standby on/off control signal output terminal Chip select signal output terminal Blank control signal output terminal Not used (open) Not used (open) Not used (open) Not used (open)

Laser power control signal output terminal

Laser on/off selection signal output to the CXA2561N (IC103) "H": laser on Subcode Q data reading clock signal output to the CXD3068Q (IC101) Subcode Q data input from the CXD3068Q (IC101) Ready status detection signal input from the CL680T (IC505) Reset signal output to the CL680T (IC505) "L": reset Command selection signal output to the CL680T (IC505) Serial data latch pulse output to the D/A converter (IC509) "L" active Mic control signal output terminal Key input terminal Not used (open) Not used (open) Not used (fixed at "H")

Video system (NTSC/PAL) select signal input terminal Volume input terminal Serial data output to the CXD3068Q (IC101) Ground terminal (for A/D conversion) Serial data latch pulse output to the CXD3068Q (IC101) Reference voltage (+5V) input terminal (for A/D conversion) Power supply terminal (+5V) (for A/D conversion) Power amplifier on/off selection signal output terminal Not used (open)

35

MCE-SV7

· VMP BOARD IC505 CL680T-D1 (MPEG VIDEO/AUDIO DECODER, VIDEO SIGNAL PROCESSOR) Pin No. 1 2 3 4 5 6 7 to 9 10 to 15 16 17 18 19 20 21 22 23 to 28 29 30 to 36 37 38 39 40 41 42 43 44, 45 46 47 48 49 50 to 52 53 54 55 56 to 58 59 60 61 62 to 64 65 66 67 68 69 70 Pin Name NC VSS CD-BCK CD-DATA CD-LRCK CD-C2PO NC MD0 to MD5 VSS MD6 VDD3 MD7 VSS MD8 VDD3 MD9 to MD14 MD15 NC MCE MWE VSS CAS VDD3 RAS0 RAS1 MA10, MA9 MA8 VSS MA7 VDD3 MA6 to MA4 VSS MA3 VDD3 MA2 to MA0 PGIO7 RESET VDDMAX-IN NC AGND-DAC AVDD-DAC COMPOS OUT AGND-DAC Y-OUT AVDD-DAC I/O O -- I I I I O I/O -- I/O -- I/O -- I/O -- I/O I/O O O O -- O -- O O O O -- O -- O -- O -- O I/O I I O -- -- O -- O -- Not used (open) Ground terminal CD decode bit clock signal (2.8224 MHz) input from the CXD3068Q (IC101) CD decode data input from the CXD3068Q (IC101) CD decode L/R sampling clock signal (44.1 kHz) input from the CXD3068Q (IC101) CD decode C2 error data input from the CXD3068Q (IC101) Not used (open) Two-way data bus with the D-RAM (IC507) Data input from the program ROM (IC510) Ground terminal Two-way data bus with the D-RAM (IC507) Data input from the program ROM (IC510) Power supply terminal (+3.3V) Two-way data bus with the D-RAM (IC507) Data input from the program ROM (IC510) Ground terminal Two-way data bus with the D-RAM (IC507) Data output to the program ROM (IC510) Power supply terminal (+3.3V) Two-way data bus with the D-RAM (IC507) Data output to the program ROM (IC510) Two-way data bus with the D-RAM (IC507) Not used (open) Chip enable signal output to the program ROM (IC510) Write enable signal output to the D-RAM (IC507) Ground terminal Column address strobe signal output to the D-RAM (IC507) Power supply terminal (+3.3V) Row address strobe signal output to the D-RAM (IC507) Row address strobe signal output terminal Not used (open) Address signal output to the program ROM (IC510) Address signal output to the D-RAM (IC507) and program ROM (IC510) Ground terminal Address signal output to the D-RAM (IC507) and program ROM (IC510) Power supply terminal (+3.3V) Address signal output to the D-RAM (IC507) and program ROM (IC510) Ground terminal Address signal output to the D-RAM (IC507) and program ROM (IC510) Power supply terminal (+3.3V) Address signal output to the D-RAM (IC507) and program ROM (IC510) Not used (open) Reset signal input from the video CD controller (IC502) "L": reset Fix the maximum input voltage each input terminal and in/out terminal Not used (open) Ground terminal (for D/A converter) Power supply terminal (+3.3V) (for D/A converter) Composite video signal output terminal Not used (open) Ground terminal (for D/A converter) Luminance video signal output terminal Power supply terminal (+3.3V) (for D/A converter) Description

36

MCE-SV7

Pin No. 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 91 92 93 94 95 to 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120

Pin Name AGND-DAC RREF VREF AVDD-DAC C-OUT AGND-DAC CLK-SEL0 CLK-SEL1 CLK-SEL2 VSS RESERVED VDD3 DA-EMP RESERVED AGND-PLL DA-XCLK AVDD-PLL PGIO0 PGIO8 VSYNC AVDD-PLL NC AGND-PLL VSS NC HSYNC VDD3 VCK-OUT VSS GCK VCK-IN
GCKOUT/DA-EMP

I/O -- I O -- O -- I I I -- I -- O O -- I -- I/O I/O I/O O -- O -- -- O O -- O -- I I O O O O O O O O I/O -- I -- I -- Ground terminal (for D/A converter) Fix the video signal output level control

Description

Reference voltage (+1.235V) output terminal Power supply terminal (+3.3V) (for D/A converter) Chrominance video signal output terminal Ground terminal (for D/A converter) GCK (pin
88 to 90 PGIO4 to PGIO6

DA-LRCK VDDMAX-OUT DA-DATA DA-BCK HD-OUT HRDY HINT CDG-SCK VSS HCK VDD3 HD-IN VDD3

37

MCE-SV7

Pin No. 121 122 123 124 125 to 128

Pin Name HSEL CDG-SDATA CDG-VFSY CDG-S0S1 NC

I/O I I I I O Not used (fixed at "L") Not used (fixed at "L") Not used (fixed at "L") Not used (open)

Description Command selection signal input from the video CD controller (IC502)

38

MCE-SV7

· MAIN BOARD IC401 M30620MAA-B53FP (SYSTEM CONTROLLER) Pin No. 1 to 7 8 9 10 11 12 13 14 15 16 17 18 19 20 to 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 Pin Name -- BYTE CNVSS -- -- RESET X-OUT VSS X-IN VCC NMI -- SCOR -- BU PWM 3 -- BU PWM 2 -- BU PWM 1 IIC-CLK IIC-DATA -- SQ-DATA-IN SQ-CLK RTS1 CD-DATA SENS CD-CLK CD POWER -- HOLD -- XLT XRST LOAD-IN LOAD-OUT OPEN CLOSE T-SENS1 T-SENS2 I/O -- I -- -- -- I O -- I -- I -- I -- O -- O -- O I/O I/O -- I O -- O I O O -- O -- O O O O I I I I Not used (open) External data bus line byte selection signal input "L": 16 bits, "H": 8 bits Not used (fixed at "L") To flash memory connector Not used (open) Not used (fixed at "L") Not used (open) Reset signal input from the tuner unit (ST-SV7) System clock output terminal (16 MHz) Ground terminal System clock input terminal (16 MHz) Power supply terminal (+5V) Non-maskable interrupt input terminal (fixed at "H" in this set) Not used (open) Subcode sync (S0+S1) detection signal input terminal Not used (open) Not used (open) RFDC PWM signal output terminal Not used (open) Not used (open) Tracking error PWM signal output terminal Not used (open) Not used (open) Focus error PWM signal output terminal Not used (open) Communication data reading clock signal input or transfer clock signal output with the video CD controller and tuner unit (ST-SV7) Communication data bus with the video CD controller and tuner unit (ST-SV7) Not used Subcode Q data input from terminal Not used (open) Subcode Q data reading clock signal output terminal Not used (open) Not used CD decode data output terminal Not used (open) Internal status (SENSE) signal input terminal Not used (open) Serial data transfer clock signal output terminal Not used (open) Power on/off control signal output for the video and CD mechanism deck section "L": standby, "H": power on Not used (open) Automatic power control hold signal output terminal Not used (open) Not used (fixed at "L") Serial data latch pulse output to terminal Not used (open) Reset signal output terminal Not used (open) Loading motor drive signal (load-in direction) output the motor driver (IC701) Loading motor drive signal (load-out direction) output the motor driver (IC701) Sub tray load in/out detect switch (S742) input "L": sub tray is chucking position Sub tray load in/out detect switch (S742) input "L": sub tray slides out of chucking position Detection input from the disc tray 1 height sensor (IC731) "H": disc tray 1 position is chucking position Detection input from the disc tray 2 height sensor (IC732) "H": disc tray 2 position is chucking position Description

39

MCE-SV7

Pin No. 50 51 52 53 54 55 56 to 58 59 60, 61 62 63 64 65 to 68 69 to 72 73 to 76 77 to 80 81 to 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Pin Name T-SENS3 -- DISC-SENS B-TRIG ECO CHECK A-TRIG -- R/PB/PASS -- VCC SOFT-TEST VSS LED_DISC1 LED_DISC2 LED_DISC3 LED_PLAY LED_PAUSE EXP-IN DATA
EXP-OUT DATA

I/O I -- I O -- O -- O -- -- O -- O O O O O I O O O O I I I I -- I I -- I I -- --

Description Detection input from the disc tray 3 height sensor (IC733) "H": disc tray 3 position is chucking position Not used (fixed at "H") Detection input from the disc in detect sensor (IC751) Deck-B trigger plunger drive signal output to the tape deck unit (TC-S3) "H": trigger plunger on Not used (fixed at "H") Deck-A trigger plunger drive signal output to the tape deck unit (TC-S3) "H": trigger plunger on Not used (open) Recording/playback/pass selection signal output to the tape deck unit (TC-S3) "L": recording, center voltage: playback, "H": pass Not used (open) Power supply terminal (+5V) For software check terminal (open) Ground terminal LED drive signal output of the 1 indicator (D705) "L": LED on LED drive signal output of the 2 indicator (D704) "L": LED on LED drive signal output of the 3 indicator (D703) "L": LED on LED drive signal output of the N indicator (D702) "L": LED on LED drive signal output of the X indicator (D701) "L": LED on Serial data input from the tape deck unit (TC-S3) Serial data output to the tape deck unit (TC-S3) Serial data latch pulse signal output to the tape deck unit (TC-S3) Serial data transfer clock signal output to the tape deck unit (TC-S3) LED drive signal output of the X indicator (D701) "L": LED on Shut off (desk-A) detection signal input from the tape deck unit (TC-S3) Shut off (desk-B) detection signal input from the tape deck unit (TC-S3) Detection input from the deck-B cassette detect switch of the tape deck unit (TC-S3) "L": cassette in Model destination setting terminal Not used (open) Key input from the tape deck unit (TC-S3) (A/D input) Key input terminal (A/D input) (S711 to S720) m, M , ., >, x, X, N, RETURN, PREV, NEXT keys input Ground terminal (for A/D conversion) Key input terminal (A/D input) (S701 to S708) DISC 3, DISC 2, DISC 1, Z (DISC1), Z (DISC2), Z (DISC3), REPEAT, PLAY MODE keys input Reference voltage (+5V) input terminal (for A/D converter) Power supply terminal (+5V) (for A/D conversion) Not used (open)

EXP-LAT EXP-CLK LED_PAUSE A-SHUT B-SHUT B-HALF MODEL-IN KEY3 KEY2 (TC) KEY1 (CD) AVSS KEY1 (CD) VREF AVCC --

40

MCE-SV7 SECTION 7 EXPLODED VIEWS
NOTE: · -XX and -X mean standardized parts, so they may have some difference from the original one. · Color Indication of Appearance Parts Example: KNOB, BALANCE (WHITE) . . . (RED) Parts Color Cabinet's Color · Abbreviation EA : Saudi Arabia model SP : Singapore model TH : Thailand model · Items marked "*" are not stocked since they are seldom required for routine service. Some delay should be anticipated when ordering these items. · The mechanical parts with no reference number in the exploded views are not supplied. · Hardware (# mark) list is given in the last of the electrical parts list. The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified.

7-1. COVER, FRONT PANEL SECTION

8
#2

7

7

1 5
not supplied

4

4 6
chassis section

4 3 2
#1 not supplied

Ref. No. 1 2 3 4

Part No. X-4953-842-3 4-233-136-01 4-233-147-01 4-951-620-01

Description PANEL ASSY, FRONT LID (CD) SPRING (CD) SCREW (2.6X8), +BVTP

Remark

Ref. No. 5 6 7 8

Part No. 1-680-996-12 1-680-995-12 3-363-099-21 4-233-134-11

Description SUB PANEL BOARD PANEL BOARD SCREW (CASE 3 TP2) COVER

Remark

41

MCE-SV7

7-2. CHASSIS SECTION

CDM63B

56
BU-30BD61A

54 54 53 52 53 51 57 54 55 52 59 58
#1 not supplied not supplied #1 not supplied

61 54 53 60

62

#1

#1

57
not supplied #1

64

#1

65
not supplied not supplied #1

63

57 66

Ref. No. 51 52 53 54 55 56 57 58 58 59

Part No. 4-951-620-01 4-231-151-01 4-227-045-11 4-231-451-01 4-985-672-01 4-227-899-01 3-970-608-01 A-4725-757-A A-4725-759-A 1-823-056-11

Description SCREW (2.6X8), +BVTP STOPPER (BU) SPRING (INSULATOR), COIL INSULATOR (BU-30) SCREW (+PTPWH M2.6), FLOATING SCREW (DIA. 12), FROATING SUMITITE (B3), +BV VMP BOARD, COMPLETE (EA, SP) VMP BOARD, COMPLETE (TH) WIRE (FLAT TYPE) (25 CORE)

Remark

Ref. No. 60 61 61 62 63 63 63 64 65 66

Part No. 1-769-977-11 A-4725-761-A A-4725-766-A 1-757-633-11 4-233-135-31 4-233-135-51 4-233-135-61 1-680-998-12 1-680-997-12 4-965-822-01

Description WIRE (FLAT TYPE) (13 CORE) MAIN BOARD, COMPLETE (EA, SP) MAIN BOARD, COMPLETE (TH) CORD (WITH CONNECTOR) 17P PANEL, BACK (TH) PANEL, BACK (SP) PANEL, BACK (EA) VIDEO BOARD REG BOARD FOOT

Remark

42

MCE-SV7

7-3. CD MECHANISM DECK SECTION-1 (CDM63B)

B

506
B

505 507 501 506 509
not supplied

501
not supplied

519

508 501

not supplied
A

510 501 501 501
not supplied

518

not supplied

509

512

514

511 516 515 517
not supplied

501 513

504

520 501 502
not supplied

503 501
not supplied

501 501

501
not supplied

501
not supplied
A

not supplied

501

Ref. No. 501 502 503 504 505 506 507 508 509 510

Part No. 4-218-253-01 4-228-996-01 4-228-995-01 4-228-972-02 4-231-971-01 4-985-672-01 4-228-414-01 4-228-980-01 4-228-981-02 4-228-963-01

Description SCREW (M2.6), +BTTP SPRING (R), TORSION SPRING (L), TORSION TRAY (MAIN) PULLEY (30B), CHUCKING SCREW (+PTPWH M2.6), FLOATING BRACKET (YOKE) SPRING (STOCKER), LEAF STOPPER (TRAY) SLIDER (STOCKER. L)

Remark

Ref. No. 511 512 513 514 515 516 517 518 519 520

Part No. 4-228-964-01 4-228-970-02 4-229-001-01 4-228-975-02 4-228-978-02 4-228-970-12 4-228-970-22 X-4953-307-1 4-234-423-01 1-678-457-11

Description SLIDER (STOCKER. R) TRAY (SUB) HOLDER (SENSOR) COVER (TRAY. L) COVER (TRAY. R) TRAY (SUB) TRAY (SUB) PULLEY (A) AS