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STD40NF3LL
N-channel 30V - 0.009 - 40A - DPAK
Low gate charge STripFETTM II Power MOSFET

General features
Type VDSS RDS(on) ID
STD40NF3LL 30V <0.011 40A

Logic level device
3
Optimal RDS(on) x Qg trade-off
1
Conduction losses reduced
DPAK
Switching losses reduced
Low threshold drive

Description
This application specific Power MOSFET is the
third generation of STMicroelectronics unique
"Single Feature SizeTM" strip-based process. The
Internal schematic diagram
resulting transistor shows the best trade-off
between on-resistance and gate charge. When
used as high and low side in buck regulators, it
gives the best performance in terms of both
conduction and switching losses. This is
extremely important for motherboards where fast
switching and high efficiency are of paramount
importance.

Applications
Switching application


Order codes
Part number Marking Package Packaging
STD40NF3LLT4 [email protected] DPAK Tape & reel




February 2007 Rev 5 1/13
www.st.com 13
Contents STD40NF3LL


Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 6

3 Test circuit ................................................ 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12




2/13
STD40NF3LL Electrical ratings


1 Electrical ratings

Table 1. Absolute maximum ratings
Symbol Parameter Value Unit

VDS Drain-source voltage (VGS = 0) 30 V
VDGR Drain-gate voltage (RGS = 20 k) 30 V
VGS Gate- source voltage