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5 4 3 2 1
catalog
01 Cover sheet
02 BLOCK_DIAGRAM
D 03 SMBUS_&_IRQ_ROUTING D
04 POWER_ON_SEQUENCE
05 POWER_Block
06 CLCOK GEN
07 CPU
08 CPU_POWER
09 GMCH_1_Host_DDR2
10 GMCH_2_Display
11
12
13
14
GMCH_3_POWER
DDR2_SODIMM0
DDR2_SODIMM1
DDR2_Temination
INTEL NAPA Platform
15 LCD_CON
C
16
17
18
CRT&S_Video CON
ICH6_1
ICH6_2
M515 C
19 ICH6_3_Power
20 MiniPCI
21 LAN
22 Richo 1394
23
24
Richo CardBus&CardReader
SATA
Version : B
25 DVDROM
26 USB_PORT Drawing by :Yang Tao
27 PWR_Budget
B 28 PWR_Charger Modified by Xiong Wei to Switch to M515 B
29 PWR_System
30 PWR_DDR2
31 PWR_VCCP&VCC_GMCH
32 PWR_VCore
33 S3_S4_CNTR&Discharge
34 System_PWRGD
35 ACIN
36 KBC_1
37 KBC_2&CON
38 Touch PAD and LED
39 FM
40 ALC260 Codec
Notes:
[email protected]
A A
41 Audio speaker&earphone
42 Modem CON
Amoi IT Division.
43 Power_Sequence Part Value Prefix : "@" means nopop 295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203 www.amoi.com.cn
44 Miscellaneous Net Value suffix : "#" means Low Active Title M515
Size Sheet Rev
Cover sheet
C Name B
ENGINEER:
Date: Friday, December 22, 2006 Sheet 1 of 49
5 4 3 2 1
5 4 3 2 1
BLOCK DIAGRAM System Power
ISL6232
D
14.318MHz D
Thermal Sensor
CPU CPU Power
Yonah CLK_PCIE
ISL6262
CLK_CPU_BCLK#,CLK_CPU_BCLK
Clock Gen
CLK_AC97
FAN KBC CLK_FWHPCI
CLK_MCH_BCLK#,CLK_MCH_BCLK CLK_KBCPCI
DREFCLK#,DREFCLK
FSB 667 DREFSSCLK#,DREFSSCLK Chipset Power
CLK_MCH_3GPLL#,CLK_MCH_3GPLL
ISL6227
R.G.B
CRT DDR2-667 SO DIMM1
DDR2 Power
C
LVDS
LVDS Calistoga- DDR2-667 SO DIMM2
ISL88550A
C
GM CLK_CARDBUS CLK_LAN CLK_MiniPCI
TV-OUT
TV-OUT
Charger
MAX1908
DMI X4
GPU 400MB/S
32.768KHz @ CLK_ICH14
200MHz CLK_ICHPCI
CLK_USB48
S3/S4 Control
CLK_PCIE_SATA#,CLK_PCIE_SATA
CLK_PCIE_ICH#,CLK_PCIE_ICH
PCI
and Discharge
Hard Disk SATA
B
USB2.0 CardBus/1394/ LAN Mini PCI B
USB Express Card
ICH7-M
ODD PATA USB2.0
USB0
USB1 24.576MHz 25MHz
USB2
32.768KHz LPC BUS BlueTooth
PCI-E MINI CARD
CLK_KBCPCI
KBC
Azalia
A A
BIOS&EC KB TOUCH Audio Modem Amoi IT Division.
PAD Codec Codec 295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203 www.amoi.com.cn
Title M515
Size
CLK_Azalia Sheet
BLOCK
Rev
C Name B
ENGINEER:
Date: Friday, December 22, 2006 Sheet 2 of 49
5 4 3 2 1
5 4 3 2 1
PCI Device:
RESET TOPOLOGY
REQ0: PCMICIA
REQ1: MINI PCI GMCH H_CPURST# CPU
REQ2: LAN
REQ3: X
D PIRQA#:RTL8100CL/8110SBL
D
PLT_RST# BUF_PLT_RST#
PIRQB#: NC Buffer HDD
PIRQC#: MINI PCI
PIRQD#: MINI PCI (Function0) PCI_RST# MiniPCI DVD ROM
PIRQE#: R5C841 (Function0)
PIRQF#: R5C841 MiniCard
PIRQG#: R5C841
PIRQH#: Internal USB
ICH6-M LAN
KBC
AD18:LAN CardBus LPC Port
AD22:MINIPCI
AD25:R5C841
ACZ_RST#
Audio
Modem
C C
SMBUS ADDRESS:
Device: Address Hex BUS
Clock Gen 1101001x D2/D3 SMB_ICH_S2
SODIMM0 1010000x A0 SMB_ICH_S2
SODIMM1 1010010x A4 SMB_ICH_S2
SMBUS TOPOLOGY
Smart Battery SMB_BS
ICH6-M +V3.3S KBC
Notes:
First address is for a write command and SMB_ICH +V3.3A EXPANDER
second is for a read command SMB_BS
+V3.3A
B Buses labbeled SMB_ICH_xx come out of ICH, SMB_ICH_S2 +V3.3S SMB_THRM B
Via an I2C expander.
The rest come out of EC
SODIMM0
SODIMM1
CLOCK GPU Thermal FM Battery
GEN Sensor
[email protected]
A A
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203 www.amoi.com.cn
Title M515
Size Sheet Rev
IRQ ROUTING & SMBUS
C Name B
ENGINEER:
Date: Friday, December 22, 2006 Sheet 3 of 49
5 4 3 2 1
ACIN 03
POWER ON SEQUENCE Circuit
+V_DC_IN
PG:40
5AC 1BAT
1AC +V_ADP_IN POWSW#
D D
1 Startup
Circuit
+V_ADP_OUT
+VBAT
Batt Charger PG:40
PG:34 Circuit
PG:34
5AC
3 2 +V_DC SMCONOFF#
+V3.3A +V5A
7
+V3.3 S4 +V3.3A
+V5 shutdown +V5A
System VR
Power Monitors KBC
+V3.3A,+V5A, 4
C
control +V2.5A,+V1.5A RSMRST#_PWRGD
PG:31 C
PG:35
PG:39
Delay 99ms
PM_PWRBTN#
PMRSMRST#
+V3.3A +V5A 10 11
+V1.05S(For Core,CPU I/O)
ALL_SYS_VRPWRGD
+V3.3A(Sus)
S3 shutdown +V3.3S(For PCI,IDE)
IMVP_VR_ON
Power control 5a 5b +V1.5S(For Core,SATA,PLL,)
PG:39 SLP_S3#
+V3.3S +V5S +V2.5S
7 8
ICH7M
H_PWRGD
S4# AND
06
VRMPWRGD
SLP_S4#
S3#
PWROK
+V1.8 7 +V0.9S +V1.8S
PG:17,18 16
B 10 B
+V1.5S(For PLL)
DDR2 SLP_S3# +VCC_Core
VR PG:36 17 +V1.05S
DDR_VR_PWRGD
AND 15 14
PLT_RST#
7 +V1.05S +V1.5S 8
9 +V1.5S(For PLL)
+V2.5S(For LVDS,CRT)
SLP_S3#
1.05V 1.5V +V1.8(For DDR) H_CPURST#
CPU
VR VR AND AND +1.05S(VCCP,GMCH_Core)
PG:07
PG:37 PG:37 18
8
IMVP_VR_ON
12 +VCC_CORE
11
DELAY_VR_PWRGOOD
945GM
IMVP PWROK PG:09,10
A
VR 14 A
PG:38
CLK_EN# Amoi IT Division.
System 295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203 www.amoi.com.cn
13 Clock
PG:06
Title M515
Size Sheet Rev
Power on Sequence
C Name B
ENGINEER:
Date: Friday, December 22, 2006 Sheet 4 of 49
5 4 3 2 1
5 4 3 2 1
BC BC
BB BB
BA BA
AZ AZ
AY AY
AX AX
AW AW
AV
POWER Delivery Architectural Block Diagram AV
AU AU
AT AT
AS AS
G3 shut down power S4,S5 shut down power S3 shut down power +V1.8
AR AR
+Vcore
Dothan-LV +V0.9S
DDR2
AQ AQ
+VCCP
Vcore:0.726-1.116V /?A /S0
AP
ADAPTOR VCCP:1.05V /3.0A /S0 AP
+VCC_PROC
+V_DC
VPLL:1.50V /0.3A /S0
AO
DDR2 POWER Module +V1.8 +V0.9S +V3.3A_KBC
AO
AN
KBC AN
AM AM
+V1.8S +VCCP
GMCH
AL VCCP:1.05V /S0 +V3.3S AL
Charger +VCC_GMCH FMH
+V1.5S
Vcore:1.05-1.50V /S0
AK
CPU VCORE POWER Module VPLLs:1.50V /S0
AK
+VCC_CORE +V5
AJ
VccPCIE:1.5V /S0 USB AJ
AI
+V1.8
VccDLVDS:1.5V /S0 +V3.3 AI
+V2.5S
VccSM:1.8V /S0,S3 BlueTooth
AH AH
VccALVDS:2.5V /S0 +V5S
+V1.05S VCRTDAC:2.5V /S0
AG
BATTERY +V3.3S PATA
AG
AF 1.05/1.5V POWER Module VTVDAC:3.3V /S0 AF
+V1.5S +V3.3S
AE AE
+V5S
Azalia/Ac97
AD SATA AD
AC +V3.3S AC
2.5V POWER Module +VCCP
ICH6-M +V3.3
AB +V2.5S VccpCPU:1.05V /S0 MiniPCI
AB
+V1.5S +V5S
AA Vcore:1.50V /S0 AA
Z
VPLLs:1.50V /S0 Z
+V2.5S
VccPCIE:1.5V /S0 +V3.3
Y +V3.3A +V3.3 V2.5REF:2.5V /S0 Y
+V3.3S +V3.3S CardBus
X VccPCI:3.3V /S0 +V5S X
VccIDE:3.3V /S0
W +V5A Vccp:3.3V /S0
W
V
+V5S VccpAUX(LAN):3.3V /S0 V
+V3.3A +V3.3S
U SYSTEM POWER Module +V5S
VccSUS:3.3V /S0,S3 LCD U
V5REF:5V /S0 +V_DC
T +V5A T
V5REFSUS:5V /S0,S3
S S
R R
Q Q
P P
O O
N N
M M
L L
K K
J J
I I
H H
[email protected]
G G
F F
E
Amoi IT Division. E
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203 www.amoi.com.cn
D D
C Title M515 C
B B
Size Sheet Rev
Power Block
C Name B
A ENGINEER: A
Date: Friday, December 22, 2006 Sheet 5 of 49
5 4 3 2 1
5 4 3 2 1
POWER RAIL DESTINATION VOLTAGE S0 CURRENT
VCORE_CPU Banias 0.7-1.708V 32A
VCCP Banias 0.9-1.105V 2.5A
ICH4M MontaraGM 0.72A
D 1.8VDDM Banias (PLL) 1.8V 0.3A D
MontaraGM (PLL) 0.099A
1.2VDDM 1.2V 1.89A
(CORE, HUB, DDRDDL) (1.4A, 0.09A, 0.4A)
1.5VDDM MontaraGM 1.5V 0.23A
(LVDS, DAC, DVO) (0.07A, 0.07A, 0.09A)
ICH4M (CORE) 0.5A
2.5VDDS MontaraGM 2.5V 2.12A
(DDR, LVDSIO) (2.07A, 0.05A)
(Run
DDR RAM 1.046A (Idle) 1.692A
3DMark)
R5C551 0.13A
1.8VDDS 82541EI 0.22A
1.25VDDM DDR RAM 1.25V 0.0769A
1.5VDDS ICH4M (LAN) 1.5V 0.0155A
1.2VDDS 82541EI 1.2V 0.47A
1.5VDDA ICH4M (SUS) 1.5V 0.0675A
3VDDM ICH4M (IO) 3.3V 0.528A
R5C551 0.13A
MiniPCI
C
FWH BIOS C
LPC KBC 0.0308A (Idle)
AC97 CODEC 0.0461A (Idle)
CLK GEN 0.36A
LVDS 0.246A
3VDDS ICH4M (LAN) 3.3V 0.0092A
R5C551
MiniPCI
82540EM 0.15A
PCMCIA VCCA
3VDDA ICH4M (SUS) 3.3V 0.165A
5VDDM AMP2020 0.0615A (Idle) 0.338A (Run)
CDROM 0.0461A (Idle) 0.677~0.8A (Run)
HDD 0.0461A (Idle) 0.492A (Run)
INT KB/ INT MS
INVERTER 0.0615A (Idle) 0.569A (Run)
5VDDS PCMCIA VCCA
B B
5VDDA ICH4M 10UA
USB
PMU3V PMU08 0.0615A
PMU5V ASIC_B0 0.0615A
A A
Amoi IT Division.
295 Lane, Zuchongzhi Road, Zhangjiang,
Shanghai, China, 201203 www.amoi.com.cn
Title M515
Size Sheet Rev
PWR_Budget
C Name B
ENGINEER:
Date: Friday, December 22, 2006 Sheet 6 of 49
5 4 3 2 1
5 4 3 2 1
Power On Sequence Power Down Sequence
POWSW# STP_CLK#
PS_LATCH# SUS_STAT#
DCIN STP_PCI#
D +V3.3A_KBC PLT_RST#,PCI_RST# D
+V*A H_CPURST#
RSMRST#_PWRGD SLP_S3#
PMRSMRST# Need confirm the power sequency SLP_S4#
PM_PWRBTN# and PMRSMRST#
PM_PWRBTN# +V*S
SLP_S3# +VCC_GMCH_Core
+V*S +VCC_PROC
+VCC_GMCH_Core DDR_VR_PWRGD
+VCC_PROC PM_SYS_PWRGD
SLP_S4#