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5 4 3 2 1
PEGATRON CONFIDENTIAL
MODEL NAME :
D
PCB NO : D
69- P/N :
C C
AIC70 Schematic
Intel Arrandale rPGA-989
PCH BGA 1071
2011-05-04
REV : R2.0
B B
A A
Title : Cover Page
BU1-RD Div.1-HW RD Dept.1 Engineer: Johnson Huang
Size Project Name Rev
Custom
AIC70 2.0
Date: W ednesday, May 04, 2011 Sheet 1 of 77
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AIC70 BLOCK DIAGRAM
CLOCK GEN.
D
PCIE *16 GEN2
SLG8SP585V D
N12P-GV ARD DDR3 1066 MHz DDR-III PAGE 24
1G DDR3 VRAM (989-Pin rFCPGA)
SO-DIMM
PAGE 70:79 PAGE 21,22
PAGE 7-12
FDI DMI
HDMI
HDMI
PCIE *1 10/100 LAN
POWER
PAGE 39 RTL8103EL LAN IO
PAGE 34 CPU VCORE
PAGE 54 PAGE 80
CRT
CRT
SYSTEM, +3V, +5V
PAGE 38 MiniCard PAGE 81
WLAN
LVDS
LVDS PCH +VCCP
1071 BGA PAGE 55 PAGE 82
C PAGE 37 C
DDR & VTT
PAGE 83
USB2.0
Audio Jack +VGFX_CORE
PAGE 86
PAGE 61 Azalia Codec Azalia
SATA PORT +VGA_CORE
Speaker
RTK/ALC271 LPC SATA P0 PAGE 87
PAGE 13-19 SATA P1 HDD
PAGE 41 PAGE 41 42 Card Reader SMART CHARGER
RTS5138-GR SATA P4 ODD
PAGE 88
SATA P5
PAGE 50 POWER DETECT
SPI
USB2.0 PCIe Port PAGE 90
K/B PCIE_P1 LOAD SWITCH
EC Camera
PAGE 48
SPI
SATA PCIE_P2 Mini CARD (WLAN) PAGE 91
NPCE795L SPI 32Mb PAGE 37 PCIE_P3 POWER PROTECT
T/P PAGE 13 PCIE_P4 PAGE 92
B B
PAGE 48 PAGE 46 PCIE_P5
USB x 3 Ports PCIE_P6 LAN
PAGE 61 USB PORT
Power Rails
USB P00 Card Reader
Sleep State RTC VA VSUS V VS
USB P01
SATA HDD USB P02
S0 ON ON ON ON ON
S3 ON ON ON ON OFF
PAGE 60 USB P03
S4 ON ON ON OFF OFF
USB P04
SATA ODD USB P05
S5/ AC ON ON ON OFF OFF
S5/ DC ON ON OFF OFF OFF
PAGE 60 USB P08 WiFi
USB P09
USB P10 Camera
USB P11 External
USB P12 External
A A
USB P13 External
Title : BLOCK DIAGRAM
BU1-RD Div.1-HW RD Dept.1 Engineer: Johnson Huang
Size Project Name Rev
Custom
AIC70 2.0
Date: W ednesday, May 04, 2011 Sheet 2 of 77
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A B C D E
SCHEMATIC INDEX V1.2
PAGE# Description NOTE PAGE# Description NOTE
1 01 Cover Page 1
02 Block Diagram
03 PAGE INDEX
07-12 CPU
13-19 PCH
21-22 DDR3 SO-DIMM
24 Clock Generator
33-34 LAN
2 2
37 LVDS CON
38 RGB CON
39 HDMI (Level shift for UMA)
41-42 AUDIO CODEC & De-POP
46-48 EC NPCE795L / KB / TP
49 THERMAL / FAN
50 CARD READER
55 MINI CARD -WiFi & BT3.0
3 3
60 SATA(HDD & ODD)
61 USB & AUDIO CONN
63 DC-IN / BATTERY CONN / Discharge
65 PWR CONN & Debug CONN
66 Led & Nut & ME Pad
70-79 dGPU Schematics
80-94 Power Schematics
4 95 EE History 4
96 ODD Board
97 PWR Board
98 TP SW Board & LID Switch
99 AUDIO Board
5 5
Title : PAGE INDEX
BU1-RD Div.1-HW RD Dept.1 Engineer: Johnson Huang
Size Project Name Rev
Custom
AIC70 2.0
Date: W ednesday, May 04, 2011 Sheet 3 of 77
A B C D E
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U0701E
RSVD32 AJ13
RSVD33 AJ12
U0701A AP25
PEG_COMP 2 R0701 RSVD1
PEG_ICOMPI B26 1 49.9Ohm 1% AL25 RSVD2 RSVD34 AH25
PEG_ICOMPO A26 AL24 RSVD3 RSVD35 AK26
D 14 DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27 M_VREFDQ_CHA/B AL22 RSVD4 D
14 DMI_TXN1 C23 A25 EXP_RBIAS 2 R0702 1 750Ohm 1% AJ33 AL26
DMI_RX#[1] PEG_RBIAS for CFD only RSVD5 RSVD36
14
14
DMI_TXN2
DMI_TXN3
B22
A21
DMI_RX#[2]
K35 PCIE_MRX_GTX_N15
PCIE_MRX_GTX_N[0..15] 70 R1.0- 1 AG9
M27
RSVD6 RSVD_NCTF_37 AR2
DMI_RX#[3] PEG_RX#[0] PCIE_MRX_GTX_N14 RSVD7
PEG_RX#[1] J34 L28 RSVD8 RSVD38 AJ26
14 DMI_TXP0 B24 J33 PCIE_MRX_GTX_N13 T0723 1 VREFDQ_CHA J17 AJ27
DMI_RX[0] PEG_RX#[2] PCIE_MRX_GTX_N12 T0721 VREFDQ_CHB RSVD9 RSVD39
14 DMI_TXP1 D23 DMI_RX[1] PEG_RX#[3] G35 1 H17 RSVD10
DMI
DMI
14 DMI_TXP2 B23 G32 PCIE_MRX_GTX_N11 G25
DMI_RX[2] PEG_RX#[4] PCIE_MRX_GTX_N10 RSVD11
14 DMI_TXP3 A22 DMI_RX[3] PEG_RX#[5] F34 G17 RSVD12
F31 PCIE_MRX_GTX_N9 E31 AP1 H_RSVD40 1 T0725
PEG_RX#[6] PCIE_MRX_GTX_N8 RSVD13 RSVD_NCTF_40
14 DMI_RXN0 D24 DMI_TX#[0] PEG_RX#[7] D35 E30 RSVD14 RSVD_NCTF_41 AT2 H_RSVD41 1 T0726
G24 E33 PCIE_MRX_GTX_N7
14 DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 PCIE_MRX_GTX_N6 AT3 H_RSVD42 1 T0727
14 DMI_RXN2 DMI_TX#[2] PEG_RX#[9] RSVD_NCTF_42
H23 D32 PCIE_MRX_GTX_N5 AR1 H_RSVD43 1 T0728
14 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] RSVD_NCTF_43
B32 PCIE_MRX_GTX_N4
PEG_RX#[11] PCIE_MRX_GTX_N3
14 DMI_RXP0 D25 DMI_TX[0] PEG_RX#[12] C31
F24 B28 PCIE_MRX_GTX_N2
14 DMI_RXP1 DMI_TX[1] PEG_RX#[13]
E23 B30 PCIE_MRX_GTX_N1 AL28
14 DMI_RXP2 DMI_TX[2] PEG_RX#[14] RSVD45
G23 A31 PCIE_MRX_GTX_N0 H_CFG0 AM30 AL29
14 DMI_RXP3 DMI_TX[3] PEG_RX#[15] CFG[0] RSVD46
PCIE_MRX_GTX_P[0..15] 70 T0701 1H_CFG1 AM28 AP30
PCIE_MRX_GTX_P15 T0702 CFG[1] RSVD47
PEG_RX[0] J35 1H_CFG2 AP31 CFG[2] RSVD48 AP32
H34 PCIE_MRX_GTX_P14 H_CFG3 AL32 AL27
PEG_RX[1] PCIE_MRX_GTX_P13 H_CFG4 CFG[3] RSVD49
PEG_RX[2] H33 AL30 CFG[4] RSVD50 AT31
E22 F35 PCIE_MRX_GTX_P12 T0705 1H_CFG5 AM31 AT32
14 FDI_TXN0 FDI_TX#[0] PEG_RX[3] CFG[5] RSVD51
D21 G33 PCIE_MRX_GTX_P11 T0706 1H_CFG6 AN29 AP33
14 FDI_TXN1 FDI_TX#[1] PEG_RX[4] CFG[6] RSVD52
D19 E34 PCIE_MRX_GTX_P10 T0707 1H_CFG7 AM32 AR33
14 FDI_TXN2 FDI_TX#[2] PEG_RX[5] CFG[7] RSVD53
D18 F32 PCIE_MRX_GTX_P9 T0708 1H_CFG8 AK32 AT33
14 FDI_TXN3 FDI_TX#[3] PEG_RX[6] CFG[8] RSVD_NCTF_54
RESERVED
G21 D34 PCIE_MRX_GTX_P8 T0709 1H_CFG9 AK31 AT34
14 FDI_TXN4
PCI EXPRESS -- GRAPHICS
FDI_TX#[4] PEG_RX[7] PCIE_MRX_GTX_P7 T0710 CFG[9] RSVD_NCTF_55
14 FDI_TXN5 E19 FDI_TX#[5] PEG_RX[8] F33 1H_CFG10 AK28 CFG[10] RSVD_NCTF_56 AP35
C F21 B33 PCIE_MRX_GTX_P6 T0711 1H_CFG11 AJ28 AR35 C
14 FDI_TXN6 FDI_TX#[6] PEG_RX[9] CFG[11] RSVD_NCTF_57
Intel(R) FDI
Intel(R) FDI
G18 D31 PCIE_MRX_GTX_P5 T0712 1H_CFG12 AN30 AR32
14 FDI_TXN7 FDI_TX#[7] PEG_RX[10] CFG[12] RSVD58
A32 PCIE_MRX_GTX_P4 T0713 1H_CFG13 AN32
PEG_RX[11] PCIE_MRX_GTX_P3 T0714 CFG[13]
PEG_RX[12] C30 1H_CFG14 AJ32 CFG[14]
D22 A28 PCIE_MRX_GTX_P2 T0715 1H_CFG15 AJ29 E15
14 FDI_TXP0 FDI_TX[0] PEG_RX[13] CFG[15] RSVD_TP_59
C21 B29 PCIE_MRX_GTX_P1 T0716 1H_CFG16 AJ30 F15
14 FDI_TXP1 FDI_TX[1] PEG_RX[14] CFG[16] RSVD_TP_60
D20 A30 PCIE_MRX_GTX_P0 T0717 1H_CFG17 AK30 A2
14 FDI_TXP2 FDI_TX[2] PEG_RX[15] CFG[17] KEY
C18 T0718 1H_CFG18 H16 D15
14 FDI_TXP3 FDI_TX[3] RSVD_TP_86 RSVD62
G22 L33 PCIE_MTX_GRX_C_N0 C0701 1 2 0.1UF/10V PCIE_MTX_GRX_N15 DSC C15
14 FDI_TXP4 FDI_TX[4] PEG_TX#[0] RSVD63
E20 M35 PCIE_MTX_GRX_C_N1 C0702 1 2 0.1UF/10V PCIE_MTX_GRX_N14 DSC AJ15 H_RSVD64 1 T0722
14 FDI_TXP5 FDI_TX[5] PEG_TX#[1] RSVD64
F20 M33 PCIE_MTX_GRX_C_N2 C0703 1 2 0.1UF/10V PCIE_MTX_GRX_N13 DSC Place Near CON7501 AH15 H_RSVD65 1 T0724
14 FDI_TXP6 FDI_TX[6] PEG_TX#[2] RSVD65
G19 M30 PCIE_MTX_GRX_C_N3 C0704 1 2 0.1UF/10V PCIE_MTX_GRX_N12 DSC
14 FDI_TXP7 FDI_TX[7] PEG_TX#[3]
L31 PCIE_MTX_GRX_C_N4 C0705 1 2 0.1UF/10V PCIE_MTX_GRX_N11 DSC B19
PEG_TX#[4] PCIE_MTX_GRX_C_N5 C0706 1 0.1UF/10V PCIE_MTX_GRX_N10 DSC RSVD15
14 FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 2 A19 RSVD16
E17 M29 PCIE_MTX_GRX_C_N6 C0707 1 2 0.1UF/10V PCIE_MTX_GRX_N9 DSC
14 FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 PCIE_MTX_GRX_C_N7 C0708 1 2 0.1UF/10V PCIE_MTX_GRX_N8 DSC T0719 1 H_RSVD17 A20
PEG_TX#[7] PCIE_MTX_GRX_C_N8 C0709 1 0.1UF/10V PCIE_MTX_GRX_N7 DSC T0720 H_RSVD18 RSVD17
14 FDI_INT C17 FDI_INT PEG_TX#[8] K29 2 1 B20 RSVD18
H30 PCIE_MTX_GRX_C_N9 C0710 1 2 0.1UF/10V PCIE_MTX_GRX_N6 DSC AA5
PEG_TX#[9] PCIE_MTX_GRX_C_N10 C0711 1 0.1UF/10V PCIE_MTX_GRX_N5 DSC RSVD_TP_66
14 FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 2 U9 RSVD19 RSVD_TP_67 AA4
D17 F29 PCIE_MTX_GRX_C_N11 C0712 1 2 0.1UF/10V PCIE_MTX_GRX_N4 DSC T9 R8
14 FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] RSVD20 RSVD_TP_68
E28 PCIE_MTX_GRX_C_N12 C0713 1 2 0.1UF/10V PCIE_MTX_GRX_N3 DSC AD3
PEG_TX#[12] PCIE_MTX_GRX_C_N13 C0714 1 0.1UF/10V PCIE_MTX_GRX_N2 DSC RSVD_TP_69
PEG_TX#[13] D29 2 AC9 RSVD21 RSVD_TP_70 AD2
D27 PCIE_MTX_GRX_C_N14 C0715 1 2 0.1UF/10V PCIE_MTX_GRX_N1 DSC AB9 AA2
PEG_TX#[14] PCIE_MTX_GRX_C_N15 C0716 1 0.1UF/10V PCIE_MTX_GRX_N0 DSC RSVD22 RSVD_TP_71
PEG_TX#[15] C26 2 RSVD_TP_72 AA1
RSVD_TP_73 R9
L34 PCIE_MTX_GRX_C_P0 C0717 1 2 0.1UF/10V PCIE_MTX_GRX_P15 DSC AG7
PEG_TX[0] PCIE_MTX_GRX_C_P1 C0718 1 0.1UF/10V PCIE_MTX_GRX_P14 DSC RSVD_TP_74
PEG_TX[1] M34 2 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
M32 PCIE_MTX_GRX_C_P2 C0719 1 2 0.1UF/10V PCIE_MTX_GRX_P13 DSC A3
1KOhm PEG_TX[2] RSVD_NCTF_24
1 R0715 2 FDI_FSYNC0
PEG_TX[3] L30 PCIE_MTX_GRX_C_P3 C0720 1 2 0.1UF/10V PCIE_MTX_GRX_P12 DSC
B @ PCIE_MTX_GRX_C_P4 C0721 1 0.1UF/10V PCIE_MTX_GRX_P11 DSC B
PEG_TX[4] M31 2 RSVD_TP_76 V4
1KOhm 1 R0711 2 FDI_FSYNC1 K31 PCIE_MTX_GRX_C_P5 C0722 1 2 0.1UF/10V PCIE_MTX_GRX_P10 DSC V5
@ PEG_TX[5] PCIE_MTX_GRX_C_P6 C0723 1 0.1UF/10V PCIE_MTX_GRX_P9 DSC RSVD_TP_77
PEG_TX[6] M28 2 RSVD_TP_78 N2
1KOhm 1 R0713 2 FDI_INT H31 PCIE_MTX_GRX_C_P7 C0724 1 2 0.1UF/10V PCIE_MTX_GRX_P8 DSC J29 AD5
@ PEG_TX[7] PCIE_MTX_GRX_C_P8 C0725 1 0.1UF/10V PCIE_MTX_GRX_P7 DSC RSVD26 RSVD_TP_79
PEG_TX[8] K28 2 J28 RSVD27 RSVD_TP_80 AD7
1KOhm 1 R0712 2 FDI_LSYNC0 G30 PCIE_MTX_GRX_C_P9 C0726 1 2 0.1UF/10V PCIE_MTX_GRX_P6 DSC W3
@ PEG_TX[9] PCIE_MTX_GRX_C_P10 C0727 1 0.1UF/10V PCIE_MTX_GRX_P5 DSC RSVD_TP_81
PEG_TX[10] G29 2 A34 RSVD_NCTF_28 RSVD_TP_82 W2
1KOhm 1 R0714 2 FDI_LSYNC1 F28 PCIE_MTX_GRX_C_P11 C0728 1 2 0.1UF/10V PCIE_MTX_GRX_P4 DSC A33 N3
@ PEG_TX[11] PCIE_MTX_GRX_C_P12 C0729 1 0.1UF/10V PCIE_MTX_GRX_P3 DSC RSVD_NCTF_29 RSVD_TP_83
PEG_TX[12] E27 2 RSVD_TP_84 AE5
D28 PCIE_MTX_GRX_C_P13 C0730 1 2 0.1UF/10V PCIE_MTX_GRX_P2 DSC C35 AD9
PEG_TX[13] PCIE_MTX_GRX_C_P14 C0731 1 0.1UF/10V PCIE_MTX_GRX_P1 DSC RSVD_NCTF_30 RSVD_TP_85
PEG_TX[14] C27 2 B35 RSVD_NCTF_31
C25 PCIE_MTX_GRX_C_P15 C0732 1 2 0.1UF/10V PCIE_MTX_GRX_P0 DSC
PEG_TX[15]
VSS AP34 H_RSVD86
Default: DSC Only PCIE_MTX_GRX_N[0..15] 70 VSS (AP34):
SOCKET989
DSC only: Pop all resisters PCIE_MTX_GRX_P[0..15] 70 NC CRB
UMA only: Depop all resisters SOCKET989 EDS/DG GND
H_CFG0
H_CFG3 H_CFG4
1
CFG0 : PCIE Config Strap CFG3 : PCIE Lane Reversal CFG4 : eDP Presence
1
1
R0708
3.01KOHM R0709 R0710
@ 1% H = Single PEG (Default) 3.01KOHM H = Normal Operation (Default) 3.01KOHM H = Disable (Default)
1% @ 1%
L = Bifurcation enabled L = Lane Numbers Reversed L = Enable
2
A A
DSC
2
2
Title : CPU(1)
BU1-RD Div.1-HW RD Dept.1 Engineer: Johnson Huang
Size Project Name Rev
Custom
AIC70 2.0
Date: W ednesday, May 04, 2011 Sheet 7 of 77
5 4 3 2 1
5 4 3 2 1
U0701D
U0701C
22 M_B_DQ[0:63] SB_CK[0] W8 M_CLK_DDR2 22
SB_CK#[0] W9 M_CLK_DDR#2 22
AA6 M_B_DQ0 B5 M3
SA_CK[0] M_CLK_DDR0 21 SB_DQ[0] SB_CKE[0] M_CKE2 22
AA7 M_B_DQ1 A5
21 M_A_DQ[0:63] SA_CK#[0] M_CLK_DDR#0 21 SB_DQ[1]
P7 M_B_DQ2 C3
SA_CKE[0] M_CKE0 21