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PREPARED BY: DATE SPEC No.: LD-K25310A
FILE No.:
APPROVED BY: DATE ISSUE: Apr. 22, 2013
PAGE:20 pages
DISPLAY DEVICE BUSSINESS GROUP
SHARP CORPORATION
SPECIFICATION
DEVICE SPECIFICATION FOR
TFT-LCD Open Cell
Model No. LK315D3HA9K
CUSTOMER'S APPROVAL
DATE
PRESENTED
BY BY
K.Chohka
Dept. General manager
DEVELOPMENT DEPT. I
DISPLAY DEVICE UNIT V
DISPLAY DEVICE BUSINESS DIVISION
SHARP CORPORATION
RECORDS OF REVISION
MODEL No. : LK315D3HA9K
REVISED
SPEC No. DATE PAGE SUMMARY NOTE
No.
LD-K23510 Apr. 12, 2013 - - - 1st ISSUE
Apr. 22, 2013 A P16 - Revision of the ESD test condition. A 2nd ISSUE
Jun.19,2013 B P2 - Change the surface resistance of the 3rd ISSUE
protection film defined side. B-1
P8 - Change of t5 minimum definition. B-2
P15 - Change of the content indicated in Model No.
Area of the Cell Box Label and the Palette
Label. B-3
P20 - Correction of the surface resistance of the Cell
Box. B-4
LD-K25310B-1
1. Application
This specification applies to the color 31.5 inch TFT-LCD Open Cell LK315D3HA9K.
* This specification is proprietary products of SHARP CORPORATION ("SHARP") and includes materials
protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by
any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of
SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.
* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for life
support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these technical literature.
* Contact and consult with a SHARP sales representative for any questions about this device.
2. Overview
This Open Cell is a color-active-matrix-LCD-Open-Cell incorporating amorphous silicon TFT (Thin Film
Transistor). It is composed of a color TFT-LCD panel, driver ICs, Source PWBs.
The following contents can be achieved in using LK0DZ1C0522 (Timing Control-PWB) and LK0DZ1C0383
(Control-Source-FPC) that SHARP specifies.
Graphics and texts can be displayed on a 1920 x RGB x 1080 dots panel with about seventeen million colors by
using 8bit LVDS (Low Voltage Differential Signaling) to interface, +12V of DC supply voltages.
And in order to display the moving picture smoothly, this Open Cell and C-PWB supports the Over Shoot
driving (OS driving) technology on the Single Frame Rate (SFR). In the OS driving technology, signals are
being applied to the Liquid Crystal according to a pre-fixed process as an image signal of the present frame
when a difference is found between image signal of the previous frame and that of the current frame after
comparing them.
TFT LCD Panel
(1920 x RGB x 1080)
Open Cell
[LK315D3HA9K]
CN2 CN1
Gate Driver
Source Driver
1 80
Source PWB (S-PWB)
CS-FPC
[LK0DZ1C0383]
CN1 Control PWB (C-PWB)
1 51
[LK0DZ1C0522]
LD-K25310B-2
3. Mechanical Specifications
Parameters Specifications Unit
80.131 (Diagonal) cm
Display size
31.5475 (Diagonal) inch
Active area 698.40 (H) x 382.85 (V) mm
1920 (H) x 1080 (V)
Pixel format pixel
(1pixel = R + G + B dot)
Pixel pitch 0.36375 (H) x 0.36375 (V) mm
Pixel configuration R, G, B vertical stripe
Display mode Normally black
Outline dimensions [Note1] 723.08 (H) x 444.4 (V) x 2.85 (D) mm
Mass 1.3+0.3 kg
- Front polarizer : Super Low Haze Anti Glare
Surface treatment [Note2,3] Hard coating 2H and more, Haze: Less than 3%
- Rear polarizer : Hard coating less (B)
[Note1] The thickest point is 80pin CN of S-PWB, the polarizer area thickness is shown the outline drawing in
P19.
[Note2] With the protection film removed.
[Note3] Surface resistance of the protection film adhesive side is 1010 ohm/sq. B-1
4. Open Cell Driving Specifications
4.1. Driving Interface of C-PWB SHARP specifies [LK0DZ1C0522]
CN1: Power and LVDS data input
- Using connector: FI-RNE51SZ-HF (Japan Aviation Electronics Ind., Ltd.)
- Mating connector: FI-RE51HL, FI-RE51CL or equivalent device (Japan Aviation Electronics Ind., Ltd.)
- Mating LVDS transmitter: THC63LVD1023 or equivalent device
Pin No. Symbol Function Remark
1 P_VCC +12V Power Supply
2 P_VCC +12V Power Supply
3 P_VCC +12V Power Supply
4 P_VCC +12V Power Supply
5 P_VCC +12V Power Supply
6 NC It is required to set non-connection (OPEN)
7 GND
8 GND
9 GND
10 CH1_0- LVDS differential data input
11 CH1_0+ LVDS differential data input
12 CH1_1- LVDS differential data input
13 CH1_1+ LVDS differential data input
14 CH1_2- LVDS differential data input
15 CH1_2+ LVDS differential data input
16 GND
17 CH1_CLK- LVDS Clock signal
18 CH1_CLK+ LVDS Clock signal
19 GND
20 CH1_3- LVDS differential data input
21 CH1_3+ LVDS differential data input
22 Reserved
23 Reserved
24 GND
25 CH3_0- LVDS differential data input
26 CH3_0+ LVDS differential data input
LD-K25310B-3
27 CH3_1- LVDS differential data input
28 CH3_1+ LVDS differential data input
29 CH3_2- LVDS differential data input
30 CH3_2+ LVDS differential data input
31 GND
32 CH3_CLK- LVDS Clock signal
33 CH3_CLK+ LVDS Clock signal
34 GND
35 CH3_3- LVDS differential data input
36 CH3_3+ LVDS differential data input
37 Reserved
38 Reserved
39 GND
40 SCL_I I2C CLK Pull up: 3.3V [Note1]
41 NC It is required to set non-connection (OPEN)
42 NC It is required to set non-connection (OPEN)
43 WP I2C bus enable (L/Open: disable, H: enable) [Note2]
44 SDA_I I2C DATA Pull up: 3.3V [Note1]
45 LVDS_SEL Select LVDS data order [Note4] Pull down: GND [Note3]
46 BIST_EN Test pattern enable (L/Open: enable, H: disable) [Note4]
47 NC It is required to set non-connection (OPEN)
48 NC It is required to set non-connection (OPEN)
49 NC It is required to set non-connection (OPEN)
50 NC It is required to set non-connection (OPEN)
51 NC It is required to set non-connection (OPEN)
CN3: Aging Test Pattern Control
- Using connector: 20037WR-08 (YeonHo)
Pin No. Symbol Function Remark
1 VDD12V +12V Power Supply
2 VDD12V +12V Power Supply
3 GND
4 A_EN Test pattern enable (L/Open: enable, H: disable) [Note4]
5 WP I2C bus enable (L/Open: disable, H: enable) [Note2]
6 SDA I2C DATA Pull up: 3.3V [Note1]
7 SCL I2C CLK Pull up: 3.3V [Note1]
8 GND
[Note] GND of a liquid crystal panel drive part should be connected with a module chassis.
[Note1] The equivalent circuit figure of the terminal for SCL_I, SDA_I.
3.3V
4.7kohm
Terminal
[Note2] The equivalent circuit figure of the terminal for WP.
3.3V
4.7kohm
22ohm
Terminal
10kohm
I2C control is for EDID writing and Vcom adjustment.
LD-K25310B-4
[Note3] The equivalent circuit figure of the terminal for LVDS_SEL.
Terminal
100ohm
10kohm
[Note4] The equivalent circuit figure of the terminal for BIST_EN, A_EN.
3.3V
4.7kohm
Terminal
100ohm
[Note5] LVDS Data order
LVDS_SEL
Data H(3.3V) L(GND) or Open
[VESA] [JEIDA]
TA0 R0(LSB) R2
TA1 R1 R3
TA2 R2 R4
TA3 R3 R5
TA4 R4 R6
TA5 R5 R7(MSB)
TA6 G0(LSB) G2
TB0 G1 G3
TB1 G2 G4
TB2 G3 G5
TB3 G4 G6
TB4 G5 G7(MSB)
TB5 B0(LSB) B2
TB6 B1 B3
TC0 B2 B4
TC1 B3 B5
TC2 B4 B6
TC3 B5 B7(MSB)
TC4 NA NA
TC5 NA NA
TC6 DE(*) DE(*)
TD0 R6 R0
TD1 R7 R1
TD2 G6 G0
TD3 G7 G1
TD4 B6 B0
TD5 B7 B1
TD6 N/A N/A
NA: Not Available
(*)Since the display position is prescribed by the rise of DE (Display Enable) signal, please do not fix DE
signal during operation at "High".
LD-K25310B-5
LVDS_SEL = High (3.3V) : VESA
1cycle
CH1_CLK+, CH3_CLK+
CH1_CLK-, CH3_CLK-
CH1_0+, CH3_0+
R1 R0 G0 R5 R4 R3 R2 R1 R0 G0
CH1_0-, CH3_0-
CH1_1+, CH3_1+
G2 G1 B1 B0 G5 G4 G3 G2 G1 B1
CH1_1-, CH3_1-
CH1_2+, CH3_2+
B3 B6 DE NA NA B5 B4 B3 B2 DE
CH1_2-, CH3_2-
CH1_3+, CH3_3+
R7 R6 NA B7 B6 G7 G6 R7 R6 NA
CH1_3-, CH3_3-
LVDS_SEL = Low (GND) or OPEN : JEIDA
1cycle
CH1_CLK+, CH3_CLK+
CH1_CLK-, CH3_CLK-
CH1_0+, CH3_0+
R3 R2 G2 R7 R6 R5 R4 R3 R2 G2
CH1_0-, CH3_0-
CH1_1+, CH3_1+
G4 G3 B3 B2 G7 G6 G5 G4 G3 B5
CH1_1-, CH3_1-
CH1_2+, CH3_2+
B5 B4 DE NA NA B7 B6 B5 B4 DE
CH1_2-, CH3_2-
CH1_3+, CH3_3+
R1 R0 NA B1 B0 G1 G0 R1 R0 NA
CH1_3-, CH3_3-
DE: Display Enable, NA: Not Available (Fixed Low)
4.2. Vcom adjustment
For the prevention of long-time image sticking of TFT-LCD panel, be sure to adjust Vcom in such ways that
flicker is minimum on the center of display by visual or flicker meter.
- Vcom IC : MAX9684ETP+ (Maxim Integrated Products, Inc.) for I2C control from CN1 (Pin No. 40, 43,
44) or CN3 (Pin No.5,6,7) of C-PWB SHARP specifies [LK0DZ1C0522]
- Adjustment pattern :
---
V128
V128
V128
V128
V0
V0
V0
V0
V0
V128
V128
V128
V128
V128
V0
V0
V0
V0
--- ---
1 pixel
V128
V128
V128
V128
V0
V0
V0
V0
V0
---
1 pixel 1 dot
LD-K25310B-6
4.3. Driving interface of S-PWB
CN1 and CN2 on the S-PWB: Input signal from C-PWB
- Using connector: 04 6806 080 000 846+ (KYOCERA Connector Products) or equivalent connector
Pin No. CN1 CN2
1 GND GND
2 Gate Power (L) Gate Power (L)
3 Gate Power (H) Gate Power (H)
4 Gate Start Pulse2 Gate Start Pulse 2
5 Gate Start Pulse1 Gate Start Pulse 1
6 Gate Clock Gate Clock
7 Gate Output Enable Gate Output Enable
8 Gate Scan Control Gate Scan Control
9 MPD Control 1 MPD Control 1
10 MPD Control 2 MPD Control 2
11 MPD Control 3 MPD Control 3
12 MPD Control 4 MPD Control 4
13 MPD Control 5 MPD Control 5
14 MPD Control 6 MPD Control 6
15 MPD Control 7 MPD Control 7
16 MPD Control 8 MPD Control 8
17 MPD Control 9 MPD Control 9
18 MPD Control 10 MPD Control 10
19 MPD Control 11 MPD Control 11
20 MPD Control 12 MPD Control 12
21 Vcom Vcom
22 Gray Level 9 (H) Gray Level 9 (H)
23 Gray Level 8 (H) Gray Level 8 (H)
24 Gray Level 7 (H) Gray Level 7 (H)
25 Gray Level 6 (H) Gray Level 6 (H)
26 Gray Level 5 (H) Gray Level 5 (H)
27 Gray Level 4 (H) Gray Level 4 (H)
28 Gray Level 3 (H) Gray Level 3 (H)
29 Gray Level 2 (H) Gray Level 2 (H)
30 Gray Level 1 (H) Gray Level 1 (H)
31 miniLVDS data(+) GND
32 miniLVDS data(-) GND
33 miniLVDS data(+) GND
34 miniLVDS data(-) GND
35 miniLVDS data(+) GND
36 miniLVDS data(-) GND
37 GND GND
38 miniLVDS clock(+) GND
39 miniLVDS clock(-) GND
40 GND GND
41 miniLVDS data(+) GND
42 miniLVDS data(-) GND
43 miniLVDS data(+) GND
44 miniLVDS data(-) miniLVDS Cascade Control 2
45 miniLVDS data(+) miniLVDS Scan Control
46 miniLVDS data(-) miniLVDS Cascade Control 1
47 Logic Circuit Power Logic Circuit Power
48 Logic Circuit Power Logic Circuit Power
49 Reserved Reserved
50 Polarity Control Polarity Control
LD-K25310B-7
51 Latch Strobe Latch Strobe
52 GND GND
53 miniLVDS Cascade Control 2 miniLVDS data(+)
54 miniLVDS Scan Control miniLVDS data(-)
55 miniLVDS Cascade Control 1 miniLVDS data(+)
56 GND miniLVDS data(-)
57 GND miniLVDS data(+)
58 GND miniLVDS data(-)
59 GND GND
60 GND miniLVDS clock(+)
61 GND miniLVDS clock(-)
62 GND GND
63 GND miniLVDS data(+)
64 GND miniLVDS data(-)
65 GND miniLVDS data(+)
66 GND miniLVDS data(-)
67 GND miniLVDS data(+)
68 GND miniLVDS data(-)
69 Analog circuit power Analog circuit power
70 Analog circuit power Analog circuit power
71 Gray Level 1 (L) Gray Level 1 (L)
72 Gray Level 2 (L) Gray Level 2 (L)
73 Gray Level 3 (L) Gray Level 3 (L)
74 Gray Level 4 (L) Gray Level 4 (L)
75 Gray Level 5 (L) Gray Level 5 (L)
76 Gray Level 6 (L) Gray Level 6 (L)
77 Gray Level 7 (L) Gray Level 7 (L)
78 Gray Level 8 (L) Gray Level 8 (L)
79 Gray Level 9 (L) Gray Level 9 (L)
80 GND GND
4.4. Electrical characteristics of input voltage
Parameter Symbol Condition Ratings Unit Remark
Input voltage VI Ta=25oC -0.3 ~ 3.6 V [Note1]
12V supply voltage VCC Ta=25oC 0 ~ +14 V
LVDS Voltage VLVDS Ta=25 oC -0.3 ~ 3 V [Note2]
o
Storage temperature Tstg - -25 ~ +60 C [Note3]
o
Operation temperature Topa - 0 ~ +60 C [Note3]
[Note1] LVDS_SEL, I2C_SCL, I2C_SDA, WP
[Note2] CH1_CLK