Text preview for : eS35-45 circuit board manual.pdf part of Toshiba eS350-450 PC board repair manual



Back to : eS35-45 circuit board man | Home

PC BOARD REPAIR MANUAL
DIGITAL PLAIN PAPER COPIER

DP4500/3500




File No. 31120001
Copyright 2001



TOSHIBA TEC CORPORATION
GENERAL PRECAUTIONS REGARDING THE INSTALLATION
AND SERVICE FOR THE COPIER DP4500/3500
The installation and service should be done by a qualified service technician.


1. Transportation/Installation
· When transporting/installing the copier, employ two persons and be sure to use the positions as
indicated below.
The copier is quite heavy and weighs approximately 73kg (161lb), therefore pay full attention when
handling it.




· Be sure to use a dedicated outlet with AC 115V or 120V/15A (220V, 230V, 240V/10A) or more for
its power source.
· The copier must be grounded for safety.
Never ground it to a gas pipe or a water pipe.
· Select a suitable place for installation.
Avoid excessive heat, high humidity, dust, vibration and direct sunlight.
· Also provide proper ventilation as the copier emits a slight amount of ozone.
· To insure adequate working space for the copying operation, keep a minimum clearance of
80 cm (32") on the left, 80 cm (32") on the right and 10 cm (4") in the rear.
· The socket-outlet shall be installed near the copier and shall be easily accessible.


2. Service of Machines
· Basically, be sure to turn the main switch off and unplug the power cord during service.
· Be sure not to touch high-temperature sections such as the exposure lamp, the fuser unit, the
damp heater and their periphery.
· Be sure not to touch high-voltage sections such as the chargers, high-voltage transformer, IH
control circuit, exposure lamp control inverter, inverter for the LCD backlight and power supply
unit. Especially, the board of these components should not be touched since the electirc charge
may remain in the condensers, etc. on them even after the power is turned OFF.
· Be sure not to touch rotating/operating sections such as gears, belts, pulleys, fan, etc.
· Be careful when removing the covers since there might be the parts with very sharp edges under-
neath.
· When servicing the machines with the main switch turned on, be sure not to touch live sections
and rotating/operating sections. Avoid exposure to laser radiation.
· Use suitable measuring instruments and tools.
· Avoid exposure to laser radiation during servicing.
- Avoid direct exposure to the beam.
- Do not insert tools, parts, etc. that are reflective into the path of the laser beam.
- Remove all watches, rings, bracelets, etc. that are reflective.
3. Main Service Parts for Safety
· The breaker, door switch, fuse, thermostat, thermofuse, thermistor, etc. are particularly important
for safety. Be sure to handle/install them properly.


4. Cautionary Labels
· During servicing, be sure to check the rating plate and the cautionary labels such as "Unplug the
power cord during service", "Hot area", "Laser warning label" etc. to see if there is any dirt on their
surface and whether they are properly stuck to the copier.


5. Disposition of Consumable Parts/Packing Materials
· Regarding the recovery and disposal of the copier, supplies, consumable parts and packing mate-
rials, it is recommended to follow the relevant local regulations or rules.


6. When parts are disassembled, reassembly is basically the reverse of disassembly unless
otherwise noted in this manual or other related documents. Be careful not to reassemble
small parts such as screws, washers, pins, E-rings, star washers in the wrong places.


7. Basically, the machine should not be operated with any parts removed or disassembled.


8. Precautions Against Static Electricity
· The PC board must be stored in an anti-electrostatic bag and handled carefully using a wristband,
because the ICs on it may become damaged due to static electricity.
Caution: Before using the wristband, pull out the power cord plug of the copier and make
sure that there are no uninsulated charged objects in the vicinity.




Caution : Dispose of used batteries and RAM-ICs including lithium batteries
according to the manufacturer's instructions.


Attention : Se débarrasser de batteries et RAM-ICs usés y compris les batteries en
lithium selon les instructions du fabricant.


Vorsicht : Entsorgung der gebrauchten Batterien und RAM-ICs (inklusive
der Lithium-Batterie) nach Angaben des Herstellers.
Contents

1. DESCRIPTION OF CIRCUIT ............................................................................................... 1-1
1.1 System Block Diagram ................................................................................................................. 1-1
1.2 CPU Functions ............................................................................................................................. 1-2
1.2.1 Main CPU (TMP95C063F) .................................................................................................. 1-2
1.2.2 Gate Array (LCA301) .......................................................................................................... 1-8
1.2.3 Scanner CPU (TMP95C063F) .......................................................................................... 1-14
1.2.4 System CPU (TMPR3927) ................................................................................................ 1-18


2. PC BOARD CIRCUIT ............................................................................................................. 2-1
(1) System Control Circuit (PWA-SYS) .......................................................................................... 2-2
(2) Engine Control Circuit (PWA-LGC) ......................................................................................... 2-28
(3) Scanner Control Circuit (PWA-SLG) ....................................................................................... 2-51
(4) CCD Control Circuit (PWA-CCD) ............................................................................................ 2-59
(5) Scanner Motor Circuit (PWA-SDV) ......................................................................................... 2-63
(6) Laser Drive Circuit (PWA-LDR) ............................................................................................... 2-64
(7) Laser Beam Detection Circuit (PWA-SNS) ............................................................................. 2-66
(8) ADU Control Circuit (PWA-ADU) ............................................................................................ 2-67
(9) Fuse Control Circuit (PWA-FUS) ............................................................................................ 2-69




Feb. 2001 © TOSHIBA TEC DP4500/3500 CONTENTS
DP4500/3500 CONTENTS Feb. 2001 © TOSHIBA TEC
PWA-F-SYS-320 RADF
3.3V
System Serial-I/F
66M




Feb. 2001
PWA-F-SLG-320 80

Total: 20MHz CCD




©
3.3V SDRAM-BUS 32MB
32/16 SRAM 5VI/F
SDRAM 256Kb 20MHz 20MHz
TX3927 64Mbx4
5Vtorelant
CPU Total: 4MB 16 S-CPU 8
16 5V FROM
32bit-RISC FROM TMP95C063 Amp
4Mb ASIC
Speed:133MHz 16Mbx2 16bit
Serial-I/F 40MHz
8.3M 20M
SRAM (324BGA) 40MHz
LAN System 4Mb
Printer controller 8 40MHz




TOSHIBA TEC
A/D
BT 5VI/F




3.3V ROM-Bus
40MHz

5V/3.3V 8
5V




5V ADR/DAT-Bus
5MHz
IDE I/F 32 20M
ASIC
1.1 System Block Diagram




4 Image Data PWA-F-CCD-320
33MHz 3.3V PCI-Bus
FAX board (QFP176)
5V 3.3V
HDD
SCN_MT
8
DRIVER
5V 32 2 or 3
DRAM
8 5V 3.3V SDRAM
ASIC 32MB
DRAM
64Mbit
SDRAM
1. DESCRIPTION OF CIRCUIT




33MHz/66MHz 66MHz 32MB EPROM Scanner
64Mb
4Mb




LCD
(352BGA) Total:32MB PWA-F-DLM-320




1-1
RTC




0
1
4
7
EPROM




2
5
8
NVRAM 16Mbx2




CLR/STP
8Kb PWA-F-DLS-320




3
6
9




ASM-F-PNL-320
3.3V ISA-Bus
5MHz
Serial-I/F
EWS
Image Data 68 ASIC Debug
Serial-I/F

5V 3.3V 3.3V
3.3V
8bit ,R ,R PWA-F
PFP 5V
5V 3.3V
D/A -LDR-320
LCA301 FROM 3.3V 2




DP4500/3500
PWA-F ASIC 4Mb
2 ASIC LD
-ADU-320 ASIC LVDS 59MHz/4-divided
8M SRAM 40MHz Image Data
256Kb (208QFP)
ADU




ADR/DAT-Bus
16
Finisher 5V Laser
NVRAM Beam
M-CPU 8Kb
(skt) Sensor
IPC TMP95C063F
16bit
5V 59M
20M
PWA-F-LGC-320 20M EPROM
Printer
4Mb
PWA-F-DLM-320




CIRCUIT DESCRIPTION
1.2 CPU Functions
1.2.1 Main CPU (TMP95C063F)
(1) Outline and Features
The TMP95C063F was developed as a high-speed, advanced 16-bit microcontroller for a range of mid-
to large-scale equipment.
TMP95C063F is presented in a 144-pin plastic flat package. Its features are as follows.
(1) Original high-speed 16-bit CPU (900H_CPU)
· Instruction mnemonics upwardly compatible with TLCS-90/900
· 16-Mbyte linear address space
· General-purpose registers using register bank system
· 16-bit multiplication/division instructions, bit transfer/arithmetic instructions
· Micro DMA: four channels (640 ns/2 bytes at 25 MHz)
(2) Minimum instruction execution time: 160 ns (at 25 MHz)
(3) Internal RAM: No
Internal ROM: No
(4) External memory expansion
· Expandable up to 16 Mbytes (common to programs and data)
· External data bus width selection pin (AM8/16)
· Can use both 8- and 16-bit external buses
... Dynamic data bus sizing
(5) Internal DRAM controller: two channels
· 2CAS/2WE selectable
(6) 8-bit timer: eight channels
(7) 16-bit timer: two channels
(8) Pattern generator: four bits, two channels
(9) General-purpose serial interface: two channels
· Baud rate generated by external clock
(10) 10-bit A/D converter: eight channels
(11) 8-bit D/A converter: two channels
(12) Watchdog timer
(13) Chip selector, wait controller: four blocks
(14) Interrupt function:
· CPU interrupts: 2 (software interrupt instructions, illegal instructions)
· Internal interrupts: 22 (seven priority levels available)
· External interrupts: 11 (seven priority levels available)
(15) Input/output ports
91 pins
(16) Standby function
Three HALT modes (RUN, IDLE, STOP)


DP4500/3500 CIRCUIT DESCRIPTION 1-2 Feb. 2001 © TOSHIBA TEC
(2) Main CPU functions
The main CPU has an interface with the system CPU, engine gate array, finisher interface (IPC) and
ASIC on laser system, respectively and works to control the entire copier engine. The control program
is stored in mounted flash memory (MBM29F400TC). However, engine-related adjustment values, etc.
are stored in a battery backed-up RAM (NVM).
In addition to the main unit control, the main CPU performs the control of the following.
· Polygonal mirror motor control
· Laser system signal control
· Control for download signal
­ AD output ­
· Thermistor input (fuser roller/drum)
· Auto-toner input
· 24V check (front cover open/close detection)


(3) Pin assignment
PD0/INT0
PC7/AN7
PC6/AN6
PC5/AN5
PC4/AN4
PC3/AN3
PC2/AN2
PC1/AN1
P07/AN0
VREFH
VREFL




DVCC
AVCC




DVSS
AVSS




PD1
PD2
PD3
PD4
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7

A0
A1
A2
A3
A4
A5
A6
A7
A8
144 109


1 140 135 130 125 120 115 110 108
DAREFH
DVCC
DAREFL
A9
DAOUT0
A10
DAOUT1
105 A11
DVSS 5
A12
PB0/INT4/T18
A13
PB1/INT5/T19
A14
PB2/TO8
A15
PB3/TO9
100 A16/P20
PB4/INT6/TIA 10
A17/P21
PB5/INT7/TIB TMP95C063F A18/P22
PB6/TOA MFP144
A19/P23
PB7/TOB
A20/P24
PA0/TXD0
95 A21/P25
PA1/RXD0 15
A22/P26
PA2/CTS0
A23/P27
PA3/SCLK0
DVSS
DVCC
D15/P17
PA4/TXD1 TOP VIEW
90 D14/P16
PA5/RXD1 20
D13/P15
PA6/CTS1
D12/P14
PA7/SCLK1
D11/P13
NMI
D10/P12
P90/TI0
85 D9/P11
P91/TO1 25
D8/P10
P92/TI2
DVCC
P93/TO3
D7
P94/TI4
D6
P95/TO5
80 D5
P96/TI6 30
D4
P97/TO7
D3
T80/BS
D2
P81/SCOUT
D1
P82/WAIT 75 D0
AM8/16 35
DVSS
CLK
RD
36 73
40 45 50 55 60 65 70


37 72
DVSS
X1
X2
EA
RESET
WDTOUT
P83/NMI2
P84/INT0
P85/INT1
P86/INT2
P87/INT3
DVCC
P70/PG00
P71/PG01
P72/PG02
P73/PG03
P74/PG10
P75/PG11
P76/PG12
P77/PG13
DVSS
P67/UCAS3/UW3/WE3
P66/LCAS3/LW3/REFOUT3
P65/CAS3/WE3
P64/CS3/RAS3
P63/UCAS1/UW1/WE1
P62/LCAS1/LW1/REFOUT1
P61/CAS1/WE1
P60/CS1/RAS1
P57/CS2
P56/CS0
P55/R/W
P54/BUSAK
P53/BUSRQ
P52/HWR
WR




Pin assignment diagram (top view)
Feb. 2001 © TOSHIBA TEC 1-3 DP4500/3500 CIRCUIT DESCRIPTION
I/O map for the main CPU (TMP95C063F)
Port name Setup Signal name Function
P97/TO7 Input
P96/TI6 Input
P95/TO5 Output ADMCK-1 Reference clock for ADU motor
P94/TI4 Input IPCSW-0 PC board for finisher, installed: L, uninstalled: H
P93/TO3 Output POMON-0 Polygonal motor ON signal, L: ON, H: OFF
P92/TI2 Input POMPL-1 Polygonal motor PLL signal, L: normal, H: OFF
P91/TO1 Output POMBK-0 Polygonal motor brake signal, L: ON, H: OFF
P90/TIO Output ROMLD-1 Download status LED, H: ON
P87/INT3 Input PDWN-1 H when there is voltage drop of 5V, L in any other cases (Rising edge detection)
P86/INT2 Input CMINT-1 Main CPU system CPU reception interrupt (CMINT)
P85/INT1 ­
P84/INT0 Input STINT-1 System CPU main CPU transmission interrupt (STINT)
P83/NMI2 Output
P82/WAIT Output
P81/SCOUT Output
P80/BS ­
P77/PG13 Output EXTMD-0 Exit motor output signal (low active)
P76/PG12 Output EXTMC-0 Exit motor output signal (low active)
P75/PG11 Output EXTMB-0 Exit motor output signal (low active)
P74/PG10 Output EXTMA-0 Exit motor output signal (low active)
P73/PG03 ­
P72/PG02 ­
P71/PG01 ­
P70/PG00 ­
P67/UCAS3/UW3 ­
/WE3
P66/LCAS3/LW3 ­
/REFOUT
P65/CAS3/WE3 ­
P64/CS3/RAS3 Output CS3-0 Chip select for SRAM
P63/UCAS1/UW1 ­
WE1
P62/LCAS1/LW1 ­
REFOUT1
P61/CAS1/WE1 ­
P60/CS1/RAS1 Output CS1-0 Chip select for LCA301
P57/CS2 Output CS2-0 Chip select for FROM
P56/CS0 Output CS0-0 Chip select for ASIC
P55/RW Output RW-0 Interface switching control signal for option
P54/BUSAK ­

DP4500/3500 CIRCUIT DESCRIPTION 1-4 Feb. 2001 © TOSHIBA TEC
Port name Setup Signal name Function
P53/BUSRQ ­
P52/HWR ­
WR WR-0 External memory, write signal
RD RD-0 External memory, read signal
P27/A23 Output A23 Address output (CS generation for FROM)
P26/A22 Output A22 Address output (CS generation for FROM)
P25/A21 ­
P24/A20 ­
P23/A19 Output WD-E WD-E signal, when ENABLE: H, when DISABLE: L
P22/A18 Output A18 Address output
P21/A17 Output A17 Address output
P20/A16 Output A16 Address output
P17/D15 Input/output D15 Data bus
P16/D14 Input/output D14 Data bus
P15/D13 Input/output D13 Data bus
P14/D12 Input/output D12 Data bus
P13/D11 Input/output D11 Data bus
P12/D10 Input/output D10 Data bus
P11/D9 Input/output D9 Data bus
P10/D8 Input/output D8 Data bus
D7 Input/output D7 Data bus
D6 Input/output D6 Data bus
D5 Input/output D5 Data bus
D4 Input/output D4 Data bus
D3 Input/output D3 Data bus
D2 Input/output D2 Data bus
D1 Input/output D1 Data bus
D0 Input/output D0 Data bus
A15 Output A15 Address bus
A14 Output A14 Address bus
A13 Output A13 Address bus
A12 Output A12 Address bus
A11 Output A11 Address bus
A10 Output A10 Address bus
A9 Output A9 Address bus
A8 Output A8 Address bus
A7 Output A7 Address bus
A6 Output A6 Address bus
A5 Output A5 Address bus
A4 Output A4 Address bus
A3 Output A3 Address bus

Feb. 2001 © TOSHIBA TEC 1-5 DP4500/3500 CIRCUIT DESCRIPTION
Port name Setup Signal name Function
A2 Output A2 Address bus
A1 Output A1 Address bus
A0 Output A0 Address bus
PA7/SCLK1 ­
PA6/CTS1 ­
PA5/RXD1 ­
PA4/TXD1 ­
PA3/SCLK0 ­
PA2/CTS0 ­
PA1/RXD0 ­
PA0/TXD0 ­
PB7/TOB ­
PB6/TOA Output POMCK-0 Reference clock for polygonal motor
PB5/TIB/INT7 ­
PB4/TIA/INT6 ­
PB3/TO9 ­
PB2/TO8 ­
PB1/TI9/INT5 ­
PB0/TI8/INT4 ­
PC7/AN7 Input HMS-1 Humidity sensor input
PC6/AN6 Input STHU-1A Fuser side thermistor input
PC5/AN5 Input FCOV-1 Front door switch-1, L: OPEN, H: CLOSE
PC4/AN4 Input THMU-1A Fuser center thermistor input
PC3/AN3 Input FCOV2-0 Front door switch-2, L: OPEN, H: CLOSE
PC2/AN2 Input DRTMP-1 Drum thermistor input
PC1/AN1 Input ATS-1 Auto-toner sensor input
PC0/AN0 Input TNRSW-1 Toner cartridge detection switch, L: detected
PD0/INT8 Input ROMCT-0 Download connector connection signal, L: connected
PD4 Output MVDEN-0 Paper transportation signal to ASIC, L: ENABLE
PD3 Input PVDEN-0A VDEN signal in ASIC, L: printing area
PD2 Input ERR1-1A HSYNC and PWM calibration error signal, H: error
PD1 Output LDON-0 Laser forcedly ON signal, L: ON, H: OFF
PE7 Output LDOFF-0 Laser forcedly OFF signal when trailing edge of the bypass
feeding paper is detected, L:OFF
PE6 Output LE-0 Laser enable signal, L: ENABLE
PE5 Input
PE4 Input
PE3 Output
PE2 Output
PE1 Input
PE0 Input

DP4500/3500 CIRCUIT DESCRIPTION 1-6 Feb. 2001 © TOSHIBA TEC
Port name Setup Signal name Function
DAREFH ­ 5V
DAREFL ­ GND
DAOUT0 ­
DAOUT1 ­
NMI Input 5V
EA Input GND
CLR Input RST-0 Reset at L
CLK ­
WDOUT Output WDT-0 When microcontroller is out of control: L, Normal: H
EA GND
AM8/16 Input AM8/16 L: 16-bit bus, H: 8-bit bus
RESET Input Reset signal
VREFH Input Reference input signal for A/D converter
VREFL Input Reference input signal for A/D converter
AVCC Power supply for A/D converter
AVSS Power supply for A/D converter
X1/X2 Oscillator pin
DVCC 5V power supply
DVSS GND




Feb. 2001 © TOSHIBA TEC 1-7 DP4500/3500 CIRCUIT DESCRIPTION
1.2.2 Gate Array (LCA301)
(1) Gate array functions
The engine gate array is controlled by the main CPU and logical circuits inside the gate array. It has the
following features:
· Pulse motor controlled (ADU)
· Interface with NV-RAM (With the protective circuit provided, data are protected against erroneous
erasure even if a microcontroller is out of control.)
· General input/output pin
· I/F with system
· High voltage transformer control


(2) Pin assignment for the gate array




156 105




157 104




208 53




1 52




DP4500/3500 CIRCUIT DESCRIPTION 1-8 Feb. 2001 © TOSHIBA TEC
I/O map for the gate array (LCA301)

Port name Setup Signal name Function
PA0 Output CLK-A Register control signal for feed section driver control data
PA1 Output CLK-B Register control signal for feed section driver control data
PA2 Output CLK-C Register control signal for feed section driver control data
PA3 Output CLK-D Register control signal for feed section driver control data
PA4 Output ERSLP-0 Discharge lamp, L: ON, H: OFF
PA5 Output MAMON-0 Main motor ON signal, L: ON, H: OFF
PA6 Output MAMBK-0 Main motor BRK signal, L: ON, H: OFF
PA7 Output MAMCW-0 Main motor rotating direction, H: CCW,
L: CW (DC brushless motor)
PB0 Input MAMPL-1 Main motor PLL signal, H: error, L: normal
PB1 Input SDCSW-1 Side door switch, L: CLOSE, H: OPEN
PB2 Input HERR1-0 Induction heating (IH) ERR signal-1
PB3 Input HERR2-0 Induction heating (IH) ERR signal-2
PB4 Input FRDSW-0 Front door switch, L: CLOSE, H: OPEN
PB5 Input ATSSW-1 Auto-toner sensor connection signal,
L: connected, H: disconnected
PB6 Input EXTSW-1 Exit sensor, L: when paper is not detected,
H: when paper is detected
PB7 Input PSTPC-1 Registration sensor, L: when paper is not detected,
H: when paper is detected
PC0 Output DRV-0 Control signal (bus) for feed output driver
PC1 Output DRV-1 Control signal (bus) for feed output driver
PC2 Output DRV-2 Control signal (bus) for feed output driver
PC3 Output DRV-3 Control signal (bus) for feed output driver
PC4 Output DRV-4 Control signal (bus) for feed output driver
PC5 Output DRV-5 Control signal (bus) for feed output driver
PC6 Output DRV-6 Control signal (bus) for feed output driver
PC7 Output DRV-7 Control signal (bus) for feed output driver
A0 Input A0 Address input
A1 Input A1 Address input
A2 Input A2 Address input
A3 Input A3 Address input
A4 Input A4 Address input
A5 Input A5 Address input
A6 Input A6 Address input
A7 Input A7 Address input
A12 Input A12 Address input
A13 Input A13 Address input
A14 Input A14 Address input
D0 Input/output D0 Data bus
Feb. 2001 © TOSHIBA TEC 1-9 DP4500/3500 CIRCUIT DESCRIPTION
Port name Setup Signal name Function
D1 Input/output D1 Data bus
D2 Input/output D2 Data bus
D3 Input/output D3 Data bus
D4 Input/output D4 Data bus
D5 Input/output D5 Data bus
D6 Input/output D6 Data bus
D7 Input/output D7 Data bus
RD Input RD-0 Read signal
WR Input WR-0 Write signal
CS Input CS1-0 Microcontroller chip select signal
CTS Input ­
RXD Input ­
CBSY Input CBSY-0 System I/F: Command BSY signal
CMD Input CMD-0 System I/F: Reception data signal
SACK Input SACK-0 System I/F: Status ACK signal
SERR Input SERR-0 System I/F: Status error signal
RXDINT Output ­
TXDINT Output ­
CMDINT Output CMINT-1 System I/F: Reception interrupt
STSINT Output STINT-1 System I/F: Transmission interrupt
RTS Output ­
TXD Output ­
SBSY Output SBSY-0 System I/F: Status BSY signal
STS Output STS-0 System I/F: Transmission data signal
CACK Output CACK-0 System I/F: Command ACK signal
CERR Output CERR-0 System I/F: Command error signal
SCLK Input ­
RESET Input GARST-0 Reset signal
CNTRST Input ­
TESTSW Input ­ GND
TSTEN Input ­ GND
PD0 Output HPWR1-0 Induction heating (IH) output switching-1
PD1 Output HPWR2-0 Induction heating (IH) output switching-2
PD2 Output HPWR3-0 Induction heating (IH) output switching-3
PD3 Output KCNTO-0 Key copy counter ON signal, L: ON, H: OFF
PD4 Output CTRUP-0 Count signal for coin vendor
PD5 Output FAOF4-0 Fan speed switching signal (IH control board cooling fan),
L: low, H: high
PD6 Output TNRM1-0 Toner L: L: rotates in H: rotates in H:
OFF brake
PD7 Output TNRM2-0 motor L: H: reverse direction L: normal direction H:



DP4500/3500 CIRCUIT DESCRIPTION 1 - 10 Feb. 2001 © TOSHIBA TEC
Port name Setup Signal name Function
PE0 Output RMS0-1 RMS
PE1 Output RMS1-1 RMS
PE2 Output RMS2-1 RMS
PE3 Output RMS3-1 RMS
PE4 Output RMS4-1 RMS
PE5 Output RMS5-1 RMS
PE6 Output RMS6-1 RMS
PE7 Output RMS7-1 RMS
OSC1 Input X1 Oscillator input
OSC2 Output X2 Oscillator output
DICH1 Output DADAT-1 D/A serial data
LDCH1 Output DALTH-1 D/A serial data strobe, L: latch, H: hold
CLKCH1 Output SCK-1 D/A serial clock
DICH2 Output ­
LDCH2 Output ­
CLKCH2 Output ­
PF0 Input RLHSW-0 Main unit receiving tray full sensor of relay unit, H: full
PF1 Input JSPSW-0 Relay unit connection switch-2,
H: connected, L: disconnected
PF2 Input RLCSW-0 Relay unit opening/closing switch, H: OPEN
PF3 Input RLC2S-0 Relay unit transport sensor-2, H: when paper is present
PF4 Input FUSSW-1 Fuser connection signal, L: connected, H: disconnected
PF5 Input TNSW2-1 Toner bag full detection sensor, L: normal, H: full
PF6 Input KCTRC-0 Key copy counter connection signal,
L: connected, H: disconnected
PF7 Input ­
PG0 Output HTRON-0 Fuser (IH) ON signal, L: ON, H: OFF
PG1 Output FAOF3-0 FAN speed switching signal (sub-separation fan),
L: low, H: high
PG2 Output HTRFA-0 Fuser unit cooling fan, L: ON, H: OFF
PG3 Output PWRFN-0 Switching power supply fan, L: ON, H: OFF
PG4 Output TRFA-0 Sub-separation fan, L: ON, H: OFF
PG5 Output MIDFA-0 Middle cooling fan, L: ON, H: OFF
PG6 Output POLFA-0 Laser unit cooling fan, L: ON, H: OFF
PG7 Output EXTFA-0 Exhaust fan, L: ON, H: OFF
PH0 Output IHFA-0 IH control board cooling fan, L: ON, H: OFF
PH1 Output HVTM-0 Main charger, L: ON, H: OFF
PH2 Output HVTT-0 Transfer charger, L: ON, H: OFF
PH3 Output HVTD-0 Developer bias (DC), L: ON, H: OFF
PH4 Output HVTSP-0 Separation charger, L: ON, H: OFF
PH5