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INTEGRATED CIRCUITS
DATA SHEET
TDA8044; TDA8044A Satellite demodulator and decoder
Preliminary specification Supersedes data of 1998 Apr 07 File under Integrated Circuits, IC02 1998 Nov 17
Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
FEATURES · General features: One chip DVB compliant QPSK/BPSK demodulator and concatenated Viterbi/Reed-Solomon decoder with de-interleaver and de-randomizer (ETS 300 421) 3.3 V supply voltage (input pads are 5 V tolerant) Stand-by mode for low power dissipation Internal clock PLL to allow low frequency crystal application and selectable clock frequencies Power-on reset module Package: QFP100 Boundary Scan Test. · QPSK/BPSK demodulator: Interpolator and anti-alias filter to handle a large range of symbol rates without additional external filtering On-chip AGC of the analog input I&Q baseband signals or tuner AGC control. Two on-chip matched A-D converters (7 bits) Half Nyquist (square-root raised-cosine) filter with selectable roll-off factor Large range of symbol frequencies: 0.5 to 45 Msymbols/s for TDA8044 and 0.5 to 30 Msymbols/s for TDA8044A, including SCPC (Single Carrier Per Channel) function Can be used at low channel Signal to Noise Ratio (SNR) Internal carrier recovery, clock recovery and AGC loops with programmable loop filters Two loop carrier recovery enabling phase tracking of the incoming symbols Software carrier sweep for low symbol rate applications SNR estimation External indication of demodulator lock. · Viterbi decoder: Rate 1/2 convolutional code based Constraint length K = 7 with G1 = 171oct and G2 = 133oct.Supported puncturing code rates: 1/2, 2/3, 3/4, 4/5, 5/6, 6/7, 7/8, 8/9 4 bits input for `soft decision' for both I and Q APPLICATIONS
TDA8044; TDA8044A
Truncation length: 144 Automatic synchronisation Channel BER estimation External indication of Viterbi sync lock Differential decoding optional. · Reed-Solomon decoder: (204, 188, T = 8) Reed-Solomon code Automatic (I2C configurable) synchronisation of bytes, transport packets and frames Internal convolutional de-interleaving (I = 12; using internal memory) De-randomizer based on PRBS External indication of RS decoder sync lock External indication of uncorrectable error; (Transport Error Indicator is set) External indication of corrected byte Indication of the number of lost blocks Indication of the number of corrected blocks. · Interface: I2C-bus interface to initialize and monitor the demodulator and FEC decoder. When no I2C usage, default mode is defined Programmable interrupt facility Six bits I/O expander for flexible access to and from the I2C-bus Switchable I2C loop-through to suppress I2C crosstalk in the tuner DiSEqC level 1.X support for dish control applications 3-state mode for transport stream outputs.
· Digital satellite TV: demodulation and forward error correction (FEC).
1998 Nov 17
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
GENERAL DESCRIPTION This document gives preliminary information about the TDA8044 and TDA8044A, which are the successors of the TDA8043. The TDA8044A is only specified where the product deviates from the TDA8044, all other references are the same. The TDA8044 is backwards compatible with the TDA8043, regarding pinning and I2C software. The TDA8044 is a DVB compliant demodulator and error correction decoder IC for reception of QPSK and BPSK modulated signals for satellite applications. It can handle variable symbol rates in the range of 0.5 to 45 Msymbols/s (0.5 to 30 Msymbols/s for TDA8044A) with a minimum number of low cost and non-critical external components. Typical applications for this device are MCPC (Multi Channel Per Carrier), SCPC (Single Channel Per Carrier) and Simulcast. In these applications one satellite transponder contains respectively one broad QPSK-carrier, several small QPSK-carriers and one small QPSK-carrier together with one or two FM-carriers. The TDA8044 has minimal interfaces with the tuner, it only requires the demodulated analog I and Q baseband input signals. Analog to digital conversion is done internally by two matched 7-bit A-D converters. Since all the loops (AGC, clock and carrier recovery) are internal, no feedback to the tuner is needed. However for maximal tuner flexibility, there is the possibility to close the AGC and carrier recovery loop externally via the tuner. The number of external components required for operation of the TDA8044 is very low. Moreover the external components are low cost and non-critical. This gives an easy and low cost application. The TDA8044 runs on a low frequency crystal which is upconverted to a clock frequency by means of an internal PLL. With the PLL different clock frequencies can be selected without changing the crystal. This allows for maximal flexibility concerning symbol rate range combined with minimal power consumption.
TDA8044; TDA8044A
Furthermore the TDA8044 has internal anti-alias filters, which can cover a large range of symbol frequencies (approximately one decade) without the need to switch external (SAW) filters. To cover the whole range of 0.5 to 45 Msymbols/s switching of clock frequency (internally) and filtering (externally) is necessary. The TDA8044 has a double carrier loop configuration which has excellent capabilities of tracking phase noise. Synchronisation of the FEC-unit is done completely internally, thereby minimizing I2C communication. The output of the TDA8044 is highly flexible, allowing different output modes to interface to a demultiplexer/descrambler/MPEG-2 decoder including a 3-state mode. For evaluation of the TDA8044, demodulator and Viterbi outputs can be made available externally. The interfacing of the TDA8044 has been extended compared to the TDA8043. Separate resets are available for logic only, logic plus I2C and carrier loops. A power-on reset module has been implemented which gives a reset signal at power-up. This signal can be used to reset the SDD in order to guarantee correct starting of the IC. Two extra general purpose I/O pins (I/O expanders) have been added. A switchable I2C loop-through to the tuner is implemented to switch off the I2C connection to the tuner. This reduces phase noise in the tuner in case of I2C crosstalk. The transport stream outputs can be put in 3-state mode. Furthermore DiSEqC level 1.X support is integrated for dish control applications. The power consumption in stand-by mode has been decreased considerably.
1998 Nov 17
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
QUICK REFERENCE DATA SYMBOL VDD IDD PARAMETER functional supply voltage total supply current TDA8044 TDA8044A fclk internal clock frequency TDA8044 TDA8044A fsym symbol frequency range TDA8044 TDA8044A Ptot total power dissipation TDA8044 TDA8044A IL SNR Notes 1. Programmable internal frequencies possible: a) Values 10.7, 16, 32, 64 MHz for CFS = 0. b) Values 16, 24, 48, 96 MHz for CFS = 1. 2. CFS is set to logic 0. implementation loss note 5 SNR for locking the SDD note 5 Tamb = 70 °C; note 4 - - - 2 VDD = 3.3 V note 1 notes 1 and 2 CFS = 0 or CFS = 1; fxtal = 4 MHz note 1 notes 1 and 2 note 3 0.5 0.5 10.7 10.7 - - CONDITIONS MIN. 3.05
TDA8044; TDA8044A
TYP. 3.3 320 - - - - - 1150 - 0.3 -
MAX. 3.55 480 350 96 64 45 30 1700 1250 - - V mA mA
UNIT
MHz MHz Msymbols/s Msymbols/s mW mW dB dB
3. Without switching internal clock frequencies, a range of 1 decade can be covered. To cover the full range of symbol frequencies, internal clock frequencies and external (SAW) filters must be switched. Details can be found in the application note. 4. Maximum value is specified for a symbol rate of 45 Msymbols/s, a puncturing rate of 7/8 and a clock frequency of 96 MHz and 3.55 V power supply. Typical value is specified for a symbol rate of 27.5 Msymbols/s, a puncture rate of 3/4 and a clock frequency of 64 MHz. 5. Implementation loss at the demodulator output and minimum SNR to lock the TDA8044 are measured including tuner in a laboratory environment at a symbol rate of 27.5 Msymbols/s and a clock frequency of 64 MHz. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8044H TDA8044AH QFP100 DESCRIPTION plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 × 20 × 2.8 mm VERSION SOT317-2
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
PINNING SYMBOL I2 I3 VSSD1 CFS VSSD2 I4 I5 I6 Q0 VDDD1 Q1 Q2 Q3 Q4 VSSD3 Q5 Q6 VSSD4 VDDD2 PRESET P3 P2 P1 P0 VDDD3 P5 P4 PDOCLK PDO0 PDO1 PDO2 VSSD5 PDO3 PDO4 PDO5 VSSD6 VSSD7 PDO6 POR VDDD4 1998 Nov 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PIN digital I-input bit 2 (ADC bypass) digital I-input bit 3 (ADC bypass) digital ground 1 DESCRIPTION
TDA8044; TDA8044A
clock frequency selection (remains at logic 0 for TDA8044A) digital ground 2 digital I-input bit 4 (ADC bypass) digital I-input bit 5 (ADC bypass) digital I-input bit 6 (ADC bypass - MSB) digital Q-input bit 0 (ADC bypass - LSB) digital supply voltage 1 digital Q-input bit 1 (ADC bypass) digital Q-input bit 2 (ADC bypass) digital Q-input bit 3 (ADC bypass) digital Q-input bit 4 (ADC bypass) digital ground 3 digital Q-input bit 5 (ADC bypass) digital Q-input bit 6 (ADC bypass - MSB) digital ground 4 digital supply voltage 2 set device into default mode quasi-bidirectional I/O port (bit 3) quasi-bidirectional I/O port (bit 2) quasi-bidirectional I/O port (bit 1) quasi-bidirectional I/O port (bit 0) digital supply voltage 3 quasi-bidirectional I/O port (bit 5) quasi-bidirectional I/O port (bit 4) output clock for transport stream bytes parallel data output (bit 0) parallel data output (bit 1) parallel data output (bit 2) digital ground 5 parallel data output (bit 3) parallel data output (bit 4) parallel data output (bit 5) digital ground 6 digital ground 7 parallel data output (bit 6) Power-On Reset (can be connected to PRESET (20)) digital supply voltage 4 5
Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
TDA8044; TDA8044A
SYMBOL VDDD5 VSSD8 VDDD6 VDDD7 PDO7 n.c VSSD9 PDOERR PDOVAL PDOSYNC VSSD10 SCL SDA INT A0 RSLOCK VLOCK DLOCK VDDD8 VDDD9 TEST TRST TCK SCLT SDAT VDDD10 VSSD11 VSSD12 TMS TDO TDI VDDD11 VSSD13 VSSD(AD) VDDD(AD) Vref(B) VSSA1 QA Vref(Q) IA VSSA2 1998 Nov 17 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81
PIN digital supply voltage 5 digital ground 8 digital supply voltage 6 digital supply voltage 7 parallel data output (bit 7) not connected digital ground 9 transport error indicator data valid indicator
DESCRIPTION
transport packet synchronization signal digital ground 10 serial clock of I2C-bus serial data of I2C-bus interrupt output (active LOW) I2C hardware address Reed-Solomon lock indicator Viterbi lock indicator Demodulator lock indicator digital supply voltage 8 digital supply voltage 9 test pin (normally connected to ground) BST optional asynchronous reset (normally connected to ground) BST dedicated test clock (normally connected to ground) serial clock of I2C-bus loop-through serial data of I2C-bus loop-through digital supply voltage 10 digital ground 11 digital ground 12 BST input control signal (normally connected to ground) BST serial test data out BST serial test data in (normally connected to ground) digital supply voltage 11 digital ground 13 digital ground A/D converter digital supply A/D converter bottom reference voltage for ADC analog ground 1 analog input Q AGC decoupling - Q path analog input I analog ground 2 6
Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
TDA8044; TDA8044A
SYMBOL Vref(I) VDDA VDDXTAL XTALI XTALO VSSXTAL VDDD12 VDDD13 VSSD14 D22 VSSD15 VSSD16 VAGC VSSD(test) VDDD14 VDDD15 OUSTD I0 I1 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
PIN AGC decoupling - I path analog supply voltage supply voltage for crystal oscillator crystal oscillator input crystal oscillator output ground for crystal oscillator digital supply voltage 12 digital supply voltage 13 digital ground 14
DESCRIPTION
22 kHz output for dish control applications digital ground 15 digital ground 16 AGC output voltage Test pin, normally connected to ground digital supply voltage 14 digital supply voltage 15 general purpose sigma-delta output digital I-input bit 0 (ADC bypass - LSB) digital I-input bit 1 (ADC bypass)
100
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
TDA8044; TDA8044A
95 VSSD(test) 94 VAGC
97 VDDD15 96 VDDD14
90 VSSD10 89 VDDD13
93 VSSD16 92 VSSD15
98 OUTSD
handbook, full pagewidth
84 VDDXTAL 83 VDDA
88 VDDD12 87 VSSXTAL
86 XTALO
100 I1
I2 I3 VSSD1 CFS VSSD2 I4 I5 I6 Q0
1 2 3 4 5 6 7 8 9
82 Vref(I) 81 VSSA2 80 IA 79 Vref(Q) 78 QA 77 VSSA1 76 Vref(B) 75 VDDD(AD) 74 VSSD(AD) 73 VSSD9 72 VDDD11 71 TDI 70 TDO 69 TMS 68 VSSD8 67 VSSD7 66 VDDD10 65 SDAT 64 SCLT 63 TCK 62 TRST 61 TEST 60 VDDD9 59 VDDD8 58 DLOCK 57 VLOCK 56 RSLOCK 55 A0 54 INT 53 SDA 52 SCL 51 VSSD6 PDOVAL 49 PDOSYNC 50
VDDD1 10 Q1 11 Q2 12 Q3 13 Q4 14 VSSD2 15 Q5 16 Q6 17 VSSD3 18 VDDD2 19 PRESET 20 P3 21 P2 22 P1 23 P0 24 VDDD3 25 P5 26 P4 27 PDOCLK 28 PDO0 29 PDO1 30 PDO2 31 VSSD4 32 PDO3 33 PDO4 34 PDO5 35 VSSD6 36 VSSD7 37 PDO6 38 POR 39 VDDD4 40 VDDD5 41 VSSD5 42 VDDD6 43 VDDD7 44 PDO7 45 n.c. 46 VSSD9 47 PDOERR 48
TDA8044 TDA8044A
85 XTALI
91 D22
99 I0
MGM606
For compatibility in respect to the TDA8043 see Section "Pin compatibility".
Fig.1 Pin configuration.
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
Pin compatibility
TDA8044; TDA8044A
The TDA8044 is backwards pin compatible with the TDA8043, this means that the functional pins of the TDA8043 have been left unchanged on the TDA8044. However due to extra functionality of the TDA8044, some of the not connected pins of the TDA8043 will become functional pins on the TDA8044. The following table lists the modified pins of the TDA8044. Table 1 Modified pins of the TDA8044 TDA8043 FUNCTION not connected not connected not connected not connected not connected not connected not connected not connected not connected not connected not connected not connected not connected not connected TDA8043 SYMBOL CFS VSSD2 P4 P5 VSSD6 VSSD7 POR VSSD9 SCLT SDAT D22 VSSD15 VSSD16 VSSD(test) TDA8044 FUNCTION clock frequency selection digital ground I/O expander bit 4 I/O expander bit 5 digital ground digital ground power-on reset digital ground serial clock of I2C-bus loop-through serial data of I2C-bus loop-through 22 kHz generation output digital ground digital ground test pin, connect to ground
PIN 4 5 26 27 36 37 39 47 64 65 91 92 93 95
If you want to replace the TDA8043 with the TDA8044 and you do not want to use the pins with extra functionality, then the following measures on the PCB layout must be taken to avoid I/O conflicts in the TDA8044: · pin numbers 4, 5, 26, 27, 36, 37, 47, 65, 92, 93 and 95 must be put to ground · pin numbers 39, 64 and 91 must be left not connected. With this measures it is possible to use the TDA8043 and the TDA8044 on the same PCB without any problems. In order to use pins with the extra functionality of the TDA8044, PCB-layout changes are necessary.
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD Vmax Ptot PARAMETER supply voltage pins voltage on all pins total power dissipation TDA8044 TDA8044A Tstg Tamb Tj Notes IC storage temperature operating ambient temperature operating junction temperature Tamb = 70 °C Tamb = 70 °C; note 1 Tamb = 70 °C; note 2 CONDITIONS
TDA8044; TDA8044A
MIN. -0.3 0 - - -55 0 0
MAX. 3.55 VDD 1700 1250 150 70 125
UNIT V V mW mW °C °C °C
1. Maximum power dissipation is specified for 96 MHz clock frequency, 45 Msymbols/s and puncture rate of 7/8. 2. Maximum power dissipation is specified for 64 MHz clock frequency, 30 Msymbols/s and puncture rate of 7/8. THERMAL CHARACTERISTICS SYMBOL Rth j-a TDA8044 TDA8044A HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see "Handling MOS devices" ). PARAMETER thermal resistance from junction to ambient in free air 34 45 K/W K/W VALUE UNIT
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
APPLICATION INFORMATION
TDA8044; TDA8044A
handbook, full pagewidth
FRONT PANEL CONTROL RF-in
FLASH
DRAM (optional)
I TDA8060 Q
TDA8044 TDA8044A
SDD
SAA7214 TMIPS
1394 L + PHY BUFFERS
IEEE1394 IEEE1284 RS232
TSA5056 I2C-bus TUNER I2C-bus AV SAA7215 PES Vxx MODEM 16-Mbit SDRAM 16-Mbit SDRAM (optional) RGB CVBS/YC LR ADAC SWITCHING
SCART 1 SCART 2 SCART 3
telco i/f
MGM605
smart card(s)
TDA8004
Fig.2 Satellite set-top decoder concept.
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
TDA8044; TDA8044A
handbook, full pagewidth +3.3 V
L(1)
VDDD1 15 µF
tuner AGC (optional) 10 k 470
10 10 nF +5V 27 pF C(3) 27 pF XTAL(2) VDDA
+3.3 V
L(1)
VDDD2 15 µF 330 nF VDDD2
VDDD2 C(3) VSD
C(3) 100 nF
22 kHz
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 1 2 3 CFS 4 5 6 7 8 9 VDDD C(3) VDDD1 100 nF 10 11 12 13 14 15 470 k 16 17 18 VDDD1 C(3) P3 P2 P1 P0 VDDD1 C(3) P5 P4 packet data and control outputs PDOCLK PDO0 PDO1 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 POR PDO2 PDO3 PDO5 PDO4 PDO6 C(3) VDDD1 n.c. 80 79 78 77 76 75 74 73 72 71 70 69 68 67
100 nF I 100 nF Q 100 nF VDDD2 C(3) 100 nF
VDDD2 TDI TDO TMS C(3)
TDA8044 TDA8044A
66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 lock signals C(3) I2C-bus to tuner C(3)
VDDD2
VDDD1
+5 V 4.7 k 4.7 k 1.6 k interrupt I2C-bus input
+3.3 V
PDO7 PDOERR PDOSYNC PDOVAL
L(1)
VDDA 15 µF
VDDD1
MGM607
packet data and control outputs
(1) B = SMD bead type C8D8.9/3/3 Grade 4S2. (2) fxtal = 4 MHz (fundamental). (3) C = 6.8 nF, SMD.
Fig.3 Application diagram.
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
PACKAGE OUTLINE
TDA8044; TDA8044A
QFP100: plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
SOT317-2
c
y X
80 81
51 50 ZE
A
e E HE A A2 A1 (A 3) Lp bp 100 1 wM D HD ZD B v M B 30 v M A 31 detail X L
wM pin 1 index
e
bp
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 3.20 A1 0.25 0.05 A2 2.90 2.65 A3 0.25 bp 0.40 0.25 c 0.25 0.14 D (1) 20.1 19.9 E (1) 14.1 13.9 e 0.65 HD 24.2 23.6 HE 18.2 17.6 L 1.95 Lp 1.0 0.6 v 0.2 w 0.15 y 0.1 Z D (1) Z E(1) 0.8 0.4 1.0 0.6 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT317-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
TDA8044; TDA8044A
· Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. · For packages with leads on two sides and a pitch (e): larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. · For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
TDA8044; TDA8044A
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE HLQFP, HSQFP, HSOP, SMS PLCC(3), SQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. SO LQFP, QFP, TQFP not suitable(2) suitable not not recommended(3)(4) recommended(5) not suitable suitable suitable suitable suitable suitable REFLOW(1)
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8044; TDA8044A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
NOTES
TDA8044; TDA8044A
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
NOTES
TDA8044; TDA8044A
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Philips Semiconductors
Preliminary specification
Satellite demodulator and decoder
NOTES
TDA8044; TDA8044A
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Philips Semiconductors a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 © Philips Electronics N.V. 1998
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Printed in The Netherlands
545104/750/02/pp20
Date of release: 1998 Nov 17
Document order number:
9397 750 04777