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TDA8943SF
6 W mono Bridge Tied Load (BTL) audio amplifier
Rev. 02 -- 7 April 2000 Product specification
1. General description
The TDA8943SF is a single-channel audio power amplifier with an output power of 6 W at an 8 load and a 12 V supply. The circuit contains a Bridge Tied Load (BTL) amplifier with an all-NPN output stage and standby/mute logic. The TDA8943SF comes in a 9-lead single in-line (SIL) medium power package. The TDA8943SF is printed-circuit board (PCB) compatible with all other types in the TDA894x family. One PCB footprint accommodates both the mono and the stereo products.
2. Features
s s s s s s s s s Few external components Fixed gain Standby and mute mode No on/off switching plops Low standby current High supply voltage ripple rejection Outputs short-circuit protected to ground, supply and across the load Thermally protected Printed-circuit board compatible.
c c
3. Applications
s Mains fed applications (e.g. TV sound) s PC audio s Portable audio.
4. Quick reference data
Table 1: VCC Iq Istb Quick reference data Conditions VCC = 12 V; RL = Min 6 Typ 12 15 Max 18 22 10 Unit V mA µA supply voltage quiescent supply current standby supply current Symbol Parameter
Philips Semiconductors
TDA8943SF
6 W mono Bridge Tied Load (BTL) audio amplifier
Quick reference data...continued Conditions THD = 10%; RL = 8 ; VCC = 12 V Po = 1 W Min 5 31 50 Typ 6 0.03 32 65 Max 0.1 33 Unit W % dB dB output power total harmonic distortion voltage gain supply voltage ripple rejection
Table 1: Po THD Gv SVRR
Symbol Parameter
5. Ordering information
Table 2: Ordering information Package Name TDA8943SF SIL9MPF Description plastic single in-line medium power package with fin; 9 leads Version SOT110-1 Type number
6. Block diagram
idth
VCC 2
TDA8943SF
1 IN- IN+ 5 4 3 VCC MODE SVR 7 6 20 k 8
MBK942
OUT-
OUT+
STANDBY/ MUTE LOGIC
20 k
SHORT CIRCUIT AND TEMPERATURE PROTECTION
GND
Fig 1. Block diagram.
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7. Pinning information
7.1 Pinning
handbook, halfpage
OUT- VCC OUT+ IN+ IN- SVR MODE GND n.c.
1 2 3 4 5 TDA8943SF 6 7 8 9
MBK941
Fig 2. Pin configuration.
7.2 Pin description
Table 3: Symbol OUT- VCC OUT+ IN+ IN- SVR MODE GND n.c. Pin description Pin 1 2 3 4 5 6 7 8 9 Description negative loudspeaker terminal supply voltage positive loudspeaker terminal positive input negative input half supply voltage decoupling (ripple rejection) mode selection input (standby, mute, operating) ground not connected
8. Functional description
The TDA8943SF is a mono BTL audio power amplifier capable of delivering 6 W output power to an 8 load at THD = 10%, using a 12 V power supply and an external heatsink. The voltage gain is fixed at 32 dB. With the three-level MODE input the device can be switched from `standby' to `mute' and to `operating' mode. The TDA8943SF outputs are protected by an internal thermal shutdown protection mechanism and a short-circuit protection.
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6 W mono Bridge Tied Load (BTL) audio amplifier
8.1 Input configuration
The TDA8943SF inputs can be driven symmetrical (floating) as well as asymmetrical. In the asymmetrical mode one input pin is connected via a capacitor to the signal ground which should be as close as possible to the SVR (electrolytic) capacitor ground. Note that the DC level of the input pins is half of the supply voltage VCC, so coupling capacitors for both pins are necessary. The input cut-off frequency is: 1 f i ( cut off ) = ---------------------------2 ( R i × C i ) For Ri = 45 k and Ci = 220 nF: 1 f i ( cut off ) = ---------------------------------------------------------------- = 16 Hz 3 9 2 ( 45 × 10 × 220 × 10 ) As shown in Equation 1 and 2, large capacitor values for the inputs are not necessary; so the switch-on delay during charging of the input capacitors, can be minimized. This results in a good low frequency response and good switch-on behaviour. Remark: To prevent HF oscillations do not leave the inputs open, connect a capacitor of at least 1.5 nF across the input pins close to the device. (2) (1)
8.2 Power amplifier
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output stage, capable of delivering a peak output current of 2 A. The BTL principle offers the following advantages:
· · · ·
8.2.1
Lower peak value of the supply current The ripple frequency on the supply voltage is twice the signal frequency No expensive DC-blocking capacitor Good low frequency performance.
Output power measurement The output power as a function of the supply voltage is measured on the output pins at THD = 10%; see Figure 8. The maximum output power is limited by the maximum supply voltage of 12 V and the maximum available output current: 2 A repetitive peak current.
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6 W mono Bridge Tied Load (BTL) audio amplifier
8.2.2
Headroom Typical CD music requires at least 12 dB (factor 15.85) dynamic headroom compared to the average power output for transferring the loudest parts without distortion. At VCC = 12 V, RL = 8 and Po = 4 W at THD = 0.1% (see Figure 6), the Average Listening Level (ALL) music power without any distortion yields: Po(ALL) = 4 W/15.85 = 252 mW. The power dissipation can be derived from Figure 11 on page 10 for 0 dB respectively 12 dB headroom.
Table 4: 0 dB 12 dB Power rating as function of headroom Power output (THD = 0.1%) Po = 4 W Po(ALL) = 252 mW Power dissipation (P) 3.8 W 1.8 W
Headroom
For the average listening level a power dissipation of 1.8 W can be used for a heatsink calculation.
8.3 Mode selection
The TDA8943SF has three functional modes, which can be selected by applying the proper DC voltage to pin MODE. See Figure 4 and 5 for the respective DC levels, which depend on the supply voltage level. The MODE pin can be driven by a 3-state logic output stage: e.g. a microcontroller with additional components for DC-level shifting. Standby -- In this mode the current consumption is very low and the outputs are floating. The device is in standby mode when (VCC - 0.5 V) < VMODE < VCC, or when the MODE pin is left floating (high impedance). The power consumption of the TDA8943SF will be reduced to <0.18 mW. Mute -- In this mode the amplifier is DC-biased but not operational (no audio output); the DC level of the input and output pins remain on half the supply voltage. This allows the input coupling and Supply Voltage Ripple Rejection (SVRR) capacitors to be charged to avoid pop-noise. The device is in mute mode when 3 V < VMODE < (VCC - 1.5 V). Operating -- In this mode the amplifier is operating normally. The operating mode is activated at VMODE < 0.5 V. 8.3.1 Switch-on and switch-off To avoid audible plops during supply voltage switch-on or switch-off, the device is set to standby mode before the supply voltage is applied (switch-on) or removed (switch-off). The switch-on and switch-off time can be influenced by an RC-circuit on the MODE pin. Rapid on/off switching of the device or the MODE pin may cause `click- and pop-noise'. This can be prevented by proper timing of the RC-circuit on the MODE pin.
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8.4 Supply Voltage Ripple Rejection (SVRR)
The SVRR is measured with an electrolytic capacitor of 10 µF on pin SVR at a bandwidth of 10 Hz to 80 kHz. Figure 12 on page 10 illustrates the SVRR as function of the frequency. A larger capacitor value on the SVR pin improves the ripple rejection behaviour at the lower frequencies.
8.5 Built-in protection circuits
The TDA8943SF contains two types of protection circuits, i.e. short-circuit and thermal shutdown. 8.5.1 Short-circuit protection Short-circuit to ground or supply line -- This is detected by a so-called `missing current' detection circuit which measures the current in the positive supply line and the current in the ground line. A difference between both currents larger than 0.4 A, switches the power stage to standby mode (high impedance). Short-circuit across the load -- This is detected by an absolute-current measurement. An absolute-current larger than 2 A, switches the power stage to standby mode (high impedance). 8.5.2 Thermal shutdown protection The junction temperature is measured by a temperature sensor; at a junction temperature of approximately 150 °C this detection circuit switches the power stage to standby mode (high impedance).
9. Limiting values
Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI IORM Tstg Tamb Ptot VCC(sc) Parameter supply voltage input voltage repetitive peak output current storage temperature operating ambient temperature total power dissipation supply voltage to guarantee short-circuit protection non-operating Conditions no signal operating Min -0.3 -0.3 -0.3 -55 -40 Max +25 +18 2 +150 +85 7 18 Unit V V A °C °C W V
VCC + 0.3 V
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10. Thermal characteristics
Table 6: Symbol Rth(j-a) Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from junction to mounting base Conditions in free air in free air Value 68 18 Unit K/W K/W
11. Static characteristics
Table 7: Static characteristics VCC = 12 V; Tamb = 25 °C; RL = 8 ; VMODE = 0 V; Vi = 0 V; measured in test circuit Figure 13; unless otherwise specified. Symbol VCC Iq Istb VO VOUT [3] VMODE Parameter supply voltage quiescent supply current standby supply current DC output voltage differential output voltage offset mode selection input voltage operating mode mute mode standby mode IMODE
[1] [2] [3]
Conditions operating RL = VMODE = VCC
[2] [1]
Min 6 0 3 VCC - 0.5 -
Typ 12 15 6 -
Max 18 22 10 200 0.5 VCC - 1.5 VCC 20
Unit V mA µA V mV V V V µA
mode selection input current
0 < VMODE < VCC
With a load connected at the outputs the quiescent current will increase, the maximum of this increase being equal to the differential output voltage offset (VOUT) divided by the load resistance (RL). The DC output voltage with respect to ground is approximately 0.5VCC. VOUT = | VOUT+ - VOUT- |.
handbook, halfpage I
30
MGU040
q (mA) 25
Iq handbook, halfpage (mA) 24 20
28
MGU041
20 16 15 12 10 8 4 0 0
5
0 0
4
8
12
16 20 VCC (V)
2
4
6
8
10
12 14 VMODE (V)
Fig 3. Quiescent supply current as function of supply voltage.
Fig 4. Quiescent supply current as function of mode voltage.
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12. Dynamic characteristics
Table 8: Dynamic characteristics VCC = 12 V; Tamb = 25 °C; RL = 8 ; f = 1 kHz; VMODE = 0 V; measured in test circuit Figure 13; unless otherwise specified. Symbol Po THD Gv Zi(dif) Vn(o) SVRR Parameter output power total harmonic distortion voltage gain differential input impedance noise output voltage supply voltage ripple rejection fripple = 1 kHz fripple = 100 Hz to 20 kHz Vo(mute)
[1] [2] [3]
[1] [2] [2]
Conditions THD = 10% THD = 0.5% Po = 1 W
Min 5 3 31 70 50 -
Typ 6 4 0.03 32 90 90 65 60 -
Max 0.1 33 110 120 50
Unit W W % dB k µV dB dB µV
output voltage
mute mode
[3]
The noise output voltage is measured at the output in a frequency range from 20 Hz to 20 kHz (unweighted), with a source impedance RS = 0 at the input. Supply voltage ripple rejection is measured at the output, with a source impedance RS = 0 at the input. The ripple voltage is a sine wave with a frequency fripple and an amplitude of 700 mV (RMS), which is applied to the positive supply rail. Output voltage in mute mode is measured with an input voltage of 1 V (RMS) in a bandwidth of 20 kHz, so including noise.
handbook, full pagewidth
10
MGU043
Vo (V) 1
10-1
10-2
10-3
10-4
10-5
0
4
8
12
16
VMODE (V)
20
Fig 5. Output voltage as function of mode voltage.
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102 handbook, halfpage THD (%) 10
MGU038
handbook, halfpage
10
MGU039
THD (%) 1 Po = 0.1 (W) RL = 16 8 1 (W)
1
10-1
10-1
10-2 10-2
10-1
1
Po (W)
10
10-2 10
102
103
104
f (Hz)
105
No bandpass filter applied.
Fig 6. Total harmonic distortion as function of output power.
16
MGU044
Fig 7. Total harmonic distortion as function of frequency.
10 Ptot (W) 8
MGU045
handbook, halfpage
handbook, halfpage
Po (W) 12
8
RL = 8
16
6
RL = 8
4 16 4 2
0 0
4
8
12
16
20 VCC (V)
0 0
5
10
15 VCC (V)
20
THD = 10%.
Fig 8. Output power as function of supply voltage.
Fig 9. Total power dissipation as function of supply voltage.
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6 W mono Bridge Tied Load (BTL) audio amplifier
handbook, halfpage
100
MGU047
handbook, halfpage
5
MGU046
(%) 80 RL = 16 60 8
P (W) 4 RL = 8
3
40
2
16
20
1
0 0
2
4
6
8 Po (W)
10
0 0
2
4
6
8 Po (W)
10
VCC = 12 V.
Fig 10. Efficiency as function of output power.
0
Fig 11. Power dissipation as function of output power.
MGU042
handbook, full pagewidth
SVRR (dB) -20 B
-40
-60 A
-80 10
102
103
104
f (Hz)
105
VCC = 12 V; Rs = 0 ; Vripple = 707 mV (RMS); no bandpass filter applied. Curve A: inputs short-circuited Curve B: inputs short-circuited and connected to ground (asymmetrical application)
Fig 12. Supply voltage ripple rejection as function of frequency.
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13. Internal circuitry
Table 9: Pin 4 and 5 Internal circuitry Symbol IN+ and IN-
VCC
Equivalent circuit
VCC
1.5 k
1.5 k
VCC
5 45 k 45 k
4
1/2 VCC (SVR)
MGU078
1 and 3
OUT- and OUT+
100 1, 3 40 1/2 VCC
MGU080
7
MODE
VCC VCC
20 k VCC
1 k
1 k
7 OFF HIGH MUTE HIGH
MGU079
6
SVR
VCC Standby
20 k 6 20 k
MGU081
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14. Application information
+VCC Rs Symmetrical input 220 nF 2 Ci 220 nF Rs 220 nF 1.5 nF 30 k IN- 5 Ri 45 k 1/2 VCC Ri 45 k - - + + - + 1/2 VCC + - 30 k VCC MODE 7 STANDBY/ MUTE LOGIC 20 k SVR 6 10 µF 1/2 VCC 20 k 8 GND
MGU036
handbook, full pagewidth
100 nF
1000 µF
1 OUT- RL 8 3 OUT+
Asymmetrical Ci input 4 220 nF signal GND VCC R IN+
TDA8943SF
C1 MICROCONTROLLER C2 MODE Standby Mute On C1 0 0 1 C2 0 1 0
R signal GND
SHORT CIRCUIT AND TEMPERATURE PROTECTION
Fig 13. Application diagram.
14.1 Printed-circuit board (PCB)
14.1.1 Layout and grounding For a high system performance level certain grounding techniques are essential. The input reference grounds have to be tied with their respective source grounds and must have separate tracks from the power ground tracks; this will prevent the large (output) signal currents from interfering with the small AC input signals. The small-signal ground tracks should be physically located as far as possible from the power ground tracks. Supply and output tracks should be as wide as possible for delivering maximum output power.
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idth
54 mm
56 mm
ON MUTE + - 10 µF 9 220 nF IN-
1.5 nF
220 nF 1 OUT- 100 nF OUT+
IN+
VCC
1000 µF
GND
MGU037
Fig 14. Printed-circuit board layout (single-sided); components view.
14.1.2
Power supply decoupling Proper supply bypassing is critical for low-noise performance and high supply voltage ripple rejection. The respective capacitor locations should be as close as possible to the device and grounded to the power ground. Proper power supply decoupling also prevents oscillations. For suppressing higher frequency transients (spikes) on the supply line a capacitor with low ESR typical 100 nF has to be placed as close as possible to the device. For suppressing lower frequency noise and ripple signals, a large electrolytic capacitor e.g. 1000 µF or greater must be placed close to the device. The bypass capacitor on the SVR pin reduces the noise and ripple on the midrail voltage. For good THD and noise performance a low ESR capacitor is recommended.
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14.2 Thermal behaviour and heatsink calculation
The measured maximum thermal resistance of the IC package, Rth(j-mb) is 18 K/W. A calculation for the heatsink can be made, with the following parameters: Tamb(max) = 50 °C VCC = 12 V and RL = 8 Tj(max) = 150 °C. Rth(tot) is the total thermal resistance between the junction and the ambient including the heatsink. In the heatsink calculations the value of Rth(mb-h) is ignored. At VCC = 12 V and RL = 8 the measured worst-case sine-wave dissipation is 3.8 W; see Figure 11. For Tj(max) = 150 °C the temperature raise caused by the power dissipation is: 150 50 = 100 °C. P × Rth(tot) = 100 °C Rth(tot) = 100/3.8 = 26.3 K/W Rth(h-a) = Rth(tot) Rth(j-mb) = 26.3 18 = 8.3 K/W. The calculation above is for an application at worst-case sine-wave output signals. In practice music signals will be applied, which decreases the maximum power dissipation to approximately half of the sine-wave power dissipation (see Section 8.2.2). This allows for the use of a smaller heatsink: P × Rth(tot) = 100 °C Rth(tot) = 100/1.8 = 55.5 K/W Rth(h-a) = Rth(tot) Rth(j-mb) = 55.5 18 = 37.5 K/W. To increase the lifetime of the IC, Tj(max) should be reduced to 125 °C. This requires a heatsink of approximately 24 K/W for music signals.
15. Test information
15.1 Quality information
The General Quality Specification for Integrated Circuits, SNW-FQ-611D is applicable.
15.2 Test conditions
Tamb = 25 °C; VCC = 12 V; f = 1 kHz; RL = 8 ; audio pass band 22 Hz to 22 kHz; unless otherwise specified. Remark: In the graphs as function of frequency no bandpass filter was applied; see Figure 7 and 12.
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16. Package outline
SIL9MPF: plastic single in-line medium power package with fin; 9 leads SOT110-1
D
D1 q P P1 A2
A3 q1 q2
A A4 seating plane E pin 1 index
L 1 Z b2 e b b1 w M 9 Q
c
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 18.5 17.8 A2 max. 3.7 A3 8.7 8.0 A4 15.8 15.4 b 1.40 1.14 b1 0.67 0.50 b2 1.40 1.14 c 0.48 0.38 D (1) 21.8 21.4 D1 21.4 20.7 E (1) 6.48 6.20 e 2.54 L 3.9 3.4 P 2.75 2.50 P1 3.4 3.2 Q 1.75 1.55 q 15.1 14.9 q1 4.4 4.2 q2 5.9 5.7 w 0.25 Z (1) max. 1.0
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT110-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-25
Fig 15. SIL9MPF package outline.
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17. Soldering
17.1 Introduction to soldering through-hole mount packages
This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board.
17.2 Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
17.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
17.4 Package related soldering information
Table 10: Suitability of through-hole mount IC packages for dipping and wave soldering methods Package DBS, DIP, HDIP, SDIP, SIL
[1]
Soldering method Dipping suitable Wave suitable [1]
For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
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18. Revision history
Table 11: Revision history Rev Date CPCN Description 02 20000407 Product specification; second version; supersedes initial version TDA8943SF-01 of 14 April 1999 (9397 750 04877). Modifications:
· · ·
Table 1 on page 1: SVRR; Typ value 65 dB added Ordering options removed Section 8 "Functional description": Section 8.1 "Input configuration" on page 4 added. Section 8.2 "Power amplifier" on page 4: ........, capable of delivering a peak output current of 1.5 A changed to 2 A. Section 8.2.1 "Output power measurement" on page 4 added Section 8.2.2 "Headroom" on page 5 added
·
Section 8.3 "Mode selection": Standby mode: VMODE > (VCC - 0.5 V) changed to (VCC - 0.5 V) < VMODE < VCC; The power consumption of the TDA8943SF will be reduced to <0.18 mW added. Mute mode: the DC level of the input and output pins remain on half the supply voltage added; 2.5 V < VMODE < (VCC - 1.5 V) changed to 3 V < VMODE < (VCC - 1.5 V) Section 8.3.1 "Switch-on and switch-off" on page 5
· · ·
Section 8.4 "Supply Voltage Ripple Rejection (SVRR)" on page 6 added Section 8.5 "Built-in protection circuits" on page 6 added Table 5 on page 6: Ptot value added 7 W VCC(sc) value added 18 V
·
Table 6 on page 7: Rth(j-a) value 65 K/W changed 68 K/W Rth(j-c) value 10 changed to Rth(j-mb) value 18 K/W
· · · · · · · · ·
01 990414 -
Table 7 on page 7: VMODE - mute mode - value Min 2.5 changed to 3 V Table 8 on page 8: SVRR; Typ values 65 and 60 dB added Figure 3 to 12: figures added Section 13 "Internal circuitry" on page 11: added Figure 13: figure modified Section 14.1 "Printed-circuit board (PCB)" on page 12: added Figure 14: figure added Section 14.2 "Thermal behaviour and heatsink calculation" on page 14: added Section 15.2 "Test conditions" on page 14: added
Preliminary specification; initial version.
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19. Data sheet status
Datasheet status Objective specification Preliminary specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Product specification
Production
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
20. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
21. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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6 W mono Bridge Tied Load (BTL) audio amplifier
Philips Semiconductors - a worldwide company
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Internet: http://www.semiconductors.philips.com
(SCA69)
9397 750 06865
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 02 -- 7 April 2000
19 of 20
Philips Semiconductors
TDA8943SF
6 W mono Bridge Tied Load (BTL) audio amplifier
Contents
1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.2.1 8.2.2 8.3 8.3.1 8.4 8.5 8.5.1 8.5.2 9 10 11 12 13 14 14.1 14.1.1 14.1.2 14.2 15 15.1 15.2 16 17 17.1 17.2 17.3 17.4 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Input configuration . . . . . . . . . . . . . . . . . . . . . . 4 Power amplifier . . . . . . . . . . . . . . . . . . . . . . . . . 4 Output power measurement . . . . . . . . . . . . . . . 4 Headroom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . 5 Switch-on and switch-off. . . . . . . . . . . . . . . . . . 5 Supply Voltage Ripple Rejection (SVRR) . . . . . 6 Built-in protection circuits . . . . . . . . . . . . . . . . . 6 Short-circuit protection . . . . . . . . . . . . . . . . . . . 6 Thermal shutdown protection . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . 11 Application information. . . . . . . . . . . . . . . . . . 12 Printed-circuit board (PCB). . . . . . . . . . . . . . . 12 Layout and grounding . . . . . . . . . . . . . . . . . . . 12 Power supply decoupling . . . . . . . . . . . . . . . . 13 Thermal behaviour and heatsink calculation . 14 Test information. . . . . . . . . . . . . . . . . . . . . . . . 14 Quality information . . . . . . . . . . . . . . . . . . . . . 14 Test conditions . . . . . . . . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction to soldering through-hole mount packages . . . . . . . . . . . . . . . . . . . . . . 16 Soldering by dipping or by solder wave . . . . . 16 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 16 Package related soldering information . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
© Philips Electronics N.V. 2000.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 7 April 2000 Document order number: 9397 750 06865