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APPLICATION NOTE
- TDA8798HL DUAL 8-BIT A/D CONVERTER WITH DPGA DEMONSTRATION BOARD
AN/99055
Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
APPLICATION NOTE
- TDA8798HL DUAL 8-BIT A/D CONVERTER WITH DPGA DEMONSTRATION BOARD
AN/99055
Author: Stéphane JOUIN Systems & Applications Laboratories - Caen FRANCE
Keywords:
TDA8798HL Demoboard Dual 8-bit ADC High speed Low power DPGA
Date: October 1999
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
CONTENTS
1. 2. 3. 4.
MAIN FEATURES OF THE TDA8798HL: ........................................................................................ 5 PRINCIPLE AND DESCRIPTION OF THE BOARD: ...................................................................... 8 OVERVIEW OF THE BOARD:.......................................................................................................... 10 PCB DESIGN:..................................................................................................................................... 13 4.1 4.2 4.3 MICROSTRIP LINES: ........................................................................................................................... 14 POWER SUPPLY WIRE:................................................................................................................. 14 ANALOG AND DIGITAL RETURN GROUND POINT:................................................................. 14
5.
SPECIAL FEATURES OF THE APPLICATION BOARD:............................................................. 15 5.1 5.2 5.3 5.4 5.5 DPGA ANALOG INPUTS VIN1: .................................................................................................... 15 EXTERNAL FILTER:...................................................................................................................... 16 ADC ANALOG INPUTS BUF1 AND BUF1N: .................................................................................. 18 DATA OUTPUT A0 TO A7:............................................................................................................ 18 ADC ANALOG, DIGITAL AND OUTPUT STAGES POWER SUPPLY:................................................... 19
6.
ENVIRONMENT CIRCUITS:........................................................................................................... 20 6.1 6.2 6.3 6.4 6.5 GENERAL POWER SUPPLY: .................................................................................................................. 20 EXTERNAL CLOCK SELECTOR: ................................................................................................. 21 D-TYPE FLIP-FLOP INTERFACE: ................................................................................................... 22 MANUAL INTERFACE: ................................................................................................................. 23 MULTIPLEXER: ............................................................................................................................. 25
7.
OPERATING MODE:........................................................................................................................ 26 7.1 7.2 7.3 7.4 7.5 7.6 INPUT OPERATION:...................................................................................................................... 26 SINGLE CLOCK MODE:................................................................................................................ 27 DUAL CLOCK MODE: ................................................................................................................... 28 DPGA MANUAL PROGRAMMATION (MODE 0 ONLY):............................................................. 29 DPGA DEMOBOARD/PC INTERFACE SOFTWARE (MODE 0 ONLY):...................................................... 30 QUICKVIEW OF THE DEMOBOARD: .......................................................................................... 34
8.
PERFORMANCES:............................................................................................................................ 35 8.1 8.2 8.3 8.4 DEFINITION OF THE MEASURING PARAMETERS: .................................................................. 35 MEASUREMENT OF THE ADC 1 (MODE 1):............................................................................... 38 MEASUREMENT OF CHANNEL 1 (MODE 0) IN MINIMUM GAIN: .............................................. 39 MEASUREMENT OF CHANNEL 1 (MODE 0) IN MAXIMUM GAIN:............................................. 40
9.
DEMOBOARD FILES: ...................................................................................................................... 41
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
SUMMARY
The TDA8798 is a dual independent 8-bit Analog-to-Digital Converter with a dual Digitizing Programmable Gain Amplifier designed to read digital data storage and to be used for other applications. Each ADC converts the analog signal from the DPGA or from an other source (when the DPGAs is not used and disabled) into 8 bits binary digital words at a maximum sampling rate of 100 Mega samples per second. When it is used, each DPGAs controls the gain of input analog signals at a maximum amplification of 34dBv which is programmed by a manual digital serial interface or by a software. An external filter can be introduced between each DPGA and ADC. Only one version of this device exists: it is the TDA8798HL with clock frequency of 100Msps. This Application Note describes the design and the realisation of the Demonstration Board (no 719) using the TDA8798HL version with an example of application environment. To program the DPGAs from a Personal Computer with WindowsTM 3.1 and WindowsTM 95, this Application Note is associated with a Demoboard/PC interface software. The DPGAs can be programmed by a manual interface which is on the Demoboard.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
1. MAIN FEATURES OF THE TDA8798HL:
The TDA8798HL contains two channels, each made of one 8-bit Analog-to-Digital Converter and one Digital Programmable Gain Amplifier. A representation is given on Figure 1.
ANALOG INPUTS 1
DPGA1
ADC1
DIGITAL OUTPUTS 1
EXTERNAL FILTER GAIN PROGRAMMING CLOCK 1
ANALOG INPUTS 2
DPGA2
ADC2
DIGITAL OUTPUTS 2
EXTERNAL FILTER GAIN PROGRAMMING CLOCK 2
- Figure 1.Channels configuration These ADCs convert an analog input signal from DPGA into 8 bits binary coded digital words at a maximum sampling rate of 100Msps. These DPGAs control the gain of the analog signal between 0dBv and 34dBv.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
The TDA8798HL can be used of single dual ADC converters which one representation is given on Figure 2.
ANALOG INPUTS 1
ADC1
DIGITAL OUTPUTS 1
CLOCK 1
ANALOG INPUTS 2
ADC2
DIGITAL OUTPUTS 2
CLOCK 2
- Figure 2. Single dual ADCs configuration In this configuration, these ADCs convert an analog input signal into 8 bits binary coded digital words.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
The TDA8798HL is supplied with 3.3V and the typical power dissipation is 327mW and is 465mW with DPGA enabled. The block diagram and the main specifications points of the TDA8798HL device are shown on Figure 3. · Clock frequency: · Power dissipation (typical): · · · · ADC Accuracy: DPGA: Supply: Compatibility: 100Msps. 327mW (DPGA disabled). 465mW (DPGA enabled). 8-bit. 0dBV - 34dBv (on 6 bits). 3.3V. input/output: TTL and CMOS (3.3V).
DPGAC2 5 3
DPGAEN DPGA2 BUF2N VDDA4 DPGA2N VOREF2 VSSA4 TEN CLK2N CLK2 BUF2 53 1 2 62 63 64 61 60 55 59 58
VSSO2 49 51 OEN VDDO2 B0 to B7
VDDA2
VIN2N VIN2 VSSA2
6 7 8 REGULATOR 56 57 SERIAL INTERFACE DPGA BUFFER 8-BIT ADC
50 41-48
4 27 29 26 28 30
VREF2 SEN2 SCLK SMODE SDATA SEN1 VREF1 VDDD1 A0 to A7 VDDO1 VSSD1
VDDD2 VSSD2 VSSA1 VIN1 VIN1N
9 10 11 DPGA
REGULATOR
13 25 BUFFER 8-BIT ADC 40-33 31 24
VDDA1
12 14 DPGAC1 16 15 19 18 17 20 21 22 23 32
DPGA1N DPGA1 BUF1N BUF1 VDDA3 VSSA3 VOREF1
CLK1N CLK1 VSSO1
- Figure 3. TDA8798HL block diagram -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
2. PRINCIPLE AND DESCRIPTION OF THE BOARD:
The principle of the Demonstration Board, which is described in this Application Note, is shown on Figure 4.
+ 6V D1
OEN
PWR
DS2
Z
LO
TEN T
SR
SUPPLY REGULATOR
DI
DPGAEN
DPGAEN
DS1
0/1 HI T&H EN EXTERNAL FILTER
BUF2 BUF2N
CLK2
DPGA2
CLK2
CLK2N
DPGA2N
VIN2N
VI2 VI1
VIN2 VIN1 VIN1N DPGA1
ADC
D FLIP-FLOP INTERFACE
DPGAEN SR TEN B7 OEN . . B0
CLK
B7
. . . . . .
TDA8798HL
BUF1 BUF1N CLK1N CLK1 A0 . . A7 SI
B0 A0
. . . . . .
DPGA1N
CLK
A7 CLK1 SDATA SCLK SEN1 SEN2 SMODE
CLK2
CLK2
CS CLK1
EXTERNAL FILTER
MULTIPLEXER
CLK1
SEND DI SEN1 EN SLM SMODE TM 1 0
D0 . . . .
DI MANUAL INTERFACE SEN2 EN
UP DOWN SDATA
D5 COUNT
DEMO8798HL
- Figure 4. Functional block diagram of the Demoboard -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
The different blocks of the Demoboard are: · A power supply regulator using to supply all circuitry on the board.
· An external filter improving the signal from DPGA for each channel when it is used. · A D flip-flop interface synchronizing the ADCs data output. · A manual interface programming by means of switches the gains of the DPGAs. · A multiplexer choosing automatically either the manual programming from the manual interface or from the software programming the DPGAs gains. The Demoboard works with a single +6VDC external power supply. All circuitry is protected from reverse polarity. The good supply plugging is indicated by a green LED. The sampling clock signal on the Demoboard is available by plugging the 50 square generator in the CLK1 or/and CLK2 SMA connector(s).
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
3. OVERVIEW OF THE BOARD:
The whole implantation of this Demoboard is shown on Figure 5.
Clock input 2 Power supply viewer
Power supply
Clock input 1 Track-and-hold selector DPGA enable selector Slew rate selector Output enable selector
Clock selector
Clock test-point 2 (D flip-flop) Input choise 2 Analog input 2 ADC reference 2 ADC reference 1 Input choise 1 Serial interface points Clock test-point 1 (D flip-flop) Clock connector 1 (ADC) Probe Clock connector 2 array (ADC) connectors 2
Analog input 1
Probe array connectors 1
DPGAEN viewer
Manual interface DPGA programming
PC link connector
- Figure 5. Overview of the Demoboard -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
The push-button and the different connectors, switches, lights and test-points available on the board are: · For the general power supply: 1. A two-points PHOENIX connector J5 for 6VDC and GND. 2. A PWR green light DS2 to indicate the good supply plugging. · For the evaluation of the TDA8798HL: 1. 2. 3. 4. 5. Two SMA J3 and J4 connectors with 50 for the two DPGA analog input signals VI1 and VI2. Two SMA J1 and J2 connectors with 50 for the external clock inputs CLK1 and CLK2. A CS switch K13 to choose a same clock or two different clocks for channels. A switch K10 to enable the ADCs outputs by the input OEN. A switch K11 to choose the track mode or the track & hold mode TEN of the two ADCs input analog signals. 6. A switch K14 to enable or to disable the DPGAs by the input DPGAEN. When the DPGAs are disabled the DPGAEN red light DS1 switch on. 7. A switch K3 to control the slew-rate. 8. Two test-points TP44 and TP19 to control or to modified the ADC1 reference VREF1 and the ADC2 reference VREF2. 9. Two input choice blocks IC1 and IC2 to use the ADCs with or without DPGAs. 10. Five points: TP3 to control the serial interface mode SMODE. TP1 to control the serial interface 1 enable SEN1. TP2 to control the serial interface 2 enable SEN2. TP4 to control the serial interface clock input SCLK. TP5 to control the serial interface data input SDATA. · For the reconstruction of the analog input waveform: 1. Two eight-probe array connectors corresponding to the ADC1 digital output A0 to A7 and ADC2 digital output B0 to B7 are available to connect the logic analyser which computes the data. 2. Two connector TP65 and TP61 corresponding to the ADC1 and ADC2 clocks. 3. Two test-point TP67 and TP63 corresponding to the D flip-flop interface clocks. · For the manual programming of the DPGAs gains: 1. A switch K2 to choose the serial interface mode SMODE between the Serial Load Mode and the Tracking Mode. 2. A switch K4 to enable/disable the serial interface 1 SEN1. 3. A switch K1 to enable/disable the serial interface 2 SEN2.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
4. Six switches K5 to K9 and K12 to program the serial interface data input SDATA in SLM mode. The switch K12 is also used to choose the count-UP or the count-DOWN in TM mode. 5. A push-button BP1 to send to DPGA the programmed gain. · For the gain software programming: 1. A sub-d25 connector J6 to plug the cable from the compatible PC computer using the gain programming software.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
4. PCB DESIGN:
The design was made on a multilayer Printed Circuit Board. The technological concept used to make this PCB is given on Figure 6.
W t H r 2 1
3H
r
3
3H
r
4 H r 5
- Figure 6. PCB structure Five physical copper layers are used. The first and fifth layers are the signal layers which contain the microstrip lines. The second and fourth layers constitute the ground planes corresponding to signal layers. The third layer is designed specially for the power supply wires. The metallized hole technique is employed to make all the necessary interconnections between the layers. The dielectric substrate used is an Epoxy Glass resin with a relative permittivity (r) of 4.7 and a copper thickness (t) of 35µm (1.4mils). The substrate thickness (H) is 0.2mm (8mils) between the copper layers.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
4.1 MICROSTRIP LINES:
To calculate the width (W) of these 50 matched lines, the Kaup's relation is used:
W=
5.98H
Zo r +1.41
-
t , 0.8
0.8e
87
(Accurate to within 5% when 01 < . hence:
W < 3.0 and 1 < r < 15 ). H
W = 12.7mils/0.32mm, where: Zo = 50, t = 1.4mils/35µm, H = 8mils/0.2mm, r = 4.7.
4.2 POWER SUPPLY WIRE:
To reduce the voltage fluctuation effects due to switching currents inside the integrated circuits, the power supply wires are designed with a low characteristic impedance of microstrip lines in order to obtain a small equivalent inductance.
4.3 ANALOG AND DIGITAL RETURN GROUND POINT:
To minimise the noise due to capacitive coupling between the analog input and the digital output parts of the ADC, two separated ground planes are designed on layers and are connected together through an inductor.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
5. SPECIAL FEATURES OF THE APPLICATION BOARD:
To obtain optimal performances, the recommended application diagram is given on Figure 7.
VDDD
100n
K11
K14 SR
K3 OEN
K10
TEN DPGAEN
100n 100n CLK2DAC
VSSO2
VOREF2
BUF2N
VDDA4
VSSA4
CLK2N
CLK2
VSSD2
BUF2
TEST
DPGAEN
SR
VDDD2
OEN
TEN
VDDO2
EXTERNAL FILTER
DPGA2N
100n
49 B7 B6 B5 B4 B3 B2 B1 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
64 1 2 3
63
62
61
60
59
58
57
56
55
54
53
52
51
50
DPGA2 DPGAC2 VREF2 VDDA2 VIN2N VIN2 VSSA2 VSSA1 VIN1 VIN1 VDDA1 VREF1 DPGAC1
VREF2
68p
4 5
100n 100 100 220n 220n R32 10n R8
6 7 8 9
VI2 VI1
T4 R33
TDA8798HL
IC12 VDDA
B0 A0 A1 A2 A3 A4 A5
100
100
10
T3
10n
R20 VREF1 68p
11 12 13 14 15 16 DPGA1N
VOREF1
SMODE
VDDA3
VDDD1
DPGA1 BUF1N BUF1
A6 VDDO1 31 VSSO1 SDATA SCLK SEN2 SEN1 A7 32
VSSA3
CLK1N
EXTERNAL FILTER
VSSD1
CLK1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100n CLK1DAC VCC F2 330n 100n 100n
VCC F1 100n 330n
VDDD F3 100n 330n
VCC
- Figure 7. Typical TDA8798HL application diagram Subsequently, only one channel is described but all descriptions are valid for the second channel.
5.1 DPGA ANALOG INPUTS VIN1:
The dynamic DPGA analog inputs VIN1 and VIN1N are connected through a 1:1 RF wideband transformer and a 220nF AC coupling to the external generator by the VI1 SMA connector. this connector is adapted by a 50 microstrip line and a 50 equivalent resistor ending.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
The maximum peak-to-peak magnitude value VI1p.-p of the dynamic input signal to obtain the full scale of DPGA analog outputs DPGA1 and DPGA1N on the board is determined from the approximate relation: VI1p.- p = FS 10 where: G: DPGA gain, FS: DPGA output full scale (0.5V), hence: VI1p.-p 10mV at Gmax = 34dBv, (corresponding at 5mV p.-p on each input VI1 and VI1N), and: VI1p.-p = 0.5V at Gmin = 0dBv.
G 20
,
The DPGA mode DPGAEN is chosen with the switch K14. When the DPGA is disable, the DPGAEN red light DS1 is alight.
5.2 EXTERNAL FILTER:
A bandpass filter (typical application) is connected between the differential DPGA outputs DPGA1 and DPGA1N and the differential ADC inputs BUF1 and BUF1N. The diagram of this filter is shown on Figure 8.
4u7
DPGA1N
100n
BUF1N
TDA8798HL
DPGA1
820
TDA8798HL
BUF1
4u7
100n
- Figure 8. Bandpass filter -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
The simulated frequency response of this external filter example is shown on Figure 9.
G (dB)
f
- Figure 9. Gain response of this bandpass filter -
A capacitive link can be connected between the differential DPGA outputs and the differential ADC inputs which diagram is shown on Figure 10.
DPGA1N
BUF1N
TDA8798HL
DPGA1
100n
TDA8798HL
BUF1
100n
- Figure 10. Capacitive link -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
5.3 ADC ANALOG INPUTS BUF1 AND BUF1N:
The dynamic ADC analog inputs are connected through an external filter or through something else to the DPGA outputs or to another analog source by the connector J3. The peak-to-peak magnitude nominal value VIp.-p of the dynamic input signal is 500mV corresponding to 250mV on each analog input BUF1 and BUF1N. The quantum of the TDA8798HL is defined by: q= hence, q 2mV. The full scale of ADC input can be changed to force a voltage on ADC1 reference VREF1 test point TP44. The approximate relation between this reference and the ADC full scale inputs is given by: FS = 0.416 × VREF1 - 0.04 , where: VREF1 [1;2.5] . VI p.- p 28 - 1 ,
When the VREF1 is forced by an external voltage, the performances of ADC are changed and not guaranteed.
The track & hold mode TEN is chosen with the switch K11.
5.4 DATA OUTPUT A0 TO A7:
All data outputs of the TDA8798HL are TTL/CMOS compatible and they are directly addressed to a D-flip flop interface circuit. The switch K10 connected to the OEN pin allows either to active the data outputs or to disactive on them. The switch K3 connected to the SR pin allows to change the edge of slew rate (to have more current on outputs).
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
5.5 ADC ANALOG, DIGITAL AND OUTPUT STAGES POWER SUPPLY:
A single power line of 3v3 is used to supply the TDA8798HL and all circuits on Demoboard. To ensure a good bypassing at low and high frequencies, the use of several different parallel capacitors was required and SMD bypass type filters are implanted on the board near the ADC.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
6. ENVIRONMENT CIRCUITS:
6.1 GENERAL POWER SUPPLY:
The electrical diagram is shown on Figure 11. An external DC power unit of 6VDC/280mA is used to supply the Demoboard across the diode D1.
6V GND D1 22u 470n
PWR 750
LM3940IS
IC11 10u
VCC R3 1u DS2 1u
- Figure 11. Electric diagram of the power supply The BYD17G silicon diode D1 ensures the protection of all the circuitry from reverse polarities. The good supply plugging is indicated by the PWR green LED DS2.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
6.2 EXTERNAL CLOCK SELECTOR:
On the Demoboard, the CLK1 connector J1 allows to drive the ADC1 and a part of D-type flip-flop circuit. The Clock Selector switch K13 allows to drive the ADC2 and the other part of D-type flip-flop circuit either from the CLK1 or form an other source connected through the CLK2 connector J2. To synchronise all clocks on the demoboard, a SMD IC exclusive-or gate 74LVT86DB from the Low Voltage Technology logic family of PHILIPS SEMICONDUCTORS is used . The electric diagram of external clock selector is given on Figure 12.
CLK2 CS R21 K13 50
68 CLK2ADC R36 56 CLK2LATCH R37
74LVT86DB
56 CLK1 50 R17 IC1 CLK1ADC R39 68 CLK1LATCH R38
- Figure 12. Electric diagram of the clock selector The R36, R37, R38 and R39 resistors are used to improve the clock signal.
Advice: Usually, in some applications where the clock signal is not adapted, it is necessary to put a resistor, for of the ADC clock input, on the clock signal line. This resistor allows to eliminate principaly the undershoot and to improve the clock signal.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
6.3 D-TYPE FLIP-FLOP INTERFACE:
The electric diagram of the latch interface is shown on Figure 13. It allows to recover each ADC data outputs synchronized on the clock sampling.
CLK2LATCH
25 2CP 26 2D7 27 28 GND 29 2D5 30 2D4 2Q4 18 VCC 32 VCC 17 2D3 2D2 34 35 36 37 1D7 38 39 40 41 42 43 1D6 GND 1D5 1D4 VCC 1D3 1D2 GND 1D1 1D0 1CP GND 2D1 2D0 2Q3 16 2Q2 15 GND 14 2Q1 13 2Q0 12 1Q7 11 1Q6 10 GND 1Q5 1Q4 VCC 1Q3 1Q2 GND 1Q1 1Q0 1OEN 7 6 5 4 3 2 1 9 8 31 2Q5 19 GND 20 2D6 2Q7 22 2Q6 21 2OEN 23 24
B7 B6
B5 B4 VCC B3 B2 B1 B0 A0 A1 100n
VCC 100n
74LVT16374ADL
33
A2 A3 VCC A4 A5 100n
VCC 100n
44 45 46 47 48
A6 A7
CLK1LATCH
IC2
- Figure 13. Electric diagram of the D-type flip-flop interface -
The interface circuit uses a SMD ICs edge-triggered D-type flip-flop 74LVT16374ADL of the Low Voltage Technology logic family.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
6.4 MANUAL INTERFACE:
The electric diagram of the manual interface is shown on Figure 14. This interface allows to program the DPGAs registers without the use of the software supplied with the Demoboard.
VCC VCC 47p D2 4k7 100n R14 SEN1 K4 BP1 680 4k7 R13
1 GND TRIG OUT RESET VDD DISCH THRES CONT 6 7 8 5
VCC
R6
74HC02DB
VCC
2 3 4
330 100n
R12
74HC02DB
SEN2 K1 IC8
1 Q5 Q1 2
100n
VCC 16 15 MR 14 CP0 13 CP1N 12 Q5-9N 11 Q9 10 Q4 Q8 9
TLC555CD
3
R15
IC8
4 5
Q0 Q2
74HC4017DB
4k7
100n
VCC 100n
VCC VCC 100n
VCC
6 7
Q6 Q7 Q3
4k7
SMODE R7 K2
8
GND
IC3
4k7
D3 R10 IC9
74HC00DB
SMODE
1 16 15
R24 R22 VCC R11 4k7 D3 K6
2 3 4
I3 I2 I1 I0
VCC I4 I5 I6 I7 S0 S1 S2
100n VCC
R23 R27 VCC VCC
1 2 1MR 3 4 1Q1 5 6 1Q3 7 GND 1Q2 1CPN 14 VCC
74HC151DB
14 13 12 11 10 9
D4 K5
D5 K12
5 6 7
Y YN EN
74HC393DB
D0 K9 K8
D1 K7
4k7 R18 D2
13 2CPN 12 2MR 11 2Q0 10 2Q1 9 2Q2 8 2Q3
1Q0
8
GND
SDATA 100n
IC7
100n
IC4
- Figure 14. Electric diagram of the manual interface -
The push-button SEND sets the R-S bistable made with two gates of IC8. In this state, this bistable enables the clock of the interface made from the IC10 timing circuit. This clock, corresponding with SCLK signal, goes into the IC3 Jonhson decade counter and the IC4 binary ripple counter. The IC3 Jonhson decade counter allows to set the SEN1 and SEN2 or the both across the R-S bistable made with the two other gates of IC9, and to reset across the IC9 glue logic the manual interface after two clock cycle corresponding to Tracking Mode or after seven clock cycle corresponding to Serial Load Mode. The IC4 binary ripple counter is used to control the IC7 8-input multiplexer which translate the parallel word, programmed with the switches K5 to K9 and K12, into SDATA serial word. To avoid of noise on
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
the Demoboard, the clock manual interface signal is enable only when the data is send into TDA8798HL circuit. The manual interface uses several SMD ICs of the High-speed CMOS logic family of PHILIPS SEMICONDUCTORS. The push-button and the different switches available on the manual interface are: · The switch K2 corresponding to the SMODE is used to choose the mode of programming: 1. The SLM mode corresponding to the Serial Load Mode, allowing to program directly the DPGAs registers. 2. The TM mode corresponding to the Tracking Mode, allowing either to increase or to decrease the DPGAs registers values by 0dBv54 steps. In this mode, it is recommended to set on 0 from K5 to K9 switches. · The switches K4 and K1 corresponding to SEN1 and SEN2 are used to enable or disable the DPGA registers accesses. · The switches K5 to K9 corresponding to the SDATA are used to program the 6-bit word to send to the DPGAs registers in SLM mode. · The switch K12 also corresponding to the SDATA is used to program the increase or the decrease the DPGAs registers in TM mode. · The push-button BP1 is used to send the SDATA from the K5 to K9 and K12 switches into DPGAs registers. The waveforms of SDATA, SMODE, SEN1, SEN2 and SCLK are given on Figure 15.
P M3 3 9 4 B 1 SMODE 0 1 1 0 1 D5 0 1 SEN1 0 D4 D3 D2 D1 D0 SDATA UP 2 3 4 5 6 SCLK 1
- Figure 15. Waveforms from manual interface -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
6.5 MULTIPLEXER:
The electric diagram of the multiplexer allowing to commute between the manual interface and the Demoboard/PC interface is given on Figure 16.
VCC 100n
1
S 1I0 1I1 1Y 2I0 2I1 2Y GND
VCC EN 4I0 4I1 4Y 3I0 3I1 3Y
16 15 14 13 12 11 10 9
4k7
R1
J6-6 SDATATDA8798HL
3 4 5 6
74HC157DB
SDATA
2
SCLK
4k7
4k7
7
R2 J6-5
R31 J6-16 D5
8
SCLKTDA8798HL VCC
IC5 100n VCC
1 S 1I0 1I1 1Y 2I0 2I1 2Y GND VCC EN 4I0 4I1 4Y 3I0 3I1 3Y 12 11 10 9 16 15 14 13
4k7
3 4 5 6
SMODE
4k7
R9 D7 VCC
74HC157DB
SEN1
2
R4 J6-2
4k7 SEN1TDA8798HL R5 SEN2 SEN2TDA8798HL
SMODETDA8798HL D6
D4
7 8
IC6
- Figure 16. Electric diagram of the multiplexer The interface circuit uses two SMD ICs quad two-input mutliplexer 74HC157DB of the High-speed CMOS logic family of PHILIPS SEMICONDUCTORS. When a sub-d25 cable is connected between the Demoboard and the PC parallel port, and when the interface software is run, the manual interface is automatically disabled.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
7. OPERATING MODE:
A external power unit of 6V/280mA is required to supply the Demoboard. However, the board is able to work until 9V.
7.1 INPUT OPERATION:
The Input Configuration block allows to configure the working mode of the Demoboard. Referring to the Table 1 to select the appropriate mode. Mode Function 0 The DPGA's and the ADC's are used. Jumpers position Note The DPGAEN switch K14 must be at ENable (the LED DS1 is off).
1
The ADC's used and DPGA's disabled.
are the are
The DPGAEN switch K14 must be at Disable (the LED DS1 is on)
- Table 1. Mode and jumpers position -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
7.2 SINGLE CLOCK MODE:
In this mode, an external 50 square clock generator is used for two ADC's. The position of the switch and the location of the connector are given on Figure 17. To use this mode, follow the instructions below: · · Put the Clock Selector to CLK1 with the switch K13. Connect an external 50 square clock generator to the 50 SMA connector J1.
- Figure 17. Board configuration using the single clock mode The required clock levels are: VCLKH min = 2.0V, VCLKL max = 0.8V.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
7.3 DUAL CLOCK MODE:
In this mode, an external 50 square clock generator is used to each ADC. The position of the switch and the location of connectors are given on Figure 18. To use this mode, follow the instructions below: · · · Put the Clock Selector CS to CLK2 with the switch K13. Connect the first external 50 square clock generator to the 50 SMA connector J1. Connect the second external 50 square clock generator to the 50 SMA connector J2.
- Figure 18. Board configuration using the dual clock mode The required clock levels for all modes are: VCLKH min = 2.0V, VCLKL max = 0.8V.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
7.4 DPGA MANUAL PROGRAMMATION (MODE 0 ONLY):
The location of the switches and push button is given on Figure 19. The DPGAEN LED DS1 must be off otherwise put the DPGAEN switch at EN.
- Figure 19. Board configuration using the manual interface -
To program the DPGAs registers from the manual interface, follow the instructions: 1. Choose the mode by SMODE with the switch K2. The modes are Tracking Mode and Serial Load Mode. 2. ENable or DIsable the register accesses by SEN1 and SEN2 with the switches K4 and K1. 3. Program the data or the up/down by SDATA with the switches K9, K8, K7, K6, K5 and K12 or K12 depending on the chosen mode. 4. Press the push-button BP1 to send the SDATA value into TDA8798HL circuit.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
7.5 DPGA DEMOBOARD/PC INTERFACE SOFTWARE (MODE 0 ONLY):
The Demoboard/PC interface software allows to change the values of DPGA gain control registers from a Personnel Computer. When the sub-d25 cable is connected between the Demoboard from J6 connector to the PC parallel port and the interface software running, the manual interface is automatically disabled. In this mode, The DPGAEN LED DS1 must be off. · Install TDA8798HL software:
To install the TDA8798HL software, a PC and WindowsTM 3.11 or 95 are required. Then follow the instructions below: 1. Insert the TDA8798HL Software disk into appropriate disk drive of the computer. 2. Create a directory named tda8798 under the hard disk. If needed, refer to the notice of WindowsTM. 3. Create the directory named w311 under the tda8798 directory. 4. Put all files of the TDA8798HL Software floppy disk into c:\tda8798\w311 directory 5. Double click on the tda8798.exe file.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
On the Figure 20 is given the representative window after the running of the tda8798 software.
- Figure 20. Main window of the Demoboard/PC interface software · General use:
The Quit menu allows to quit the program. The Port menu, on Figure 21, allows to choose the LPT port. By default the LPT2 port is selected.
- Figure 21. Port menu Lpt1: selects the LPT1 port. Lpt2: selects the LPT2 port.
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- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
Lpt3: selects the LPT3 port. Autodetect: search automatically the port on which is connected on the Demoboard. The About ... menu gives some information about the program and the support. A view of this window is given on Figure 22.
- Figure 22. About window · Description:
Some buttons and gauge are available on the main window: is the send button to send data into internal registers DPGA1 or DPGA2 or both of them. is the test mode button and it is reserved for the Philips test and it must not use it in standard working. is the gauge. It shows the state of communication between the device and the PC. When the gauge returns to 0%, the communication is finished. The two radio button ( )SLM and TM of SMODE allows to choose the programming mode. Tick the appropriate radio button to enable the Serial Load Mode or the Tracking Mode.
In SLM mode, an edit window ( ) and a scroll bar ( ) allows to introduce or to change the decimal value of SDATA. A grey edit window give the approximately corresponding value in dBv of SDATA.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
In TM mode, two check buttons ( ) UP and DOWN of SDATA allow either to count up or to count down the internal registers DPGA1 or DPGA2 or both of them. The step of the count up or count down is given on the grey edit window. The two check buttons SEN1 and SEN2 allow to enable or to disable the register 1 or the register 2 or the both of them. Tick the check button to enable the chosen registers. Two grey edit windows give the approximate value of the two registers. · Speed button:
In the window, some speed buttons are available to access rapidly at some functions: detects automatically the good LPT port. accesses to the about window. allows to quit the program. The Demoboard/PC interface software made under WindowsTM 3.11 but it can run with WindowsTM 95.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
7.6 QUICKVIEW OF THE DEMOBOARD:
A quick view of the DEMO8798 with main information is given on Figure 23.
optional 2V CLK 0.8V CLK 0.8V 2V
PWR (280mA)
500mVp.-p VI2
500mVp.-p VI1
TDA8798HL
PC
- Figure 23. Quickview of the DEMO8798HL -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
8. PERFORMANCES:
An evaluation of the performances of the TDA8798HL is made with the Demoboard environment on the CAEN dynamic bench at 100Msps which block diagram is given on Figure 24.
SYNTHESIZED SIGNAL GENERATOR PULSE GENERATOR
fclk
DC POWER SUPPLY
SYNTHESIZED SIGNAL GENERATOR
FILTER
fi
B7 . . . . . B0 A7 . . . . . A0
LOGIC ANALYSIS SYSTEM
fi
LOGIC ANALYSIS SYSTEM
CLK DAC PC
SOFTWARE CALCULATION
- Figure 24. CAEN's dynamic bench block diagram -
8.1 DEFINITION OF THE MEASURING PARAMETERS:
To evaluate the performances of ADC on the Demoboard, the CAEN dynamic bench uses the Fast Fourier Transform for dynamic parameters from the sample signal.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
continuous fundamental
Power Spectrum(dBc)
harmonics
noise floor
x[0]
x[j]
x[2j]
x[3j]
x[4j]
Frequency(MHz)
- Figure 25. FFT -
According to the FFT shown on Figure 25, the main dynamic parameters are: · The Total Harmonic Distortion is the ratio between the RMS signal amplitude and the RMS sum of the first five harmonics. From the power spectrum of FFT, the THD is calculated from the relation: THD dBc = 20 × log 10 x[j] .
x
i=2
6
2
[i × j]
Where: x[j] : fundamental component corresponding with the j spectrum component, x[i × j] : component of harmonic i.
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- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
· The Spurious Free Dynamic Range is the ratio between the RMS signal amplitude and the RMS value of the highest spectrum component (harmonic or noise). From the FFT, the SFDR is calculated from the relation: SFDR dB = 20 × log 10 Where: x[i] : spectrum component i with i [2: i x[j] . · The SIgnal to Noise And Distortion ratio is the ratio between the RMS signal amplitude and the RMS sum of all the other spectral components. From the FFT, the SINAD is calculated from the relation: SINAD dB = 20 × log 10 x[j] . N ] (N=8192: number of samples) and 2 x[j] . MAX(x[i])
i = 2,i j
x[i]
N 2
· The Signal to Noise Ratio is the ratio between the RMS signal amplitude and the RMS sum of all the other spectral components without harmonic used in the THD relation. From the FFT, the SNR is calculated from the relation: SNR dB = 20 × log 10 x[j] .
i = 2,i j×[1:6]
x[i]
N 2
· the Effective number of bit is calculated by the relation (valid to NYQUIST condition): SINAD - 10 × log 10 20 × log 10 2 3 2.
E BIT =
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
8.2 MEASUREMENT OF THE ADC 1 (MODE 1):
This version of the Demoboard is evaluated with the following measurement conditions:
Input frequency: Waveform: Magnitude: Antialiasing Filter: Clock frequency: Operating mode:
4.43MHz. Sinus. Full Scale (FFT). Yes. 105Msps. External clock.
The typical results and corresponding diagram obtained with these conditions is shown on Figure 26.
FFT: Size: 1024samples/fclk : 1 0 5 . 4 9 5 8 1 4 M S P S / f i: 4 . 4 3 M H z 0 -10 -20
1
Power Spectrum (dBc )
-30 -40 -50 -60
3 4 6 5
-70 -80 -90 -100 0 1f i : 2f i : 3f i : 4f i : 5f i : 6f i : 10 4.43MHz: 8.86MHz: 13.3MHz: 17.7MHz: 22.2MHz: 26.6MHz:
2
20 30 Frequency(M H z ) 0dBc -80.61dBc -66.74dBc -66dBc -68.16dBc -65.44dBc
40
50
THD:60.41dBc SFDR:-57.66dBc SINAD:46.76dB SNR:46.95dB E:7.47bit
- Figure 26. FFT results of ADC 1 (mode 1) -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
8.3 MEASUREMENT OF CHANNEL 1 (MODE 0) IN MINIMUM GAIN:
This version of the Demoboard is evaluated with the following measurement conditions: Input frequency: Waveform: Magnitude: Antialiasing Filter: Mode: Gain Register: Clock frequency: Operating mode: 15MHz. Sinus. Full Scale (FFT). Yes. Track-and-hold. 00h/0dBv. 101Msps. External clock.
The typical results and corresponding diagram obtained with these conditions is shown on Figure 27.
F F T : S i z e : 1 0 2 4 s a m p l e s /fclk : 1 0 1 . 7 2 1 8 5 4 3 M S P S / f i : 1 5 M H z 0 -10 -20
1
Power Spectrum (dBc )
-30 -40 -50 -60 -70 -80 -90 0 1f i : 2f i : 3f i : 4f i : 5f i : 6f i : 10 20 30 Frequency(M H z ) 40 THD:55.93dBc SFDR:-59.31dBc 50
6 2 5 4 3
15MHz: 0dBc 30MHz: -60.71dBc 45MHz: -63.58dBc 41.7MHz: -65.89dBc 26.7MHz: -63.51dBc 11.7MHz: -62.5dBc
- Figure 27. FFT results of channel 1 (mode 0) in minimum gain -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
8.4 MEASUREMENT OF CHANNEL 1 (MODE 0) IN MAXIMUM GAIN:
This version of the Demoboard is evaluated with the following measurement conditions: Input frequency: Waveform: Magnitude: Antialiasing Filter: Mode: Gain Register: Clock frequency: Operating mode: 15MHz. Sinus. Full Scale (FFT). Yes. Track-and-hold. 3Fh/34dBv. 101Msps. External clock.
The typical results and corresponding diagram obtained with these conditions is shown on Figure 28.
FFT: Size: 1024samples/f clk : 1 0 1 . 7 2 1 8 5 4 3 M S P S / f i : 1 5 M H z 0 -10 -20
1
Power Spectrum (dBc )
-30 -40 -50
2
-60 -70 -80 -90 0 1f i : 2f i : 3f i : 4f i : 5f i : 6f i : 10
6 3 5 4
20 30 Frequency(M H z )
40 THD:54.93dBc SFDR:-54.64dBc
50
15MHz: 0dBc 30MHz: -57.41dBc 45MHz: -64.43dBc 41.7MHz: -70.78dBc 26.7MHz: -70.07dBc 11.7MHz: -60.66dBc
- Figure 28. FFT results of channel 1 (mode 0) in maximum gain -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
9. DEMOBOARD FILES:
All documents needed for the realisation of this Demoboard are given from Figures 29 to 36. · · · · · · · · · Electrical diagram. Silk-screen printing. Topside component implantation. Underside component implantation. Topside component layout 1. Internal layout ground layout 2. Internal layout supply layout 3. Internal layout ground layout 4. Underside component layout 5
The list of components with their values and references is given from Tables 2 to 6. The list of components with their values and references for the examples of filter is given in Table 7.
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 29. Demoboard electrical diagram -
PHI LI P S
P HI L I P S C OMP OS AN T S
A. L . P . A. R
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- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 30. Topside component implantation -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 31. Underside component implantation -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 32. Topside component layout (signal layer 1) -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 33. Internal plane layout (ground layer 2) -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 34. Internal layout (supply layer 3) -
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- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 35. Internal plane layout (ground layer 4) -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
- Figure 36. Underside component layout (signal layer 5) -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
REF C1 C2 C3 C4 C5 C8 C9 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46
VALUE 33µF/16V 22µF/16V 1µF/16V 1µF/16V 330nF 330nF 330nF 100nF 100nF 100nF 100nF 100nF 100nF 100pF 100nF 100nF 100nF 220nF 100nF 100nF 100nF 100nF 100nF 100nF 10nF 470nF 68pF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 47pF 100nF 100nF 220nF 10nF 100nF 100nF
COMPONENT CAPACITOR ' ' ' ` ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ` ' ' '
TYPE 293D/D 293D/D 293D/A ' C1206 ` ` C0805 ' ' ' ' ' ` ` ` ` ` ` ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ` ' ' '
MANUFACTURER SPRAGUE ' ' ' PHILIPS ` ` ` ' ' ' ' ' ` ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ` ' ' '
- Table 2. List of components -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
REF C47 C48 C49 C50 C44 C44 C46 D1 D2 D3 D4 D5 D6 D7 DS1 DS2 F1 F2 F3 IC1 IC2 IC3 IC4 IC5 IC6 IC7 IC8 IC9 IC10 IC11 IC12 J1 J2 J3 J4 J5 J6
VALUE 100nF 100nF 68pF 100nF 10nF 10nF 1µF/16V
COMPONENT CAPACITOR ' ' ' ' ' ' DIODE ` ` ` ` ` ` RED LED GREEN LED 2nF 2nF 2nF FILTER ' ' EXCLUSIVE-OR D TYPE FLIP FLOP JOHNSON COUNTER BINARY RIPPLE COUNTER 2-INPUT MULTIPLEXER ` 8-INPUT MULTIPLEXER NOR NAND TIMER LOW DROPOUT REGULATOR ADC 50 50 50 CONNECTOR ` CONNECTOR ' ` `
TYPE C0805 ' ' ' ' ' ` BYD17G BAS16 ' ' ' ' ' LST 679-CO LGT 679-CO 4700-003-S ' ' 74LVT86DB 74LVT16374ADL 74HC4017DB 74HC393DB 74HC157DB ` 74HC151DB 74HC02DB 74HC00DB TLC555CD LM3940 TDA8798HL SMA ` SMA ` MKSD SUB-D25 FEMALE
MANUFACTURER PHILIPS ' ' ' ' ' ' PHILIPS ' ' ' ' ' ' SIEMENS ` TUSONIX ' ' PHILIPS ` ` ` ` ` ` ` ` TEXAS INSTRUMENTS NATIONAL SEMI. PHILIPS RADIALL ` RADIALL ` PHOENIX HARTING
- Table 3. List of components -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
REF K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 L1 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25
VALUE
COMPONENT SWITCH ' ' ' ' ' ' ' ' ' ' ' ' ' HF70ACB-453215T 4.7K 4.7K 750 4.7K 4.7K 680 4.7K 100 4.7K 4.7K 4.7K 330 4.7K 4.7K 4.7K 3.3K 50 4.7K 20K 100 50 4.7K 4.7K 4.7K 0 RESISTOR ` ` ` ` ` ` ` ' ' ' ' ' ' ' ' ' ' ' ` ` ` ` ` `
TYPE 1C2P ' ' ' ' ' ' ' ' ' ' ' ' ' C1812 0805 ` ` ` ` ` ` ` ' ' ' ' ' ' ' ' ' ' ' ` ` ` ` ` `
MANUFACTURER SECME ' ' ' ' ' ' ' ' ' ' ' ' ' PHILIPS PHILIPS ` ` ` ` ` ` ` ' ' ' ' ' ' ' ' ' ' ' ` ` ` ` ` `
- Table 4. List of components -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
REF R26 R27 R28 R29 R30 R31 R32 R33 R34 R35 R36 R37 R38 R39 R40 R37 T1 T2 T3 T4 BP1 TM1 TM2 TM4 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14
VALUE Do not solder 4.7K 4.7K 4.7K 750 3.3K 100 100 820 820 68 56 68 56 0 Do not solder
COMPONENT RESISTOR ` ` ` ` ` ` ` ` ` ` ` ` `
TYPE 0805 ` ` ` ` 1206 ` ` ` ` ` ` ` `
MANUFACTURER PHILIPS ` ` ` ` ` ` ` ` ` ` ` ` `
TRANSISTOR ` RF TRANSFORMER ` PUSH BUTTON MEASUREMENT POINT ` ` TEST POINT ' ' ` ' ' ' ' ' ' ' ' ' '
BC848B ` MCLT1-6T-KK81 ` 3CSH9
PHILIPS ` MINI-CIRCUIT ` MEC COMATEL ` ' COMATEL ` ` ` ` ' ' ' ' ' ' ' '
- Table 5. List of components -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
REF TP15 TP16 TP17 TP18 TP19 TP20 TP21 TP22 TP23 TP24 TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40 TP41 TP42 TP43 TP44 TP45 TP46 TP47 TP48 TP49 TP50 TP51 TP52 TP53 TP54 TP55 TP56
VALUE
COMPONENT TEST POINT ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
TYPE
MANUFACTURER COMATEL ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
- Table 5. List of components -
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Philips Semiconductors
- TDA8798HL DEMONSTRATION BOARD
Application Note AN99055
REF TP57 TP58 TP59 TP60 TP61 TP62 TP63 TP64 TP65 TP66 TP67 TP68
VALUE
COMPONENT TEST POINT ' ' ' ' ' ' ' ' ' ' '
TYPE
MANUFACTURER COMATEL ' ' ' ' ' ' ' ' ' ' '
- Table 6. List of components REF C6 C7 C10 C11 L1 L2 L3 L4 R34 R35 VALUE 100nF 100nF 100nF 100nF 4.7µH 4.7µH 4.7µH 4.7µH 820 820 COMPONENT CAPACITOR ` ` ` SELF ` ` ` RESISTOR ` TYPE C1206 ` ` ` LQH1N220K04 ` ` ` 1206 ` MANUFACTURER PHILIPS ' ` ` MURATA ` ` ` PHILIPS `
- Table 7. List of components for the filter -
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