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ICs for Consumer Electronics
Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction TDA 16846/TDA 16847

Data Sheet 2000-01-14

TDA 16846/TDA 16847 Revision History:

Current Version: 2000-01-14

Previous Version: 1999-07-05 Page (in previous Version) 3 Page (in current Version) 3, 28 Subjects (major changes since last revision)

P-DSO package added

Edition 01.00 Published by Infineon Technologies AG i. Gr., St.-Martin-Strasse 53 D-81541 München

© Infineon Technologies AG 2000 All Rights Reserved.
Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologiesis an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction
Preliminary Data

TDA 16846 TDA 16847

Bipolar IC

1
1.1
· · · · · · · · · · · · ·

Overview
Features

Line Current Consumption with PFC P-DIP-14-3 Low Power Consumption Stable and Adjustable Standby Frequency Very Low Start-up Current Soft-Start for Quiet Start-up Free usable Fault Comparators Synchronization and Fixed Frequency Facility P-DSO-14-3 Over- and Undervoltage Lockout Switch Off at Mains Undervoltage Temporary high power circuit (only TDA 16847) Mains Voltage Dependent Fold Back Point Correction Continuous Frequency Reduction with Decreasing Load Adjustable and Voltage Dependent Ringing Suppression Time Ordering Code Q67000-A9377 Q67000-A9378 Q67006-A9430 Q67006-A9412 Package P-DIP-14-3 P-DIP-14-3 P-DSO-14-3 P-DSO-14-3

Type TDA 16846 TDA 16847 TDA 16846G TDA 16847G

1.2

Description

The TDA 16846 is optimized to control free running or fixed frequency flyback converters with or without Power Factor Correction (Current Pump). To provide low power consumption at light loads, this device reduces the switching frequency continuously with load, towards an adjustable minimum (e. g. 20 kHz in standby mode). Additionally, the start up current is very low. To avoid switching stresses of the power devices, the power transistor is always switched on at minimum voltage. A special circuit is implemented to avoid jitter. The device has several protection functions: VCC over- and undervoltage, mains undervoltage, current limiting and 2 free usable fault comparators. Regulation can be done by using the internal error amplifier or an opto coupler feedback (additional input). The output driver is ideally suited for driving a power MOSFET, but it can also be used for a bipolar transistor. Fixed frequency and synchronized operation are also possible.
Data Sheet 3 2000-01-14

TDA 16846 TDA 16847

The TDA 16846 is suited for TV-, VCR- sets and SAT receivers. It also can be good used in PC monitors. The TDA 16847 is identical with TDA 16846 but has an additional power measurement output (pin 8) which can be used for a Temporary High Power Circuit.

OTC PCS RZI SRC OCI FC2 SYN

1 2 3 4 5 6 7

14 13 12 11 10 9 8
AEP02647

VCC OUT GND PVC FC1 REF N.C./PMO

Figure 1

Pin Configuration (top view)

1.3
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Pin Definitions and Functions
Symbol OTC PCS RZI SRC OCI FC2 SYN N.C./PMO REF FC1 PVC GND OUT VCC Function Off Time Circuit Primary Current Simulation Regulation and Zero Crossing Input Soft-Start and Regulation Capacitor Opto Coupler Input Fault Comparator 2 Synchronization Input Not Connected (TDA 16846)/PMO (TDA 16847) Reference Voltage and Current Fault Comparator 1 Primary Voltage Check Ground Output Supply Voltage

Data Sheet

4

2000-01-14

TDA 16846 TDA 16847

1.4
Pin 1 2

Short Description of the Pin Functions
Function A parallel RC-circuit between this pin and ground determines the ringing suppression time and the standby-frequency. A capacitor between this pin and ground and a resistor between this pin and the positive terminal of the primary elcap quantifies the max. possible output power of the SMPS. This is the input of the error amplifier and the zero crossing input. The output of a voltage divider between the control winding and ground is connected to this input. If the pulses at pin 3 exceed a 5 V threshold, the control voltage at pin 4 is lowered. This is the pin for the control voltage. A capacitor has to be connected between this pin and ground. The value of this capacitor determines the duration of the softstart and the speed of the control. If an opto coupler for the control is used, it's output has to be connected between this pin and ground. The voltage divider at pin 3 has then to be changed, so that the pulses at pin 3 are below 5 V. Fault comparator 2: If a voltage > 1.2 V is applied to this pin, the SMPS stops. If fixed frequency mode is wanted, a parallel RC circuit has to be connected between this pin and ground. The RC-value determines the frequency. If synchronized mode is wanted, sync pulses have to be fed into this pin. Not connected (TDA 16846). / This is the power measurement output of the Temporary High Power Circuit. A capacitor and a RC-circuit has to be connected between this pin and ground (TDA 16847). Output for reference voltage (5 V). With a resistor between this pin and ground the fault comparator 2 (pin 6) is enabled. Fault comparator 1: If a voltage > 1 V is applied to this pin, the SMPS stops. This is the input of the primary voltage check. The voltage at the anode of the primary elcap has to be fed to this pin via a voltage divider. If the voltage of this pin falls below 1 V, the SMPS is switched off. A second function of this pin is the primary voltage dependent fold back point correction (only active in free running mode). Common ground. Output signal. This pin has to be connected across a serial resistor with the gate of the power transistor. Connection for supply voltage and startup capacitor. After startup the supply voltage is produced by the control winding of the transformer and rectified by an external diode.
5 2000-01-14

3

4

5

6 7

8

9 10 11

12 13 14

Data Sheet

TDA 16846 TDA 16847

1.5

Block Diagrams
PVC

SYN

7

D4

R4
KSY

Fold Back Point Correction R 6 x 1/3

11 Primary Voltage Check 1V
+ -

R8

R3

1.5 V
-

1 ED2 G4 1 ErrorFlipflop S R Q
+ -

OTC

1 CS1 3.5 V 3 D3 5V

-

RSTC/RSTF Error Amplifier
+ -

R2
D2

RZI

Buffer for Control Voltage
+ + -

SRC OCI

4 5

20 k PCS 2 5V

R1

On Time Comparator
+ -

& G2

On Time Flipflop S R Q

I1
ED1

1.5 V D1 Startup Diode < 25 mV Overvoltage Comparator
+ -

Zero Crossing Signal Supply Voltage Comparator 15/8 V
+ -

1V

VCC 14
GND 12 16 V

10
1)

The input with the lower voltage becomes operative

FC1

Figure 2
Data Sheet

TDA 16846
6 2000-01-14

+ -

+

75 k 15 k Control Voltage Off Time Limit Comparator 2V +

G1

+ -

5V

30 k

+ -

R7

R6

PVA D5

3.5 V

VCC
9 8 6 REF N.C. FC2

FC2 1.2 V

G3 &

Output Driver 13 OUT

FC1

AEB02648

TDA 16846 TDA 16847

PVC SYN 7 D4

R4
KSY

Fold Back Point Correction R 6 x 1/3

11 Primary Voltage Check 1V
+ -

R8

R3

1.5 V
-

2V OTC 1 CS1 3.5 V 3 D3 SRC OCI 4 5 5V

+ -

1 ED2 RSTC/RSTF G4 1 ErrorFlipflop S R Q

Error Amplifier
+ -

R2
D2

RZI

Buffer for Control Voltage 1)
+ + -

20 k PCS 2 5V S1

R1

On Time Comparator
+ -

& G2

On Time Flipflop S R Q

I1
ED1 Zero Crossing Signal

Discharge Time Flipflop S R Q FC1 1V
+ -

1.5 V D1 Startup Diode < 25 mV Overvoltage Comparator
+ -

Supply Voltage Comparator 15/8 V
+ -

VCC 14
GND 12 16 V

1)

The input with the lower voltage becomes operative

Figure 3

TDA 16847

Data Sheet

7

+

75 k 15 k Control Voltage Off Time Limit Comparator

G1

+ -

5V

30 k

+ -

R7

R6

PVA D5

3.5 V S2

VCC
9 8
+ -

REF PMO FC2

6

FC2 1.2 V

G3 &

Output Driver 13 OUT

10 FC1
AEB02737

2000-01-14

TDA 16846 TDA 16847

2

Functional Description

Start Up Behaviour (Pin 14) When power is applied to the chip and the voltage V14 at Pin 14 (VCC) is less than the upper threshold (VON) of the Supply Voltage Comparator (SVC), input current I14 will be less than 100 µA. The chip is not active and driver output (Pin 13) and control output (Pin 4) will be actively held low. When V14 exceeds the upper SVC threshold (VON ) the chip starts working and I14 increases. When V14 falls below the lower SVC threshold (VOFF) the chip starts again at his initial condition. Figure 4 shows the start-up circuit and Figure 5 shows the voltage V14 during start up. Charging of C14 is done by resistor R2 of the "Primary Current Simulation" (see later) and the internal diode D1, so no additional start up resistor is needed. The capacitor C14 delivers the supply current until the auxiliary winding of the transformer supplies the chip with current through the external diode D14. It is recommended to switch a small RF snubber capacitor of e.g. 100 nF parallel to the electrolytic capacitor at pin 14 as shown in the application circuits in Figures 15, 16, and 17.

D14

C14

VCC
14 SVC TR D1

C2

PCS 2

R2

TDA 16846

V Out

Cp
AES02649

Figure 4

Startup Circuit

Data Sheet

8

2000-01-14

TDA 16846 TDA 16847

Vmax V14 VOn

VOff
Startup Operation

t
AED02650

Figure 5

Startup Voltage Diagram

Primary Current Simulation PCS (Pin 2) / Current Limiting A voltage proportional to the current of the power transistor is generated at Pin 2 by the RC-combination R2, C2 (Figure 4). The voltage at Pin 2 is forced to 1.5 V when the power transistor is switched off and during its switch on time C2 is charged by R2 from the rectified mains. The relation of V2 and the current in the power transistor (Iprimary) is
:

V 2 = 1,5 V +

L primary × I primary ------------------------------R2 × C2

Lprimary: Primary inductance of the transformer The voltage V2 is applied to one input of the On Time Comparator ONTC (see Figure 2). The other input is the control voltage. If V2 exceeds the control voltage, the driver
switches off (current limiting). The maximum value of the control voltage is the internal reference voltage 5 V, so the maximum current in the power transistor ( IMprimary) is
:

3,5 V × R 2 × C 2 I Mprimary = -------------------------------------L primary The control voltage can be reduced by either the Error Amplifier EA (current mode regulation), or by an opto coupler at Pin 5 (regulation with opto coupler isolation) or by the voltage V11 at Pin 11 (Fold Back Point Correction).

Data Sheet

9

2000-01-14

TDA 16846 TDA 16847

Fold Back Point Correction PVC (Pin 11)

V11 is deviated by a voltage divider from the rectified mains and reduces the limit of the
possible current maximum in the power transistor if the mains voltage increases. I.e. this limit is independent of the mains (only active in free running mode). The maximum current (IMprimary) depending on the voltage V11 at Pin 11 is
:

(4 V ­ V 11 / 3 ) × R 2 × C 2 I Mprimary = -----------------------------------------------------------L primary Off-Time Circuit OTC (Pin 1) Figure 6 shows the Off-Time Circuit which determines the load dependent frequency course. When the driver switches off (Figure 7) the capacitor C1 is charged by current I1 (approx. 1 mA) until the capacitor's voltage reaches 3.5 V. The charge time TC1 is
:

C 1 × 1,5 V TC1 ------------------------1mA
For proper operation of the special internal anti jitter circuit, TC1 should have the same value as the resonance time "TR" of the power circuit (Figure 7). After charging C1 up to 3.5 V the current source is disconnected and C1 is discharged by resistor R1. The voltage V1 at Pin 1 is applied to the Off-Time Comparator (OFTC). The other input of OFTC is the control voltage. The value of the control voltage at the input of OFTC is limited to a minimum of 2 V (for stable frequency at very light load). The On-Time Flip Flop (ONTF) is set, if the output of OFTC is high 1) and the voltage V3 at Pin 3 falls below 25 mV (zero crossing signal is high). This ensures switching on of the power transistor at minimum voltage. If no zero crossing signal is coming into pin 3, the power transistor is switched on after an additional delay until V1 falls below 1.5 V (see Figure 6, OFTCD). As long as V1 is higher than the limited control voltage, ONTF is disabled to suppress wrong zero crossings of V3, due to parasitic oscillations from the transformer after switch-off. The discharge time of C1 is a function of the control voltage.
1)
.

i.e. V1 is less than the limited control voltage. Output Power Off-time TD1 Low Medium High Constant (TD1MAX.), const. frequency stand by Decreasing Free running, switch-on at first minimum

Control Voltage 1.5 - 2 V 2 - 3.5 V 3.5 - 5 V

If the control voltage is below 2 V (at low output power) the "off-time" is maximum and constant TD1 max 0,47 × R 1 × C 1

Data Sheet

10

2000-01-14

TDA 16846 TDA 16847

External From SYNC Control Voltage Limit 2V OTC 1 1.5 V OFTC
+ -

Internal OFTCD
+ -

From Error FF

1 & ONTF S R Q & Output Driver

R1

C1 I1
2V

ED3

1 ED2

RSTC
+ -

RSTC S R ED1 Q

From ONTC

From UVLO

Ringing Suppression Time

3.5 V RZI 3

Zero Crossing Signal

AES02651

Figure 6

Off-Time-Circuit

Data Sheet

11

2000-01-14

TDA 16846 TDA 16847

tR
Power Trans.

VDrain
3.5 V 2V

t C1
V5 V1
0V

t D1max

V13 V3

t
AED02652

Figure 7

Pulse Diagram of Off-Time-Circuit

Figure 8 shows the converters switching frequency as a function of the output power.

f
Conventional Free Running TDA 16846

e.g. 20 kHz

POUT
AED02653

Figure 8

Load Dependant Frequency Course

Data Sheet

12

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TDA 16846 TDA 16847

Error Amplifier EA / Soft-Start (Pin 3, Pin 4) Figure 9 shows the simplified Error Amplifier circuit. The positive input of the Error Amplifier (EA) is the reference voltage 5 V. The negative input is the pulsed output voltage from the auxiliary winding, divided by R31 and R32. The capacitor C3 is dimensioned only for delaying zero crossings and smoothing the first spike after switchoff. Smoothing of the regulation voltage is done with the soft start capacitor C4 at Pin 4. During start up C4 is charged with a current of approx. 2 µA (Soft Start). Figure 10 shows the voltage diagrams of the Error Amplifier circuit.

External

Internal

TR

R 31

C3
RZI 3

Error Amplifier 5V
+ -

Down

R 32

C4

SRC 4

VReg
AES02654

Figure 9

Error Amplifier

VRef V3
Down

V4

t
AED02655

Figure 10
Data Sheet

Regulation Pulse Diagram
13 2000-01-14

TDA 16846 TDA 16847

Fixed Frequency and Synchronization Circuit SYN (Pin 7) Figure 11 shows the Fixed Frequency and Synchronization Circuit. The circuit is disabled when Pin 7 is not connected. With R7 and C7 at Pin 7 the circuit is working. C7 is charged fast by approx. 1 mA and discharged slowly by R7 (Figure 11). The power transistor is switched on at beginning of the charge phase. The switching frequency is (charge time ignored)
:

f -------------R7 × C7
When the oscillator circuit is working the Fold Back Point Correction is disabled (not necessary in fixed frequency mode). "Switch on" is only possible when a "zero crossing" has occurred at Pin 3, otherwise "switch-on" will be delayed (Figure 12).

1,18

External

Internal

OP1
+ -

SYN 7

OP1OUT

R7

C7

30 k 5V

15 k 75 k Logic LO

OUT 13 RZI 3 Zero Crossing Signal

AES02656

Figure 11

Synchronization and Fixed Frequency Circuit

Data Sheet

14

2000-01-14

TDA 16846 TDA 16847

V VTrans
3.6 V 1.5 V 0.7 V RZI(3)

V7

t
AED02657

Figure 12

Pulse Diagram for Fixed Frequency Circuit

Synchronization mode is also possible. The synchronization frequency must be higher than the oscillator frequency.

External 5 V 470 SYN

9 7

Internal

39 k

R7

C7

1 nF

SFH 6136
AES02658

Figure 13

Ext. Synchronization Circuit

Data Sheet

15

2000-01-14

TDA 16846 TDA 16847

3

Protection Functions

The chip has several protection functions: Current Limiting See "Primary Current Simulation PCS (Pin 2) / Current Limiting" and "Fold Back Point Correction PVC (Pin 11)". Over- and Undervoltage Lockout OV/SVC (Pin 14) When V14 at Pin 14 exceeds 16 V, e. g. due to a fault in the regulation circuit, the Error Flip Flop ERR is set and the output driver is shut-down. When V14 goes below the lower SVC threshold, ERR is reset and the driver output (Pin 13) and the soft-start (Pin 4) are shut down and actively held low. Primary Voltage Check PVC (Pin 11) When the voltage V11 at Pin 11 goes below 1 V the Error Flip Flop (ERR) is set. E.g. a voltage divider from the rectified mains at Pin 11 prevents from high input currents at too low input voltage. Free Usable Fault Comparator FC1 (Pin 10) When the voltage at Pin 10 exceeds 1 V, the Error Flip Flop (ERR) is set. This can be used e. g. for mains overvoltage shutdown. Free Usable Fault Comparator FC2 (Pin 6) When the voltage at Pin 6 exceeds 1.2 V, the Error Flip Flop (ERR) is set. A resistor between Pin 9 (REF) and ground is necessary to enable this fault comparator. Voltage dependent Ringing Suppression Time During start-up and short-circuit operation, the output voltage of the converter is low and parasitic zero crossings are applied for a longer time at Pin 3. Therefore the Ringing Suppression Time TC1 (see "Off-Time Circuit OTC (Pin 1)") is made longer with factor 2.5 at low output voltage. To ensure start-up of the circuit, the value of resistor R1 (Pin 1, Figure 6) must be higher than 20 k.

Data Sheet

16

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TDA 16846 TDA 16847

4

Temporary High Power Circuit FC2, PMO, REF (Pin 6, 8, 9, TDA 16847)

Figure 14 shows the Temporary High Power Circuit:
Internal VCC 9 REF 51 k 8 PMO Discharge Time S2 External

CS2

R9

I8

R8 C8 C6

to Error Flipflop

1

+ -

6 FC2

FC2 1.2 V

10 M

R6

AEB02739

Figure 14 The Temporary High Power Circuit (THPC) consists of two parts: First a power measurement circuit is implemented: The capacitor C8 at Pin 8 is charged with a constant current I8 during the discharge time of the flyback transformer and connected to ground the other time. So the average of the sawtooth voltage V8 at Pin 8 is proportional to the converters output power (at constant output voltages). The charge current I8 for C8 is dimensioned by the resistor R9 at Pin 9:

I8 = 5 V/R9

Data Sheet

17

2000-01-14

TDA 16846 TDA 16847

Second a High Power Shutdown Comparator (FC2) is implemented: When the voltage V6 at Pin 6 exceeds 1.2 V the Error Flip Flop (ERR) is set. The output voltage of the power measurement circuit (Pin 8) is smoothed by R8/C6 and applied to the "high power shutdown" input at Pin 6. The relation between this voltage V6 and the output power of the converter P is approximately:

V6 (P × LSecondary × 5 V)/(VOUT2 × C8 × R9) LSecondary: The transformers secondary inductance VOUT: The converters output voltage So the time constant of R9/C8 for a certain high power shutdown level PSD is: R9 × C8 (PSD × LSecondary × 4.2)/VOUT2
The converters high power shutdown level can be dimensioned lower (by R9, C8) than the current limit level (see "current limiting"). So because of the delay R8/C6, the converter can deliver maximum output power (current limit level) for a certain time (e. g. for power pulses like motor start current) and a power below the high power shutdown level for unlimited time. This has the advantage that the thermal dimensioning of the power devices is only needed for the lower power level. Once the voltage V6 exceeds 1.2 V there are no more charge or discharge actions at Pin 8. The voltage V6 remains high due to the bias current out of HPC and the converter remains switched-off. Reset can be done by either plug-off the supply from the mains or with a high value resistor R6 (Figure 14). R6 causes a reset every view seconds. When Pin 9 is not connected or gets too less current the temporary high power circuit is disabled.

Data Sheet

18

2000-01-14

TDA 16846 TDA 16847

5
5.1
Parameter

Electrical Characteristics
Absolute Maximum Ratings
Symbol Limit Values min. max. 17 6 17 6 ­ 10 REF OUT ­ 100 ­ ­ ­1 ­ 100 2 V V V V mA mA mA mA kV ­ ­ ­ ­ 0.3 ­ 0.3 ­ 0.3 Unit Remarks

All voltages listed are referenced to ground (0 V, VSS) except where noted.

Supply Voltage at Pin 14 Voltage at Pin 2, 8, 11 Voltage at Pin 3 Current into Pin 3 Current into Pin 9 Current into Pin 13 ESD Protection

VCC
­ RZI

Voltage at Pin 1, 4, 5, 6, 7, 9, 10 ­

V3 < ­ 0.3 V
­

V13 > VCC V13 < 0 V
MIL STD 883C method 3015.6, 100 pF, 1500 ­ ­

Tstg Operating Junction Temperature TJ Thermal Resistance RthJA
Storage Temperature Junction-Ambient Soldering Temperature Soldering Time ­ ­

­ 65 ­ 25 ­ ­ ­

125 125 110 260 10

°C °C

K/W P-DIP-14-3 °C s ­ ­

Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Data Sheet

19

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TDA 16846 TDA 16847

5.2
Parameter

Characteristics
Symbol Limit Values min. typ. max. Unit Test Condition

Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V

Start-Up Circuit Supply current, OFF Supply current, ON Turn-ON threshold Turn-OFF threshold

I14 I14 V14 ON V14 OFF

­ ­ 14.5 7.5

40 5 15 8

100 8 15.5 8.5

µA mA V V

0 < VCC < V14 ON Output low ­ ­

Primary Current Simulation PCS (Pin 2) / Current Limiting Basic value Peak value On-time

V2 V2
­

1.45 4.85 9.0

1.5 5 10.5

1.55 5.15 11.5

V V µs

I2 = 100 µA V11 = 1.2 V V11 = 1.2 V, C2 = 220 pF, I2 = 75 µA
­

Bias current Pin 2

­

­ 1.0 ­ 0.3 ­

µA

Fold Back Point Correction PVC (Pin 11) Peak value On-time

V2
­

3.8 6.2

4.1 7.5

4.3 8.5

V µs

V11 = 4.5 V V11 = 4.5 V, C2 = 220 pF, I2 = 75 µA
­

Bias current Pin 11 Off-Time Circuit OTC (Pin 1) Charge current Charge current Peak value Basic value

­

­ 1.0 ­ 0.3 ­

µA

I1 I1 V1 V1

0.9 0.35 3.38 1.92

1.1 0.5 3.5 2

1.4 0.65 3.62 2.08

mA mA V V

V3 > 3 V V3 < 2 V
­ ­

Data Sheet

20

2000-01-14

TDA 16846 TDA 16847

5.2
Parameter

Characteristics (cont'd)
Symbol TC1 Limit Values min. typ. 1.0 max. 1.3 µs 0.85 Unit Test Condition

Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V

T12 Charge time

T13 Charge time

TC1

1.9

2.4

3.0

µs

Off-time Bias current Pin 1 Zero crossing threshold (Pin 3) Delay to switch-on Bias current Pin 3

TD1MAX. ­ ­ ­ ­

65

72

80

µs µA mV ns µA

V3 > 3 V, C1 = 680 pF, R1 = 100 k V3 < 2 V, C1 = 680 pF, R1 = 100 k C1 = 680 pF, R1 = 100 k
­ ­ ­

­ 1.1 ­ 0.4 ­ 15 280 ­2 25 350 35 480

­ 1.2 ­

V3 < 25 mV

Error Amplifier EA (Pin 3, Pin 4) Input threshold (Pin 3) Bias current Pin 3 Soft-start charge current (Pin 4) Opto Coupler Input (Pin 5) Input voltage range Pull high resistor to VREF

VEATH
­ ­

4.85 ­

5

5.15

V µA

­

­ 0.9 ­

V3 > 3 V
­

­ 2.5 ­ 1.8 ­ 1.2 µA

V5 R1

0.3 15

­ 20

6 25

V k

­ ­

Data Sheet

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TDA 16846 TDA 16847

5.2
Parameter

Characteristics (cont'd)
Symbol Limit Values min. typ. max. Unit Test Condition

Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V

Fixed Frequency and Synchronization Circuit SYN (Pin 7) Frequency Charge current Upper threshold Lower threshold Charge time Bias current Pin 7 Input voltage range ­ 78 1.0 3.5 1.43 0.4 0.3 88 1.3 3.6 1.5 0.55 ­ 98 1.6 3.7 1.57 0.75 6 kHz mA V V µs V

C7 = 470 pF, R7 = 20 k
­ ­ ­ ­ ­ ­

I7 V7 V7
­ ­

­ 2.4 ­ 1.8 ­ 1.1 µA

V7

Undervoltage Lockout SVC (Pin 14) Threshold

V14 OFF

7.5

8

8.5

V

­

Overvoltage Lockout OV (Pin 14) Threshold Delta-OV-V14 ON

V14 OV
­

15.7 0.5

16.5 ­

17 ­

V V

­ ­

Primary Voltage Check PVC (Pin 11) Threshold Reference Voltage (Pin 9) Voltage at Pin 9 Current into Pin 9

V11

0.95

1

1.06

V

­

V9 I9

4.8

5

5.15 0

V µA

­ 200 ­

I9 = 100 µA VEATH(Pin 3) ­ V9 < 50 mV

Data Sheet

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2000-01-14

TDA 16846 TDA 16847

5.2
Parameter

Characteristics (cont'd)
Symbol Limit Values min. typ. max. Unit Test Condition

Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V

Fault Comparator FC2 (Pin 6) HPC Threshold Bias Current Pin 6

V6
­

1.12

1.2

1.28

V µA

­ ­

­ 1.0 ­ 0.3 0.1

Fault Comparator FC1 (Pin 10) Threshold Bias current Pin 10

V10
­

0.95 0.48

1 0.9

1.06 1.2

V µA

­ ­

Power Measurement Output PMO (Pin 8, only TDA 16847) Charge current Pin 8 Output Driver OD (Pin 13) Output voltage low state Output voltage high state Output voltage during low supply voltage

I8

­ 110 ­ 100 ­ 90

µA

I9 = ­ 100 µA

V13 low 1.1 V13 high 9.2 V13 aclow 0.8

1.8 10 1.8

2.4 11 2.5

V V V

Rise time Fall time

­ ­

70 30

110 50

180 80

ns ns

I13 = 100 mA I13 = ­ 100 mA I13 = ­ 10 mA, V14 increasing: 0 < V14 < V14 ON V14 decreasing: 0 < V14 < V14 OFF C13 = 10 nF, V13 = 2 ... 8 V C13 = 10 nF, V13 = 2 ... 8 V

Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage.

Data Sheet

23

2000-01-14

TDA 16846 TDA 16847

4 3 IC 02 SFH 617 A-2

1 2 820

R 62

R 61
1 k

C62
1 nF

C61
10 nF 100 k

R 63

C27 100 nF

C25
4 10 nF

14

C26 22 µF C 28
5 4.7 nF 3

D26 1N4148

R 38
9.1 k

R 60 2.2 k P 60 500
D41 TR1 MUR4100 (AL = 190 nH) 7 Turns 52 Turns

100 k

R 65

R 24
18 k 11 IC1 TDA 16846

9.1 k

R 29

V1 C41
100 V 220 µF

C24
1 nF 3.9 M

C22
150 pF

P10 2 k
6, 10, 12 1 D42 MUR120 56 k 2 8 T1 SPP (0.6 ) N6055 N.C. D9 MUR4100

R 23

V2 C42
16 V 470 µF

R 22 1 M C22
560 pF 13 7 9

R 30

C30
1.5 nF

9 Turns

C9
220 pF

R 35
15

D43 MUR120 5 Turns

V3 C43
8.5 V 470 µF

C8
10 nF

54 Turns

D1-D4 4 x BYW 76

L8
2 mH

D8 STTA506D

5.1 k

R5

C7

C5
180-270 V F1 3.15 A RFI Filter 1 nF

150 µF/450 V

C10
1 nF

R 10

4.7 M
AES02659

Figure 15

Circuit Diagram for Application with PFC

Data Sheet

24

2000-01-14

TDA 16846 TDA 16847

D26 1N4148

C27 100 nF

C26 22 µF

C25
4 10 nF

14

5

R 38
3 11 IC1 TDA 16846 9.1 k

R 24
18 k

R 29

9.1 k

D41 TR1 MUR4100 (AL = 190 nH) 7 Turns 52 Turns

V1 C41
100 V 220 µF

C24
1 nF 3.9 M

C22
150 pF

P10 2 k
6, 10, 12 1 D42 MUR120 56 k 2 8 T1 SPP (1.4 ) N6055 D10 BA1 59 D11 N.C.

R 23

V2 C42
16 V 470 µF

R 22 1 M C22
680 pF 13 7 9

R 30

C30
1.5 nF

9 Turns

C9
220 pF

R 35
15

D43 MUR120 5 Turns

V3 C43
8.5 V 470 µF

77 Turns

D1-D4 4 x 1N4007

C7

150 µF/385 V

180-270 V F1 3.15 A

RFI Filter

C10
1 nF

R 10

4.7 M
AES02660

Figure 16

Circuit Diagram for Standard Application

Data Sheet

25

2000-01-14

TDA 16846 TDA 16847

1N4148
C27 100 nF

C26 22 µF

D26

C25
4 10 nF

14

5

R 38
3 11 9.1 k

R 24
18 k

R 29

9.1 k

D41 TR1 MUR4100 (AL = 190 nH) 7 Turns 52 Turns

V1 C41
100 V 220 µF

C24
1 nF 3.9 M IC1 TDA 16847 10, 12 1

C22
150 pF

P10 2 k
D42 MUR120 56 k

R 23

V2 C42
16 V 470 µF

R 22 1 M C22
680 pF 2 8 6 13

R 30 R 32

C30
1.5 nF 9 Turns

7 9 T1

51 k

C9
220 pF

R 33
1 M

R 35
15

D43 MUR120 5 Turns

V3 C43
8.5 V 470 µF

C32
100 pF

C31

SPP (1.4 ) N6055

4.7 µF

D10 77 Turns BA 159 D11

D1-D4 4 x 1N4007

C7

150 µF/385 V

180-270 V F1 3.15 A

RFI Filter

C10
1 nF

R 10

4.7 M
AES02738

Figure 17

Circuit Diagram for Application with Temporary High Power Circuit

Data Sheet

26

2000-01-14

TDA 16846 TDA 16847

Package Outlines P-DIP-14-3 (Plastic Dual In-line Package)

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Dimensions in mm Data Sheet 27 2000-01-14

GPD05584

TDA 16846 TDA 16847

P-DSO-14-3 (Plastic Dual In-line Package)

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Dimensions in mm Data Sheet 28 2000-01-14