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Datasheet, V2.0, 11 Jun 2004

CoolSETTM-F2
ICE2A0565/165/265/365 ICE2B0565/165/265/365 ICE2A0565G ICE2A0565Z ICE2A180Z/280Z ICE2A765I/2B765I ICE2A765P2/2B765P2 Off-Line SMPS Current Mode Controller with integrated 650V/ 800V CoolMOSTM

Power Management & Supply

N e v e r

s t o p

t h i n k i n g .

CoolSETTM-F2 Revision History: Previous Version: Page Subjects (major changes since last revision) 2004-06-11 Datasheet

For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com. CoolMOSTM, CoolSETTM are trademarks of Infineon Technologies AG.

Edition 2004-06-11 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München

© Infineon Technologies AG 1999. All Rights Reserved.
Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

CoolSETTM-F2
Off-Line SMPS Current Mode Controller with integrated 650V/800V CoolMOSTM
Product Highlights
P-DIP-7-1

P-DIP-7-1

· Best in class in DIP8, DIP7, TO220 and DSO16/12 packages · No heat-sink required for DIP8, DIP7 and DSO16/12 · Increased creepage distance for TO220, DIP7 and DSO16/12 · Isolated drain for TO220 packages · Lowest standby power dissipation · Enhanced protection functions with Auto Restart Mode

P-DIP-8-6
P-DIP-8-4, -6

P-TO220-6-46 P-TO220-6-46

P-TO220-6-47 P-TO220-6-47

P-DSO-16/12

Features
· · · · · · · · · · · · · 650V/800V avalanche rugged CoolMOSTM Only few external components required Input Vcc Undervoltage Lockout 67kHz/100kHz switching frequency Max duty cycle 72% Low Power Standby Mode to meet European Commission Requirements Thermal Shut Down with Auto Restart Overload and Open Loop Protection Overvoltage Protection during Auto Restart Adjustable Peak Current Limitation via external resistor Overall tolerance of Current Limiting < ±5% Internal Leading Edge Blanking User defined Soft Start Soft Switching for low EMI

Description
The second generation CoolSETTM-F2 provides several special enhancements to satisfy the needs for low power standby and protection features. In standby mode frequency reduction is used to lower the power consumption and support a stable output voltage in this mode. The frequency reduction is limited to 20kHz/21.5 kHz to avoid audible noise. In case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in Auto Restart Mode which is controlled by the internal protection unit. By means of the internal precise peak current limitation, the dimension of the transformer and the secondary diode can be sized lower which leads to more cost effective for the overall system.

Typical Application
+

85 ... 270 VAC

RStart-up CVCC

Snubber

Converter DC Output
-

VCC
Low Power StandBy

Drain
Feedback

Power Management

CoolMOSTM

SoftS
Soft-Start Control

PWM Controller Current Mode
Precise Low Tolerance Peak Current Limitation

CSoft Start

Isense RSense

FB
Protection Unit
PWM-Controller

GND

Feedback

CoolSETTM-F2

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CoolSETTM-F2

Ordering Codes
Type
ICE2A0565 ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2A0565Z ICE2A180Z ICE2A280Z
1) 2)

Ordering Code
Q67040-S4542 Q67040-S4426 Q67040-S4414 Q67040-S4415 Q67040-S4540 Q67040-S4489 Q67040-S4478 Q67040-S4490 Q67040-S4541 Q67040-S4546 Q67040-S4547

Package
P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-7-1 P-DIP-7-1 P-DIP-7-1

VDS
650V 650V 650V 650V 650V 650V 650V 650V 650V 800V 800V

FOSC
100kHz 100kHz 100kHz 100kHz 67kHz 67kHz 67kHz 67kHz 100kHz 100kHz 100KHz

RDSon1) 230VAC ±15%2)
4.7 3.0 0.9 0.45 4.7 3.0 0.9 0.45 4.7 3.0 0.8 23W 31W 52W 67W 23W 31W 52W 67W 23W 29W 50W

85-265 VAC2)
13W 18W 32W 45W 13W 18W 32W 45W 13W 17W 31W

typ @ T=25°C Maximum power rating at Ta=75°C, Tj=125°C and with copper area on PCB = 6cm²

Type
ICE2A0565G
1) 2)

Ordering Code
Q67040-S4656

Package
P-DSO-16/12

VDS
650V

FOSC
100kHz

RDSon1) 230VAC ±15%2)
4.7 23W

85-265 VAC2)
13W

typ @ T=25°C Maximum power rating at Ta=75°C, Tj=125°C and with copper area on PCB = 6cm²

Type
ICE2A765I ICE2B765I ICE2A765P2 ICE2B765P2
1) 2)

Ordering Code
Q67040-S4609 Q67040-S4607 Q67040-S4610 Q67040-S4608

Package
P-TO-220-6-46 P-TO-220-6-46 P-TO-220-6-47 P-TO-220-6-47

VDS
650V 650V 650V 650V

FOSC
100kHz 67kHz 100kHz 67kHz

RDSon1) 230VAC ±15%2)
0.45 0.45 0.45 0.45 240W 240W 240W 240W

85-265 VAC2)
130W 130W 130W 130W

typ @ T=25°C Maximum practical continuous power in an open frame design at Ta=75°C, Tj=125°C and RthCA=2.7K/W

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Table of Contents
1 1.1 1.2 1.3 1.4 1.5 2 3 3.1 3.2 3.2.1 3.2.2 3.3 3.4 3.4.1 3.4.2 3.5 3.5.1 3.5.2 3.6 3.7 3.8 3.8.1 3.8.2 3.8.3 4 4.1 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 5 6 7

Page

Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Configuration with P-DIP-8-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Configuration with P-DIP-7-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Configuration with P-TO220-6-46/47 . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Pin Configuration with P-DSO-16/12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Overload / Open Loop with Normal Load . . . . . . . . . . . . . . . . . . . . . . . .15 Overvoltage due to Open Loop with No Load . . . . . . . . . . . . . . . . . . . . .16 Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Thermal Impedance (ICE2X765I and ICE2X765P2) . . . . . . . . . . . . . . . . . .19 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 CoolMOSTM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Layout Recommendation for C18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
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Pin Configuration and Functionality

1
1.1

Pin Configuration and Functionality
Pin Configuration with P-DIP-8-6 1.2 Pin Configuration with P-DIP-7-1

Pin 1 2 3 4 5 6 7 8
1) 2)

Symbol SoftS FB Isense Drain Drain N.C VCC GND

Function Soft-Start Feedback Controller Current Sense Input, CoolMOSTM Source Output 650V1)/800V2) CoolMOSTM Drain 650V1)/800V2) CoolMOSTM Drain Not connected Controller Supply Voltage Controller Ground

Pin 1 2 3 4 5 7 8
1) 2)

Symbol SoftS FB Isense N.C. Drain VCC GND

Function Soft-Start Feedback Controller Current Sense Input, CoolMOSTM Source Output Not connected 650V1)/800V2) CoolMOSTM Drain Controller Supply Voltage Controller Ground

at Tj = 110°C at Tj = 25°C

at Tj = 110°C at Tj = 25°C

Package P-DIP-8-6

Package P-DIP-7-1

SoftS

1 2 3 4

8 7 6 5

GND

SoftS

1 2 3 4

8 7

GND

FB

VCC

FB

VCC

Isense

N.C

Isense

Drain

Drain

n.c.

5

Drain

Figure 1

Pin Configuration P-DIP-8-6 (top view)

Figure 2

Pin Configuration P-DIP-7-1 (top view)

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CoolSETTM-F2

Pin Configuration and Functionality
1.3 Pin Configuration with P-TO220-6-46/47 1.4 Pin Configuration with P-DSO-16/12

Pin 1 3 4 5 6 7
1)

Symbol Drain Isense GND VCC SoftS FB

Function 650V1) CoolMOSTM Drain Controller Current Sense Input, CoolMOSTM Source Output Controller Ground Controller Supply Voltage Soft-Start Feedback

Pin 1 2 3 4 5 6 7 8 9 10 11 12

Symbol N.C. SoftS FB Isense Drain Drain Drain Drain N.C. N.C. VCC GND

Function Not Connected Soft-Start Feedback Controller Current Sense Input, CoolMOSTM Source Output 650V1) CoolMOSTM Drain 650V1) CoolMOSTM Drain 650V1) CoolMOSTM Drain 650V1) CoolMOSTM Drain Not Connected Not Connected Controller Supply Voltage Controller Ground

at Tj = 110°C

Package P-TO220-6-46/47

1)

at Tj = 110°C

Package P-DSO-16/12
N .C
1

12

GND

S oftS

2

11

VCC

FB

3

10

N .C .

1

2

3

4

5

6

7

Isense

4

9

N .C .

D rain

5

8

D rain

Isense

SoftS

Drain

GND

VCC

Figure 3

Pin Configuration P-TO220-6-46/47 (top view)

FB

D rain

6

7

D rain

Figure 4

Pin Configuration P-DSO-16/12 (top view)

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CoolSETTM-F2

Pin Configuration and Functionality
1.5 Pin Functionality

SoftS (Soft Start & Auto Restart Control) This pin combines the function of Soft Start in case of Start Up and Auto Restart Mode and the controlling of the Auto Restart Mode in case of an error detection. FB (Feedback) The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. Isense (Current Sense) The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOSTM. When Isense reaches the internal threshold of the Current Limit Comparator, the Driver output is disabled. By this means the Over Current Detection is realized. Furthermore the current information is provided for the PWM-Comparator to realize the Current Mode. Drain (Drain of integrated CoolMOSTM) Pin Drain is the connection to the Drain of the internal CoolMOSTM. VCC (Power supply) This pin is the positive supply of the IC. The operating range is between 8.5V and 21V. To provide overvoltage protection the driver gets disabled when the voltage becomes higher than 16.5V during Start Up Phase. GND (Ground) This pin is the ground of the primary side of the SMPS.

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2

Figure 5
CLine Snubber + Converter DC Output VOUT CVCC

Version 2.0
Drain
Power Management Undervoltage Lockout Internal Bias
13.5V 8.5V Duty Cycle Max 0.72

85 ... 270 VAC

RStart-up

VCC

C1 Power-Down Reset Oscillator
Duty Cycle max Clock

Representative Blockdiagram
Voltage Reference Power-Up Reset Soft Start PWM-Latch
S Q

16.5V

6.5V

4.0V

C2 fstandby-fnorm

G1

6.5V 5.3V 4.8V 4.0V

RSoft-Start Soft-Start Comparator

SoftS

CoolMOSTM

5.6V G3 G4
R Q S Q R Q

CSoft-Start Spike Blanking 5 s Gate Driver PWM Comparator 0.3V C5 fosc Vcsth UFB x3.65 PWM OP Improved Current Mode Current Limiting Propagation-Delay Compensation
0.8V

C4

Representative Blockdiagram

9
Error-Latch Current-Limit Comparator Leading Edge Blanking 220ns 10k D1 fnorm fstandby Standby Unit

5.3V

T1

6.5V

G2

4.8V

RFB

C3

FB

RSense

Thermal Shutdown

Tj >140°C

Isense

Protection Unit

Optocoupler

CoolSETTM-F2

GND

ICE2Axxxx

ICE2Bxxxx 100kHz 21.5kHz 67kHz 20kHz

fnorm fstandby

Representative Blockdiagram

CoolSETTM-F2

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CoolSETTM-F2

Functional Description

3
3.1

Functional Description
Power Management
M ain Line (10 0V -3 80 V )

3.2

Improved Current Mode

S o ft-S ta rt C o m p a ra to r P W M -L a tch
R
P rim ary W ind in g

R S tart-U p

FB

Q

D rive r P W M C o m p a ra to r
S Q 0 .8 V

C VC C
VCC
Po w er M anagem ent U nd ervo ltag e L ock out 1 3.5V 8 .5V P o w er-D ow n R e set V olta ge R e fe renc e P o w e r-U p R ese t 6.5 V 5.3 V 4.8 V 4.0 V Intern al B ia s

PW M OP x3 .6 5 Im proved Current M ode
Figure 7 Current Mode

Ise n se

R

Q P W M -La tc h

6.5V S Q

R S oft-S tart
S o ftS

Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal.

E rro r-Latch S oft-S tart C o m pa ra tor

Amplified Current Signal
C S oft-Start
T1 E rror-D e te ctio n

FB
Figure 6 Power Management

The Undervoltage Lockout monitors the external supply voltage VVCC. In case the IC is inactive the current consumption is max. 55µA. When the SMPS is plugged to the main line the current through RStart-up charges the external Capacitor CVCC. When VVCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After that the internal bandgap generates a reference voltage VREF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by resetting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero.

0.8V Driver

t

T on
t
Figure 8 Pulse Width Modulation

In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by resetting the PWM-Latch (see Figure 8). The primary current is sensed by the external series resistor RSense inserted in the source of the integrated CoolMOSTM. By means of Current Mode regulation, the

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Functional Description
secondary output voltage is insensitive on line variations. Line variation changes the current waveform slope which controls the duty cycle. The external RSense allows an individual adjustment of the maximum source current of the integrated CoolMOSTM.

VOSC
max. Duty Cycle

S o ft-S ta rt C o m p a ra to r

P W M C o m p a ra to r
FB P W M -L a tch

Voltage Ramp
0.8V FB 0.3V

t

O scilla to r
V OSC

0 .3 V C5 G a te D rive r

Gate Driver

t

0.8V 1 0 k x3 .6 5
T2 C1 V oltage R am p
Figure 9 Improved Current Mode

R1

V1

20pF

PW M OP
t
Figure 10 Light Load Conditions

3.2.1

PWM-OP

To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1(see Figure 9, Figure 10). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start. In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the Comparator C5, the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continuously till 0% by decreasing VFB below that threshold.

The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin Isense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.

3.2.2

PWM-Comparator

The PWM-Comparator compares the sensed current signal of the integrated CoolMOSTM with the feedback signal VFB (see Figure 11). VFB is created by an external optocoupler or external transistor in combination with the internal pull-up resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOSTM exceeds the signal VFB the PWMComparator switches off the Gate Driver.

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CoolSETTM-F2

Functional Description
pull-up resistor RSoft-Start. The Soft-Start-Comparator compares the voltage at pin SoftS at the negative input with the ramp signal of the PWM-OP at the positive input. When Soft-Start voltage VSoftS is less than Feedback voltage VFB the Soft-Start-Comparator limits the pulse width by resetting the PWM-Latch (see Figure 12). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. By means of the above mentioned CSoft-Start the SoftStart can be defined by the user. The Soft-Start is finished when VSoftS exceeds 5.3V. At that time the Protection Unit is activated by Comparator C4 and senses the FB by Comparator C3 wether the voltage is below 4.8V which means that the voltage on the secondary side of the SMPS is settled. The internal Zener Diode at SoftS has a clamp voltage of 5.6V to prevent the internal circuit from saturation (see Figure 13).
6 .5 V 5 .6 V

6 .5 V R FB FB S o ft-S ta rt C o m p a ra to r P W M -L a tch

P W M C o m p a ra to r
0 .8 V

O p to co u p le r

PW M OP Ise n se x3 .6 5 Im proved Current M ode

P o w e r-U p R e s e t E rro r-L a tc h
R Q

R S o ft-S ta rt S o ftS 6 .5 V 5 .3 V 4 .8 V R FB FB C4 G2

Figure 11

PWM Controlling

S

Q

3.3

Soft-Start

C3 C lo c k

R

Q

G a te D riv e r
S Q

V S o ftS
5 .6 V 5 .3 V

P W M -L a tch

Figure 13

Activation of Protection Unit

T S o ft-S ta rt
G a te D rive r

The Start-Up time TStart-Up within the converter output voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 14).

t

T Soft ­ Start C Soft ­ Start = ------------------------------------R Soft ­ Start × 1.69
By means of Soft-Start there is an effective minimization of current and voltage stresses on the integrated CoolMOSTM, the clamp circuit and the output overshoot and prevents saturation of the transformer during Start-Up.

t
Figure 12 Soft-Start Phase

The Soft-Start is realized by the internal pull-up resistor RSoft-Start and the external Capacitor CSoft-Start (see Figure 5). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal

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CoolSETTM-F2

Functional Description
V S oftS
5 .3 V
kHz
100

T S o ft-S ta rt V FB 4 .8 V

fOSC

65

21.5

t

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2.0

V

IC E2Axxxx fnorm fstandby
100kHz 21.5kH z

ICE2Bxxxx
67kH z 20kH z

VFB

Figure 15

Frequency Dependence

VOUT
V OUT
T S ta rt-U p

t

3.5

Current Limiting

t
Figure 14 Start Up Phase

3.4

Oscillator and Frequency Reduction Oscillator

There is a cycle by cycle current limiting realized by the Current-Limit Comparator to provide an overcurrent detection. The source current of the integrated CoolMOSTM is sensed via an external sense resistor RSense. By means of RSense the source current is transformed to a sense voltage VSense. When the voltage VSense exceeds the internal threshold voltage Vcsth the Current-Limit-Comparator immediately turns off the gate drive. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immediate shut down of the CoolMOSTM in case of overcurrent.

3.4.1

The oscillator generates a frequency fswitch = 67kHz/ 100kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of Dmax=0.72.

3.5.1

Leading Edge Blanking

V S en s e
V cs th tLE B = 2 2 0 n s

3.4.2

Frequency Reduction

The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 15. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 20kHz/21.5 kHz to avoid audible noise in any case.

t
Figure 16 Leading Edge Blanking
Each time when CoolMOSTM is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of tLEB = 220ns. During that time the output of

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Functional Description
the Current-Limit Comparator cannot switch off the gate drive. The propagation delay compensation is done by means of a dynamic threshold voltage Vcsth (see Figure 18). In case of a steeper slope the switch off of the driver is earlier to compensate the delay. E.g. Ipeak = 0.5A with RSense = 2. Without propagation delay compensation the current sense threshold is set to a static voltage level Vcsth=1V. A current ramp of dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a propagation delay time of i.e. tPropagation Delay =180ns leads then to a Ipeak overshoot of 12%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 19).

3.5.2

Propagation Delay Compensation

In case of overcurrent detection by ILimit the shut down of CoolMOSTM is delayed due to the propagation delay of the circuit. This delay causes an overshoot of the peak current Ipeak which depends on the ratio of dI/dt of the peak current (see Figure 17). .

Signal1 ISense Ipeak2 Ipeak1 ILimit IOvershoot2

Signal2 tPropagation Delay

with compensation

without compensation

V
1.3 1.25

VSense

IOvershoot1

1.2 1.15 1.1

1.05 1

t
Figure 17 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compensation is integrated to bound the overshoot dependent on dI/dt of the rising primary current. That means the propagation delay time between exceeding the current sense threshold Vcsth and the switch off of CoolMOSTM is compensated over temperature within a range of at least.

0.95 0.9 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

V/us

dVSense dt

Figure 19

Overcurrent Shutdown

3.6

PWM-Latch

dI peak dV Sense 0 R Sense× ----------- --------------dt dt
VOSC
max. Duty Cycle

The oscillator clock output applies a set pulse to the PWM-Latch when initiating CoolMOSTM conduction. After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of resetting the driver is shut down immediately.

3.7
off time

Driver

VSense Vcsth

t
Propagation Delay

t Signal1
Figure 18

Signal2

Dynamic Voltage Threshold Vcsth

The driver-stage drives the gate of the CoolMOSTM and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the CoolMOSTM threshold. This is achieved by a slope control of the rising edge at the driver's output (see Figure 20) to the CoolMOSTM gate. Thus the leading switch on spike is minimized. When CoolMOSTM is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. At voltages below the undervoltage lockout threshold VVCCoff the gate drive is active low.

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CoolSETTM-F2

Functional Description
Overload / Open Loop with Normal Load
FB
4.8V
Failure Detection

V G ate

ca. t = 130ns

5µs Blanking

5V
SoftS

t

t
Figure 20 Internal Gate Rising Slope

5.3V
Soft-Start Phase

3.8

Protection Unit (Auto Restart Mode)
Driver
TBurst1 t

An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5µs and the CoolMOSTM is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode.

TRestart

3.8.1

Overload / Open Loop with Normal Load

t

VCC 13.5V
8.5V

Figure 21 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure 22). The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage VFB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inactivates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VVCC increases till VCCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor RStart-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pull-up resistor RSoft-Start. During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload.

t

Figure 21

Auto Restart Mode

6 .5 V
P o w e r U p R e se t S o ftS

R S o ft-S tart

C S oft-S ta rt 5 .3 V
T1

C4
G2

E rro r-L a tc h

4 .8 V C3
FB
R FB

6 .5 V

Figure 22

FB-Detection

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Functional Description
But the Soft-Start Phase must be finished within the Start Up Phase to force the voltage at pin FB below the failure detection threshold of 4.8V. normal operation mode is prevented from overvoltage detection due to varying of VCC concerning the regulation of the converter output. When the voltage VSoftS is above 4.0V the overvoltage detection by C1 is deactivated.

3.8.2

Overvoltage due to Open Loop with No Load

VCC

O pen loop & no load condition
FB 4 .8 V F a ilu re D e te ctio n 5 µ s B la n k in g

6 .5 V

C1 1 6 .5 V

E rro r L a tc h G1

R S oft-S ta rt

4 .0 V S o ftS
t

C2

S o ftS 5 .3 V
4 .0 V

S o ft-S ta rt P h a s e

C S oft-S ta rt

T1
O v e rv o lta g e D e te c tio n P h a s e

P o w e r U p R e se t

D rive r

T B u rs t2 T R es tart

t

Figure 24

Overvoltage Detection

3.8.3

Thermal Shut Down

Thermal Shut Down is latched by the Error-Latch when junction temperature Tj of the pwm controller is exceeding an internal threshold of 140°C. In that case the IC switches in Auto Restart Mode.
O v e rv o lta g e D e te ctio n

t

VCC 1 6 .5 V 1 3 .5 V 8 .5 V

t

Figure 23

Auto Restart Mode

Figure 23 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 24).The overvoltage detection is provided by Comparator C1 only in the first time during the Soft-Start Phase till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case TBurst2 is shorter than TSoft-Start. By means of C2 the

Note:

All the values which are mentioned in the functional description are typical. Please refer to Electrical Characteristics for min/max limit values.

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CoolSETTM-F2

Electrical Characteristics

4
4.1
Note:

Electrical Characteristics
Absolute Maximum Ratings
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit.

Parameter

Symbol

Limit Values min. max. 650

Unit

Remarks

Drain Source Voltage ICE2A0565/165/265/365/765I/765P2 ICE2B0565/165/265/365/765I/765P2 ICE2A0565G ICE2A0565Z Drain Source Voltage ICE2A180Z/280Z Avalanche energy, repetitive tAR limited by max. Tj=150°C1) ICE2A0565 ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365

VDS

-

V

Tj = 110°C

VDS EAR1 EAR2 EAR3 EAR4 EAR5 EAR6 EAR7 EAR8

-

800 0.01 0.07 0.40 0.50 0.01 0.07 0.40 0.50 0.01 0.01 0.07 0.40 0.50 0.50 0.50 0.50

V mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ mJ

Tj = 25°C

ICE2A0565G EAR9 ICE2A0565Z EAR10 ICE2A180Z ICE2A280Z ICE2A765I ICE2B765I

EAR11 EAR12 EAR13 EAR14

ICE2A765P2 EAR15 ICE2B765P2 EAR16
1)

Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR* f

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CoolSETTM-F2

Electrical Characteristics

Parameter

Symbol

Limit Values min. max. 0.5 1 2 3 0.5 1 2 3 0.5 0.5 1 2 7 7 7 7 22 6.5 6.5 3 150 150 90 96 110 22)

Unit

Remarks

Avalanche current, ICE2A0565 repetitive tAR limited by ICE2A165 max. Tj=150°C ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365

IAR1 IAR2 IAR3 IAR4 IAR5 IAR6 IAR7 IAR8

-0.3 -0.3 -0.3 -0.3 -40 -50 -

A A A A A A A A A A A A A A A A V V V V °C °C K/W K/W K/W kV P-DIP-8-6 P-DIP-7-1 P-DSO-16/12 Human Body Model Controller & CoolMOSTM

ICE2A0565G IAR9 ICE2A0565Z IAR10 ICE2A180Z ICE2A280Z ICE2A765I ICE2B765I

IAR11 IAR12 IAR13 IAR14

ICE2A765P2 IAR15 ICE2B765P2 IAR16 VCC Supply Voltage FB Voltage SoftS Voltage ISense Junction Temperature Storage Temperature Thermal Resistance Junction-Ambient

VCC VFB VSoftS ISense Tj TS RthJA1 RthJA2 RthJA3 VESD

ESD Robustness1)
1) 2)

Equivalent to discharging a 100pF capacitor through a 1.5 k series resistor 1kV at pin drain of ICE2x0565, ICE2A0565Z and ICE2A0565G

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CoolSETTM-F2

Electrical Characteristics
4.2 Thermal Impedance (ICE2X765I and ICE2X765P2)

Parameter

Symbol

Limit Values min. max. 74

Unit

Remarks

Thermal Resistance Junction-Ambient

ICE2A765I RthJA4 ICE2B765I ICE2A765P2 ICE2B765P2 ICE2A765I RthJC ICE2B765I ICE2A765P2 ICE2B765P2

-

K/W

Free standing with no heat-sink

Junction-Case

-

2.5

K/W

4.3
Note:

Operating Range
Within the operating range the IC operates as described in the functional description.

Parameter

Symbol

Limit Values min. max. 21 130 150

Unit

Remarks

VCC Supply Voltage Junction Temperature of Controller Junction Temperature of CoolMOSTM

VCC
TJCon TJCoolMOS

VCCoff
-25 -25

V °C °C Limited due to thermal shut down of controller

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Electrical Characteristics
4.4
Note:

Characteristics
The electrical characteristics involve the spread of values given within the specified supply voltage and junction temperature range TJ from ­ 25 ° C to 125 ° C.Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.

4.4.1

Supply Section

Parameter

Symbol min.

Limit Values typ. 27 5.0 5.3 6.5 6.7 8.5 5.2 5.5 6.1 7.1 5.3 5.3 6.5 7.7 8.5 7.1 8.5 7.1 13.5 8.5 5 max. 55 6.6 6.7 7.8 8.0 9.8 6.7 7.0 7.3 8.3 6.7 6.7 7.8 9.0 9.8 8.3 9.8 8.3 14 5.5

Unit

Test Condition

Start Up Current Supply Current with Inactive Gate Supply Current ICE2A0565 with Active Gate ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365

IVCC1 IVCC2 IVCC3 IVCC4 IVCC5 IVCC6 IVCC7 IVCC8 IVCC9 IVCC10 IVCC12 IVCC13 IVCC14 IVCC15 IVCC16 IVCC17 IVCC18

13 4.5

µA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA V V V

VCC=VCCon -0.1V VSoftS = 0 IFB = 0 VSoftS = 5V IFB = 0

ICE2A0565G IVCC11 ICE2A0565Z ICE2A180Z ICE2A280Z Supply Current ICE2A765I with Active Gate ICE2B765I ICE2A765P2 ICE2B765P2 VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis

VSoftS = 5V IFB = 0

VCCon VCCoff VCCHY

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CoolSETTM-F2

Electrical Characteristics
4.4.2 Internal Voltage Reference

Parameter

Symbol min.

Limit Values typ. 6.50 max. 6.63

Unit

Test Condition

Trimmed Reference Voltage

VREF

6.37

V

measured at pin FB

4.4.3

Control Section

Parameter

Symbol min.

Limit Values typ. 100 max. 107

Unit

Test Condition

Oscillator Frequency ICE2A0565/165/265/365/765I/765P2 ICE2A0565G/0565Z/180Z/280Z Oscillator Frequency ICE2B0565/165/265/365/765I/765P2 Reduced Osc. Frequency ICE2A0565/165/265/365/765I/765P2 ICE2A0565G/0565Z/180Z/280Z Reduced Osc. Frequency ICE2B0565/165/265/365/765I/765P2 Frequency Ratio fosc1/fosc2 ICE2A0565/165/265/365/765I/765P2 ICE2A0565G/0565Z/180Z/280Z Frequency Ratio fosc3/fosc4 ICE2B0565/165/265/365/765I/765P2 Max Duty Cycle Min Duty Cycle PWM-OP Gain VFB Operating Range Min Level VFB Operating Range Max level Feedback Resistance Soft-Start Resistance

fOSC1

93

kHz

VFB = 4V

fOSC3 fOSC2

62 -

67 21.5

72 -

kHz kHz

VFB = 4V VFB = 1V

fOSC4

4.5

20 4.65

4.9

kHz

VFB = 1V

3.18

3.35 0.72 3.65 3.7 50

3.53 0.77 3.85 4.6 4.9 62 V V k k

Dmax Dmin AV VFBmin VFBmax RFB RSoft-Start

0.67 0 3.45 0.3 3.0 42

VFB < 0.3V

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Electrical Characteristics
4.4.4 Protection Unit

Parameter

Symbol min.

Limit Values typ. 4.8 5.3 4.0 16.5 140 5 max. 4.95 5.46 4.12 17.2 150 -

Unit

Test Condition

Over Load & Open Loop Detection Limit Activation Limit of Overload & Open Loop Detection Deactivation Limit of Overvoltage Detection Overvoltage Detection Limit Latched Thermal Shutdown Spike Blanking
1)

VFB2 VSoftS1 VSoftS2 VVCC1 TjSD tSpike

4.65 5.15 3.88 16 130 -

V V V V °C µs

VSoftS > 5.5V VFB > 5V VFB > 5V VCC > 17.5V VSoftS < 3.8V VFB > 5V
1)

The parameter is not subject to production test - verified by design/characterization

4.4.5

Current Limiting

Parameter

Symbol min.

Limit Values typ. 1.0 220 max. 1.05 -

Unit

Test Condition

Peak Current Limitation (incl. Propagation Delay Time) Leading Edge Blanking

Vcsth tLEB

0.95 -

V ns

dVsense / dt = 0.6V/µs

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CoolSETTM-F2

Electrical Characteristics
4.4.6 CoolMOSTM Section

Parameter

Symbol min.

Limit Values typ. max. -

Unit

Test Condition

Drain Source Breakdown Voltage ICE2A0565/165/265/365/765I/765P2 ICE2B0565/165/265/365/765I/765P2 ICE2A0565G/0565Z Drain Source Breakdown Voltage ICE2A180Z/280Z Drain Source On-Resistance ICE2A0565 ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2A0565G ICE2A0565Z ICE2A180Z ICE2A280Z ICE2A765I ICE2B765I ICE2A765P2 ICE2B765P2

V(BR)DSS

600 650

V V

Tj=25°C Tj=110°C

V(BR)DSS RDSon1 RDSon2 RDSon3 RDSon4 RDSon5 RDSon6 RDSon7 RDSon8 RDSon9 RDSon10 RDSon11 RDSon12 RDSon13 RDSon14 RDSon15 RDSon16

800 870 -

4.7 10.0 3 6.6 0.9 1.9 0.45 0.95 4.7 10.0 3 6.6 0.9 1.9 0.45 0.95 4.7 10.0 4.7 10.0 3 6.6 0.8 1.7 0.45 0.95 0.45 0.95 0.45 0.95 0.45 0.95

5.5 12.5 3.3 7.3 1.08 2.28 0.54 1.14 5.5 12.5 3.3 7.3 1.08 2.28 0.54 1.14 5.5 12.5 5.5 12.5 3.3 7.3 1.06 2.04 0.54 1.14 0.54 1.14 0.54 1.14 0.54 1.14

V V

Tj=25°C Tj=110°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C Tj=25°C Tj=125°C

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CoolSETTM-F2

Electrical Characteristics

Parameter

Symbol min.

Limit Values typ. 4.751 7 21 30 4.751 7 21 30 4.751 4.751 7 22 30 30 30 30 0.5 30
1)

Unit

Test Condition

max. pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF µA ns ns

Effective output capacitance, energy related

ICE2A0565 ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2A0565G ICE2A0565Z ICE2A180Z ICE2A280Z ICE2A765I ICE2B765I ICE2A765P2 ICE2B765P2

Co(er)1 Co(er)2 Co(er)3 Co(er)4 Co(er)5 Co(er)6 Co(er)7 Co(er)8 Co(er)9 Co(er)10 Co(er)11 Co(er)12 Co(er)13 Co(er)14 Co(er)15 Co(er)16 IDSS trise tfall

-

VDS =0V to 480V

Zero Gate Voltage Drain Current Rise Time Fall Time
1)

VVCC=0V

301)

Measured in a Typical Flyback Converter Application

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Typical Performance Characteristics

5
40 38

Typical Performance Characteristics
7,1 6,9
ICE2B365

Start Up Current IVCC1 [µA]

36 34
PI-001-190101

Supply Current IVCCi [mA]

6,7 6,5 6,3 6,1 5,9 5,7 5,5 5,3 5,1 4,9 4,7 4,5 -25 -15
ICE2B0565 ICE2B165
PI-002-190101

ICE2B265

32 30 28 26 24 22 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 25
5,9 5,7

Start Up Current IVCC1 vs. Tj

Figure 28
8,5 8,3 8,1

Supply Current IVCCI vs. Tj

Supply Current IVCC2 [mA]

Supply Current IVCCi [mA]

7,9 7,7 7,5 7,3 6,9 6,7 6,5 6,3 6,1 5,9 5,7 5,5 -25 -15
ICE2A180Z
PI-002-190101

5,5 5,3 5,1 4,9 4,7 4,5 -25 -15

ICE2A280Z

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

PI-003-190101

7,1

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 26

Static Supply Current IVCC2 vs. Tj

Figure 29
9,0

Supply Current IVCCI vs. Tj

8,8 8,4
ICE2A365

8,8 8,6

Supply Current IVCCi [mA]

Supply Current IVCCi [mA]

8,0 7,6 7,2
PI-002-190101

8,4 8,2 8,0 7,6 7,4 7,2 7,0 6,8 6,6 6,4 6,2 -25 -15
ICE2B765P2
PI-002-190101

ICE2A765P2

6,8 6,4 6,0 5,6 5,2 4,8 4,4 4,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2A0565 /G/Z ICE2A265 ICE2A165

7,8

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 27

Supply Current IVCCI vs. Tj

Figure 30

Supply Current IVCCI vs. Tj

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Typical Performance Characteristics
13,58 6,510

Trimmed Reference Voltage V REF [V]

VCC Turn-On Threshold VCCon [V]

13,56 13,54 13,52
PI-004-190101

6,505 6,500 6,495 6,490 6,485 6,480 6,475 6,470 -25 -15
PI-007-190101

13,50 13,48 13,46 13,44 13,42 -25 -15

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 31
8,67

VCC Turn-On Threshold VCCon vs. Tj

Figure 34
102,0

Trimmed Reference VREF vs. Tj

VCC Turn-Off Threshold VVCCoff [V]

Oscillator Frequency fOSC1 [kHz]

8,64 8,61 8,58
PI-005-190101

101,5 101,0 100,5 100,0 99,5 99,0 98,5 98,0 97,5 97,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2A0565 /G/Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2

8,52 8,49 8,46 8,43 8,40 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 32
VCC Turn-On/Off Hysteresis V CCHY [V]
5,10 5,07 5,04 5,01

VCC Turn-Off Threshold VVCCoff vs. Tj

Figure 35
70,0

Oscillator Frequency fOSC1 vs. Tj

Oscillator Frequency f OSC3 [kHz]

69,5 69,0 68,5 68,0 67,5 67,0 66,5 66,0 65,5 65,0 64,5 64,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2B765P2
PI-008a-190101

4,95 4,92 4,89 4,86 4,83 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

PI-006-190101

4,98

Junction Temperature [°C]

Figure 33

VCC Turn-On/Off Hysteresis VVCCHY vs. Tj

Figure 36

Oscillator Frequency fOSC3 vs. Tj

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PI-008-190101

8,55

CoolSETTM-F2

Typical Performance Characteristics
22,0

3,45 3,43

Reduced Osc. Frequency f OSC2 [kHz]

21,8

Frequency Ratio fOSC3/fOSC4

21,6 21,4 21,2 21,0 20,8 20,6 20,4 20,2 20,0 -25 -15 -5 5 15 25 35 45

3,35 3,33 3,31 3,29 3,27 3,25 -25 -15 -5 5 15 25 35 45

55

65

75

85

95 105 115 125

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 37
21,0

Reduced Osc. Frequency fOSC2 vs. Tj

Figure 40
0,730 0,728

Frequency Ratio fOSC3 / fOSC4 vs. Tj

Reduced Osc. Frequency fOSC4 [kHz]

20,8 20,6 20,4 20,2 20,0 19,8 19,6 19,4 19,2 19,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2B765P2
PI-009a-190101

0,726

Max. Duty Cycle

0,724 0,722 0,720 0,718 0,716 0,714 0,712 0,710 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-011-190101

Junction Temperature [°C]

Junction Temperature [°C]

Figure 38
4,75 4,73

Reduced Osc. Frequency fOSC4 vs. Tj

Figure 41
3,70 3,69 3,68

Max. Duty Cycle vs. Tj

Frequency Ratio fOSC1/fOSC2

4,71

4,67 4,65 4,63 4,61 4,59 4,57 4,55 -25 -15 -5 5 15 25 35 45

PWM-OP Gain AV

4,69

PI-010-190101

3,65 3,64 3,63 3,62 3,61

55

65

75

85

95 105 115 125

3,60 -25 -15

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 39

Frequency Ratio fOSC1 / fOSC2 vs. Tj

Figure 42

PWM-OP Gain AV vs. Tj

Version 2.0

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PI-012-190101

ICE2A0565/G/Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2

3,67 3,66

PI-010a-190101

PI-009-190101

ICE2A0565 /G/Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2

3,41 3,39 3,37
ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2B765P2

CoolSETTM-F2

Typical Performance Characteristics
4,00 5,320 5,315

Feedback Resistance R FB [kOhm]

3,95 3,90 3,85 3,80
PI-013-190101

Detection Limit VSoft-Start1 [V]

5,310 5,305 5,300 5,295 5,290 5,285 5,280 5,275 5,270 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-016-190101

3,75 3,70 3,65 3,60 3,55 3,50 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 43
Soft-Start Resistance RSoft-Start [kOhm]
58 56

Feedback Resistance RFB vs. Tj

Figure 46
4,05 4,04

Detection Limit VSoft-Start1 vs. Tj

Detection Limit VSoft-Start2 [V]

54 52
PI-014-190101

4,03 4,02 4,01 4,00 3,99 3,98 3,97 3,96 3,95 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
PI-017-190101

50 48 46 44 42 40 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 44
4,810

Soft-Start Resistance RSoft-Start vs. Tj

Figure 47
16,80 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 -25 -15

Detection Limit VSoft-Start2 vs. Tj

4,805

4,800
PI-015-190101

Overvoltage Detection Limit VVCC1 [V]

Detection Limit VFB2 [V]

4,795

4,790

4,785

4,780 -25 -15

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 45

Detection Limit VFB2 vs. Tj

Figure 48

Overvoltage Detection Limit VVCC1 vs. Tj

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PI-018-190101

CoolSETTM-F2

Typical Performance Characteristics
1,010 2,2 2,0

Peak Current Limitation Vcsth [V]

1,008 1,006 1,004 1,002
PI-019-190101

On-Resistance Rdson [Ohm]

1,8 1,6
PI-022-190101

1,4 1,2 1,0 0,8 0,6 0,4 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2A265 ICE2B265 ICE2A280Z

1,000 0,998 0,996 0,994 0,992 0,990 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 49
280

Peak Current Limitation Vcsth vs. Tj

Figure 52

Drain Source On-Resistance RDSon vs. Tj

Leading Edge Blanking tLEB [ns]

270 260 250 240
PI-020-190101

9,5

On-Resistance Rdson [Ohm]

8,5 7,5 6,5 5,5 4,5 3,5 2,5 1,5 -25 -15
ICE2A165 ICE2B165 ICE2A180Z ICE2A0565 /G/Z ICE2B0565
PI-022-190101

230 220 210 200 190 180 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

-5

5

15

25

35

45

55

65

75

85

95

105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 50
1,0 0,9

Leading Edge Blanking VVCC1 vs. Tj

Figure 53
1,0 0,9

Drain Source On-Resistance RDSon vs. Tj

On-Resistance Rdson [Ohm]

0,8 0,7
PI-022-190101

On-Resistance Rdson [Ohm]

0,8 0,7 0,6 0,5 0,4 0,3 0,2 -25 -15
ICE2A765P2 ICE2B765P2
PI-022-190101

0,6 0,5 0,4 0,3 0,2 -25 -15
ICE2A365 ICE2B365

-5

5

15

25

35

45

55

65

75

85

95

105 115 125

-5

5

15

25

35

45

55

65

75

85

95

105 115 125

Junction Temperature [°C]

Junction Temperature [°C]

Figure 51

Drain Source On-Resistance RDSon vs. Tj

Figure 54

Drain Source On-Resistance RDSon vs. Tj

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CoolSETTM-F2

Typical Performance Characteristics
720

Breakdown Voltage V(BR)DSS [V]

700 680 660 640 620 600 580 560 -25 -15
ICE2A0565 /G/Z ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2A765P2 ICE2B765P2
PI-025-190101

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Figure 55

Breakdown Voltage VBR(DSS) vs. Tj

940

Breakdown Voltage V(BR)DSS [V]

920 900 880 860 840 820 800 780 -25 -15
PI-025-190101

ICE2A180Z ICE2A280Z

-5

5

15

25

35

45

55

65

75

85

95 105 115 125

Junction Temperature [°C]

Figure 56

Breakdown Voltage VBR(DSS) vs. Tj

Version 2.0

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CoolSETTM-F2

Layout Recommendation for C18

6
Note:

Layout Recommendation for C18
Only for ICE2A765I/P2 and ICE2B765I/P2

Soft Start Capacitor Layout Recommendation in Detail

Detail X

Figure 57B Detail X, Soft Start Capacitor C18 Layout Recommendation

Place Soft Start capacitor C18 in the same way as shown in Detail X (blue mark).

Figure 57A

Layout of Board EVALSF2_ICE2B765P2

To improve the startup behavior of the IC during startup or auto restart mode, place the soft start capacitor C18 (red section Detail X in Figure 57A) as close as possible to the soft start PIN 6 and GND PIN 4. More details see Detail X in Figure 57B.

Figure 57

Layout Recommendation for ICE2A765I/P2 and ICE2B765I/P2

Version 2.0

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CoolSETTM-F2

Outline Dimension

7

Outline Dimension

P-DIP-8-6 (Plastic Dual In-line Package)

Figure 58

P-DIP-8-6 (Plastic Dual In-line Package)

4.37 MAX.

0.38 MIN.

P-DIP-7-1 (Plastic Dual In-line Package)

1.7 MAX.

7.87 ±0.38

3.25 MIN.

2.54 0.46 ±0.1
7

0.25 +0.1

0.35 7x
5

6.35 ±0.25 1)
8.9 ±1

4 1 9.52 ±0.25 1)

Index Marking
1)

Does not include plastic or metal protrusion of 0.25 max. per side

Figure 59

P-DIP-7-1 (Plastic Dual In-line Package)
Dimensions in mm

Version 2.0

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CoolSETTM-F2

Outline Dimension P-TO220-6-46 Isodrain Package
9.9 7.5 4.4 1.3 +0.1 -0.02 B

A

10.2 ±0.3

(0.8)

6.6

12.1±0.3

1)

7.62 0...0.15 4 x 1.27

8.6 ±0.3

9.2 ±0.2
0.5 ±0.1 8.4 ±0.3
4.4

8

0.05

0.25 6 x 0.6 ±0.1

M

A B 2.4 5.3 ±0.3

1) Shear and punch direction no burrs this surface Back side, heatsink contour All metal surfaces tin plated, except area of cut.

Figure 60

P-TO220-6-46 (Isodrain Package)
9.9 ±0.2 9.5 ±0.2 6.6 7.5

P-TO220-6-47 Isodrain Package

A

2.8 ±0.2

1.3 +0.1 -0.02 B

17.5 ±0.3

15.6 ±0.3

13

3.7 -0.15

1)

7.62 0...0.15 4 x 1.27

8.6 ±0.3

9.2 ±0.2
0.5 ±0.1 8.4 ±0.3

0.05

0.25 6 x 0.6 ±0.1

M

A B 2.4 5.3 ±0.3

1) Shear and punch direction no burrs this surface Back side, heatsink contour All metal surfaces tin plated, except area of cut.

Figure 61

P-TO220-6-47 (Isodrain Package)
Dimensions in mm

Version 2.0

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CoolSETTM-F2

Outline Dimension P-DSO-16/12 (Plastic Dual Small Outline Package)

Figure 62

P-DSO-16/12 (Plastic Dual Small Outline Package)
Dimensions in mm

Version 2.0

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Total Quality Management
Qualität hat für uns eine umfassende Bedeutung. Wir wollen allen Ihren Ansprüchen in der bestmöglichen Weise gerecht werden. Es geht uns also nicht nur um die Produktqualität ­ unsere Anstrengungen gelten gleichermaßen der Lieferqualität und Logistik, dem Service und Support sowie allen sonstigen Beratungs- und Betreuungsleistungen. Dazu gehört eine bestimmte Geisteshaltung unserer Mitarbeiter. Total Quality im Denken und Handeln gegenüber Kollegen, Lieferanten und Ihnen, unserem Kunden. Unsere Leitlinie ist jede Aufgabe mit ,,Null Fehlern" zu lösen ­ in offener Sichtweise auch über den eigenen Arbeitsplatz hinaus ­ und uns ständig zu verbessern. Unternehmensweit orientieren wir uns dabei auch an ,,top" (Time Optimized Processes), um Ihnen durch größere Schnelligkeit den entscheidenden Wettbewerbsvorsprung zu verschaffen. Geben Sie uns die Chance, hohe Leistung durch umfassende Qualität zu beweisen. Wir werden Sie überzeugen. Quality takes on an allencompassing significance at Semiconductor Group. For us it means living up to each and every one of your demands in the best possible way. So we are not only concerned with product quality. We direct our efforts equally at quality of supply and logistics, service and support, as well as all the other ways in which we advise and attend to you. Part of this is the very special attitude of our staff. Total Quality in thought and deed, towards co-workers, suppliers and you, our customer. Our guideline is "do everything with zero defects", in an open manner that is demonstrated beyond your immediate workplace, and to constantly improve. Throughout the corporation we also think in terms of Time Optimized Processes (top), greater speed on our part to give you that decisive competitive edge. Give us the chance to prove the best of performance through the best of quality ­ you will be convinced.

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