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SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL SERVICE MANUAL

PT-95 CHASSIS

Modification reserved

PT 95 Service Manual

CONTENTS
PAGE
Assembling/Disassembling Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1. Technical Specs. Connectors and Chassis Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page Page Assembling/Disassembling Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1. Technical Specs. Connectors and Chassis Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2. Menu Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3. Safety Instructions and Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5. Supply Voltage Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6. I_C Bus Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7. Fault Tracing Diag. for Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8. Chassis Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9. ABBREVIATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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PT 95 Service Manual

ASSEMBLING / DISASSEMBLING PROCEDURE
Disassembly procedure is explained as below. Before disassembling the TV set please read the safety instructions and warning parts of the service manual. · Turn off TV and plug the mains out · Remove screws (4 pieces) to dismount the back cover · Disconnect the following sockets to take the chassis out ; Deflection cables Degaussing coil Speaker cable Headphone cable Power cable Lineout socket DVD data cable DVD power socket DVD control data cable · Remove the ground cable localised between tube module and mass wire. · Remove the CRT drive module from picture tube. · Remove anode cable localised on the picture tube. · Slide out the chassis through the guides (no screws, straps or other fixing). · Plug in the headphone cable socket to S202. · Place the CRT drive module on picture tube. · Plug in the DVD power cable socket to S103. · Plug in the DVD control bus socket to S002. · Plug in the DVD data bus socket to S304. · Slide the chassis completely on its place. Be careful about control buttons. · Plug in the deflection cable socket to S401 and S402. · Place the anode cable to picture tube. Be careful about high voltage! CRT drive module must be grounded via mass cable. · Place the back cover back to its place.(4 screws) · Plug the mains in. · Turn on the TV.

Please follow the assembly instructions explained below;
· Before inserting the chassis into guides, check the control buttons in front of the chassis. In case of misplacement of control buttons place them into correct position. · Slide the chassis into guides until the connection cables could be reached to their sockets. · Plug in the power cable socket to F103. · Plug in the degauss cable socket to S102. · Plug in the speaker cable socket to S201.

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1. TECHNICAL SPECIFICATIONS, CONNECTIONS AND CHASSIS OVERVIEW
Reception
100 programmes, PLL Tuning + UVSH tuner ,Aerial Input : 75 Ohm · TV Systems Off Air PAL B/G + D/K + SECAM B/G + D/K, PAL I, SECAM L/L' · Add Systems Ext In NTSC 3.58 + NTSC 4.43 · Sound Systems B/G, D/K, L/L', I · Screen Format 4:3 · Picture 16/9 compress, 4:3, 4:3 Expand · Sound RMS Power Intern, 2 x 3W Stereo · Teletext 7 page Flof Text · Connectors Scart1: RGB + CVBS (rear ext1) Headphone side (3.5 mm) Chinch A/V Rear connection: Audio Stereo + Dig Audio Out Side connection: CVBS + Stereo IN · Mains Voltage Official :220/240 VAC (± 10 %) Real : 150/240 VAC (± 10 %) Mains Frequency: 50 Hz (± 5 %) · Languages OSD Menu Croatian, Czech, Danish, Dutch, English, French, Finnish, German, Greek, Hungarian, Italian, Norwegian, Polish, Portuguese, Rumanian, Russian, Spanish, Swedish, Slovak, Slovenian, Turkish, · Power Consumption : 50W ± 10% · Stand-By Power Consumption : <3W

1. 1 Connections
1.1.1 Rear and Side Connections and Front Control

A/L A/R PCM

EURO AV

Rear Connections

Side Connections

Video A/L A/R Headphone

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EURO SCART
I- Audio output 1. right channel 0.5 VRMS/10k 0 7- RGB input, blue (B) 8- Switch signal video (status) 9- GND 10- Reserved for clock signals (not connected) 11- RGB input, green (G) 12- Reserved for remote control (not connected) 13- GND 14- GND switch signal RGB 15- RGB input, red (R) 16- Switch signal RGB 17- GND (video) 18- GND19- Video output 1 Vpp/75 ohm 20- Video input 1 Vpp/75 ohm 21- Shield

1

3

5

7

9

11 13 15 17 19 21

2

4

6

8 10 12 14 16 18 20

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2. Menu Structure

General Menu Options
To minimise the number of keys on the remote control unit, less frequently used functions are accessible only via simple menus. The menus are controlled by the following keys; · "MENU" button makes the Main Menu displayed. Previous menu is displayed at each press of MENU button, when any menu OSD is displaying. · Navigation Up / Down keys are used for selection of the previous and next item on the current menu OSD. Selected item is highlighted. · Left and Right are used for changing the right side value of the highlighted menu item if the item is not a submenu. Beside that Right button also is used as OK button. · Colour keys are used for menu shortcuts and extra functionality. · OK or Menu Right key is used to select a highlighted item, generally for displaying submenu OSDs. · All menus will be cleared after a certain timeout if no RC button or keyboard button is pressed.

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34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18

Back Cover Label Screw Back Cover Cable Holder Screw AV-Holder AV-PCB CRT PCB Screw Speaker Holder (small) Speaker Speaker Holder (Big) Screw Power PCB Holder Pover PCB On-Off Button Multi Button

1 4 1 1 2 1 1 1 4 4 2 2 2 1 1 1 1

17 Main Chassis 16 Screw 15 Chassis Frame Left 14 Chassis Frame Right 13 DVD Badge 12 DVD Head 11 Screw 10 DVD Driver 9 Screw 8 DVD Rim 7 Word Mark 6 Screw 5 15" TF Tube 4 Screw 3 Control PCB 2 Reflector 1 Front Cover

1 4 1 1 1 1 4 1 2 1 1 4 1 1 1 1 1

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KEYBOARD
All the keys on the keyboard are used same as the relevant keys on the RC. But navigation in menus is quite different. In order to open Main Menu from keyboard V+ and V- keys must be pressed together. After displaying the menus P+ and Pkeys will be used as Navigation Up and Navigation Down keys. There is no Enter or Menu Right key on the keyboard so V+ or V- will be used as Enter or Menu Right key if a submenu item is highlighted on the menu. These two keys will also be used as Navigation Left and Navigation Right keys in order to change any highlighted options right side value.

3. SAFETY INSTRUCTIONS AND WARNINGS
SAFETY INSTRUCTIONS FOR SERVICE REPAIRS
1. Use only the original spare parts with the same specifications for replacement. 2. Only the original fuse value should be used. 3. Safety components, indicated by the symbol, should be replaced by components identical to the original ones. 4. Main leads and connecting leads should be checked for external damage before connection. Insulation must be checked. 5. Parts contributing to the safety of the product must not be damaged or obviously unsuitable. This is valid especially for insulators and insulating parts. 6. Thermally loaded solder pads are to be sucked off and re-soldered. 7. Ensure that the ventilation slots are not obstructed. 8. Potentials as high as 25 KV are present when this receiver is operating. Operation of the receiver outside the cabinet or with back cover removed involve a shock hazard from the receiver. 9. Servicing should not be attempted by anyone who is not thoroughly familiar with precautions necessary when working on high voltage equipment. Perfectly discharge the high potential of the picture tube before handling it. The picture tube is highly evacuated and if broken. Glass fragments will be violently expelled. Always discharge the picture tube anode to the receiver chassis to keep of the shock hazard before removing the anode cap. 10. Keep wire away from the high voltage or high temperature components. 11. When replacing a wattage resistor, keep the resistor 10mm away from the circuit board. circuits on the inputs and outputs of MOS circuits give protection to a limited extend only due to time of reaction. Please observe the following instructions to protect the components against ESD. 1. Keep MOS components in conductive package until they are used. Most components must never be stored in styropor materials or plastic magazines. 2. Personnel must not touch the MOS components to avoid electrostatic discharging. 3. Hold the component by the body touching the terminals. 4. Use only grounded instruments for testing and processing purposes. 5. Remove or connect MOS Ics when operating voltage is disconnected. 6. Personnel in charge must make sure that they are connected with the same potential as the mass of the set by a wristband with resistance.

X-RAY RADIATION PRECAUTION
1. Excessive high voltage can produce potentially hazardous X-RAY radiation. To avoid such hazard, the high voltage must not be above the specified limit. The nominal value of the high voltage of this receiver is 25KV at zero beam current (minimum brightness) under 220 V AC power source. The high voltage must not under any circumstance, exceed 30KV. It is recommended the reading of the high voltage to be recorded as a part of the service record. It is important to use an accurate and reliable high voltage meter. 2. The primary source of X-RAY radiation in the TV receiver is the picture tube. For continued X-RAY radiation protection, the replacement tube must be exactly the same type tube as specified in the part list.

HANDLING THE MOS CHIP COMPONENTS
MOS circuit requires special attention with regard to static charges. Static charges may occur with any highly insulated plastics and can be transferred to persons wearing clothes and shoes made of synthetic materials. Protective 10

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4. BLOCK DIAGRAM

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5. SUPPLY VOLTAGE DIAGRAM

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6. I2 BUS INTERCONNECTION DIAGRAM

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7. FAULT TRACING DIAGRAM-POWER SUPPLY
Switched mode Power Supply defective, +112V is missing or level is wrong

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8. CHASSIS DIAGRAM

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9.

SERVICE MENU AND BASIC ADJUSTMENTS
SERVICE MODE IS ACTIVED BY PRESSING THE DIGIT 062596 AND Menu BUTTON CONSECUTIVELY
In this software, program switching by menu added to service menu to create more user friendly user interface.

9.1

OPTION BYTES
B3 B4 B5

PT90 ST92195DSPHD1-V4 E Option 1 B0 1 L Available 0 not available B1 1 not used 0 not used B2 1 Pin 8 16:9 switching mode 0 no Pin 8 16:9 switching mode B3 1 Turn on from AV enabled 0 Turn on from AV disabled B4 1 Keyboard with menu 0 Keyboard without menu B5 1 Brightness full range available 0 Brightness 75%range available (manual cut off) B6-B7 0 Samsung (TECC2949PS35 B(T), TECC2949PS35 P(T)) 1 Temic 10 Philips UV1316 11 Thomson/Orega Option 2 B0 1 AV2 mode available 0 not available B1 1 SVHS mode available 0 not available B2 1 2248 Volume register max (DVD and Stereo chassis) 0 Volume Logaritmic (mono chassis) B3 1 not used 0 not used B4 1 DVD picture in CVBS mode 0 DVD picture in RGB mode B5 1 Headphone available 0 not available B6 1 No Subwoofer 0 Subwoofer available B7 1 4/3 Picture tube 0 16/9 Picture tube Option 3 B0 B1 B2

0 1 0 1 0 1 0 1 0 1 0

B6 B7 Option 4 B0

Peak limitation) The other video IC's (ST2248E included) OSD contrast control ON OSD contrast control OFF disable Blue screen enable AVC Automatic Volume Correction (Stereo)AVL(Mono), not available DVD available not available Standby after power on No Standby after power on

1 0 1 0 1

One Crystal application (4.43 Mhz) 2 cystal application (for NTSC playback) Intercarrier application QSS application STV224XE (Uses extra features as RGB

Home Cinema On Home Cinema Off Pip On Pip Off DVB T ON DVB T OFF TXT ON TXT OFF Not used Not used Not used Not used Samsung (TECC2949PS35 B(T), TECC2949PS35 P(T)) 1 Temic 10 Philips UV1316 11 Thomson/Orega PT90 ST92195DSPHD1-V5 OPTION 1: MODEL CONFIGURATION B0 1 L Available 0 not available B1 1 Arabic Teletext in English on 0 Arabic Teletext in English off B2 1 Pin 8 16:9 switching mode 0 no Pin 8 16:9 switching mode B3 1 Turn on from AV enabled 0 Turn on from AV disabled B4 1 Keyboard with menu 0 Keyboard without menu B5 1 MSP34x5 0 MSP34x0 ve 34x1 B6 1 VCD Bit 0 No VCD 16

1 0 B1 1 0 B2 1 0 B3 1 0 B4 1 0 B5 1 0 B6-B7 0

PT 95 Service Manual

B7

1 0

Surround Mute No Surround Mute

B6 B7

OPTION 2 FEATURE CONFIGURATION B0 1 AV2 mode available 0 not available B1 1 SVHS mode available 0 not available B2 1 Volume linear 0 Volume Logaritmic B3 1 Brightness full range available 0 Brightness half range available B4 1 DVD picture in CVBS mode 0 DVD picture in RGB mode B5 1 Headphone available 0 not available B6 1 Subwoofer available 0 No Subwoofer B7 1 4/3 Picture tube 0 16/9 Picture tube OPTION 3: VIDEO/AUDIO FEATURE CONFIGURATION B0 1 One Crystal application (4.43 Mhz) 0 2 cystal application (for NTSC play back) B1 1 Intercarrier application 0 QSS application B2 1 STV2248E 0 Normal video IC B3 1 OSD contrast control ON 0 OSD contrast control OFF B4 1 Blue screen disable 0 Blue screen enable B5 1 AVC Automatic Volume Correction (MSP Stereo) AVL(Mono 22XX) 0 not available B6 1 DVD available 0 not available B7 1 Standby after power on 0 No Standby after power on

1 0 1 0

not used not used not used not used

Reserved bits must be set to 0 Tuner Settings: ALPS 143 MHz 433 Mhz 1 2 8 THOMSON 118 MHz 433 Mhz 3 6 133 Samsung 150 MHz 425 Mhz 5 6 12 West European Austria A Belgium B Denmark DK Finland FI France F Germany D Greece GR Ireland IRL Italy I Luxemburg L Netherlands NL Norway N Poland PL Spain E Sweden S Switzerland CH United Kingdom GB Other East European Czech Slovakia Germany Hungary Poland Russia Turkey Serbian Rumania Croatia Slovenia Yugoslavia Other

CZ SK D H PL RUS TR SR RO HR SLO YU ...

OPTION 4: VIDEO/AUDIO FEATURE CONFIGURATION B0 1 Home Cinema On 0 Home Cinema Off B1 1 Pip On 0 Pip Off B2 1 DVB T ON 0 DVB T OFF B3 1 TXT ON 0 TXT OFF B4 1 Teletext brightness Fixed 0 Teletext brightness Free B5 1 1p Teletext 0 7p Teletext

You will need following equipments to carry out the adjustment procedures; a- PLL Pattern generator for Secam L' b- PLL Pattern generator PAL BG c- Patern generator for white pattern d- Color Analyzer (CA100)

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9.2 GEOMETRY ADJUSTMENT a. VSEXP 60h b. VS16/9 60h c. VS4/3 60h d. VSEXP 50h e. VS16/9 50h f. VS4/3 50h g. HP h. VP · Enter service menu and select the GEOMETRY settings · Standart geometrical adjustments carried out by VS series, VP and HP settings. VS16/9 settings have to be carried out until 3 cm distance between upper and lower parts of the screen. · Same adjustments for 60H for 16/9, 4/3 and VSEXP. · Press menu button to leave service menu · Hz for 16/9 and 4/3.Press Menu button to leave 9.3 G2 ADJUST > : < increase normal decrease

1. 2. 3. 4. 5.

AGC PIF FL' PIF CL' PIF C PIF F

PIF adjustment for BG/DK/L systems: · 38.9 MHz PAL BG signal applied Tuner via tuner output (IF output). · Leave the channel settings menu and enter service menu. Enter TUNER IF menu in the service mode. Choose the PIF C and PIF F item and adjust the setting until the : indicator (displayed as > : < ) turns in red colour by pressing < and > on remote control. · Press Menu button to leave service menu. PIF adjustment for L' system: · 33.9 MHz SECAM L' signal applied Tuner via tuner output. · Leave the channel settings menu and enter service menu. Enter TUNER IF menu in the service mode. Choose the PIF CL' and PIF FL' item and adjust the setting until the: indicator (displayed as > : < ) turns in red color by pressing < and > on remote control. · Press Menu button to leave service menu. 9.6 DVD SERVICE MENU DVD service menu displayed to give information about the DVD software. Service person can check the version and region of the DVD via this menu. If upgrade CD available, service person can upgrade DVD software. To upgrade the software, software CD should be loaded and DVD ask for the upgrade operation. If service person confirms the operation, upgrade occurs. No command should be send to DVD, while upgrade operation in case of interrupt at the software. After upgrade operation set will tray out the CD. 9.7 HOTEL MODE Installation and Child Lock Menus are omitted in Hotel Mode. You can not search any channel when the Hotel Mode is activated. Volume level cannot be increased higher then certain level in Hotel Mode. The volume limiting level is a predefined value in service menu. 9.8 SYSTEM VOLTAGE ADJUSTMENT · Switch the TV in AV mode by pressing AV button on remote control unit. (Minimum beam current condition) · Adjust the V101 potentiometer until 112Vdc measured on cathode pin of D108 diode. 18

the G2 menu in the service mode the G2 potentiometer on FBT until you reach the : sign < indicator means to decrease > indicator means to increase
Turn

Enter

9.4 VIDEO 1 B 2 G 3 R 4 G CFF 5 R CFF · Apply Dark gray pattern (at 10 IRE) · Contrast 70%, brightness middle, color saturation middle. · By changing the R CFF and G CFF Adjust to obtain the necessary values for x and y. · Apply white pattern (at 100 IRE) · Set the contrast to 70%, brightness and color saturation to middle. · Place the color analyzer. · (R,G,B), it is possible to modify the peak white. · Adjust to obtain the necessary values for x and y. Remark: It may be necessary after low light alignment to check and to re-align the high light and to repeat several times the procedure to obtain good alignment for both low and high light. 9.5 TUNER / IF

PT 95 Service Manual

ABBREVIATIONS 112VOUT 24V_VERT 5VA 5VD AGC AV1/AV2 AV_STATUS B B_OSD BCL CVBS CVBSEXT CVBSOUT CVBSTXT DOC FB_OSD FBEXT FBT FLM. G G_OSD HOSD HOUT IF1 IF2 IR KEYB L/L' LOUT MDO ON/STBY PRST R R_OSD RIN RMOT SCL SDA SW1 TXTSW V_AMP V_OSD VERT VGUARD VMEM VOL VolVol+ 112 V Horizontal power supply 24 V Vertical power supply 5 V analog 5 V digital Auto Gain Control AV1 / AV2 information AV Status Blue OSD Blue input Beam Current Limiter Composite Video Signal External CVBS input Second Video Switch Output Teletext CVBS Depends on Chassis OSD Fast blanking Input Fast Blanking External Flayback Transformer Flaman Green OSD Green input Horizontal OSD Horizontal Output pulse Intermediate Frequency 1 Intermediate Frequency 2 Infrared led Front panel keyboard Secam L/L' sound standard Left out Mode control data output On/Standby Preset Red OSD Red input Red in Remote Control I2C Clock I2C Data Switch 1 Teletext switch Vertical Amplitude DAC output Vertical OSD Vertical Output pulse Vertical guard voltage Voltage supplied for Eeprom Volume Volume Volume +

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3. MECHANICAL DIMENSIONS

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10- BLOCK DIAGRAMS

TV CHASSIS

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VIDEO PROCESSOR

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SCART

EEPROM

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POWER SUPPLY

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10- TDA7057AQ
2 x5 W stereo BTL Audio Output Amplifier with DC Volume Control
FEATURES
· DC volume control · Few external components · Mute mode · Thermal protection · Short-circuit proof · No switch-on and switch-off clicks · Good overall stability · Low power consumption · Low HF radiation · ESD protected on all pins.

GENERAL DESCRIPTION
The TDA7057AQ is astereo BTL output amplifier with DC volume control. The device is designed for use in TV and monitors, but are also suitable for battery-fed portable recorders and radios.

Missing Current Limiter (MCL)
A MCL protection circuit is built-in. The MCL circuit is activated when the difference in current between the output terminal of each amplifier exceeds 100 mA (typical 300 mA). This level of 100 mA allows for headphone applications (single-ended).

QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VP Pout Gv GC Iq(tot) THD
TYPE NUMBER

supply voltage output power voltage gain gain control total quiescent current total harmonic current

Vp = 12 V; RL = 16 Vp = 12 V; RL = 8

4.5 3.0 ­ 39.5 68.0 ­ ­
PACKAGE

­ 3.5 5.3 40.5 73.5 22 0.3

18 ­ ­ 41.5 ­ 25 1

V W W dB dB mA %

Vp = 12 V; RL = Pout=0.5w w

NAME

DESCRIPTION

VERSION

TDA7057AQ
SYMBOL

DBS13P
PIN

Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm)
DESCRIPTION
vc1 n.c.
1 2 3 4 5 6 7 8 9 10 11 12 13

SOT141-6

U

VC1 n.c. VI (1) VP VI (2) SGND VC2 OUT2+ PGND2 OUT2OUT1PGND1 OUT1+

1 2 3 4 5 6 7 8 9 10 11 12 13

DC volume contol 1 not connected voltage input 1 positive supply voltage voltage input 2 signal ground DC volume contol 2 positeve output 2 power ground 2 negative output 2 negative output 1 powwer ground 1 positive output 1
VI(1) VP VI(2) SGND VC2 OUT2 PGND2 OUT2­ OUT1PGND1 OUT1+

TDA7057AQ

Pin Configuration
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handbook, full pagewidth
(1)

100 nF

220 µF

V P = 12 V

4

TDA7053AQ
13 470 nF input 1 R s = 5 k 3 1 I- 1 11 I+ 1
(2)

STABILIZER

TEMPERATURE MCL PROTECTION 10

470 nF input 2

I- 1 5 7 I+ 1 8
(2)

R s = 5 k

DCvolume

6

9

12

signal ground

power ground

(1) This capacitor can be omitted if the 220 µF electrolytic capacitor is connected close to pin 5. (2) R = 16 . L

FUNCTIONAL DESCRIPTION
The TDA7057AQ is a stereo output amplifiers with two DC volume control stages. The device is designed for TV and monitors, but also suitable for battery-fed portable recorders and radios. In conventional DC volume control circuits the control or input stage is AC coupled to the output stage via external capacitors to keep the offset voltage low. In the TDA7057AQ the two DC volume control stages are integrated into the input stages so that no coupling capacitors are required and a low offset voltage is still maintained. The minimum supply voltage also remains low. The BTL principle offers the following advantages: · Lower peak value of the supply current · The frequency of the ripple on the supply voltage is twice the signal frequency. Consequently, a reduced power supply with smaller capa citors can be used which results in cost reductions. For portable applications there is a trend to decrease the supply voltage, resulting in a reduction of output power at conventional output stages. Using the BTL principle increases the output power. The maximum gain of the amplifier is fixed at 40.5 dB. The DC volume control stages have a logarithmic control characteristic. Therefore, the total gain can be controlled from +40.5 dB to -33 dB. If the DC volume control voltage falls below 0.4 V, the device will switch to the mute mode. The amplifier is short-circuit protected to ground, Vp and across the load. A thermal protection circuit is also implemented. If the crystal temperature rises above 150 oC the gain will be reduced, thereby reducing the output power. Special attention is given to switch-on and switch-off clicks, low HF radiation and a good overall stability.

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MICRO CONTROLLER

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HORIZONTAL

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KEYBOARD

FRONT AV

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TUBE MODULE

LINE OUT

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AUDIO AMPLIFIER

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11- DESCRIPTION OF INTEGRATED CIRCUITS -TV PART-

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STV224X
Multi Standard TV Processor
I C Bus Control PIF Circuit with PLL Demodulation (Positive and Negative Video) SIF Circuit with QSS Structure, FM Demodulation and AM Demodulation for France Intercarrier Capability Built-in Sound Bandpass Sound Subcarrier Output for Stereo Chassis (FM, NICAM) Audio Switch and Volume Control (Mono Chassis) AVL (Automatic Volume Levelling) Integrated Chroma Filters and Luma Delay Line SHRINK56 Integrated Chroma Delay Line (Plastic Package) Video Switch (3 CVBS In, 1 or 2 CVBS Out) ORDER CODE : STV224XC/8XC SVHS Switch (Y Combined with CVBS3 Input) OSD RGB Inputs External RGB/YCrCb Inputs or YUV Interface PAL / SECAM / NTSC Chroma Demodulators Auto Flesh Control Capability in NTSC mode South America Capability (PAL-M / PAL-N / NTSC) Chroma Subcarrier Output Black Stretch Circuit Peaking Circuit TQFP64 (14 x 14 x 1.4 mm) Automatic Cut-off Current Loop (Full Thin Plastic Quad Flat Pack) Manual Cut-off possible for low cost applications ORDER CODE : STV223XD Two Horizontal Deflection PLLs Vertical Countdown Half Contrast APR (Automatic RGB Peak Regulation) Function SAW Filter Switch Control (Optional) Very Few External Components

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STV224X
1.2 PIN DESCRIPTION Table 1. Pin Configuration
Pin N° STV224XC/8XC STV223XD SDIP56 TQFP64 1 8 2 9 3 10 4 11 5 12 6 13 7 14 8 16 9 17 10 18 11 19 12 20 13 21 14 22 15 23 16 24 17 25 18 26 19 27 20 28 21 29 22 34 23 35 37 38 39 40 41 42 30 43 31 44 32 45 33 46 34 47 35 48 36 49 37 50 38 52 39 53 40 54 41 55 42 56 Symbol SI N 1 FI SI N 2 FI AG C SI AP FC VREFIF AGCPIFCAP PIFIN1 PIFIN2 TUNERAGCOUT IFPLL GND IF AM/FMOUT/SC VCCIF INTCVBSOUT EXTAUDIOIN PIFLC1 PIFLC2 VCC2 CVBSIN1 GND2 CVBSIN2 BS Y/CVBSIN3 CHR UI N VI N YI N YOUT VO U T UO UT BOUT GOUT ROUT I CATH BOSD GOSD ROSD FBO SD /HC XTAL3/ BTUN XTAL2 XTAL1 CLPF Description

SI I F nput SI I F nput AG C SI C apacit F or Voltage Reference Filtering AGC PIF Capacitor PIF Input PIF Input AGC Tuner Output IF PLL Filter IF Ground AM/FM Mono Sound or Stereo Carriers Output 5 V IF Supply Internal CVBS Output External Audio Input LC Input LC Input Video/Luma Supply Voltage (8 V) Internal Video Input Video/Luma Ground External Video Input Black Stretch Capacitor Y(SVHS) or CVBS3 External Input Chroma (SVHS) Input B- Inut Y p R - Inut Y p Y In put Y O ut put R - O utp Y ut B- O utp Y ut Blue Output Green Output Red Output Cathode Current Measurement Input OSD Blue Input OSD Green Input OSD Red Input O SD Fast Bl anking nput /alf ont st on I I H C ra SD P56 p age ack 3. M Hz C r t 5X ys alorC l oche Filt erTuningC apaci tor 3.5X MHz Crystal 4.43/3.5X MHz Crystal Chroma PLL Filter XTAL1 Control Pin, Vertical Amplitude DAC Output X1/VAMP/CHROUT Chroma Reference Signal Output

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Pi N ° n STV224XC/8XC STV223XD SDIP56 TQFP64 43 57 58 45 59 46 47 48 49 50 51 52 53 54 55 56 61 62 63 64 1 2 3 4 5 6 7

Symbol GND1 CVBSOUT1 VCC1 BCL/SAF VERT HOUT LFB/SSC SLPF SCL SDA VCCD GNDD AUDIOOUT FM C AP

Description Chroma/Scanning Ground Main Video Switch Output Chroma/Scanning Power Supply (8 V) Beam Current Limiter Control Voltage and Safe (XRAY) Vertical Output Pulse Horizontal Output Pulse Line Flyback Input and Super-Sandcastle Outp Scanning PLL Filter I C Bus Clock Input I C Bus Data Input Digital Supply Voltage (5 V) Digital Ground Main Audio Output FM D em odul on C apacit ati or

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PT 95 Service Manual

MAIN FEATURES
I-C bus control (read and write modes), q PIF PLL demodulator, Bus controlled VCO alignment, q IF positive and negative modulation, q Digital AFC, q Tuner delayed AGC output, q White and Black spot cancellation, q SIF with QSS or intercarrier structure, q Built in sound bandpass, q Multistandard PLL FM demodulator (4.5, 5.5, 6.0,6.5MHz), q AM demodulator for France, q FM sound carriers output for Stereo chassis, q Audio switch for external audio input, Mono chassis, q Digital volume control, q Audio Mute, q Video switch, 3 CVBS inputs, 1 CVBS output which can be used to drive teletext decoder, q SVHS switch, Y input is combined with CVBS3 input, q OSD RGB analog inputs, fast blanking detection on OSD fast blanking pin, contrast control capability,oversize blanking capability on OSD fast blanking input, q External analog RGB inputs with contrast and saturation control (external RGB matrixed in YUV). q Integrated chroma filters (trap, bandpass, cloche) with automatic alignment, q Integrated luminance delay line, q Adjustable peaking on the luminance signal with coring function, q Black strech circuit, q PAL / SECAM / NTSC color decoder with automatic identification of standards, q Integrated chroma delay line, q Full integrated SECAM decoder, q Hue control, two selectable matrixes in NTSC mode, q Automatic flesh control circuit with two selectable characteristics (normal and wide), q ACC overload circuit, q Chroma subcarrier output, which could be used to drive comb filter circuit, q Automatic RGB peak regulation (APR). q Automatic digital cut-off current loop with warm-up detection circuit, q White point and cut-off point adjustments, q Beam current limiter control stage, q High performance synchronization pulses separator, q Horizontal synchronization with two phase locked loops, q Integrated VCO, auto-calibration using the chroma crystal reference frequency,
q

time constant selection for the first PLL, 3 selectable time constants, q Video identification circuit (independent from PLL1), q Noise detector circuit, q Vertical countdown circuit, q Automatic 50/60Hz selection circuit, q Blanking and inserted cut-off pulses position adapted to standard (50 or 60Hz), q Long blanking mode capability in 60Hz (same blanking as 50Hz standard), q Possibility to insert cut-off pulses after a vertical oversize blanking signal, q De-interlace capability, q Horizontal starting circuit with soft-start capability, q Horizontal and vertical position adjustments, vertical amplitude control voltage (combined with chroma subcarrier output), q 4/3, 16/9 selection voltage.

q Automatic

38

PT 95 Service Manual

ELEC TRICAL CHAR A CT ERISTI CS
A B SO LU TE MA XIMUM RA TIN S G
Symbol V CC _8V V CC _5V V ESD Toper Tstg 8 V Supply Voltage 5 V Supply Voltage Capacitor 100 pF discharged viaserial resistance (Human Body Model) 1.5 k ±2 Operating Temperature Storage Temperature Parameter Value 10 7 kV 0, +70 °C -55, +150 °C Unit V V

TH ER M A L DA TA
Symbol Parameter SDIP56 TQFP64 Typical Value 40 50 Unit °C/W °C/W

R th (j-a) Junction-ambient Thermal Resistance (measured at P D = 1 W)

SU PPLY (Supplies at Typical Values, 25C, I bus register at power-on reset value, autom ° C amb = T mode, unless otherwise specified).
Symbol V CCIF V CCD V CC1 V CC2 I CCIF I CC5F I CCI I CC2 PD Parameter Test Conditions Min. Typ Max. Unit IF Circuit Supply Voltage 4.75 5 5.25 Bus & Digital Supply Voltage 4.75 5 5.25 Chroma, Scanning Supply Voltage 7.6 8 8.4 V Video Supply Voltage 7.6 8 8.4 V V CCIF Current Consumption V = 5 V. No-load at RGB outputs. 58 m CCIF V CC5F Current Consumption V = 5 V. No-load at RGB outputs. 48 m CCD V CCI Current Consumption V 40 m CCI = 8 V. No-load at RGB outputs. V CC2 Current Consumption V = 8 V. No-load at RGB outputs. 56 m CC2 V CCI = V = 8 V, CC2 Total Power Dissipation V CCIF =V CC5V = 5 V No-load at RGB outputs. 1300 mW

39

PT 95 Service Manual

ST92195C/D
48-96 KB ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER
General Features:
· Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes · 0°C to +70°C Operating Temperature Range available · Up to 24 MHz Operation @ 5V±10% · Minimum instruction cycle time: 165nS at 24MHz. · 48, 56, 64, 84 or 64K Bytes ROM · 256 Bytes RAM of Register file (accumulators or index registers) · 256 to 512 Bytes of on-chip static RAM · 2 or 8 Kbytes of TDSRAM (Teletext and Display Storage RAM) · 28 fully programmable I/O pins · Serial Peripheral Interface · Flexible Clock controller for OSD, Data Slicer and Core clocks running from a single low frequency external crystal. · Enhanced Display Controller with 26 rows of 40/80 characters ­ 2 sets of 512 characters ­ Serial and Parallel attributes ­ 10x10 dot Matrix, definable by user ­ 4/3 and 16/9 supported in 50/60HZ and 100/120 Hz mode ­ Rounding, fringe, double width, double height, scrolling, cursor, full Background color, half-intensity color, translucency and half-tone modes · Teletext unit, including Data slicer, Acquisition Unit and up to 8K Bytes RAM for Data Storage · VPS and Wide Screen Signalling slicer · Integrated Sync Extractor and Sync Controller · 14-bit Voltage Synthesis for tuning reference voltage · Up to 6 External Interrupts plus one non-maskable interrupt · 8 x 8-bit programmable PWM outputs with 5V open-drain or push-pull capability · 16-bit Watchdog timer with 8-bit prescaler · 1 or 2 16-bit standard timer(s) with 8-bit prescaler · I­C Master/Slave (on some devices) · 4-channel A/D converter; 5-bit guaranteed · Rich instruction set and 14-Addressing modes · Versatile development tools, including Assembler, Linker, 40 C-Compiler, Archiver, Source Level Debugger and hardware emulators with Real-Time Operating System available from third parties · Pin Compatible EPROM and OTP devices available. Microcontroller+OSD+(Teletext decoder)+VPS/PDC/WS decoder are embedded in one chip, where there are two types with the major difference; ST92185 No-teletext ST92195 With teletext The ST92195 microcontroller is developed and manufactured by STMicroelectronics using a pro-prietary n-well HCMOS process. Its performance derives from the use of a flexible 256-register pro-gramming model for ultra-fast context switching and real-time event response. The intelligent on-chip peripherals offload the ST9 core from I/O and data management processing tasks allowing critical application tasks to get the maximum use of core resources. The ST92195 MCU supports low power consumption and low voltage operation for power-efficient and low-cost embedded systems. The advanced ST9+ Core consists of the Central Processing Unit (CPU), the Register File and the Interrupt controller. The general-purpose registers can be used as accumulators, index registers, or address pointers. Adjacent register pairs make up 16-bit registers for addressing or 16-bit processing. Although the ST9 has an 8-bit ALU, the chip handles 16-bit operations, including arithmetic, loads/stores, and memory/register and memory/memory exchanges. Two basic addressable spaces are available: the Memory space and the Register File, which includes the control and status registers of the on-chip peripherals. Power consumption of the device can be reduced by more than 95% (Low power WFI). Up to 28 I/O lines are dedicated to digital Input/Output. These lines are grouped into up to five I/O Ports and can be configured on a bit basis under software control to provide timing, status signals, timer and output, analogue inputs, external interrupts and serial or parallel I/O. A set of on-chip peripherals form a complete system for TV set and VCR applications: ­ Voltage Synthesis ­ VPS/WSS Slicer ­ Teletext Slicer ­ Teletext Display RAM ­ OSD

PT 95 Service Manual

BLOCK DIAGRAM

Up to 96 Kbytes ROM 256 or 512 bytes RAM

I/O PORT 0

8

P0[7:0]

I/O PORT 2 I/O PORT 3

6

P2[5:0]

Up to 8 Kbytes TRI TDSRAM

4

P3[7:4]

8/16-bit CPU NMI INT[7:4] INT2 INT0 MMU Interrupt Management ST9+ CORE OSCIN OSCOUT RESET RESETO RCCU 16-BIT TIMER/ WATCHDOG SDO/SDI SCK MCFM SPI TIMING AND CLOCK CTRL VOLTAGE SYNTHESIS

MEMORY BUS

256 bytes Register File

I/O PORT 4

8

P4[7:0]

I/O PORT 5 DATA SLICER & ACQUISITION UNIT SYNC. EXTRACTION REGISTER BUS VPS/WSS DATA SLICER ADC

2

P5[1:0]

TXCF CVBS1

WSCR WSCF CVBS2 AIN[4:1] EXTRG VSYNC HSYNC/CSYNC CSO FREQ. PXFM MULTIP. R/G/B/FB TSLU HT PWM[7:0]

SYNC CONTROL ON SCREEN DISPLAY PWM D/A CONVERTER

VSO[2:1]

STOUT0 SDA1/SCL1 SDA2/SCL2

STANDARD TIMER 1) IC 2)

All alternate functions characters) (Italic are mapped on Ports 0, 2, 3, 4 and 5 Note 1 One standard timer on ST92195C devices, two standard timers on ST92195D devic : Note 2 C available on ST92195D devices only : I

41

PT 95 Service Manual

PIN DESCRIPTION (Cont) d Figure 3. 56-Pin Package Pin-Out
INT7/P2.01 RESET 2 P0.7 3 P0.6 4 P0.5 5 P0.4 6 P0.3 7 AIN4/P0.2 8 P0.1 9 P0.0 10 CSO/RESET0 /P3.7 11 P3.6 12 P3.5 13 P3.4 14 B 15 G 16 R 17 FB 18 SDA1/SDI/SDO/P5.1 19 20 SCL1/SCK/INT2/P5.0 V DD 21 JTDO 22 23 WSCF V PP /WSCR 24 AVDD3 25 TEST0 26 27 MCFM JTCK 28 56 P2.1/INT5/AIN1 55 P2.2/INT0/AIN2 54 P2.3/INT6/VS01 53 P2.4/NMI 52 P2.5/AIN3/INT4/VS02 51 OSCIN 50 OSCOUT 49 P4.7/PWM7/EXTRG/STOUT0 48 P4.6/PWM6 47 P4.5/PWM5/SDA2 46 P4.4/PWM4/SCL2 45 P4.3/PWM3/TSLU/HT 44 P4.2/PWM2 43 P4.1/PWM1 42 P4.0/PWM0 41 VSYNC 40 HSYNC/CSYNC 39 AVDD1 38 PXFM 37 JTRSTO 36 GND 35 AGND 34 CVBS1 33 CVBS2 32 JTMS 31 AVDD2 30 CVBSO 29 TXCF

RESET Reset (input, active low). The ST9+ is iniVSYNC Vertical Sync . Vertical video synchron tialised by the Reset signal. With the deactivationto OSD. Positive or negative p tion input of RESET, program execution begins from the HSYNC/CSYNC Horizontal/Composite. sync HoriProgram memory location pointed to by the vector composite video synchronisation zontal or contained in program memory locations 00h and OSD. Positive or negative polarity. 01h. PXFM Analog pin for the Display Pixel Fr R/G/B Red/Green/Blue Video color analog DAC . Multiplier outputs. This pin must be ti AVDD3 Analog DD of PLL. V FB Fast Blanking . Video analog DAC output. to V externally. DD V DD Main power supply voltage (5V­10%, digital) GND Digital circuit ground. WSCF, WSCR Analog pins for the VPS/WSS slic- Analog circuit ground (must be tie AGND er . These pins must be tied to ground or not to digital GND). nally connected. CVBS1 Composite video input signal for t V PP :On EPROM/OTP devices, the WSCR pin is text slicer and sync extraction. replaced by Vwhich is the programming voltage PP CVBS2 Composite video input signal for t pin. PP should be tied to GND in user mode. V WSS slicer. Pin AC coupled. MCFM Analog pin for the display pixel frequency AVDD1, AVDD2 Analog power supplies (must multiplier. tied externally to AVDD3). OSCIN, OSCOUT Oscillator (input and output). These pins connect a parallel-resonantTXCF Analog pin for the Teletext slicer l crystal (24MHz maximum), or an external source CVBSO, JTDO, JTCK Test pins: leave floati to the on-chip clock oscillator and buffer. OSCIN is the TEST0 Test pins: must be tied to AVDD2. input of the oscillator inverter and internal clock JTRST0 Test pin: must be tied to GND. generator; OSCOUT is the output of the oscillator inverter.

42

PT 95 Service Manual

PIN ASSIGNMENT
Pin No. 1 3 4 5 6 7 8 9 10 11 12 13 14 28 30 32 42 43 44 45 46 47 48 49 53 54 55 56 Pin Name INT7/P2.0 P0.7 P0.6 P0.5 P0.4 P0.3 AIN4 P0.1 P0.0 CSO/RESET0/P3.7 P3.6 P3.5 P3.4 JTCK CVBSO JTMS P4.0/PWMO P4.1/PWM1 P4.2/PWM2 P4.3/PWM3 P4.4/PWM4 P4.5/PWM5 P4.6/PWM6 P4.7/PWM7/EXTRG/STOUT P2.4/NMI P2.3/INT6/VS01 P2.2/INT0/AIN2 P2.1/INT5/AIN1 I/O Function IR INT. IN DVDDATAOUT STOP N.C. N.C. N.C. AV.STATUS N.C. N.C. MUTE_DVD L/L' TV/DVD STDBY N.C. N.C. N.C. DVD_STD_BY VOL N.C. DVD POWER +5V DVD POWER +12V N.C. N.C. N.C. N.C. LED CONTROL DVDDATAIN KEYBOARD INPUT

43

PT 95 Service Manual

TDA1771
VERTICAL DEFLECTION CIRCUIT

. . . . . . .

RAMP GENERATOR INDEPENDENT AMPLITUDE ADJUSTEMENT BUFFER STAGE POWER AMPLIFIER FLYBACK GENERATOR INTERNAL REFERENCE VOLTAGE THERMAL PROTECTION
SIP10 (Plastic Package) ORDER CODE : TDA1771

PIN CONNECTIONS (top view)
10 9 8 7 6 5 4 3 2 1 FLYBACK GENERATOR VS INVERTING INPUT BUFFER OUTPUT RAMP GENERATOR GROUND HEIGHT ADJUSTMENT TRIGGER INPUT OUTPUT STAGE V S POWER OUTPUT

DESCRIPTION The TDA1771 is a monolithic integrated circuit in SIP10 package. It is a full performance and very efficient vertical deflection circuit intended for direct drive of a TV picture tube in Color and B & W television as well as in Monitor and Data displays. BLOCK DIAGRAM
9 2

VOLTAGE REGULATOR

FLYBACK GENERATOR

10

R3

TRIGGER IN

3

RAMP GENERATOR

CLOCK PULSE

POWER AMP.

1

BUFFER STAGE

THERMAL PROTECTION

4

6

7

8

5

44

1771-02.EPS

1771-01.EPS

PT 95 Service Manual

TDA1771
ABSOLUTE MAXIMUM RATINGS
Symbol VS V1 , V3 V8 I 0 I 0 I 10 I 10 P tot TS ,
JT 2V

Parameter Supply Voltage Flyback Peak Voltage Trigger Input Voltage Amplifier Input Voltage Output Peak to Peak Current (non repetitive t = 2ms) Output Peak to Peak Current t > 10 µs Pin 10 DC Current1 at V < 9 V Pin 10 Peak to Peak Current @ t fly< 1.5ms Total Power Dissipation @ 60 °C tab = T Storage and Junction Temperature

Value 30 65 20 GND to V S 4 100 3 9

Unit V V V V 6 A mA W
1771-01.TBL

A

-- 40, + 150 °C

THERMAL DATA
R th R th Thermal (j-tab)
(j-a)

Resistance Junction-tab

Max. Max.

10 70

°C/W °C/W

Thermal Resistance Junction-ambient

ELECTRICAL CHARACTERISTICS (T °C amb = 25 unless otherwise specified)
Symbol DC (V = 30V) S I 2 I 9 -- 6 I -- 6 I dI/I 6 6 V1 V 1L V 1H V4 dV4/V S dV4/d I Vr Gv V fs V 10 V3 I 3 t 3
4

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Pin 2 Quiescent Current Pin 9 Quiescent Current Ramp Generator Bias Current Ramp Generator Current Ramp Gener. Linearity Quiescent Output Voltage

1 1 6 6 6 a

= 0, I 0 I = 10 = 0, I 0 I = 10 = 0 V =V 0, 4-- =I 20 µA = V to 15V, = 20 0 µA 4 -- I = R , R = 10k V = 30V 30k b , S 17.0 7.2 18.5

16 15 20 0.2 17.8 7.5 0.5 1 1.1 1.6 6.3 6.6 1 1.5 4.26

36 30 0.5 21.5 1 18.6 7.8 1 1.4 1.6 2.2 6.9 2 2 4.40 60 2.5 3 3.0 30

mA mA µA µA % V V V V V V V mV/V mV/ µA 4.54 dB V V µA
1171-03.TBL

, b , S R a = 6.8k R = 10k V = 15V Out Saturation Voltage to GND 1 = 0.5A I I = 1.2A 1 Out Saturation Voltage to V S Reference Voltage -- 1 = 0.5A I -- 1 = 1.2A I
4

-- I µA = 20

Reference Voltage Drift VersusS V= 10V to 30V V S Reference Voltage Drift 4 Versus = 10 to 30 I I µA µA 4 Internal Ref. Voltage Ouput Stage Open Loop Gain V9
-- 10Saturation

1771-02.TBL

Symbol

Parameter

Value

Unit

V

f = 100Hz
10 10

Voltage

= 1.2A -- I (see note 1)

1.5 1.7 2.6 20

Pin 10 Scanning Voltage Trigger Input Threshold Trigger Input Bias Current Trigger Input Width

= 20mA I = V V 0.2V 3 -- (see note 2)

3.4

V

IN

60 µS th

Notes : The trigger input circuit can accept, with a metal option, positive and negative going input pulses. 1. 1.2 t S 2. th = where t the vertical period and V amplitude at Pin 6 S is PP is ramp V PP

45

PT 95 Service Manual

ELECTRICAL CHARACTERISTICS (T °C amb = 25 unless otherwise specified) (continued)
Symbol DC (V = 24V) S VS I 1 I S V1 V7 TJS Operating Supply Voltage Range Peak-to-peak Operating Current Range Supply Current Flyback Voltage Sawtooh Pedestall Voltage Junction Temp. for Thermal Shutdown
Y Y

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

10 0.4 315 51 1.85 145 = 2.4A I pp =I 2.4A pp

30 2.5 mA
1771-04.TBL

V A

V °C

V

APPLICATION CI RCUIT
+VS
0.1 µF 470µF 1N4001

9

2 100µF 35V

VOLTAGE REGULATOR

FLYBACK GENERATOR

10

R3

TRIGGER IN

3

RAMP GENERATOR

CLOCK PULSE

POWER AMP.

1
2.2 330

YOKE

BUFFER STAGE

THERMAL PROTECTION

0.22 F µ

Ry = 9.6 Ly = 24.6mH Iy = 1.2App

2.4k

4 180k

6 47nF

7

8

5

1.2k

1k
22µF

1500 µF

220k

46

1771-03.EPS

1.2

PT 95 Service Manual

ICE 1QS01
Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction (PFC)
Features
· · · · · · · · · · · · · · Line Current Consumption with PFC Standby Input Power < 1 W Stable Standby Frequency Low Power Consumption Very Low Start-up Current Soft-Start for noiseless Start-up Standby Burst Mode with and without Control Signal for lowered Output Voltages Digital Frequency Reduction in small Steps at Decreasing Load Over- and Undervoltage Lockout Switch Off at Mains Undervoltage Mains Voltage Dependent Fold Back Point Correction Ringing Suppression Time Controlled from Output Voltage Easy Design In Free usable Fault Comparator

P-DIP-8P-DIP-8-4

P-DSO-83

lowered Output oad P-DSO-8-3

Functional Description
The ICE1QS01 is optimized to control free running flyback converters with and without Power Factor Correction (with PFC Charge Pump). The switching frequency is reduced in small steps with decreasing load towards a minimum of 20 kHz in standby mode. This function is performed by a digital circuit to avoid any jitter also with periodically pulsed loads. To provide extremely low power consumption at light loads, this device can be switched into Standby Burst Mode. This is also possible without standby control signal (for adapter application). Additionally, the start up current is very low. To avoid switching stresses of the power devices, the power transistor is always switched on at minimum voltage. The device has several protection functions: V CC over- and undervoltage, mains undervoltage and current limiting. Regulation can be done by using the internal error amplifier or an opto coupler feedback. The output driver is ideally suited for driving a power MOSFET. The ICE1QS01 is suited for TV-sets, VCR- sets, SAT- receivers and other consumer applications in the power range from 0 to app. 300 W.

Type ICE1QS01 ICE1QS01G

Ordering Code Q67040-S4558-A101 Q67040-S4559-A101

Package P-DIP-8 P-DSO-8

Infineon Tech

PCI Group

07.01.03

3

47

PT 95 Service Manual

Block Diagram

VCC
20V

Foldback Point Corr.

+

Overvoltage Protection

PCS
+ + 1.5V

UVLO

Burst-Mode Reference Voltage and Current

SRC
2V

+ 5V

+ + 1V

Ringing Suppression Time
Start 5V

+ 4.8V + 4.4V + 3.5V Latch Primary Regulation 20k

5V

50µs Timer 50ms Timer 25mV +

RZI

5.7V

Digital Processing
ZC-Counter UP/DO-Counter

Power Driver
S
SET

Q

OUT

R
CLR

Q

1V

+

OFC
1V

+
D
SET

Q

L
CLR

Q

GND

48

PT 95 Service Manual

PINNING
Pin 1 2 3 4 5 6 7 8 Symbol N.C. PCS RZI SRC OFC GND OUT VCC Primary Current Simulation Regulation and Zero Crossing Input Soft-Start and Regulation Capacitor Overvoltage Fault Comparator Ground Output Supply Voltage Function

Pin Configuration (top view)

1 2 3 4

N.C.

VCC

8 7 6 5

1 2 3 4
PCS

VCC

8 7 6 5

PCS

OUT

OUT

RZI

GND

RZI

GND

SRC

OFC

SRC

OFC

49

PT 95 Service Manual

ST24/25C08
Serial 8K (1KxB) Eeeprom

1 MILLION ERASE/WRITE CYCLES with 40 YEARS DATA RETENTION SINGLE SUPPLY VOLTAGE: -- 3V to 5.5V for ST24x08 versions -- 2.5V to 5.5V for ST25x08 versions -- 1.8V to 5.5V for ST24C08R version only 8 8 HARDWARE WRITE CONTROL VERSIONS: ST24W08 and ST25W08 1 1 PROGRAMMABLE WRITE PROTECTION PSDIP8 (B) SO8 (M) TWO WIRE SERIAL INTERFACE, FULLY2C I 150mil Width 0.25mm Frame BUS COMPATIBLE BYTE and MULTIBYTE WRITE (up to 8 BYTES) PAGE WRITE (up to 16 BYTES) BYTE, RANDOM and SEQUENTIAL READ Figure 1. Logic Diagram MODES SELF TIMED PROGRAMMING CYCLE AUTOMATIC ADDRESS INCREMENTING ENHANCED ESD/LATCH UP PERFORMANCES
V CC

DESCRIPTION This specification covers of r bits I ange a 8K 2C bus EEPROM products, t he ST24/25C08, the ST24C08R and the ST24/25W08. In the text, prodE ucts are referred to as ST24/25x08, where "x" is: "C" for Standard version and "W" for HardwarePRE Write Control version.
SCL MODE/WC*

SDA ST24x08 ST25x08 ST24C08R

Table 1.
PRE E SDA SCL MODE WC V CC V SS

Signal Names
Write Protect Enable Chip Enable Input Serial Data Address Input/Output Serial Clock Multibyte/Page Write Mode (C version) Write Control (W version) Supply Voltage Ground
Note:WC signal is only available for ST24/25W08 products.

V SS
AI00860D

J l

1996

1/16

50

PT 95 Service Manual

ST24/25C08, ST24C08R, ST24/25W08
Figure 2A. DIP Pin Connections Figure 2B. SO Pin Connections

ST24x08 ST25x08 ST24C08R PRE NC E V SS 1 2 3 4 8 V CC 7 MODE/WC 6 SCL 5 SDA
AI00861D

ST24x08 ST25x08 ST24C08R PRE NC E V SS 1 2 3 4 8 7 6 5
AI01073D

V CC MODE/WC SCL SDA

Warning: NC = Not Connected.

Warning: NC = Not Connected.

Table 2.
Symbol TA TSTG T LEAD V IO V CC V ESD

(1) Absolute Maximum Ratings

Parameter Ambient Operating Temperature Storage Temperature Lead Temperature, Soldering Input or Output Voltages Supply Voltage Electrostatic Discharge Voltage (Human Body model) Electrostatic Discharge Voltage (Machine model)
(3) (2)

Value

Unit

--40 to 125 °C --65 to 150 °C

(SO8 package) sec 40 (PSDIP8 package) 10 sec

215 260

°C

--0.6 to 6.5 --0.3 to 6.5 4000 500 V V V

Notes: Except for the "Operating Temperature Range", s above those listed in the Table "Absolute Maximum Ratin 1. rating tresses may cause permanent damage to the device. These are stress ratings only and operation of the device at these conditions above those indicated in the Operating sections of is plied. Exposure to Absolute Maximum ification this spec not im Rating conditions for extended periods device reliability. to the SGS-THOMSON SURE Program and other may affect Refer also relevant quality documents. 2. MIL-STD-883C, 3015.7 (100pF, 1500 ). 3. EIAJ IC-121 (Condition C) (200pF, 0 ). 2 C the I The memories are compatible with standard, two wire serial interface which uses a The ST24/25x08 are 8K bit electrically tional data bus and serial clock. The me erasable carry a built-in 4 bit, unique device ide programmable memories (EEPROM), organized code (1010) corresponding 2C bus definito the I as 4 blocks of 256 x 8 bits. They are manufactured in SGS-THOMSON s Hi-Endurance Advanced tion. This is used together with 1 chip en CMOS technology which guarantees an endur- so that up to 2 x 8K devices may be a (E) 2 bus ance of one million erase/write cycles with a Cdata and selected individually. The m to the I 2 C protocol ries behave as a slave device in the I retention of 40 years. The memories operate with with all a power supply value as low as 1.8V for the memory operations synchronized b serial clock. Read and write operations are ST24C08R only. Both Plastic Dual-in-Line and Plastic Small a START condition generated by the bus ma line by Out The START condition is followed by a strea packages are available. bits (identification code 1010), plus one bit and terminated by an acknowledge bit.

DESCRIPTION (cont d)

51

PT 95 Service Manual

ST24/25C08, ST24C08R, ST24/25W08
Table 3. Device Select Code
Device Code Bit Device Select b7 1 b6 0 b5 1 b4 0 Chip Enable b3 E Block Select b2 A9 b1 A8 RW b0 W R

Note: The MSB b7 is sent first.

Table 4.

(1) Operating Modes

Mode Current Address Read Random Address Read Sequential Read Byte Write
(2) Multibyte Write

R W bit 1 0 1 1 0 0 0

MODE X X X X V IH
IL

Bytes 1 1

Initial Sequence START, Device Select, R W = 1 W START, Device Select,= R 0 , Address, reSTART, Device Select, 1 W = R

1 to 1024 1 8

Similar to Current or Random Mode START, Device Select, R W = 0

START, Device Select, R 0 W = START, Device Select, R 0 W =

Page Write

V

16

Notes: X = IH or IL 1. V V 2. Multibyte Write not available in ST24/25W08 versions.

When writing data to the memory it responds toother open drain or open collector sig with the 8 bits received by asserting an acknowledge bitA resistor must be connected from t the bus. during the 9th bit time. When data is read by the to act as pull up (see Figure 3 bus line to V CC bus master, it acknowledges the receipt of the data Chip Enable (E). This chip enable input is used bytes in the same way. Data transfers are termiset one least significant bit (b3) of the de nated with a STOP condition. byte code. This input may be driven dynamica In tied to V or SS to establish the device sel Power On Reset:CC lock out write protect. V V CC order to prevent data corruption and inadvertent code. write operations during power up, a Power On Protect The Reset (POR) circuit is implemented. Until the V Enable (PRE). PRE input pin, in ad CC dition to the status of the Block Address P voltage has reached the POR threshold value, the internal reset is active, all operations(b2, disabled 3FFh as in Figure 7), sets t are location write protection active. and the device will not respond to any command. In the same way, when drops down from the V CC Mode (MODE). The MODE input is available on p operating voltage to below the POR thresholdalso feature) and may be driven dynami 7 (see WC value, all operations are disabled and the device must be or IH for the Byte Write cally. It V IL at V will not respond to any command. A stable V V for Multibyte Write mode orPage CC V mode, IH IL for must be applied before applying any logic signal. Write mode. When unconnected, the MODE inpu is internally read as a V IH (Multibyte Write mode). Write Control ( An hardware Write Control WC). SIGNAL DESCRIPTIONS WC) feature is offered only for ST24W08 ( Serial Clock (SCL). SCL input pin is used to The ST25W08 versions on pin 7. This feature is synchronize all data in and out of the memory. A to protect the contents of the memory fro resistor can be connected from the SCL line to V CC erroneous erase/write cycle. The Write Contr to act as a pull up (see Figure 3). nal is used to enable VIH) or disable =( WC = ( WC Serial Data (SDA). SDA pin is bi-directional The ) V IL the internal write protection. When WC and is used to transfer data in or out of nected, the input is internally read as V the memory. IL and It is an open drain output that mayed wire-O R be the memory area is not write protected.

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TDA 16846

pos: IP01

Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction
Features Description
The TDA 16846 is optimised to control free running or fixed frequency flyback converters with or without Power Factor Correction (Current Pump). To provide low power consumption at light loads, this device reduces the switching frequency continuously with load, towards an adjustable minimum (e. g. 20 kHz in standby mode). Additionally, the start up current is very low. To avoid switching stresses of the power devices, the power transistor is always switched on at minimum voltage. A special circuit is implemented to avoid jitter. The device has several protection functions: V CC over- and undervoltage, mains undervoltage, current limiting and 2 free usable fault comparators. Regulation can be done by using the internal error amplifier or an opto coupler feedback (additional input). The output driver is ideally suited for driving a power MOSFET, but it can also be used for a bipolar transistor. Fixed frequency and synchronized operation are also possible. The TDA 16846 is suited for TV-, VCR- sets and SAT receivers. It also can be good used in PC monitors. The TDA 16847 is identical with TDA 16846 but has an additional power measurement output (pin 8) which can be used for a Temporary High Power Circuit.

· Line Current Consumption with PFC · Low Power Consumption · Stable and Adjustable Standby Frequency · Very Low Start-up Current · Soft-Start for Quiet Start-up · Free usable Fault Comparators · Synchronization and Fixed Frequency Facility · Over- and Undervoltage Lockout · Switch Off at Mains Undervoltage · Temporary high power circuit (only TDA 16847) · Mains Voltage Dependent Fold Back Point Correction · Continuous Frequency Reduction with Decreasing Load · Adjustable and Voltage Dependent Ringing Suppression Time

Pin Configuration (top view)
U
14 13 12 11 10 9 8

Pin Definitions and Functions
Pin Symbol OTC PCS RZI SRC OCI FC2 SYN N.C./PMO REF FC1 PVC GND OUT VCC Function Off Time Circuit Primary Current Simulation Regulation and Zero Crossing Input Soft-Start and Regulation Capacitor Opto Coupler Input Fault Comparator 2 Synchronization Input Not Connected (TDA16846) Reference Voltage and Current Fault Comparator 1 Primary Voltage Check Ground Output Supply Voltage 1 2

DTC PCS RZI SRC OCI FC2 SYN

1 2 3 4 5 6 7

VCC OUT GND PVC FC1 REF N.C./PMO

3 4 5 6 7 8 9 10 11 12 13 14

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Short Description of the Pin Functions

Pin 1

Functions A parallel RC-circuit between this pin and ground determines the ringing suppression time and the standby-frequency. A capacitor between this pin and ground and a resistor between this pin and the positive terminal of the primary elcap quantifies the max. possible output power of the SMPS. This is the input of the error amplifier and the zero crossing input. The output of a voltage divider between the control winding and ground is connected to this input. If the pulses at pin 3 exceed a 5 V threshold, the control voltage at pin 4 is lowered. This is the pin for the control voltage. A capacitor has to be connected between this pin and ground. The value of this capacitor determines the duration of the softstart and the speed of the control. If an opto coupler for the control is used, it's output has to be connected between this pin and ground. The voltage divider at pin 3 has then to be changed, so that the pulses at pin 3 are below 5 V. Fault comparator 2: If a voltage > 1.2 V is applied to this pin, the SMPS stops. If fixed frequency mode is wanted, a parallel RC circuit has to be connected between this pin and ground. The RC-value determines the frequency. If synchronized mode is wanted, sync pulses have to be fed into this pin. Not connected (TDA16846). / This is the power measurement output of the Temporary High Power Circuit. A capacitor and a RC-circuit has to be connected between this pin and ground. Output for reference voltage (5 V). With a resistor between this pin and ground the fault comparator 2 (pin 6) is enabled. Fault comparator i: If a voltage > 1 V is applied to this pin, the SMPS stops. This is the input of the primary voltage check. The voltage at the anode of the primary elcap has to be fed to this pin via a voltage divider. If the voltage of this pin falls below 1 V, the SMPS is switched off. A second function of this pin is the primary voltage dependent fold back point correction (only active in free running mode). Common ground. Output signal. This pin has to be connected across a serial resistor with the gate of the power transistor. Connection for supply voltage and startup capacitor. After startup the supply voltage is produced by the control winding of the transformer and rectified by an external diode.

2

3

4

5

6 7

8

9

10 11

12 13

14

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TDA16846 Block Diagrams
PVC D4 SYN KSY R7 5V 30k R8 R6 R3 1.5V R4 Fold Back Point Correction R6x1/3 11 Primary Voltage Check 1V

+

PVA

D5

+

+

15k 75k Control Voltage Limit 5V OTC 1 CS1 Off Time Comparator G1 1 ED2 RSTC/RSTF Eror Amplifier RZI 3 D2

­ 3.5V + VCC 9 8 G4 1 R2 ErrorFlipflop S Q R 6 + ­ FC2 1.2V REF N.C. FC2

+ -

3.5V

5V

+ D3 Buffer for Control Voltage

4 SRC OCI 5

+ + R1 20k



On Time Comparator

& S G2 I1 Q R

G3 &

Output Driver 13 OUT

2 PCS

5V

+



ED1 1.5V D1 Startup Diode 14 12 16V <25mV Overvoltage Comparator Supply Voltage Comparator FC1 1V Zero Crossing Signal

VCC GND

+ -

15.8V

+ -

10

+

1) The input with the lower voltage becomes operative

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PT 95 Service Manual

LM317
1.2V TO 37V Voltage Regulator
GENERAL DESCRIPTION
The LM117 series of adjustable 3-terminal positive voltage regulators is capable of supplying in excess of 1.5A over a 1.2V to 37V output range. They are exceptionally easy to use and require only two external resistors to set the output voltage. Further, both line and load regulation are better than standard fixed regulators. Also, the LM117 is packaged in standard transistor packages which are easily mounted and handled. In addition to higher performance than fixed regulators, the LM117 series offers full overload protection available only in IC's. Included on the chip are current limit, thermal overload protection and safe area protection. All overload protection circuitry remains fully functional even if the adjustment termi-nal is disconnected. Normally, no capacitors are needed unless the device is situ-ated more than 6 inches from the input filter capacitors in which case an input bypass is needed. An optional output capacitor can be added to improve transient response. The adjustment terminal can be bypassed to achieve very high ripple rejection ratios which are difficult to achieve with stan-dard 3-terminal regulators. Besides replacing fixed regulators, the LM117 is useful in a wide variety of other applications. Since the regulator is "floating" and sees only the input-to-output differential volt- age, supplies of several hundred volts can be regulated as long as the maximum input to output differential is not ex-ceeded, i.e., avoid short-circuiting the output. Also, it makes an especially simple adjustable switching regulator, a programmable output regulator, or by connecting a fixed resistor between the adjustment pin and output, the LM117 can be used as a precision current regulator. Sup-plies with electronic shutdown can be achieved by clamping the adjustment terminal to ground which programs the out-put to 1.2V where most loads draw little current. For applications requiring greater output current, see LM150 series (3A) and LM138 series (5A) data sheets. For the negative complement, see LM137 series data sheet.

FEATURES
q q q q q q q q q

Guaranteed 1% output voltage tolerance (LM317A) Guaranteed max. 0.01%/V line regulation (LM317A) Guaranteed max. 0.3% load regulation (LM117) Guaranteed 1.5A output current Adjustable output down to 1.2V Current limit constant with temperature P + Product Enhancement tested 80 dB ripple rejection Output is short-circuit protected

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LM358 Dual Operational Amplifier
FEATURES
· INTERNALLY FREQUENCY COMPENSATED · LARGE DC VOLTAGE GAIN : 100dB · WIDE BANDWIDTH (unity gain) : 1.1MHz (temperature compen sated) · VERY LOW SUPPLY CURRENT/OP (500mA) ­ESSENTIALLY INDEPENDENT OF SUPPLY VOLTAGE · LOW INPUT BIAS CURRENT : 20nA (temperature compensated) · LOW INPUT OFFSET VOLTAGE : 2mV · LOW INPUT OFFSET CURRENT : 2nA · INPUT COMMON-MODE VOLTAGE RANGE INCLUDES GROUND · DIFFERENTIAL INPUT VOLTAGE RANGE EQUAL TO THE POWER SUPPLY VOLTAGE · LARGE OUTPUT VOLTAGE SWING 0V TO (VCC ­ 1.5V)

pos: I060
PIN CONNECTIONS

1 2 3 +

1 2 3 4

- Output 1 5 - Non-inverting input 2 - Inverting input 1 6 - Inverting input 2 - Non-inverting input7 1 Ouput 2 - CC V 8 - CC + V

DESCRIPTION
These circuits consist of two independent, high gain, internally frequency compensated which were designed specifically to operate from a single power supply over a wide range of voltages. The low power supply drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, dc gain blocks and all the conventional op-amp circuits, which now can be

more easily implemented in single power supply systems. For example, these circuits can be directly supplied with the standard + 5V, which is used in logic systems and will easily, provide the required interface electronics without requiring any additional power supply. In the linear mode the input common-mode voltage range includes ground and the output voltage can also swing to ground, even though operated from only a single power supply voltage.

LM7805 pos: IP03 3-Terminal 1A Positive Voltage Regulator
Features
· · · · · Output Current up to 1A Output Voltage of 5,6,8,9,10,12,15,18,24 V Thermal Overload Protection Short Circuit Protection Output Transistor Safe Operating Area Protection

Description
The MC78XX/LM78XX/MC78XXA series of three terminal positive regulators are available in the TO-220/DPAK package and with several fixed output voltages, making them useful in a wide range of applications. Each type employs internal current limiting, thermal shutdown and safe operating are protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1 A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltages and currents.

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