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A B C D E
Model Name : Z5WE3/Z5WT3
File Name : LA-A621P
1 1
2
Compal Confidential 2
EA50_BM UMA M/B Schematics Document
Intel Bay Trail M
3 3
2013-09-03
REV:0.3
4 4
PCB@
ZZZ PCB 12R LA-A621P REV0 M/B Security Classification Compal Secret Data Compal Electronics, Inc.
2013/04/12 2014/04/12 Title
Part Number Description Issued Date Deciphered Date Cover Page
DA60012W000 PCB 12R LA-A621P REV0 M/B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Bay Trail M LA-A621P
Date: Tuesday, September 03, 2013 Sheet 1 of 37
A B C D E
A B C D E
204pin DDR3L-SO-DIMM X1
port 0 port 1 P.14
Memory BUS
XDP-SFF-26Pin Dual Channel
1
HDMI Conn. eDP Conn. Debug 1
1.35V DDR3L 1066/1333
Conn. P.13 204pin DDR3L-SO-DIMM X1
P.17 P.16 P.15
DDI x2
VGA x1
CRT Conn. USB2.0 x4 port 0 port 1 port 2 port 3
P.18
PCIE x4 VALLEYVIEW-M USB3.0 x1
USB 3.0 USB HUB Touch Panel HD Camera
Conn P.22 FE1.1s(STT) Conn. Conn.
port 0 port 1 P.22 P.16 P.16
2 2
LAN(GbE) WLAN SOC
RTL8411-CG MINI CARD
P.19 P.20
FCBGA 1170 Pin
SATA II x2 HD Audio USB 2.0 USB 2.0 BT
HDA Codec MINI CARD
port 1 port 0 ALC3225 Conn P.22 Conn P.22 P.20
Card Reader page 06~13 P.25
2 in 1
(SD/MMC) SATA ODD SATA HDD LPC BUS SPI Sub Board
P.19 Conn. Conn. Speaker Int. MIC
P.21 P.21
P.25 P.25
3
SPI ROM 3
EC 1.8V (8MB)
TPM ENE KB9012 P.08 Combo Jack
P.25
P.25 P.23
RTC CKT.
P.08 Touch Pad Int.KBD
P.24 P.24
DC/DC Interface CKT.
P.26
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Power Circuit DC/DC LED/Power On/Off Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
Block Diagrams
P.28~P.36 P.24 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 2 of 37
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A B C D E
Voltage Rails Board ID / SKU ID Table for AD channel
Power Plane Description S0 S3 S4/S5 Vcc 3.3V +/- 5%
VIN 19V Adapter power supply ON ON ON Ra/Rc/Re 100K +/- 5%
BATT+ 12V Battery power supply ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 0 0 V 0 V 0 V
1 1
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+RTCVCC RTC Battery Power ON ON ON 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.0VALW +1.0v Always power rail ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.8VALW +1.8v Always power rail ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+3VALW +3.3v Always power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5.0v Always power rail ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
+1.35V +1.35V power rail for DDR3L ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF BOARD ID Table
+SOC_VNN GFX voltage for SOC ON OFF OFF
Board ID PCB Revision BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.0VS +1.0v system power rail ON OFF OFF
0 Item BOM Structure
2
OFF OFF
1 Unpop @ 2
+1.05VS +1.05v system power rail ON
OFF OFF
2 Connector CONN@
+1.35VS +1.35v system power rail ON
OFF OFF
3 XDP (Debug Port) XDP@
+1.5VS +1.5v system power rail ON
+1.8VS +1.8v system power rail ON OFF OFF
4 EMC requirement EMC@
+3VS +3.3v system power rail ON OFF OFF
5 EMC requirement unpop @EMC@
+5VS OFF OFF
6 TPM TPM@
+5.0v system power rail ON
Touch Screen TS@
R short RS@
Test Point TEST@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
3 3
EC SM Bus1 address EC SM Bus2 address 43 level BOM table
Device Address Device Address
43 Level Description BOM Structure
Smart Battery 0001 011X b
4319QPBOL01 SMT MB AA621 Z5WE3 BTM 1.67G HDMI DBG@/EMC@/TS@/XDP@/B0@
4319QPBOL02 SMT MB AA621 Z5WE3 N2910 1.67G HDMI DBG@/EMC@/TS@/XDP@/N2910@
SOC SM Bus address 4319QPBOL03 SMT MB AA621 Z5WE3 N3510 2.16G HDMI DBG@/EMC@/TS@/XDP@/N3510@
Device Address
4319QPBOL04 SMT MB AA621 Z5WE3 N2910 B2 1.67G HDMI DBG@/EMC@/TS@/XDP@/N2910B2@
SO-DIMM A (JDIMM1) A0h
SO-DIMM B (JDIMM2) A2h
USOC1 USOC1 USOC1
N2910@ N3510@ N2910B2@
S IC FH8065301546401 QF9D B1 1.67G ABO! S IC FH8065301546300 QF9E B1 2.16G ABO! S IC FH8065301546402 QFH0 B2 1.6G ABO!
4 Part Number = SA000072B20 Part Number = SA000075O10 Part Number = SA000072B60 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 3 of 37
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5 4 3 2 1
Z5WE3_DVT Power Sequence AC mode
2013-08-08
BIOS:v0.05
EC:v0.05 G3->S0 S0->S3 S3->S0 S0->S5
ACIN
ACIN
+3VLP
+3VLP
EC_ON
EC_ON 1.53ms
D D
+3VALW
+3VALW 1.58ms
+5VALW
+5VALW
SPOK
SPOK 7.28ms
+1.0VALW
+1.0VALW 8.23ms
+1.8VALW
+1.8VALW
ON/OFF
ON/OFF 95.38ms
101ms EC_RSMRST#
EC_RSMRST#
101ms PBTN_OUT#
PBTN_OUT#
102ms
EC_SLP_S4#
EC_SLP_S4#
102ms
EC_SLP_S3#
EC_SLP_S3#
222ms 204ms
SYSON
SYSON 0.6ms
3.29ms
+1.35V
C
+1.35V 1.71ms
C
3.29ms
33.68ms DDR_PWROK
DDR_PWROK 21ms 22.32ms 36.20ms
VR_ON
VR_ON 2.49ms 2.50ms
8.85ms 9.81ms
+SOC_VCC
+SOC_VCC 2.50ms 2.50ms
10.55ms 11.5ms
+SOC_VNN
+SOC_VNN 0.28ms 279us
VGATE
VGATE 42.56ms
263ms 11.71ms 5.57ms
SUSP#
SUSP# 31.28us 31.12us
2.56ms 2.18ms
+1.0VS
+1.0VS 1.30ms 1.29ms
1.56ms 1.52ms
+1.05VS
+1.05VS 1.84ms 1.83ms
8ms 8.12ms
+1.35VS
+1.35VS 2.79ms 2.8ms
10.71ms 10.71ms
+1.5VS
+1.5VS 2.11ms 2.08ms
16.59ms 16.63ms
+1.8VS
+1.8VS 3.77ms 3.77ms
15.31ms 15.34ms
+3VS
+3VS 4.41ms 4.41ms
B 20.48ms 20.27ms B
+5VS
+5VS 12.83ms 12.77ms
19.61ms 19.60ms
+0.675VS
+0.675VS 49.83ms 49.87ms
148.3ms
144ms KBRST#
KBRST# 110ms 110ms
11.71ms
PMC_CORE_PWROK
PMC_CORE_PWROK 110ms 110ms
11.71ms
DDR_CORE_PWROK
DDR_CORE_PWROK 116ms 116ms
584ms 8.8ms SUSP#
PMC_PLTRST#
PMC_PLTRST#
2.38ms
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
2013/04/12 2014/04/12 Title
Issued Date Deciphered Date Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, September 03, 2013 Sheet 4 of 37
5 4 3 2 1
5 4 3 2 1
D D
USOC1A USOC1B
<14> DDR_A_MA[0..15] DDR_A_MA0 DDR_A_D0 DDR_A_D[0..63] <14> <15> DDR_B_MA[0..15] DDR_B_MA0 DDR_B_D0 DDR_B_D[0..63] <15>
K45 M36 AY45 BG38
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 DDR_B_MA1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40 DDR_B_D1
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 DDR_B_MA2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42 DDR_B_D2
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 DDR_B_MA3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42 DDR_B_D3
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 DDR_B_MA4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38 DDR_B_D4
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 DDR_B_MA5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36 DDR_B_D5
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 DDR_B_MA6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42 DDR_B_D6
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 DDR_B_MA7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44 DDR_B_D7
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 DDR_B_MA8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32 DDR_B_D8
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 DDR_B_MA9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32 DDR_B_D9
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 DDR_B_MA10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36 DDR_B_D10
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 DDR_B_MA11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37 DDR_B_D11
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 DDR_B_MA12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33 DDR_B_D12
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 DDR_B_MA13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33 DDR_B_D13
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 DDR_B_MA14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37 DDR_B_D14
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 DDR_B_MA15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38 DDR_B_D15
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36 DDR_B_D16
<14> DDR_A_DM[0..7] DDR_A_DM0 G36 DRAM0_DQ_16 G38 DDR_A_D17 <15> DDR_B_DM[0..7] DDR_B_DM0 BD38 DRAM1_DQ_16 AT36 DDR_B_D17
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 DDR_B_DM1 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40 DDR_B_D18
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 DDR_B_DM2 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40 DDR_B_D19
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 DDR_B_DM3 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36 DDR_B_D20
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 DDR_B_DM4 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36 DDR_B_D21
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 DDR_B_DM5 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42 DDR_B_D22
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 DDR_B_DM6 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40 DDR_B_D23
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 DDR_B_DM7 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41 DDR_B_D24
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41 DDR_B_D25
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45 DDR_B_D26
<14> DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 DDR_A_D27 <15> DDR_B_RAS# AV44 DRAM1_RAS# DRAM1_DQ_26 BH46 DDR_B_D27
<14> DDR_A_CAS# DRAM0_CAS# DRAM0_DQ_27 DDR_A_D28 <15> DDR_B_CAS# DRAM1_CAS# DRAM1_DQ_27 DDR_B_D28
H51 C40 BB51 BG40
<14> DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 B40 DDR_A_D29 <15> DDR_B_WE# DRAM1_WE# DRAM1_DQ_28 BH40 DDR_B_D29
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48 DDR_B_D30
<14> DDR_A_BS0 DRAM0_BS_0