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CCS Technical Documentation
RH-3 Series Transceivers
Troubleshooting -- BB
Issue 1 06/2003 Confidential Nokia Corporation
RH-3
Troubleshooting -- BB CCS Technical Documentation
Page 2 Nokia Corporation Confidential Issue 1 06/2003
RH-3
CCS Technical Documentation Troubleshooting -- BB
Contents
Page No
Baseband Troubleshooting............................................................................................. 5
RH-3 Baseband Module Overview ..............................................................................5
HW Architecture ..........................................................................................................6
Flash programming ......................................................................................................6
Connections to Baseband .......................................................................................... 6
Baseband Power Up .................................................................................................. 6
Flash Programming Indication .................................................................................. 6
Flashing ..................................................................................................................... 7
Power Up and Reset .................................................................................................. 9
Power up with PWR key ......................................................................................... 11
Power up when charger is connected ...................................................................... 11
RTC alarm power up ............................................................................................... 12
Power off ...................................................................................................................12
Power Consumption and Operation modes ...............................................................12
Power Distribution .....................................................................................................13
Clock Distribution .....................................................................................................14
RFClk (19.2 MHz Analog)...................................................................................... 14
RFConvClk (19.2 MHz digital) .............................................................................. 15
CBUSClk Interface ....................................................................................................15
DBUSClk Interface ................................................................................................. 16
SLEEPClk (Digital)................................................................................................. 17
SLEEPClk (Analog)................................................................................................ 17
Charging operation ....................................................................................................18
Battery ..................................................................................................................... 18
Charging circuitry ................................................................................................... 18
Charger Detection ................................................................................................... 19
Charge Control ........................................................................................................ 20
Audio .........................................................................................................................20
Display and Keyboard ...............................................................................................20
Accessory ...................................................................................................................21
Test Points .................................................................................................................22
Troubleshooting .........................................................................................................23
Top troubleshooting map ...........................................................................................24
Phone is totally dead ............................................................................................... 26
Flash programming doesn`t work ........................................................................... 27
Power doesn`t stay on or the phone is jammed....................................................... 29
Charger .................................................................................................................... 31
Audio faults ............................................................................................................. 32
Display faults........................................................................................................... 36
Keypad faults........................................................................................................... 38
Issue 1 06/2003 Nokia Corporation Confidential Page 3
RH-3
Troubleshooting -- BB CCS Technical Documentation
Page 4 Nokia Corporation Confidential Issue 1 06/2003
RH-3
CCS Technical Documentation Troubleshooting -- BB
Baseband Troubleshooting
RH-3 Baseband Module Overview
The Baseband module of the RH-3 transceiver is a CDMA dual-band engine. The base-
band architecture is based on the other CDMA DCT4 phones, including NHP-2 and
NPD-1, with a few modifications to support the RH-3 specific features (the new Path-
finder RF and GPS, which is reused from the NPD-4 program).
RH-3 cellular baseband consists of three ASICs: Universal Energy Management (UEM),
Universal Phone Processor (UPP), and FLASH 64Megabit. There is a fourth BB ASIC imple-
menting the GPS receiver in the phone.
The baseband architecture supports a power-saving function called sleep mode. This
sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and
baseband. During the sleep mode, the system runs from a 32 kHz crystal and all the RF
regulators (VR1A, VR1B, VR2, ... VR7) are off. The sleep time is determined by network
parameters. Sleep mode is entered when both the MCU and the DSP are in standby mode
and the normal VCTCXO clock is switched off. The phone is waken up by a timer running
from this 32 kHz clock supply. The period of the sleep/wake up cycle (slotted cycle) is
1.28N seconds, where N= 0, 1, 2, depending on the slot cycle index.
RH-3 supports standard Nokia 2-wire and 3-wire chargers (ACP-x and LCH-x). However,
the 3-wire chargers are treated as 2-wire chargers. The PWM control signal for control-
ling the three-wire charger is ignored. UEM ASIC and EM SW control charging.
BL-5C Li-ion battery is used as main power source for RH-3. BL-5C belongs to the new
family of Lynx batteries. One of the biggest differences between the Lynx and the older
batteries is that the temperature sensor for the battery has been removed from the bat-
terypck and is placed in the phone. BL-5C has nominal capacity of 850 mAh.
RH-3 supports Tomahawk accessories. The system connector for the RH-3 phones is
14-pin Tomahawk connector. The accessories supported include headset (HDB-4), loopset
(LPS-4), HF Basic Car Kit (BHF-1), advanced Car Kit (CarK-126), data cable (DKU-5), and
the data/Flash cable (DKU-5F). The detection is based on the digital ID read from the
accessories. For detail information, please refer HDca2 BB module specification
(DHX01477-EN).
Issue 1 06/2003 Nokia Corporation Confidential Page 5
RH-3
Troubleshooting -- BB CCS Technical Documentation
HW Architecture
RH-3 Dual Band CDMA + GPS
GPS antenna
PA_TEMP
TX_GATE
VR2 Vbat
TX RF AGC PDM
D0 TX IF AGC PDM Gophers GPS
D1 RX IF AGC PDM
Dc-DC module
D2 Converter
RFBus
Buffered 19.2 MHz
DET_ref
P_DET
PATemp VIO VR3 VR7 3
Power
Timestamp
GPS_INT_UCLK
Detector
GPS EN RESET
D0-3
GPS RX
GPS TX
Tx_gate VR1A/B to VR7
Vdc-dc PCS RF
PA EN
SAW Microphone
Earpiece
Shamu SPDT 2
4
4
3
PCS PA 19.2MHz
Vibra
VCTCXO 2 VCore
JEDI_B Buzzer
CELL/PCS: Modulator,
Isolator
AFC_DAC SleepClk
CELL RF SAW Upconverter, Driver PWR_OUT
Orca 3
CBus
Cell PA VHF PLL DBus
3
UHF PLL RFConvClk
PCS VHF VCO TxIQ 2 TxIQD
FIL_SEL1 & 2 RxIQ 4
Duplexer 2 Det_Buffer UEM 2 RxIQD
4
External 2 AudioConv
Antenna Regulated supplies
Vref1,2 UEMInt
Vbat BSI & IQ Signals
Iref1,2
VBat
PURX UPP8M
AuxDa
Dual Reg BTemp MBus
Internal VR8 & VR9
2 Ostrich
TX VHF LO 2 FBus 3
STIBus
Antenna
2.8-4.2v SIMIF Conn.
3
VR8 VR9 OSC2
32 Khz
CELL UHF PCS UHF OSC1 JTAG
JTAG
VCO VCO UHF_CP VCore 7
Conn.
VIO
Ext
Isolator
Diplexer Vref1/2 SleepX
Conn UHF PCS LO Iref1/2
UHF Cell LO
4
11
3
8
16
9
2
2
2
VIO VR3 VR6 VR7
ExtAdDa[15:0]
ExtAd[23:16]
4 LCDCtrl
2
FlsCtrl
Cell_vco_sel KeyB[10:0]
LS
PCS_vco_sel
SIM 3 LCD/
PCS RF KLight/DLight/CalLED
Charger
Card
XEAR
Keypad
MBus
FBus
XMIC
Cellular
SAW PwrOnX
Duplexer
VR4 VR5
PCS ALFRED VIO
YODA
LNA, RFA,
183.6 IF IFVGA, IQ Demod, 2 2
mixer & IFA
BB Filters, VHF VCO
Cellular & VHF PLL
Flash
Headset Tomahawk
connector connector
CELL RF
SAW RX VHF
LO
PCS/CELL_SEL
Rx_SW2
Rx_SW 1
Figure 1: RH-3/RH-3P Top-level Diagram
Flash programming
Connections to Baseband
The Flash programming equipment is connected to the baseband using test pads for gal-
vanic connection. The test pads are allocated in such a way that they can be accessed
when the phone is assembled. The flash programming interface uses the VPP, FBUSTX,
FBUSRX, MBUS, and BSI connections for the connection to the baseband. The connection
is through the UEM, which means that the logic levels are corresponding to 2.7V. Power
is supplied using the battery contacts.
Baseband Power Up
The baseband power is controlled by the flash prommer in production and in re-pro-
gramming situations. Applying supply voltage to the battery terminals the baseband will
power up. Once the baseband is powered, flash-programming indication is done as
described in the following section.
Flash Programming Indication
Flash programming is indicated to the UPP using MBUSRX signal between UPP and UEM.
The MBUS signal from the baseband to the flash prommer is used as clock for the syn-
chronous communication. The flash prommer keeps the MBUS line low during UPP boot
to indicate that the flash prommer is connected. If the UPP MBUSRX signal is low on
UPP, the MCU enters flash programming mode. In order to avoid accidental entry to the
flash-programming mode, the MCU only waits for a specified time to get input data from
the flash prommer. If the timer expires without any data being received, the MCU will
Page 6 Nokia Corporation Confidential Issue 1 06/2003
RH-3
CCS Technical Documentation Troubleshooting -- BB
continue the boot sequence. The MBUS signal from UEM to the external connection is
used as clock during flash programming. This means that flash-programming clock is
supplied to UPP on the MBUSRX signal.
The flash prommer indicates the UEM that flash programming/reprogramming by writing
an 8-bit password to the UEM. The data is transmitted on the FBUSRX line and the UEM
clocks the data on the FBUSRX line into a shift register. When the 8 bits have been
shifted in the register, the flash prommer generates a falling edge on the BSI line. This
loads the shift register content in the UEM into a compare register. If the 8 bits in the
compare registers matches with the default value preset in the UEM, the flash prommer
shall pull the MBUS signal to UEM low in order to indicate to the MCU that the flash
prommer is connected. The UEM reset state machine performs a reset to the system,
PURX low for 20 ms. The UEM flash programming mode is valid until MCU sets a bit in
the UEM register that indicates the end of flash programming. Setting this bit also clears
the compare register in the UEM previously loaded at the falling edge of the BSI signal.
During the flash programming mode the UEM watchdogs are disabled. Setting the bit
indicating end of flash programming enables and resets the UEM watchdog timer to its
default value. Clearing the flash programming bit also causes the UEM to generate a
reset to the UPP.
The BSI signal is used to load the value into the compare register. In order to avoid spuri-
ous loading of the register, the BSI signal will be gated during UEM master reset and dur-
ing power on when PURX is active. The BSI signal should not change state during normal
operation unless the battery is extracted; in this case, the BSI signal will be pulled high,
note a falling edge is required to load the compare register.
Flashing