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ES1688 AudioDrive® Product Brief
DESCRIPTION
The ES1688 AudioDrive is a mixed-signal single-chip solution that adds 16-bit stereo sound and FM music synthesis to personal computers. It includes an embedded microprocessor, a 20-voice ESFMTM music synthesizer, 16-bit stereo wave ADC and DAC, 16bit stereo music DAC, MPU-401 UART mode serial port, two serial port interfaces to external DSP and external wavetable music synthesizer, DMA control logic with FIFO, and ISA bus inferface logic. There are three stereo inputs (typically line, CD Audio, and auxiliary line) and a mono microphone input to an internal preamp. All of this on a single chip that can be designed into a motherboard, add-on card, or integrated into other peripheral cards such as Fax/Modem, VGA, LAN, I/O, etc. The ES1688 AudioDrive® can record, compress, and play back voice, sound, and music with built-in 6-channel mixer controls. Using two high-performance DMA channels, the ES1688 supports full-duplex analog operation for simultaneous record and playback. The ESFMTM synthesizer has extended capabilities within native mode operation providing superior sound and power-down capabilities. The ES1688 is register compatible to OPL3TM. The MPU-401 serial port is for interfacing with an external MIDI device. The PC speaker volume can be modified by software. Two software address selection modes allow for motherboard Plug and Play configuration. A DSP serial interface allows an external DSP to take over DAC or ADC resources. A wavetable serial port allows the ES1688 to interface with either the ES689 or ES690 wavetables. I/O address, DMA, and interrupt selection can be controlled through system software or by jumper. Advanced power management features include suspend/resume from disk or host-independent self-timed power-down and automatic wake-up. The ES1688 AudioDrive is available in an industry-standard 100pin Plastic Quad Flat Pack (PQFP) package.
® ®

FEATURE HIGHLIGHTS
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Single, high-performance, mixed-signal, 16-bit stereo VLSI chip for digital audio High-quality, 20-voice ESFMTM music synthesizer; patents pending Patented ESPCM® compression

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Record and Playback Features
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Record, compress, and play back voice, sound, and music Programmable sample rate from 4 kHz to 44.1 kHz for record and playback Mixer controlled record and playback with programmable logarithmic volume controls

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Inputs and Outputs
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MIDI serial port compatible with MPU-401 UART mode Address decode for joystick Programmed I/O and demand transfer DMA Software address mapping, DMA and IRQ selections for motherboard Plug and Play Wavetable serial port interface to ES689/ES690 for direct access to the music DAC PC speaker input/output with volume control Serial port interface to external DSP optionally controls fullduplex analog operation

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Mixer Features
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6-channel stereo mixer inputs for line, auxiliary A (CD audio), auxiliary B, digital audio (wave files), music synthesizer, plus a mono channel mixer input for microphone 4-channel record mixer with stereo inputs for line, auxiliary A (CD audio), auxiliary B, plus a mono input for microphone

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Power
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APPLICATIONS
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PC Audio PC Games Business Audio Multimedia PCs Music Synthesis

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Advanced power management with self-timed power-down, automatic wake-up, and suspend/resume to and from disk Supports 3.3 or 5.0 V operation

Compatibility
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Supports PC games in Sound BlasterTM and Sound BlasterTM Pro modes Supports FM music synthesis in OPL3 FM mode Supports Microsoft® WindowsTM, Windows NTTM, Windows for WorkgroupsTM, Windows®95 and Windows Sound System® Supports IBM® OS/2®

SERVICE AND SUPPORT
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Evaluation Kit Manufacturing Kit Reference Design
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BLOCK DIAGRAM
ANALOG
MIC LINE_L LINE_R AUXA_L AUXA_R AUXB_L AUXB_R PCSPKI PCSPKO CMR,VREF AOUT_L AOUT_R FDXI FDXO

TYPICAL APPLICATION
ISA Bus
SWITCHED CAPACITOR LOW-PASS FILTER OUTPUT VOLUME AND MUTE CONTROL, RECORD MONITOR
+12v +5V GND .1 GNDD AS1 VDDD VDDA GNDA AUXA_L AUXA_R LINE_L AS0 SCLK XI XO LINE_R .1 MIC CMR VREF REFSEL IRQ(A-E) DRQ(A-C) DACKB(A-C) AEN A[11:0] D[7:0] RESET IORB IOWB FOUT_L CIN_L FOUT_R CIN_R AOUT_L AOUT_R PCSPKO JOYRDB JOYWRB MSI MSO .22 .001 .22 .001 + 47 .1 .1 .1 .22 .22 .22 .22 .1 Mic In CD In Left CD In Right Line In Left Line In Right
+

5 Volt Regulator

RECORDING SOURCE AND INPUT VOLUME CONTROL

7.5K

7.5K 10µF

PC SPEAKER VOL CNTRL REF GEN

16-BIT STEREO GAME DAC/ADC STEREO PROGRAM MABLE MIXER

VDDA GNDA FOUT_L FOUT_R CIN_L CIN_R SE,DCLK DX,DR FSX,FSR MCLK MSD
12

16-BIT STEREO MUSIC DAC

ESFMTM FM MUSIC SYNTHESIZER
CE IORB IOWB RESET RSTB AEN A[11:0] IRQ(A-E) DRQ(A-C) DACK(A-C) AS[1:0] DS[1:0] IS[1:0] AMODE ENB245 JOYRDB JOYWRB GPI,GPO[1:0]

DSP SERIAL PORT WAVETABLE SERIAL PORT

14.31818 MHz

PROGRAMMABLE BUS CONTROLLER

MPU-401 SERIAL PORT AND FIFOs DATA BUFFER WITH 256 BYTE FIFO

MSI MSO

8

to Stereo Power Amp to Game Port MIDI/ MPU-401

D[7:0]
PCSPKI

MICROPROCESSOR PROGRAMMABLE I/O CONTROLLER

ES1688
XI XO SCLK EXTCLK

ROM AND RAM

CLOCK GENERATOR AND TIMER

PINOUT
XI XO VDDD GNDD GNDD VDDD IOWB IORB PCSPKI IRQE IRQA IRQB IRQC IRQD DACKBA DRQA DACKBB DRQB DACKBC GNDD VDDD DRQC MSO GPO0 MSI GPI JOYWRB JOYRDB GNDD VDDD EXTCLK SCLK RESET RSTB GPO1 FSR FSX DCLK DR DX MSD MCLK SE A10 A11 A0 A1 A2 A3 A4
80 51 50

81

ES1688 AudioDrive®

100

1

30

31

PCSPKO FDXO FDXI AOUT_R AOUT_L LINE_R LINE_L CMR VREF CIN_R CIN_L VDDA REFSEL GNDA MIC AUXA_R AUXA_L AUXB_R AUXB_L FOUT_R

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A5 A6 VDDD GNDD A7 A8 A9 AEN CE D0 D1 D2 D3 D4 D5 D6 D7 ENB245 GNDD VDDD AMODE IS0 IS1 AS0 AS1 DS0 DS1 VDDD GNDD FOUT_L

ES1688

DIGITAL PIN DESCRIPTIONS
Name
VDDD GNDD JOYRDB JOYWRB GPO0

I/O
I I O O O

Description
Digital supply voltage (3.0V to 5.5V). Digital ground. Active-low decode for joystick, read from port 201h. Active-low decode for joystick, write to port 201h. Output that is set low by external reset and thereafter controlled by bit 0 of port 2x7h. Available to system software for power management or other applications. Output that is set high by external reset and thereafter controlled by bit 1 of port 2x7h. Available to system software for power management or other applications. MIDI serial input. Either MPU-401 or SoundBlaster formats. Schmitt trigger input with internal pull-up resistor. MIDI serial data output. Reserved general-purpose input with internal pulldown. Currently no function is assigned to this pin and any connection is acceptable. Active-high reset from ISA bus. Inverted RESET output. Clock selection output: 0: Clock from EXTCLK input 1: Clock from crystal connection to pins XI and XO 14.32 MHz clock input from ISA bus. Duty cycle must be 40%-60%. No connection if SCLK=1. Crystal oscillator output. Crystal oscillator input. Input with internal pull-up. Active-high chip enable. When low, all IRQ and DRQ outputs become high impedance, and AEN is forced high internally, thereby disabling the I/O activity to/from the ES1688. Outputs JOYRDB and JOYWRB become inactive high. Leave unconnected or connect to VDD for normal operation. Active-low read strobe from ISA bus. Active-low write strobe from ISA bus. Address inputs from ISA bus. Address inputs from ISA bus. The ES1688 requires these pins to be low for all address decodes. These pins have an internal pull-down device enabled when input signal AMODE=0. In this case they can float (ES688 compatible designs). Active-low address enable from ISA bus. Bidirectional data bus. These pins have weak pull-up devices to prevent these inputs from floating when not driven. Active-low output when the ES1688 is being read or written to. Intended to be connected to the enable control of an external 74LS245. Four (A,B,C,D) active-high interrupt requests to the ISA bus. Unselected IRQ outputs are high impedance. IRQs are software configurable. Active-high interrupt request to the ISA bus. Reserved for MPU-401 or hardware volume control. Three (A,B,C) active-high DMA requests to the ISA bus. Unselected DRQ outputs are high impedance. When DMA is not active, the selected DRQ output has a pull-down device that holds the DRQ line inactive unless another device that shares the same DRQ line can source enough current to make the DRQ line active. DRQs are software configurable. Three (A,B,C) active-low DMA acknowledge inputs from the ISA bus. Normally low digital PC speaker signal input. This signal is converted to an analog signal with volume control and appears on analog output PCSPKO.

Name
DS0, DS1

I/O
I

Description
Inputs with internal pull-down devices. These inputs select the DMA channel selected after external reset:
DS1 0 0 1 1 DS0 0 1 0 1 DRQx/DACKBx No DRQ or DACK DRQA, DACKBA DRQB, DACKBB DRQC, DACKBC Recommended ISA DRQ/DACK ----DRQ0/-DACK0 DRQ1/-DACK1 DRQ3/-DACK3

GPO1

O

MSI

I

DS1=0 and DS0=0 is a special case: no DMA request or interrupt request pin is selected after external reset. Software configuration of interrupt and DMA channels are required. IS0, IS1 I Inputs with internal pull-down devices. These inputs select the default interrupt request pin after external reset (unless DS1=0 and DS0=0):
IS1 0 0 IS0 0 1 0 1 IRQx IRQA IRQB IRQC IRQD Recommended ISA IRQ IRQ9 IRQ5 IRQ7 IRQ10

MSO GPI

O I

RESET RSTB SCLK

I O I

1 1

AMODE

I

EXTCLK XO XI CE

I O I I

Input pin with pull-down device. The ES1688 is disabled following a hardware reset and must be configured by one of two methods (optioned by AMODE) of software address selection: 0: Read-Sequence-Key method 1: System-Control-Register method Inputs with internal pull-down devices. Along with AMODE, these inputs select the I/O address bank or the software address selection technique. They should be jumpered to VDDD or GNDD:
AMODE 0 0 0 0 1 AS1 0 0 1 1 0 0 1 1 AS0 0 1 0 1 0 1 0 1 Function 220 base address 230 base address 240 base address 250 base address 220 base address Read-Sequence-Key address selection 240 base address System-Control-Register address selection

AS0, AS1

I

IORB IOWB A[9:0] A[11:10]

I I I I

1 1 1

AEN D[7:0]

I I/O

DS1=0 and DS0=0 is a special case: no DMA request or interrupt request pin is selected after external reset. Software configuration of interrupt and DMA channels are required. FSR I Input with internal pull-down. Frame sync for receive data from external DSP. Programmable for active-high or active-low. Input with internal pull-down. Frame sync for transmit request from external DSP. Programmable for activehigh or active-low. Input with internal pull-down. Serial data clock from external DSP. Typically 2.048 MHz. Input with internal pull-down. Data receive pin from external DSP. Tri-state output. Data transmit to external DSP. High impedance when not transmitting. Input with internal pull-down. Music serial data from external ES689 or ES690 Wavetable Music Synthesizer. Input with internal pull-down. Music serial clock from external ES689 or ES690 Wavetable Music Synthesizer. Input with internal pull-down. Active-high to enable serial mode, i.e., enables an external DSP to control analog resources of the ES1688 through the DSP serial interface.

ENB245

O

FSX

I

IRQ(A-D)

O

DCLK DR DX MSD

I I O I

IRQE DRQ(A-C)

O O

MCLK

I

DACKB(A-C) PCSPKI

I I

SE

I

Product Brief

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ANALOG PIN DESCRIPTIONS
Name VDDA GNDA MIC LINE_L, LINE_R AUXA_L, AUXA_R I/O I I I I I Description Analog supply voltage (4.5 to 5.5 V). Should be greater than or equal to VDDD-0.3 V. Analog ground. Microphone input. MIC has an internal pullup resistor to CMR. Line inputs left and right. LINE_L, LINE_R have internal pullup resistors to CMR. Auxiliary inputs left and right. AUXA_L, AUXA_R have internal pullup resistors to CMR. Normally intended for connection to an internal or external CD-ROM analog output. Auxiliary inputs left and right. AUXB_L, AUXB_R have internal pullup resistors to CMR. Normally intended for connection to an external music synthesizer or other line-level music source. Normally connected to CMR via an internal resistor. Can be programmed to connect internal to FOUT_R pin during DSP serial mode. Input with internal pullup to CMR. Alternate input to left channel filter stage in DSP serial mode. Filter outputs left and right. AC-coupled externally to CIN_L, CIN_R to remove DC offsets. These outputs have internal series resistors of about 5k ohms. Capacitors to analog ground on these pins can be used to create a low-pass filter pole that removes switching noise introduced by the switched-capacitor filters. Capacitive coupled inputs left and right. These inputs have internal pull-up resistors to CMR of approximately 50k ohms. Reference generator resistor divider output. Should be bypassed to analog ground with 0.1 µF capacitor. Buffered reference output. Should be bypassed to analog ground with a 47 µFelectrolytic capacitor with a 0.1 µF capacitor in parallel. Line-level stereo outputs, left and right. Analog output of PCSPKI with volume control. Option input: Analog GND: normal operation Analog VDD: reserved

DIGITAL CHARACTERISTICS
Symbol VIH1 VIH2 VIL VOL1 Parameter Input high voltage: All except GPI1 Input high voltage: GPI1 Input low voltage Output low voltage: All except D[7:0], DRQx, IRQx Output high voltage: All except D[7:0], DRQx, IRQx Output low voltage: D[7:0], DRQx, IRQx Output high voltage: D[7:0], DRQx, IRQx Output low voltage: Select DRQx when DMA inactive VDDD active 2.4 0.4 60 2.4 Min 2.0 3.0 0.8 0.4 Max Unit V V V V Conditions VDDD=min VDDD=min VDDD=max IOL=4 mA, VDDD=min IOH=-3 mA, VDDD=max IOL=16 mA, VDDD=min IOH=-12 mA, VDDD=max IOL=0.8 mA VDDD=max osc. rate at 14.32 MHz VDDA=max

VOH1

V

VOL2 VOH2 VOL3 ICC1

0.4

V V V mA

AUXB_L, AUXB_R

I

FDXO

O

FDXI FOUT_L, FOUT_R

I O

ICC2

VDDA active

60

mA

ANALOG CHARACTERISTICS
Parameter Reference voltage Input impedance Pins CMR, VREF Min Typ 2.25 Max Unit Volts (VDDA =5.0V) 100k Ohms

CIN_L, CIN_R VREF CMR

I

O O

LINE_L, LINE_R, AUXA_L, AUXA_R, AUXB_L, AUXB_R, MIC CIN_L, CIN_R

30k

35k 3.5k

50k 5k 5k

65k 6.5k

Ohms Ohms Ohms

AOUT_L, AOUT_R PCSPKO REFSEL

O O I

Output impedance

FOUT_L, FOUT_R AOUT_L, AOUT_R max load for full-scale output range MIC LINE_L, LINE_R, AUXA_L, AUXA_R, AUXB_L, AUXB_R AOUT_L, AOUT_R full-scale output range Mic preamp

Input voltage range

10 0.5

125 VDDA -0.5 VDDA -1.0 26

mVp-p Volts

MAXIMUM RATINGS
Rating Analog supply voltage Digital supply voltage Input voltage Operating temperature range Storage temperature range Symbol VDDA VDDD VIN TA TSTG Value -0.3 to 7.0 V -0.3 to 7.0 V -0.3 to 7.0 V 0 to 70 °C -50 to 125 °C

Output voltage range Gain

0.5

Volts dB

BUNDLED SOFTWARE AND DRIVERS
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AudioRackTM Bundled Drivers for: ­ ­ ­ ­ ­ Microsoft Windows 3.1 Microsoft Windows for Workgroups Microsoft Windows NT Microsoft Windows95 IBM OS/2

(P) U.S. Patent 4,214,125 and others, other patents pending. All specifications are subject to change without prior notice. ESPCM® and AudioDrive® are registered trademarks of ESS Technology, Inc. AudioRackTM is a trademark of ESS Technology, Inc. All other trademarks are owned by their respective holders. Document Number: SAM0066 REV: B

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