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Table of Contents

COVER




SAMSUNG X06
Aquila-So Sheet1.
Sheet2. BLOCK DIAGRAM
Sheet3. BOARD INFORMATION
Sheet4. POWER DIAGRAM
Sheet5. POWER ON SEQUENCE
Sheet6. CLOCK DISTRABUTION
CPU : Dothan Sheet7. CLOCK GENERATOR
Sheet8. CPU (1/3)
Sheet9. CPU (2/3)
Chip Set : Intel Alviso + ICH6-M Sheet10. CPU (3/3)
9-1 MAIN BOARD




Sheet11. CPU/DDR THERMAL SENSOR
9-1-1 Schematic Diagrams




Remarks : Internal Gfx. Sheet12. ALVISO (1/5)
Sheet13. ALVISO (2/5)
Sheet14. ALVISO (3/5)
Sheet15. ALVISO (4/5)
Sheet16. ALVISO (5/5)
Sheet17. DDR II SODIMM
Sheet18. DDR II TERMINATIONS
Sheet19. ICH6-M (1/4)
9. Schematic Diagram




Model Name : X06 Sheet20. ICH6-M (2/4)
Sheet21. ICH6-M (3/4)
PBA Name : BA92-03859A Sheet22. ICH6-M (4/4)
Sheet23. CRT CONN
Sheet24. LCD CONN
PCB Code : BA41-00529A Sheet25. FWH
Sheet26. CARDBUS (1/2)
Dev. Step : MP Sheet27. CARDBUS (2/2) & 1394 CONN
Sheet28. PCMCIA / 3 IN 1 CONN
Sheet29. MINIPCI
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Revision : 1.0 Sheet30.
Sheet31.
LOM (1/2)
LOM (2/2)
- This Document can not be used without Samsung's authorization -




Sheet32. AUDIO CODEC
T.R. Date : 2005-6-25 Sheet33. AUDIO AMP
Sheet34. MDC / TPM / FAN / BLUETOOTH / USB
Sheet35. IDE CONN
Sheet36. MICOM
Sheet37. B'D TO B'D CONN
Sheet38. DDR II POWER
DRAW Sheet39. SWITCHED POWER
CHECK APPROVAL Sheet40. MICOM_P3V / P2.5V
Sheet41. CHARGER
Sheet42. CPU POWER
ZHOU JUN Sheet43. VCCP & GMCH POWER
CHEN TAO KEVIN LEE Sheet44. PCB STUFFS
Sheet45. AUDIO SUB BOARD
GUO LEI Sheet46. TESTPOINT




95
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.




FAN CPU Smart
D Mobile Processor DC/DC System DC/DC Charging D
Battery
IMVP-IV Circuit
Dothan(w/533MHz) R 1.3
Module
Clocking CPU
CK-410M Thermistor
EMC6N300
& Yonah
SSDC
L2 Cache : 2 MB
478pin
DDR II
PSB Thermistor
30P Internal Graphics 533 MT/S
DC/DC Module
LVDS Channel A (Standard) DDR II
LCD SODIMM 0
DC/DC GMCH-M Dual channel DDR II 533/400
CRT DDR II
Alviso-GM Channel B (Reverse)
CRT SODIMM 1
1257 FCBGA
TV
TV DDR II
C VRM C
SVHS
Direct Media Interface
x4/x2, 1.5V

USB0
USB 0
USB 1 USB1 33MHz, 3.3V PCI, 32bit
ANT
USB2
Bluetooth
ICH6-M Mini PCI CONN. SD/MS BROADCOM
OPTIONAL USB3 CARDBUS
609 BGA R5C841 CardBus BCM5788M
AC'97 ANT
R5532V002
S/PDIF Finger Print 1394
4 pin
ON TOUCHPAD Wireless LAN
www.kythuatvitinh.com OPTIONAL
EEPROM
RJ45




3.3V LPC, 33MHz
B AUDIO BOARD AUDIO B

SATA PATA
HP AC'97 Codec Primary
MIC-IN AD1981B
FWH MICOM TPM
82802AC Hitachi H8S
HD64F2169/2160
OPTIONAL
2P
SPKR R

3D Touch Scan
AMP Sound Pri. IDE master PAD KBD
2P
SPKR L
HDD
HDD U-ATA 100
SATA 150
30P
MDC
Secondary Sec. IDE slave
RJ11 Modem
A OPTIONAL CD-ROM A
CD / DVD
DRAW DATE TITLE

ZHOU & GUO 6/25/2005
CHECK DEV. STEP
AQUILA-SONOMA SAMSUNG
ANTONIO MP MAIN ELECTRONICS
APPROVAL REV PART NO.

KEVIN LEE 1.0
OPERATION BLOCK DIAGM
BA41-00529A
MODULE CODE LAST EDIT

June 25, 2005 12:21:39 PM PAGE 2 OF 46
4 3 2 1
SAMSUNG X06 9-2
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.




D
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D



External PCI Devices CPU Core Voltage Table
Devices IDSEL# REQ/GNT# Interrupts VID5 VID4 VID3 VID2 VID1 VID0 Voltage VID Hex VID5 VID4 VID3 VID2 VID1 VID0 Voltage VID Hex
Cardbus AD25 0 A,B,C 0 0 0 0 0 0 1.708 V 3F h 1 0 0 0 0 0 1.196 V 1F h
MiniPCI SLOT AD23 1 E,F 0 0 0 0 0 1 1.692 V 3Eh 1 0 0 0 0 1 1.180 V 1E h
LOM AD21 2 G 0 0 0 0 1 0 1.676 V 3Dh 1 0 0 0 1 0 1.164 V 1Dh
0 0 0 0 1 1 1.660 V 3Ch 1 0 0 0 1 1 1.148 V 1Ch
0 0 0 1 0 0 1.644 V 3Bh 1 0 0 1 0 0 1.132 V 1B h
0 0 0 1 0 1 1.628 V 3Ah 1 0 0 1 0 1 1.116 V 1Ah
2 0 0 0 1 1 0 1.612 V 39 h 1 0 0 1 1 0 1.100 V 19 h
I C / SMBus Address 0
- 0
- 0 1 1 1 1.596 V 38 h 1 0
- 0 1 1 1 1.084 V 18 h
Devices Address Hex Bus 0 0 1 0 0 0 1.580 V 37 h 1 0 1 0 0 0 1.068 V 17 h
0 0 1 0 0 1 1.564 V 36 h 1 0 1 0 0 1 1.052 V 16 h
0 0 1 0 1 0 1.548 V 35 h 1 0 1 0 1 0 1.036 V 15 h
ICH6-M Master - SMBUS Master 0 0 1 0 1 1 1.532 V 34 h 14 h
CK-410 (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable 1 0 1 0 1 1 1.020 V
CY25823ZC(Spread Spectrum) 1101 010x D4h 0 0 1 1 0 0 1.516 V 33 h 1 0 1 1 0 0 1.004 V 13 h
- 0 0 1 1 0 1 1.500 V 32 h 1 0 1 1 0 1 0.988 V 12 h
SODIMM0 1010 0000 A0h - 0 0 1 1 1 0 1.484 V 31 h 11 h
SODIMM1 1010 010X A4h - 1 0 1 1 1 0 0.972 V
0 0 1 1 1 1 1.468 V 30 h 1 0 1 1 1 1 0.956 V 10 h
MICOM Master - SMBUS Master 0 1 0 0 0 0 1.452 V 2F h 1 1 0 0 0 0 0.940 V 0F h
0 1 0 0 0 1 1.436 V 2Eh 1 1 0 0 0 1 0.924 V 0E h
C EMC6N300(Thermal Sensor) 0101 111X 5Eh Thermal Sensor 0 1 0 0 1 0 1.420 V 2Dh 0Dh C
BATTERY 0001 011X 16h BATTERY INFORMATION 1 1 0 0 1 0 0.908 V
0 1 0 0 1 1 1.404 V 2Ch 1 1 0 0 1 1 0.892 V 0Ch
0 1 0 1 0 0 1.388 V 2Bh 1 1 0 1 0 0 0.876 V 0B h
0 1 0 1 0 1 1.372 V 2Ah 1 1 0 1 0 1 0.860 V 0A h
HIGHEST FREQ. 0 1 0 1 1 0 1.356 V 29 h 1 1 0 1 1 0 0.844 V 09 h LOWEST FREQ.
-
0 1 0 1 1 1 1.340 V 28 h 1 1 0 1 1 1 0.828 V 08 h
0 1 1 0 0 0 1.324 V 27 h 1 1 1 0 0 0 0.812 V 07 h
USB PORT Assign 0 1 1 0 0 1 1.308 V 26 h 1 1 1 0 0 1 0.796 V 06 h
0 1 1 0 1 0 1.292 V 25 h 1 1 1 0 1 0 0.780 V 05 h
PORT NUMBER ASSIGNED TO 0 1 1 0 1 1 1.276 V 24 h 1 1 1 0 1 1 0.764 V 04 h
0 1 1 1 0 0 1.260 V 23 h 1 1 1 1 0 0 0.748 V 03 h DEEPER SLEEP
0 SYSTEM PORT A 0 1 1 1 0 1 1.244 V 22 h 1 1 1 1 0 1 0.732 V 02 h
1 SYSTEM PORT B 0 1 1 1 1 0 1.228 V 21 h 1 1 1 1 1 0 0.716 V 01 h
2 (OPTION) BLUETOOTH (OPTION) 0 1 1 1 1 1 1.212 V 20 h 1 1 1 1 1 1 0.700 V 00 h
3 (OPTION) FINGER PRINTER (OPTION)




Voltage Rails
VDC
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Primary DC system power supply (7 to 21V) System Power States
VCC_CORE Core voltage for DOTHAN CPU (1.356 - 0.844V)
VTT Processor System Bus(PSB) Termination (1.05V) / MCH-M Core Voltage (1.05V)
P1.5V 1.5V switched power rail (off in S3-S5) Signal SLP_S3# SLP_S4# SLP_S5# +V*ALW +V* +V*S Clocks
B P1.5V_AUX 1.5V power rail (off in S4-S5) B
P0.9V 0.9V power rail (off in S3-S5) S0 (Full On) HIGH HIGH HIGH ON ON ON ON
P1.8V_AUX 1.8V power rail(off in S4-S5)
MICOM_P3V 3.3V always on power rail for MICOM S3-Hot (STR) LOW HIGH HIGH ON ON ON LOW
P3.3V 3.3V switched power rail (off in S3-S5) S3-Cold (STR) LOW HIGH HIGH ON ON OFF OFF
P3.3V_AUX 3.3V power rail (off in S4-S5)
P3.3V_ALWAYS 3.3V power rail (Always [email protected] mode & off in [email protected] mode) S4 (STD) LOW LOW HIGH ON OFF OFF OFF
S5 (Soft Off) LOW LOW LOW ON OFF OFF OFF
P5V 5.0V switched power rail (off in S3-S5)
P5V_AUX 5V power rail (off in S4-S5)
P2.5V 2.5V switched power rail (off in S3-S5)




REVISION HISTORY
A A
See revision notes in the changes file for more information.
DRAW DATE TITLE

ZHOU & GUO 6/25/2005
CHECK DEV. STEP
AQUILA-SONOMA SAMSUNG
ANTONIO MP MAIN ELECTRONICS
APPROVAL REV PART NO.

KEVIN LEE 1.0
BOARD INFORMATION
BA41-00529A
MODULE CODE LAST EDIT

June 25, 2005 12:21:39 PM PAGE 3 OF 46
4 3 2 1
SAMSUNG X06 9-3
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.




D ALWAYS KBC3_SUSPWR KBC3_PWRON KBC3_VRON D

ADAPTOR
BATTERY ALVISO-GM
ICH6-M
P1.5V_AUX P1.5V

ICH6-M




ALVISO-GM Thermal Sensor MICOM
P3.3V_AUX P3.3V ICH6-M SODIMM R5C841
CK410-M FWH MiniPCI
ICH6-M MDC LCD PCMCIA TPM
LAN BT MDC LEDs
P3.3V_ALWAYS EMA(AON)


C ALVISO-GM C
ICH6-M
P2.5V R5C841


BRIDGE
ICH6-M PCMCIA HDD
BATTERY P5V_AUX P5V ODD USB MiniPCI
CRT PS/2
DDR Power MICOM FAN CIRCUIT
R5C841 MDC HEATSINK




VDC P1.8V_AUX
SODIMM (DDR II)
www.kythuatvitinh.com ALVISO-GM



P0.9V DDR II-Termination
B MICOM_P3V B




CPU VCCP
VTT GMCH VCC_MCH




VCC_CORE

DOTHAN533 / YONAH

A A
DRAW DATE TITLE

ZHOU & GUO 6/25/2005
CHECK DEV. STEP
AQUILA-SONOMA SAMSUNG
ANTONIO MP MAIN ELECTRONICS
APPROVAL REV PART NO.

KEVIN LEE 1.0
POWER DIAGRAM
BA41-00529A
MODULE CODE LAST EDIT

June 25, 2005 12:21:39 PM PAGE 4 OF 46
4 3 2 1
SAMSUNG X06 9-4
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.


P5V_AUX
P3.3V_AUX
P1.5V_AUX
D P5V D
P3.3V
P1.5V
P2.5V
(13) VTT P3.3V

+ -
+ - (1-0) PRTC_BAT (14-1) CHP3_PCISTP* CHP3_PCISTP*
HOST CLOCK
(1-1) CHP3_RTCRST* (14-1) CHP3_CPUSTP* CHP3_CPUSTP*
REF CLOCK
BATTERY (2-0) (14-1) CHP3_DPRSLPVR CLK GEN.
VDC PCI CLOCK
RTC BATTERY (14-1) CPU1_SLP* CLK3_PWRGD*
USB CLOCK
(14-1) CPU1_DPSLP*/DPRSLP*
(14-1) CPU1_STPCLK*
ICH6-M (22) CPU1_A20M*/NMI*
(2-1) AD_SEL
AC ADAPTOR (19) CPU1_PWRGDCPU CLK3_PWRGD*
THERMAL P3.3V_AUX
(23-1) CPU1_INIT* KBC3_PWRGD
KBC3_PWRSW*
KBC3_A20G (25-1) CHP3_IVTPWRON SENSOR
A20GATE
KBC3_CPURST* (23-1) FWH3_INIT*
RCIN*
KBC3_IMVP4_PWRGD (21) PLT3_RST*
VRMPWRGD
(21) PCI3_RST* CPU1_SLP*
KBC3_PWRGD CPU1_DPSLP*/DPRSLP*
PWROK
(20) CHP3_SUSSTAT* CPU1_STPCLK*
CPU1_VID(0:5)
CHP3_PWRBTN* (8-1/2)CHP3_SLPS4*/SLPS5* CPU1_A20M*/NMI*
KBC3_RSMRST* (9) CHP3_SLPS3* CPU VTT
CPU1_PWRGDCPU
VCC_CORE
CPU1_INIT*
VDC P1.5V
(24) BIST
C CPU1_CPURST* C
(3-0) MICOM_P3V

LP2951CM-3.3 (3-1) KBC3_RST* KBC3_RST*


CPU1_CPURST* (23-2)
CHP3_SLPS3* CPU1_SLP* (14-1)
P3.3V_AUX VTT
CHP3_SLPS4*/SLPS5* KBC3_IMVP4_PWRGD
P3.3V PWROK P1.8V_AUX
CHP3_SUSSTAT* PLT3_RSTF*
(4-1) KBC3_PWRSW* RSTIN* P1.5V
KBC3_PWRSW* GMCH P2.5V
CHP3_PME* PLT3_RST* LCD2_BKLTON (27-1)
P3.3V
99ms Later LCD2_VDDEN (26-1)
KBC3_RSMRST* (7-1) than 3.3V OK (10-2)CLK3_PWRGD*
POWER SWITCH
CHP3_PWRBTN* (7-2) (21-1)KBC3_BKLTON
MICOM
KBC3_PWRGD (18-1) IMVP4_PWRGD
(12) KBC3_VRON
KBC3_IMVP4_PWRGD (18-2) P3.3V (26-2) VDD_LCD
(5) KBC3_SUSPWR FDS4465
P3.3V_ALWAYS (4-2) CHP3_PME* KBC3_CPURST*