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1 1




Compal Confidential
2 2




QCL70 MB Schematic Document
LA-8222P
3 3




Rev: 1.0
2012.01.09

4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/08/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC A8222
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019G8 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, February 13, 2012 Sheet 1 of 61
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1 2 3 4 5




Compal Confidential
ZZZ1
QCL70
PCB-MB
PCB P/N for Load BOM DDR3 1333/1600MHz 1.5V DDR3-SO-DIMM X 2
BANK 0, 1, 2, 3
A DAZ0NE00100 Mobile +1.5V, +0.75VS A

Dual Channel Page 10, 11

NV N13P-GL / GS PEG 16X Ivy Bridge
(N13M-GE1) Processor
rPGA 988B Socket
Page 4 ~ 9
Page 20 ~ 29 +VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VDDQ, port 5,1
+1.8VS, _VCCSA
USB conn x2
USB Board Page 33
FDI x8
DMI x4
(UMA) 100MHz port 3
100MHz Camera
5GB/s
2.7GT/s Page 30

LCD conn LVDS, EDID, DISPOFF#, PWM USB2.0
Page 30
port 4 Card Reader Memory Card Slot
SD/MMC
RTS5137 Page 34
RGB, HV Sync, DDC Page 34
CRT Conn
B
Page 30 Intel port 10
B


MiniCard-2
HDMI, DDC
PANTHER-POINT Page 41

HDMI PCH
Page 35
port 0,2
USB3.0 conn x2
USB3.0 port 1,3
Page 37
HM76/HM75
Audio Jack (HP)
Page 33

Azalia Realtek
FCBGA 989 Balls ALC269 Page 33 Audio Jack (MIC)
Page 33


Page 12 ~ 19 SATA
2.5" SATA HDD Connector Speaker Connector
port 0 Page 33
C Page 31 C

PCI-e
port 1
+1.05VS, +1.8VS, +3VS, 2.5" SATA HDD Connector
port 1 port 2 +3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM Page 31
LAN/CRT Board Mini Card-1
10/100/1000 LAN WLAN port 2
Realtek GbE Bluetooth SATA ODD Connector
RTL8111F Page 32 Page 41 Page 31


SPI SPI ROM
4MB For win7
8MB For win8
Page 12
LPC BUS


Touch Pad CONN. ENE KB9012QF
D
Page 39 Reserve KB930QF
+3VLP/+3VALW Int. KBD
D

page 40
Page 39
DC/DC Interface CKT.
Page 29,42


SPI ROM
Security Classification Compal Secret Data Compal Electronics, Inc.
Fan Control Issued Date 2011/08/23 Deciphered Date 2012/12/31 Title

Page 38 Page 40 SCHEMATIC A8222
128KB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number
Custom
Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019G8
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, February 13, 2012 Sheet 2 of 61
1 2 3 4 5
A




X76@:

VRAMX16X8 HYN 128*16*8 CLKOUT DESTINATION USB3 PORT DESTINATION USB2 PORT DESTINATION
ZZZ X76L01@ ZZZ2 X76L02@ ZZZ3 X76L15@

PCI0 PCH_LOOPBACK 1 USB2.0+3.0 0 USB2.0+3.0

2G SAM 2G B HYN 2G D HYN PCI1 EC PCH 2 USB2.0+3.0 1 USB2.0+3.0
ZZZ5 X76L05@ ZZZ6 X76L06@
PCI2 None 3 None 2 USB2

PCI3 LPC Debug Port 4 None 3 CAMERA
1G SAM 1G HYN

PCI4 None 4 Card Reader
VRAMX16X8-GS N13P-GS N13P-GL
ZZZ11 X76L12@ ZZZ12 X76L11@ 5 USB2
GS@ GL@ Voltage Rails
U10 GS@ U10 GL@ 6 None
Power Plane Description S1 S3 Deep S5
GS 2G SAM GS 2G HYN S3
VIN Adapter power supply (19V) N/A N/A N/A N/A PCH 7 None
N13P-GS N13P-GL BATT+ Battery power supply (12.6V) N/A N/A N/A N/A
B+ AC or battery power rail for power circuit N/A N/A N/A N/A 8 None
+3VLP 3.3V power rail for 51ON power management ON ON ON ON
GEL@: N13M-GE1 or N13P-GL N13M-GE1 N13M-GE1 x8
GS@: N13P-GS +3VALW 3.3V always on power rail ON ON ON AC/ON; DC/OFF 9 None
GE@ GE8@
+LAN_IO 3.3V power rail for ethernet ON ON OFF OFF
DIS@: VGA componet U10 GE@ U10 GE8@
+3VS_WLAN 3.3V power rail for WLAN/BT Combo ON OFF OFF OFF 10 JMINI1 (WLAN) Bluetooth
9012@: EC(ENE 9012 chip)
+3V_PCH 3.3V power rail for PCH suspend well plane ON ON OFF OFF
XDP@: Intel debug port
+3VS 3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader ON OFF OFF OFF 11 None
930@: EC(ENE 930 chip) N13M-GE1 N13M-GE1 x8
+3VSG 3.3V power rail for VGA ON OFF OFF OFF
IU3@: USB3.0 by PCH PS8520 ASM1466 +LCDVDD 3.3V power rail for LCD ON OFF OFF OFF 12 None
USB30@: USB3.0 controller IC ZZZ9 PAR8520@ ZZZ10 ASM1466@
+5VALW 5V always on power rail ON ON ON AC/ON; DC/OFF
+5V_PCH 5V power rail for PCH suspend well plane ON ON OFF OFF 13 None
AI@: AI Charger
+5VS 5V power rail for HDD,AUDIO,FAN,Touch PAD ON OFF OFF OFF
NAI@: Non AI Charger
+5VS_ODD 5V power rail for SATA ODD ON OFF OFF OFF
PS8520 ASM1466
+1.8VS 1.8V power rail for CPU,PCH ON OFF OFF OFF
W7@: WIN7 PCI EXPRESS DESTINATION
+1.05VS 1.05V power rail for PCH ON OFF OFF OFF
W8@: WIN8
+VCCP 1.05V power rail for CPU VCCIO,PCH ON OFF OFF OFF
1 Lane 1 10/100/1G LAN 1



+1.05VSG 1.05V power rail for N13P ON OFF OFF OFF
+1.5V 1.5V power rail for DDR3 system memory ON ON ON OFF
Lane 2 MINI CARD WLAN
+1.5V_CPU_VDDQ 1.5V power rail CPU VDDQ ON OFF OFF OFF
SMBUS Control Table +1.5VSG 1.5V power rail for N13P,VRAM ON OFF OFF OFF
Lane 3 None
+1.5VS 1.5V power rail for PCH,WLAN/BT combo ON OFF OFF OFF
SOURCE MINI1 BATT PCH EC SODIMM DGPU +0.75VS 0.75V power rail for DDR VREF ON OFF OFF OFF
Lane 4 None
+VCCSA VCCSA for CPU system agent ON OFF OFF OFF
EC_SMB_CK1
EC_SMB_DA1
KB930 X V X X X X +VCC_CORE
+VCC_GFXCORE_AXG
CORE Voltage for CPU
1.5V power rail for N13P,VRAM
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
Lane 5 None
EC_SMB_CK2
EC_SMB_DA2
KB930 X X V X X V +VGA_CORE CORE Voltage for N13P Graphics ON OFF OFF ON OFF OFF OFF
Lane 6 None
PCH_SMBCLK
PCH_SMBDATA PCH V X X X V X Lane 7 None
SATA DESTINATION
PCH_SMLCLK
SATA0 HDD Lane 8 None
PCH_SMLDATA PCH
X X X V X V
SATA1 HDD
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION
SATA2 ODD
CLKOUT_PCIE0 10/100/1G LAN CLKOUTFLEX0 CLK_SD_48M
SATA3 None
CLKOUT_PCIE1 MINI CARD WLAN CLKOUTFLEX1 None
SATA4 None
CLKOUT_PCIE2 None CLKOUTFLEX2 None SATA5 None
CLK CLKOUT_PCIE3 None CLKOUTFLEX3 None QCL70 * 16 (LA8222P)
Board ID Table for AD channel
CLKOUT_PCIE4 None Vcc 3.3V +/- 5%
Ra / Rc 100K +/- 5%
CLKOUT_PCIE5 None Symbol Note : Board ID Rb / Rd V AD_BID min V AD_BID typ V AD_BID max
33K +/- 5% 0.634 V 0.819V 0.945 V
CLKOUT_PCIE6 None : means Digital Ground

CLKOUT_PCIE7 None Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/08/23 Deciphered Date 2012/12/31 Title
: means Analog Ground SCHEMATIC A8222
CLKOUT_PEG_B None THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number
Custom
Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019G8
Date: Monday, February 13, 2012 Sheet 3 of 61
A
5 4 3 2 1




+VCCP




1
JCPU1I
R1 PEG_ICOMPI and RCOMPO signals should be shorted and routed
24.9_0402_1% with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms T35 F22




2
JCPU1A VSS161 VSS234
T34 VSS162 VSS235 F19
D PEG_COMP D
PEG_ICOMPI J22 T33 VSS163 VSS236 E30
PEG_ICOMPO J21 T32 VSS164 VSS237 E27
14 DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22 T31 VSS165 VSS238 E24
14 DMI_CRX_PTX_N1 B25 DMI_RX#[1] T30 VSS166 VSS239 E21
14 DMI_CRX_PTX_N2 A25 DMI_RX#[2] PCIE_GTX_C_CRX_N[0..15] 20 T29 VSS167 VSS240 E18
14 DMI_CRX_PTX_N3 B24 K33 PCIE_GTX_CRX_N15 DIS@ C1 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N15 T28 E15
DMI_RX#[3] PEG_RX#[0] PCIE_GTX_CRX_N14 DIS@ C2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N14 VSS168 VSS241
PEG_RX#[1] M35 1 2 T27 VSS169 VSS242 E13
14 DMI_CRX_PTX_P0 B28 L34 PCIE_GTX_CRX_N13 DIS@ C3 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N13 T26 E10
DMI_RX[0] PEG_RX#[2] PCIE_GTX_CRX_N12 DIS@ C4 0.22U_0402_10V6K PCIE_GTX_C_CRX_N12 VSS170 VSS243
14 DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35 1 2 P9 VSS171 VSS244 E9
14 DMI_CRX_PTX_P2 A24 J32 PCIE_GTX_CRX_N11 DIS@ C5 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N11 P8 E8




DMI
DMI_RX[2] PEG_RX#[4] PCIE_GTX_CRX_N10 DIS@ C6 0.22U_0402_10V6K PCIE_GTX_C_CRX_N10 VSS172 VSS245
14 DMI_CRX_PTX_P3 B23 DMI_RX[3] PEG_RX#[5] H34 1 2 P6 VSS173 VSS246 E7
H31 PCIE_GTX_CRX_N9 DIS@ C7 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N9 P5 E6
PEG_RX#[6] PCIE_GTX_CRX_N8 DIS@ C8 0.22U_0402_10V6K PCIE_GTX_C_CRX_N8 VSS174 VSS247
14 DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 1 2 P3 VSS175 VSS248 E5
E22 G30 PCIE_GTX_CRX_N7 DIS@ C9 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N7 P2 E4
14 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] VSS176 VSS249
F21 F35 PCIE_GTX_CRX_N6 DIS@ C10 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N6 N35 E3
14 DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9] VSS177 VSS250
D21 E34 PCIE_GTX_CRX_N5 DIS@ C11 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N5 N34 E2
14 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] VSS178 VSS251
E32 PCIE_GTX_CRX_N4 DIS@ C12 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N4 N33 E1
PEG_RX#[11] PCIE_GTX_CRX_N3 DIS@ C13 0.22U_0402_10V6K PCIE_GTX_C_CRX_N3 VSS179 VSS252
14 DMI_CTX_PRX_P0 G22 DMI_TX[0] PEG_RX#[12] D33 1 2 N32 VSS180 VSS253 D35
D22 D31 PCIE_GTX_CRX_N2 DIS@ C14 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N2 N31 D32
14 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] VSS181 VSS254
F20 B33 PCIE_GTX_CRX_N1 DIS@ C15 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N1 N30 D29




PCI EXPRESS* - GRAPHICS
14 DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] VSS182 VSS255
C21 C32 PCIE_GTX_CRX_N0 DIS@ C16 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N0 N29 D26
14 DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] VSS183 VSS256
PCIE_GTX_C_CRX_P[0..15] 20 N28 VSS184 VSS257 D20
J33 PCIE_GTX_CRX_P15 DIS@ C17 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P15 N27 D17
PEG_RX[0] PCIE_GTX_CRX_P14 DIS@ C18 0.22U_0402_10V6K PCIE_GTX_C_CRX_P14 VSS185 VSS258
PEG_RX[1] L35 1 2 N26 VSS186 VSS259 C34
K34 PCIE_GTX_CRX_P13 DIS@ C19 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P13 M34 C31
FDI_CTX_PRX_N0 PEG_RX[2] PCIE_GTX_CRX_P12 DIS@ C20 0.22U_0402_10V6K PCIE_GTX_C_CRX_P12 VSS187 VSS260
14 FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35 1 2 L33 VSS188 VSS261 C28
FDI_CTX_PRX_N1 H19 H32 PCIE_GTX_CRX_P11 DIS@ C21 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P11 L30 C27
14 FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4] VSS189 VSS262
FDI_CTX_PRX_N2 E19 G34 PCIE_GTX_CRX_P10 DIS@ C22 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P10 L27 C25
14 FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5] VSS190 VSS263
FDI_CTX_PRX_N3 F18 G31 PCIE_GTX_CRX_P9 DIS@ C23 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P9 L9 C23
14 FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6] VSS191 VSS264
14 FDI_CTX_PRX_N4
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
B21
C20
FDI1_TX#[0] Intel(R) FDI PEG_RX[7] F33
F30
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_P7
DIS@
DIS@
C24
C25
1
1
2