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ICAN-7175
Integrated NTSC Chrominance/Luminance Processor
L.A. Harwood and E.J. RCA Labs, Princeton, N.J.
Wittman,
J. Hettiger and R.L. Shanley, RCA Consumer Electronics, Indianapolis, IN



An intensive engineering effort in the past decade produced chrominance signal is gain controlled by an automatic
color TV receivers with a high degree of maturity. Although chroma control (ACC) and overload detector and by a
the price of receivers remained essentially unchanged, their customer-operated saturation control. A separate control
performance and were improved substantially.
reliability tracks the gain of the luma and chroma amplifiers and
Among the many improvements in all sections of the serves as a customer-operated picture control. The viewer
receiver are not only those that relate to a better picture sets the hue by means of a control; an automatic dynamic
quality but also those responsible for reduced energy flesh-correction circuit maintains proper flesh color without
consumption, the simplified operation of controls, and noticeably affecting the three primary colors. The luminance
reduced weight. In this Note attention will be focused on peak-to-peak level is. set by a previously described picture
improvements in the chroma/luma area. control; a comparator circuit sets the black level to a
potential set by a viewer-operated brightness control.
A brief historical review is appropriate for a better under-
Picture and brightness levels are also controlled by an
standing of the RCA CA3217E integrated circuit developed
for this application. Ten years ago vacuum tubes were still
automatic beam limiter. A signal derived from the kine-
used in many color TV
receivers, as efforts to fully
beam current reduces first the picture amplitude to a
transistorize receivers proved too costly. At first integrated
predetermined level and then operates on the brightness
control to prevent excessive drive to the picture tube. The
circuits, primarily in the sound area, were not readily
accepted, mainly because of power supply and vacuum
composite video signal is gated by a clamp circuit during
the horizontal and vertical retrace intervals to prevent
tube interface problems.
undesired signals from appearing on the screen during
A major breakthrough for consumer ICs occurred in 1969, those intervals. An externally generated sandcastle signal
with solid-state color TV receiver. This receiver
RCA's provides the timing for the burst gating and blanking
contained five ICs, which performed key functions in the signals. Technical information for the one-chip chroma/
areas of PIX-IF, AFT, sound IF, chroma processing, and luma processor is summarized in Table I.

chroma demodulation. Although overall performance im-
provement was marginal and a substantial number of
external components was still required, integrated circuits
clearly emerged as the key elements in the batch-manu-
facture of pretested key components for a color TV receiver. Major Functions and Signal Flow

The major goals in subsequent designs were improvements The block diagram of the major functions of the RCA
of performance and reliability, the introduction of new CA3217E and the external components are shown in Fig. 1.
features, and the simplification of manufacturing.
The chip was designed to maintain the performance and
1 "3 economy of a single-chip design with the chroma and
The improvements subsequently achieved in the chroma/ luminance functions together to provide an integrated
I uma section of the receiver were in the areas of color signal complete video processing.
circuit with
synchronization, automation of controls to minimize the
need for frequent adjustments of saturation, hue controls The chrominance and luminance signals, derived from the
(overload detector, dynamic flesh correction), black-level composite video signal at the second detector, are applied
to terminals 3 and 27, respectively. Both signals must be
control, and picture control. To reduce the number of
components (ICs and discrete parts) as well as testing time, appropriately filtered, and the luminance signal must be
the chroma circuits performing the chroma processing and adequately delayed with respect to the chrominance signal.
chroma demodulation were combined on one chip, the The composite chrominance signal is amplified in the first
RCA CA3151. This helped simplify manufacturing and also chroma amplifier; the gain of this stage is controlled by a
resulted in better performance, since fewer interface servo loop to maintain an essentially constant burst output
problems exist when more functions are combined on one level. Upon amplification the burst and chrominance signals
chip. are separated for further processing.
Similar considerations led to the newly developed RCA The burst signal is applied to two synchronous detectors.
CA3217E chroma/luma integrated circuit. In addition to all An in-phase detector (ACC) produces an error signal to control
the functions available in the one-chip chroma, the RCA the gain of the first chroma amplifier so as to maintain an
CA3217E also contains the essential luminance functions. essentially constant burst output level. The detected burst
Briefly, it decodes the chrominance signal and produces signal from the ACC detector passes through a sample-
three color-difference signals which combine internally and-hold stage that improves the efficiency and dc stability
with the luminance to develop the RGB signals. The of the servo loop.




357
I CAN -71 75




PIX
CONTROL




BEAM
CURRENT
REFERENCE




Fig. 1 - Block diagram of the RCA CA3217E chroma/luma integrated circuit.




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ICAN-7175
Table 1 - Performance of the CA3217E Chroma/Luma Proceeeor
(Refer to Fig. 1)
Function Typical Data
IC Package 28-terminal DIP
2
Chip Area 15,250 (mil)
Approx. No. of IC Components 490
Nominal Supply 11.2V
Nominal Dissipation 500 mW
Oscillator Stability
Supply Variation 10-14 V 5 Hz
Variation with Temperature
(AT=50°C) 25 Hz
AFPC Characteristics
DC Loop Gain 33 Hz/degree
Pull-in Range ±500 Hz (±300-Hz Limit)

ACC Characteristic
100% Chroma Input Level 250 mV p-p
3-dB Point at 20% nominal input level
Hue-Control Range 100°
Saturation-Control Range 40 dB min.

Relative
Demodulator Characteristics: Amplitude Angle
R-Y 1 93°
B-Y 1.2 2°
G-Y 0.3 258°
Bandwidth (Chroma) 900 kHz
Flesh Control Restricted to signals in the +1 half-plane
Chroma Overload Control Two levels
Picture Control >40dB
Brightness Control Black level clamped on 3- to 5-V level
Beam Limiting On picture and brightness controls
Luma Bandwidth 5 MHz min.
Sandcastle Input
1 .2-2.3 V Blanking
>3.3V Burst gate
Maximum Linear Output
R 5V
G 3V
B 3.7 V



The burst-separated chrominance signal is applied to a reduces the gain of the second chroma amplifier in the
second chroma amplifier, and the amplified signal is presence of large noise peaks only; thus the operation of
available on terminal 1. Four controls regulate the gain of this stage remains essentially linear. In the second mode
this stage. A killer stage amplifies the detected and filtered the average chrominance level is kept relatively constant to
burst signal, as explained above and, in presence of a burst avoid the need for frequent adjustments of saturation
signal, enables the second chroma amplifier. An R-C filter control This problem arises when channels are being
on terminal 4 stabilizes the killer action. A viewer-operated switched on during program changes, and results from
saturation control, connected to terminal 2, permits ad- variations in burst-to-chroma level.
justment to a desirable saturation level. A picture control at
terminal 26, also available to the viewer, operates on the The burst signal also serves to synchronize the subcarrier
luminance and second chroma amplifier and maintains a generator. A doubly balanced phase detector in the
constant chrominance-to-luminance ratio. A two-level automatic frequency and phase control (AFPC) loop
overload detector monitors the peak chrominance level compares the instantaneous phase of the burst and
and, in the presence of excessive chrominance or noise subcarrier signals. The detected error gated by a sample-
signals, reduces the gain of the second chroma amplifier to and-hold circuit and filtered by an external network on
prevent oversaturation of the picture tube. Two modes of terminals 9 and 10 is applied to a voltage-controlled
operation are possible and can be selected by the viewer by oscillator (VCO). Two orthogonal carrier signals are
means of a switch on terminal 16. In one mode the detector generated in this stage. The VCO output signal, on terminal



359
ICAN-7175
13, filter and is applied to the VCO
passes through a crystal from the B stage is used to establish a black level for the
The 90° phase-shifted component is
input terminal 11. video signal. A keyed comparator, activated during the
obtained by means of an external phase-shift network horizontal burst keying interval, compares the back-porch
connected to terminals 11, 12, and ground. The two synchronization signal level with an externally applied dc
orthogonal signals also provide reference signals for ACC .reference; the resulting signal, filtered at terminal 25,
and AFPC detectors and for the hue-control circuit. corrects the dc level of the RGB
outputs. Thus the external
In the hue circuit the two carriers are matrixed to generate a bias reference, connected to terminal 24, establishes the
picture black level and is used by the viewer as a brightness
resultant signal oriented in the phase direction. A dc
I


control at terminal 14 allows a ±50° phase adjustment from control.
the nominal position. A dynamic flesh-correction circuit, The picture and brightness controls are regulated by a
enabled by means of a switch on terminal 16, simplifies the beam-limiter servo loop. A signal, developed from the
hue adjustment and reduces the need for frequent adjust- average beam current, is applied to terminal 28; as soon as it
ments of the hue control by the viewer. In this circuit a exceeds a predetermined threshold level, a beam-limiter
phase detector compares the phase of the chrominance circuit reduces the peak-to-peak video signal. The control
signal with the phase carrier generated in the hue circuit;
I of this signal continues until the video signal is reduced to
the resulting signal controls the conduction of a modulator one half of its maximum level and subsequently reduces the
stage. Thisstage passesan amplitude-limited chrominance brightness. An overlap between the picture and brightness
signal that is added to the original carrier from the hue control regions secures a smooth transition of controls.
circuit. The signal thus produced is a carrier that is phase
Horizontal and vertical blanking pulses gate the RGB
modulated by the chrominance phase information, the
outputs to eliminate spurious signals during retrace from
modulation being restricted to chrominance signals in the
the picture tube. The gating is applied in the signal path
+l halfplane. This preserves the original colors in the -I half
between the chroma/luma matrix and the RGB output
plane; the signals of the +l plane are shifted toward the +l
stages.
axis.
An externally generated sandcastle signal is applied to
The processed subcarrier is available on terminal 15, from terminal 7 to provide timing for burst keying and blanking.
which it is applied to terminal 18, the carrier terminal of the I



demodulator. A 90° phase-shift network is employed to THE CHROMINANCE SECTION
produce the correct carrier for the Q demodulator (terminal
19).
The chrominance section of the RCA CA321 7E chroma/luma
IC provides all the functions and features available in RCA's
The and I Q demodulators decode the chrominance signal CA3151 "one-chip chroma" IC. The CA3151 has been
supplied externally from terminal 1 to 17. Demodulated I
employed in RCA TV receivers for the past several years; its
and Q signal components are matrixed and amplified to established performance was duplicated in the RCA
produce three color-difference signals. CA3217E.
The luminance signal, whose amplitude can be adjusted by In the chrominance section three major sections can be
a viewer-operated picture control (terminal 26), is applied identified: subcarrier regeneration,chrominance pro-
to terminal 27. As previously described this control also cessing, and chrominance decoding. These are described
operates on the second chroma amplifier to maintain a below.
constant chrominance-to-luminance ratio regardless of the
Subcarrier Regeneration
position of the control. Upon amplification the luminance
and three color-difference signals are combined in three A detailed block diagram of the subcarrier regeneration is
separate matrix stages to generate RGB signals. The output shown in Fig. 2. The burst signal separated from the

__.SUMMING
AFPC "^ NETWORK
FILTER
TO SECOND
CHROMA AMPL.
w
BURST-CHROMA AFPC SAMPLE QUADRATURE PHASE IN-PHASE
SEPARATION DETECTOR AND HOLD AMPL. LIMIT CORRECTOR AMPL. LIMIT


1

"LT _n_ _n n.
FIRST ACC
d>-- CHROMA AMPL. DETECTOR
CRYSTAL
©< e- FILTER -®"
ACC CONTROL
FILTER MATRIX DIFF.
NETWORK STAGE
"©- 90°
SHIFT
PHASE
NETWORK
CURRENT
DIFF.
CONTROL
DIFF. CONTROL COMBINING
STAGE NETWORK
92CM-36I77

Fig. 2 - Subcarrier regeneration.




360
1 --

ICAN-7175
composite chrominance signal is applied to a doubly
balanced detector, and the detected output is sampled EXTREME POSITION
OF THE CONTROL
during the burst keying interval and stored in filter capacitors
C
at terminals 9 and 10. During the hold interval the switching
arrangement disconnects the storage filter capacitors from
the detector signal path, thereby increasing the efficiency
of burst detection. The balanced switching assures good
immunity to common-mode errors such as leakage or beta-
dependent base current drains. The detected and filtered
burst signal synchronizes a voltage-controlled oscillator
(VCO).
VCO-- The VCO consists of an in-phase amplifier, quadra- EXTREME POSITION
ture amplifier, phase corrector, summing network, externally OF THE CONTROL
connected crystal filter (between terminals 1 1 and 13), and 92CS-36I76
a 90° phase-shift network connected between terminals 1
and 12. The in-phase amplifier, in conjunction with the Fig. 3 - Hue-control signal components.
external crystal filter, generates a 3,579,545-Hz cw signal.
This signal, phase-shifted by 90°, passes through the
quadrature amplifier and combines in the summing network Referring again to Fig. 2, the burst-oriented carrier passes
with the signal generated by the in-phase amplifier. The through a control stage to produce a burst-oriented signal
quadrature amplifier, in response to the detected signal in A (Fig. 3). A matrix network combines the burst- and the
the AFPC detector, controls the amplitude and polarity of (R-Y)-oriented carriers to produce a signal C. Signals A and
the quadrature signal so as to synchronize the operation of C are symmetrically disposed with respect to the signal (B I



the VCO with the burst signal. Parasitic capacitance vector). A customer-operated hue control allows a con-
associated with both amplifiers causes an undesired phase tinuous phase adjustment from the extreme A to the
shift of approximately 20°, forcing the VCO to operate off extreme C signal direction by adding appropriate fractions
design center. To compensate for this phase shift, a fraction of both signals. Circuit diagrams of the VCO and the hue
of the quadrature carrier signal is bypassed through the control are shown in Figs. 4 and 5, respectively.
phase corrector to the combining network, thus assuring a In the VCO, the in-phase amplifier limiter consists of
symmetrical operation of the VCO.
transistors Q90 and Q91 and current source Q87, while the
The two orthogonal carrier signals are also employed to quadrature amplifier limiter is formed by devices Q80 to
generate an Iphase reference signal, required for the Q85 and current source Q79. The in-phase signal com-
operation of the demodulator. To achieve this the signals
I ponent generated by the oscillation of the in-phase amplifier
are constructed according to the vector diagram in Fig. 3. in conjunction with the external crystal filter and the




R
fi< QUADRATURE
I5K< AMPLIFIER


i HinrLiri




82 ; 9
rt l
Q
kh rt84 °?h
T 1
'




>R63
k
"
J
M>
I





f J

|
AFPC
DETECTOR I
R68
ANO FILTER j 1 I i^VW




92CM-36IT0




Fig. 4 - Voltage-controlled oscillator circuit.




361
ICAN-7175
u
-o +
R85"
I5K .

-PHASE- ADJUST ED
-CARRIER OUTPUT

0IO4 Q|02|--t " I
Ql03 QI04J 1




R87
4K ( R-Y)
*-J W\/ * CARRIER




92CM-36I7I

Fig. 5 - Hue-control circuit.


quadrature component produced by the external L-C phase A (Fig. 3). Carrier (R-Y), adjusted by means of resistors
shiftnetwork combine in the load resistor R64. The quadra- R73, R84, and R87, and a fraction of -(B-Y) carrier
ture signal component, after passing through devices Q80 matrixed with the (R-Y) carrier by means of resistor
and Q81 is controlled by transistors Q82 to Q85. Depending R88, produce reference carrier C. The amplitude of A
on the output of the AFPC detector, the amplitude and and C signals are adjusted to produce a resultant I



polarity of the quadrature signal are adjusted by control signal with terminal 14 set to one half of Vcc potential.
transistors Q82 to Q85 so as to synchronize the VCO- The described circuit arrangement gives the viewer a
generated signal to the frequency and phase of the color reasonably linear and symmetrical hue-control circuit.
burst. Chrominance Processing
The previously explained phase delay, resulting from
This section describes the operation of the chroma ampli-
parasitic capacitances in the in-phase and quadrature
fiers, the overload detector, and the dynamic flesh-cor-
amplifiers, is compensated by a signal arriving at the load
rection circuit.
resistor via transistor Q78. The emitter size of the transistor
in relation to emitters of transistors Q80 and Q81 is adjusted Two chrominance amplifiers control the amplitude of the
to pass' a fraction of the quadrature signal required for color signal. The first amplifier is controlled by the ACC
compensation of the delay in the other signal paths. servo loop and maintains a substantially constant burst
level at its output. This amplifier is gated by horizontal
Hue Control-- In the hue-control circuit the bias potential
keying pulses that separate the burst and chrominance
on terminal 14 (setby the viewer) determines the phase of
information. The separated burst signal is applied to the
the carrier signal developed across load resistors R85 and
AFPC detector to synchronize the VCO, and to the ACC
R86. The circuit is constructed to produce an l-oriented
detector to control the gain of the first chrominance
carrier with terminal 14 at one half of the Vcc supply, and
amplifier and to produce a signal for the killer amplifier. In
equal (approx. 57°) phase shifts with terminal 14 at Vcc or
the absence of color information, and for burst signals not
ground potential. To achieve this, the following design
exceeding a predetermined level, the killer amplifier disables
requirements must be fulfilled:
the second stage.
1. With terminal 14 at one half Vcc potential, transistors
The second amplifier, driven by the chrominance signal
Q97 and Q98 should conduct equal currents. This separated from the burst signal in the first stage, is gain
condition is satisfied by making resistors R78 and R80
controlled by three separate inputs: a viewer-operated
equal and by setting equal voltage drops across resistors
picture control to adjust the luminance and chrominance, a
R76 and R83. Resistors R82 through R89 are so manual saturation control that provides gain reduction with
dimensioned that with terminal 14 at Vcc potential, the
a greater than 40-dB range, and a dual-threshold overload
entire current from transistor Q96 passes through
detector.
transistor Q97; with terminal 14 grounded, Q97 is cut
off and the current passes through Q98. The chrominance amplifiers and the overload detector are
2. Carrier signal -(B-Y) is adjusted to a nominal level at shown in Fig. 6. The composite chrominance signal amplified
bases of transistors Q101 and Q102 by means of in the first chroma stage is applied to the bases of
resistors R74, R77, and R81 to produce reference signal differential chroma amplifier Q20.Q21 and to those of




362
ICAN-7175

FROM
KILLER
AMPL. WT
saturationT

CONTROL 1*1

R7 <900
17.6 K<




PICTURE \J




Fig. 6 - Second chrominance amplifier and overload detector.


differential overload amplifierQ23.Q24. The gain of stage incoming chroma signal. This signal processing is intended
Q20.Q21 determined by the bias potential applied to
is to reduce objectionable phase errors without frequent
terminal 26. This bias, set by a viewer-operated "picture adjustments at the hue control.
control," determines the current in current sources Q156
The operation of the dynamic flesh-correction circuit is
and Q19. As shown in the diagram, current source Q19 illustrated in Fig. 7. In the diagram the chrominance signal
controls the gain of the second chroma amplifier while
current source Q156 determines the gain of the luma
amplifier. Thus excellent tracking of both signals is
maintained by the two current sources, operated in parallel.
The chrominance signal developed in stage Q20.Q21
proceeds to stage Q25.Q26; the signal split between
transistors Q25 and Q26 is determined by the control
voltage developed in the overload detector. In this circuit MAGENTA
section the chrominance signal amplified in stage Q23.Q24
proceeds through components Q28, Q29, Q223, Z2, and C1
to the internally prebiased two-level overload detector
transistor Q34. An external bias network connected to
terminal 4 sets the operating point for transistor Q35.
L^,,
The filtered control signal proceeds through transistor Q35
and resistors R38 and R11 to control signal division in
transistors Q27 and Q28 in the overload detector servo loop
and also in the chroma amplifier by controlling bias
potentials on bases of transistors Q25 and Q26. A manually
adjustable saturation control, on terminal 2, operates on
transistor pair Q30.Q31. The chrominance signal from CYAN
transistor Q26 proceeds through Q31 and Q1 8 to the output
terminal 1 to be coupled to demodulator stages.

A dynamic flesh-correction circuit modulates the instan- Fig. 7 - Chrominance signal modification by the dynamic
taneous phase of the carrier in response to the phase of the flesh corrector.




363
. '




I CAN -7 175
itphase shifted toward the +l direction; actually, however, it complementary signals are applied to bases of transistors
I


isthe phase of the subcarrier that is altered. The action of Q217 and Q225, while complementary Q signals are fed to
the dynamic flesh-correction circuit can be summarized as bases of Q238 and Q237. Appropriate fractions of the signal
follows: (developed by means of resistor-dividers R223, R224, R22S,
The phase of the subcarrier remains unchanged R226, and R227) and fractions of the Q signal (developed by
1 in the
presence of a dividers R230 through R233) are combined in differential
+l phase-oriented chrominance signal
and also in the presence of chrominance signals having stages (Q241 ,Q242, Q1 43.Q1 44, and Q1 53.Q1 54) to produce
-I signal components. the (B-Y), (G-Y), and (R-Y) signals, respectively. Since
2. In the presence of chrominance signals containing +l equal dc potentials exist on bases of transistors Q219 and
signal components, the original phase angle between Q225 and also in transistors Q228 and Q237, errors in the
the chrominance and the +l reference carrier is reduced. resistance values of the above described dividers may affect
This phase shift is largest for chrominance signals the accuracy of demodulated signals; however, they will not
corresponding to purple and yellow-green, and the introduce any dc error.
shift is toward flesh colors. Primary colors such as red, Three color-difference signals, after filtering, are combined
blue, and green remain essentially unaffected by the with the luminance signals in three separate amplifiers to
action of the flesh-correction circuit. produce RGB signals.
Chrominance Decoding VIDEO SECTION
Two doubly balanced demodulators are employed to The video section shown in Fig. 9 consists of a luminance
generate and Q signals. Demodulation along these axes
I amplifier with viewer-operated gain (picture control), a
simplified the design of the dynamic flesh correction. The summing amplifier that combines luminance and color-
demodulated signals are matrixed to generate color-dif- difference signals to produce RGB outputs, horizontal and
ference signals suitable for combining with the luminance vertical retrace blanking, and a blanking-level clamp with
signal. In a dc-coupled system, such as the one employed in associated black-level control. The latter serves as bright-
CA3217E, the predictability of the potentials at the output ness control. The picture control provides proportional
stages is important when the kine driver and the picture adjustment of gain of both the chroma and luma channels.
tube are being driven directly. Undesired voltage offsets Retrace blanking operates on RBG signals to remove
may result from excessive gain and multiplicity of coupled undesired or spurious signals from the luma and chroma
stages. The matrix circuit in the CA3217E is designed to channels. The gated black-level clamp compares the video
introduce a minimum of offset errors. As shown in Fig. 8, signal during the burst-gate keying interval with an ex-



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"-AWi--WV--
QI4^j--Oo
R236 4K t*1
800
_,->VWJ
=" RII7




OR-y




92CM- 36173

Fig. 8 - Color-difference matrix of the CA3217E.




364
ICAN-7175




RI6I
I 7K



0I87J --»
A\ BLANKING




Fig. 9 - Video section {summing amplifier and blanking).

ternally adjustable reference potential, and maintains this the gating interval in the comparator Q164.Q165. A storage
levelas a reference during the scan interval. This adjustment capacitor C1 on terminal 25 is charged or discharged by
serves as the brightness control. devices Q164 and Q166 during a sampling interval to
maintain the bases of Q164 and Q165 at approximately the
Luminance Processing
same level. The dc potential established on terminal 25
The luminance signal coupled through terminal 27 proceeds during this sample interval is translated through Q160,
through resistor R135 to differential stage Q157.Q158. The Q161, and R139 to Q169 to maintain the black level of the
gain of this stage is set by the potential on terminal 26. This video signal at a level consistent with the setting of the
potential is translated through Q151, R134, R137, and D5, brightness control. The green and red output potentials are
and establishes the bias on the bases of Q156 and Q19. also controlled by the same control loop. The output of Q6
Current sources Q156 and Q19 determine the gain of the is coupled to all three summing amplifiers. The green and
luminance and chrominance amplifiers, respectively, and red amplifiers are arranged to match the blue amplifier;
thereby achieve excellent tracking. The luminance signal hence the potential of black level of all three output signals
developed across R5 is applied to the summing amplifier. are essentially equal.
Summing Amplifier and Blanking BEAM LIMITER
In thesumming amplifier the luminance signal proceeds The beam-limiter circuit prevents thekinescope average
through Q169, Q1 71 and the -(B-Y) color-difference signal
,
electron-beam current from exceeding a predetermined
through Q173 and Q172 to produce a resultant B signal level. Because the limiting action distorts the video inform-
across resistor R153. The B signal proceeds through ation to be displayed, it is important to minimize the
devices Q180, Q181, and Q182 to terminal 22. perceptibility of the distortion.
Horizontal and vertical retrace blanking is applied at the The beam-limiter characteristic is shown in Fig. 10, and the
base of transistor Q1 82, and the blanking level is determined circuit in Fig. 1 1 The onset of limiting occurs in region 1 as
.



by the ratio of resistors R160 and R161. (Transistor Q1 87 is the voltage on pin 28 decreases in response to excessive
saturated during blanking.) Similar summing and blanking beam current. In region 1 the picture control voltage at pin
circuitry is employed for the red and green signals. 26 is lowered. This results in a corresponding decrease in
Black-Level Clamp picture amplitude (contrast). As explained above, the gain
of both the luminance and chrominance channels decreases
A gated servo loop maintains the black level at a preset
proportionately while the clamp maintains picture black
potential as explained below:
level at the potential of the brightness control (pin 24).
The blue video signal at emitter of Q180 and an externally Further decrease in the voltage on pin 28 causes limiting to
set reference potential at terminal 24 are compared during occur in region 2. Here limiting action at the picture control



365
ICAN-7175
-
As beam current increases further, the voltage across R171
Vcc=112V V28 S" '




increases to 0.7 V, and Q231 conducts. This is the beginning
CONTROL of region 3. The voltage at pin 26 is now clamped to 5.6.This
1 1


VOLTAGE is the half-gain point of the picture control, However, Q187
1.
l
collectorcurrent continues to increase as beam increases.
I

|
This is mirrored to the brightness control. Near the start of
1^ '\ region 3 the voltage across R172 reaches 0.7 V, and D17
V24 conducts. R172 is effectively removed from the circuit; the
4V - 1



REGIONS current transfer ratio of this mirror increases to R179.R178.
. REGION 2 The voltage gain from pin 28 to pin 26 can be externally
'
X y "EGION 1


*C-

I",
/r r ^lc
r |, *\*-
. \ ^
adjusted by the Thevenin equivalent resistance of the
picture circuit. Likewise, the gain from pin 28 to pin 24 can
>i be adjusted by the brightness-circuit equivalent resistance.
Vcc=11-2V Hence loop-gain characteristics can be tailored to each
VOLTAGE ON PIN 28
receiver.

SANDCASTLE DECODER
92CS-36177
The composite sandcastle signal and decoding circuitry is

Fig. 10 - Beam-limiter characteristic. shown in Fig. 12.
The two-level signal is coupled through transistor Q231 to
transistors Q187, Q188, Q189, and Q194. The first level
produces blanking signals for the RGB output stages.
Transistors Q187, Q188, and Q189 saturate whenever the
decreases; at the same time brightness-control limiting sandcastle exceeds approximately 1.4 V.
action begins. This corresponds to a decrease in picture The second level of sandcastle produces complementary
black level. Still lower voltages at pin 28, corresponding to horizontal burst-gate keying pulses at emitters Q195 and
strong limiting, cause operation in region 3 where the Q201 for the gating chroma circuits and the black-level
brightness-control voltage is lowered and essentially no clamp. Divider R171.R172 reduces the sandcastle level to
action occurs at the picture control. maintain Q199 off during blanking interval; however, the
Most limiting takes place in region 1. Picture limiting was second-level pulse is sufficiently large (> 2.3 V) to saturate
chosen because the viewer is relatively insensitive to Q199. This produces a negative pulse on the emitter of
changes in picture level (i.e., contrast). To avoid low- Q1 95. Transistor Q200, normally saturated, is cut off by this
contrast ("washed out") pictures, the limiter can reduce pulse, and a positive pulse appears on the emitter of Q201 A .



gain only to one half of maximum. When strong limiting is voltage divider (R1 79.R1 78) couples this pulse to the black-
needed, a smooth transition to brightness limiting is made. level clamp.



vcc
BIAS Q


> 023^1*1--(Q 234




92CM- 36169


Fig. 11 - Beam-limiter circuit.




366