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PAMS Technical Documentation NSD3 Series Transceivers

System Module

Issue 1 06/1999

E Nokia Mobile Phones Ltd.

NSD3 System Module

PAMS Technical Documentation

CONTENTS
Transceiver NSD3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFConnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband ASICS Description . . . . . . . . . . . . . . . . . . . . . . . . MAD4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CAF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CCONT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PENTA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CHAPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CCONT Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charging CHAPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF to Baseband Interface . . . . . . . . . . . . . . . . . . . . . . . . . Audio control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MAD4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MAD Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signal Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CAFE Submodule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Audio CODEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EMC Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1900 MHz Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1900MHz Duplexer Scorpion . . . . . . . . . . . . . . . . . . . . . . 1900 MHz Isolator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 6 7 7 7 7 9 10 10 10 10 10 10 11 11 11 12 12 13 13 14 14 14 15 18 21 22 23 24 24 24 25 31 33 34 35 35 35 35 35 35 35

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NSD3 System Module 36 36 36 37 37 38 38 38 39 40 40 40 41 41 42 42 42 43 43 43 43 43 44 44 44 45

1900 MHz Power Amplifiers Snapper . . . . . . . . . . . . . . . 1900 MHz Transmitter Interstage Filtering . . . . . . . . . . . 1900 MHz Transmitter Upconverter Apache . . . . . . . . 800 MHz Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 MHz SAW Duplexer . . . . . . . . . . . . . . . . . . . . . . . . . . 800 MHz Isolator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 MHz Power Amplifiers Shark . . . . . . . . . . . . . . . . . . 800 MHz Transmitter Upconverter Odyssey . . . . . . . . 800 MHz and 1900 MHz Transmitter Intermediate Frequency (TIF) 1900 MHz Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1900 MHz LNA and Interstage Filter . . . . . . . . . . . . . . . . 1900 MHz Down Converter IC STEALTH . . . . . . . . . . . 800 MHz and 1900 MHz CDMA IF filter . . . . . . . . . . . . . 800 MHz Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 MHz Down Converter IC VOYAGER . . . . . . . . . . . . 800 MHz AMPS IF Filter . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver Intermediate Frequency (RIF) . . . . . . . . . . . . . CDMA AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IQ Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AMPS Second Down conversion . . . . . . . . . . . . . . . . . . . AMPS Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UHF LOs 1 GHz and 2 GHz . . . . . . . . . . . . . . . . . . . . . . . Receiver VHF LO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter VHF LO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Base Band Connections . . . . . . . . . . . . . . . . . . . . . . . . Schematic Diagrams: UF4D (A3 size, at the back of the binder) BBRF interface (Version 20 Edit 3) for layout version 20 . . . . Circuit Diagram of Baseband (Version 20 Edit 3) layout version 20 Circuit Diagram of Power Supply (Version 20 Edit 9) layout 20 Circuit Diagram of RF Block (Version 20 Edit 3) layout version 20 Circuit Diagram of RX (Version 20a Edit 4) for layout version 20 Circuit Diagram of TX (Version 20a Edit 8) for layout version 20 Circuit Diagram of Synthesizer (Version 20a Edit 5) layout 20 . Circuit Diagram of Cafe (Version 20a Edit 5) for layout version 20 Circuit Diagram of MAD4 (Version 20a Edit 4) for layout version 20 Circuit Diagram of MAD4 External Memories (V.20a Edit 4) layout 20 Layout Diagram of UF4 Top (Version 20) . . . . . . . . . . . . . . . . . RF Troubleshooting Test Points for UF4D Top (Version 20) . RF Troubleshooting Test Points for UF4D Bottom (Version 20) E Nokia Mobile Phones Ltd.

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A12

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Transceiver NSD3
Introduction
The NSD3 is a trimode radio transceiver unit for the CDMA 800/1900MHz and AMPS network. The transceiver is true 3 V transceiver. The transceiver consists of System/RF module ( UF4D ), User interface module ( UE4 ) and assembly parts. The transceiver has full graphic display, and the user interface is based on two soft keys. The transceiver has leakage tolerant earpiece. The antenna is fixed. External antenna connection is provided by rear RF connector

Modes of Operation
There are five different operation modes: power off mode idle mode active mode charge mode local mode In the power off mode only the circuits needed for power up are supplied. In the idle mode circuits are powered down and only sleep clock is running. In the active mode all the circuits are supplied with power although some parts might be in the idle state part of the time. The charge mode is effective in parallel with all previous modes. The charge mode itself consists of two different state: charge and maintenance mode. The local mode is used for alignment and testing.

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Interconnection Diagram

Keypad

11

9

User Interface Module UE4

Display

2

Earpiece

28

4

Antenna

1

System/RF Module UF4D

Battery

6+2

3+3

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System Module
Circuit Description
The transceiver electronics consist of the Radio Module, RF + System blocks, the UI PCB, the display module and audio components. The keypad and the display module are connected to the Radio Module with a connectors. System blocks and RF blocks are interconnected with PCB wiring. The Transceiver is connected to accessories via a bottom system connector with charging and accessory control. The RF block is designed for a handportable phone which operates in the CDMA 800 system. The purpose of the RF block is to receive and demodulate the radio frequency signal from the base station and to transmit a modulated RF signal to the base station.

Connectors
System Connector
IBI connector (6 pads)

B side view
8 Fixing pads (2 pcs) 1 7 14

Engine PCB

DC Jack

Microphone acoustic ports

Bottom connector (6 pads)

Charger pads (3 pcs)

Cable locking holes (3 pcs) Cavity for microphone

A side view

Note: Intelligent Battery Interface, IBI, is an accessory interface on the battery side of the phone including the same signals as the bottom connector. The accessory ( e.g. an IBI accessory) can be a battery pack with E Nokia Mobile Phones Ltd.

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special features or an accessory module attached between the phone and a normal battery pack. 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Pin

NSD3 System Module

Page 8 L_GND MBUS XEAR SGND XMIC MICN MICP V_IN L_GND V_IN

FBUS_TX

FBUS_RX

CHRG_CTRL Bottom charger contacts

CHRG_CTRL DC Jack

Name

E Nokia Mobile Phones Ltd. Bottom charger contacts Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Microphone Microphone DC Jack DC Jack Bottom charger contacts
Function

Logic and charging ground.

Serial data out.

Serial data in.

Bidirectional serial bus.

Analog audio output.

Audio signal ground.

Analog audio input.

Microphone signal, negative node.

Microphone signal, positive node.

Charger control.

Charger control.

Charging voltage.

Logic and charging ground.

Charging voltage.

PAMS Technical Documentation

Description

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PAMS Technical Documentation RFConnector

NSD3 System Module

The RFconnector is needed to utilize the external antenna with Car Cradle. The RFconnector is located on the back side of the transceiver on the top section. The connector is plug type connector with special mechanical switching.
Accessory side of connector Part will be floating in car holder Phone side of connector

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Baseband Module
Block Diagram
TX/RX SIGNALS RF SUPPLIES PA SUPPLY SYSTEM CLOCK 19.2MHzCLK

Cafe SUPPLY

Cafe

CCONT SLEEP CLOCK 32kHz CLK

BB SUPPLY UI

MAD + MEMORIES CHARGING SWITCH

VBAT

BATTERY

AUDIOLINES BASEBAND SYSCON

Baseband Elements
Baseband refers to all technology elements in the phone design, which do not include RF functions. The Baseband Module therefore includes audio, logic control, signal processing, power supply, and user interface functions. Baseband functionality of this product consists of third generation Digital Core Technology (DCT3) design solutions.

Baseband ASICS Description
MAD4 The MAD4 ASIC contains four main components: DSP, MCU, RAM, and ROM. This ASIC controls logic functions for the user interface, USART and PWMs, CAF, Control Timing and Interrupts (CTI), RX Modem, RF Interface, Accessory Interface, and CDMA functionality. The DSP controls the RF power and implements the compressor and expander for AMPS, the vocoders for CDMA and DTMF tone generation. The MCU performs tasks such as UI control, timers, PUP control, RX Modem interface, audio control, evaluation of sensor data from CCONT A\D, and battery charging control. CAF The CAF ASIC provides CODEC functionality (A/D and D/A conversions for voice data, microphone and speaker amplification, variable RX and TX

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Audio Gain), provides system clock squaring, utilizes PLL for CDMA clock generation from system clock, and interfaces to the RF section and to MAD4. CCONT The CCONT ASIC provides linear regulated power to most of the phone. It has a multiplexed A/D converter for temperature sensor digitization, battery voltage, charger voltage, current consumption, and battery type detection. An external 32 kHz oscillator circuit is connected to CCONT, which is used for sleep clock generation. It also has a watchdog circuit used to power off the phone in the event that MCU receives an interrupt from power key depression, or an event has caused a process to over run and MCU does not service the register to prevent the watchdog timer from timing out. PENTA The PENTA IC chip operates as a low noise, low drop out regulator with 5 independent 2.8volt outputs used to power on various sections of the RF module. The PENTA IC has 5 control inputs are controlled by the MAD4 ASIC. CHAPS CHAPS operates as an integrated power switch for controlling charger current. Its features are limited start up current, limited maximum switch current, transient voltage protection, voltage limit protection, and reverse voltage protection. It is designed to be used with either a single lithium cell or three nickel cells battery types.

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Memories
SRAM External SRAM is used by MAD4. Size is 2 Mbit (256k x 8 bit). FLASH MEMORY Flash memory contains the main program code for the MCU and default EEPROM values. Size is 16 Mbit (1M x 16 bit), with layout compatability for an optional 8 Mbit chip (512k x 16 bit). EEPROM An EEPROM is used to store user data and tuning parameters. Size is 256 kbit (32k x 8), with optional 64k x 8 bit. A 2wire serial interface is used for communication.

Clocks
System Clock and CDMA Clock A 19.2 MHz signal is passed to the CAF ASIC from the RF section. The CAF then generates the 19.2 MHz system clock and the 9.8304 MHz CDMA clock, which are derived from the RF signal. Both of these clocks are passed to MAD4. 8kHz Frame Sync Clock An 8 kHz frame sync is generated in MAD4 and passed to the CAF in order to synchronize the internal CAF clocks with the equivalent MAD4 clocks. This signal is also used to "frame" the CODEC voice data at 8kHz. The pulse width of the frame sync will be equal to one period of the 320 kHz clock, which is internal to CAF. Sleep Clock Sleep clock is provided by CCONT and produces a 32.768 kHz clock used by MAD4 when it is in sleep mode. The crystal oscillator in the external CCONT circuitry to CCONT is not automatically started when the battery is connected, but after power up the oscillator is always running, even during power off periods. The only exception is when the battery is removed. UIF and CCONT Serial Clock (UIF_CCONT_SCLK) This 960 KHz clock is used to synchronize serial data transmission on the UIF and CCONT serial data bus UIF_CCONT_SDIO.

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Baseband Power Distribution

Description Power management and distribution in the phone is handled by the CCONT asic. CCONT is a multi function power management IC which has seven 2.8V linear regulators for the RFsection of the phone. One 2.8V regulator is used to power up the baseband of the phone, and its output is called Vbb. Additionally, one adjustable regulator is used to power up certain parts of the baseband. There are also a 5V charge pump, 5V regulator and 3/5V regulator. The main functions are voltage regulation, power up/down procedures, reset logic, charging control (PWM) , watchdog, sleep control, ADC and real time clock. E Nokia Mobile Phones Ltd.

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NSD3 System Module CCONT Regulators

PAMS Technical Documentation

Battery voltage VBAT is connected to CCONT which regulates all the supply voltages VBB, VR1VR7, V2V, VR1_SW, VSIM and V5V. CCONT's default startup mode is to turn on VR1, VBB, V2V, VR6 and Vref in powerup. Vrefs default value is 1.5V, but in in this phone we use 1.25V for Vref, so one of the first things MAD4 does on power up is to do a write to CCONT to change Vref to 1.25V. VBB is used as baseband power supply for all digital parts, and it is on whenever the phone is powered up. V2V is reserved for a later version of the MAD4 ASIC which will have a lower core voltage. When the low voltage core version of MAD4 is available, V2V will be connected to those pins on MAD4 which power the core. VSIM is used as programming voltage for the Flash memory after the phone is cut out of the panel. This is necessary if reflashing is needed after initial flash programming in production. V5V is used for RF parts only. VR6 supplies the power for CAFE. VR1 is used for the VCTCXO supply. VR1_SW is derived from VR1 inside CCONT, and is actually the same voltage, but can be separately switched on and off. This VR1_SW is used as an optional external microphone bias voltage. CLK_EN signal to CCONT controls both the VR1 and VR6 regulators; they can be switched off in sleep modes, during standby. CCONT regulators are controlled through a seial data bus from MAD4. Regulators VR3, 4, 5 and 7 are controllable through external pins; these pins forming a logical 'OR' function with the serial commands. If a regulator's control pin is at logic '1', that regulator will turn on. If the pins are not used for external control they are grounded. Most of the regulator outputs depend on pin control. In the table the 'State in reset' is based on assumption that pin controls are '0'. Charging Charging can be performed in any operating mode. The charging algorithm is dependent on the battery technology used. A resistor internal to the battery pack indicates the battery type. The resistor value corresponds to a specific battery capacity. This capacity value is related to the battery technology as different capacity values are achieved by using different battery technologies. The CCONTs A/D converter input measures the battery voltage, temperature, size and current. NOTE: Power management circuitry controls the charging current delivered from the charger to the battery. Charging is controlled with a PWM input signal from CCONT. The pulse width is controlled by MAD4 and is sent to CCONT through a serial bus. The battery voltage rise is limited by turning CHAPS switch off when the battery voltage has reached the desired limits. Watchdog MAD4 must reset the CCONT watchdog regularly. CCONT watchdog time can be set through SIO between 0 and 63 seconds at 1 second steps. Af-

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ter powerup the default value is 32 seconds. If the watchdog expires, CCONT will cut off all supply voltages. After total cutoff the phone can be restarted through any normal powerup procedure. CCONTs watcdog functionality may be temporarily disabled by holding CCONTs PWRONX/WDDISX pin at logic low. Power Up There are four ways to power on the phone. 1. Pressing the power button 2. Connecting a charger 3. An IBI interrupt on BTEMP 4. Internal RTC times out. Each of four methods is described in general in the following sections. When the battery is connected to phone, nothing will happen until the powerup procedure is initiated, for instance by pressing the powerbutton or by connecting a charger. After that the 32kHz crystal oscillator of CCONT is started (can take up to 1 sec), and the default regulators are powered up. If a power down is done and the battery remains connected, the 32 kHz crystal oscillator keeps running in the CCONT. VCTCXO CHAPS BATTERY
VCHAR

CAFE

VBAT

CCONT VR1
PWM VR1_SW VR6 VBB SIO

MAD FLASH RF

VR1VR7 VSIM V5V Vref

Power distribution diagram

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NSD3 System Module Pressing power key

PAMS Technical Documentation

PWRONX VR1, VBB, VR6 CLK_EN VCTCXO CAFE CLK PURX SLCLK

t1 t2 t3

t1 t2 t3

< 1 ms 1 6 ms, VCXO settled 62 ms, PURX delay generated by CCONT

After PWRkey has been pushed, CCONT gives PURX reset to MAD4 and turns on VR1, VBB and VR6 regulators (if battery voltage has exceeded 3.0 V). VR1 supplies VCTCXO, VBB supplies MAD, and VR6 supplies digital parts of CAFE. After the initial delay, t2, VCTCXO starts to give a proper 19.2MHz clock to CAFE, which further divides it to 9.83MHz for MAD4. CAFE will output the 9.83MHz clock only after the PURX reset has been removed. After delay, t3, CCONT releases PURX and MAD4 can take control of the operation of the phone. After MAD4s reset is released MCUSW detects that the PWRkey is still pushed and shows the user that the phone is powering up by turning on the LCD and the lights. MCUSW then powers up the RF receiver part. V5Vregulator (for RF) default value is off in powerup, and can be controlled on via serial bus when needed.

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PAMS Technical Documentation Power up when charger connected Normal battery voltage VCHAR VR1, VBB, VR6 CLK_EN VCTCXO 9.83 MHz CLK PURX SLCLK CCONTINT
t1 t2 t3

NSD3 System Module

Power up, charger connected, VBAT > 3.0 V The power up procedure is similar to the process described in the previous chapter with the exception that the rising edge of VCHAR triggers the power up in CCONT. CCONT sets output CCONT_INT, MAD4 detects the interrupt and reads CCONT status register to find the reason for the interrupt (charger in this case). After reading the A/D register to determine that the charger voltage is correct MAD should initiate charging activities. The phone will remain in the so called "acting dead" state which means that only the battery bars are displayed on the LCD. The user perceives that the phone is off. If the power on button is pushed the LCD display will come on and startup will be the same as normal power on. CCONT_INT is generated both when the charger is connected, and when the charger is disconnected.

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NSD3 System Module Empty battery
VBAT > 3.0 V

PAMS Technical Documentation

VCHAR VR1, VBB, VR6 CLK_EN VCTCXO 9.83MHz PURX SLCLK CCONT_INT
t1 t2 t3

Power up, charger connected, VBAT < 3.0 V Before battery voltage voltage rises over 3.0 V CHAPS gives an initial charge (with limited current) to the battery. After battery voltage reaches 3.0V the power up procedure is as described in the previous section. If a power down is done and the battery remains connected, the 32 kHz crystal oscillator keeps running in the CCONT. When a powerup is initiated again, the complete powerup sequence is described in the figure below. This time the powerup sequence is faster because the oscillator is already running. Charging CHAPS CHAPS comprises the hardware for charging the battery and protecting the phone from overvoltage in charger connector. The main functions are: transient, overvoltage and reverse charger voltage protection limited startup charge current for a totally empty battery voltage limit when battery removed with SW protection protection against too high charging current CHAPS is basically a PWM (Pulse Width Modulation) controlled switch which connects the charger to VBAT. MAD4 controlls CHAPS by writing PWM values to CCONTs PWM register over a serial bus. CCONT then

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outputs a PWM which is used by CHAPS to control the switch. In the case of an external fast charger, the PWM is available at the system connector to control the charger. In the case of a dead battery, shorted battery, or if the battery is below 3.0V, CHAPS supplies a controlled leakage current of about 180mA through the switch to attempt to bring the battery voltage up.
Pin number 1, 16 5 12 10 9 7 8 2, 3, 4, 6, 11, 13, 14, 15 Name Description

VCH RSENSE VBAT VBACK LIM PWM CTIM GND

Charger voltage input High current output, connected to current sense resistor of phone Battery voltage (connected to voltage sense part of CHAPS) Backup battery charging voltage output Output voltage limit select input Charging switch control input External capacitor for soft switching Ground

CHAPS Vin System Connector

BATTERY MAD

CCONT
PWMOUT serial control

To charger

Charging Control

V_charge

2wire charging With 2wire charging the charger provides constant output current, and the charging is controlled by PWMOUT signal from CCONT to CHAPS. PWMOUT signal frequency is selected to be 1 Hz, and the charging switch in CHAPS is pulsed on and off at this frequency. The final charging current to the battery is controlled by adjusting the PWMOUT signal pulse width. Both the PWMOUT frequency selection and pulse width control are made by the MCU which writes these values to CCONT. E Nokia Mobile Phones Ltd.

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The 2wire charger is part number ACP7, has fullwave rectified output, defined output voltage and impedance. Typical output current into empty battery is about 350 mA at nominal mains voltage. 3wire charging With 3wire charging the charger provides adjustable output current, and the charging is controlled by PWMOUT signal from CCONT to Charger, with the bottom connector signal. PWMOUT signal frequency is selected to be 32 Hz, and the charger output voltage is controlled by adjusting the PWMOUT signal pulse width. The charger switch in CHAPS is constantly on in this case. The 3wire charger is part number ACP9, a switchmode power supply (SMPS) adapter using 3wire charging structure (controlled constant voltage). Typical output into an empty battery is about 850mA at nominal mains voltage. Battery disconnected when charger is connected From hardware point of view the phone could otherwise continue functioning normally, but if the charger voltage is higher than the maximum allowed battery voltage, this can damage the RF parts. Therefore, output overvoltage protection is needed in case the battery is removed when a charger is connected, or if a charger is connected before the battery to the phone. With a charger connected, if VBAT exceeds preset limits in CHAPS, the switch turns OFF immediately (soft switching bypassed). There are two voltage limits, VLIM1 and VLIM2. VLIM input = '0' selects VLIM1, VLIM input = '1' selects VLIM2.
Parameter Output voltage cutoff limit (during transmission or Libattery) Output voltage cutoff limit (no transmission or Nibattery) Symbol VLIM1 VLIM2 Min 4.4 4.8 Typ 4.6 5.0 Max 4.8 5.2 Unit V V

When the switch turns off due to an overvoltage condition, it stays off until the input voltage falls below the specified limit (VCH
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VBAT
VLIM

4V

t PWM "1" "0" t SWITCH ON OFF 1 2 3 4 t

1. Battery removed, (standard) charger connected, VBAT rises (follows charger voltage) 2. VBAT exceeds limit VLIM(X), switch is turned immediately OFF 3. VBAT falls (because no battery) , also VCH VBAT and VBAT < VLIM(X) > switch turned on again (also PWM is still HIGH) and VBAT exceeds VLIM(X). 4. Software sets PWM = LOW > CHAPS does not enter PWM mode

Output overvoltage protection when battery removed ( in principle ) Power Down Pressing power key When the user wishes to turn the phone off and presses the power key, MAD (MCU SW) detects that PWRkey is pressed for a long enough time. After that the lights and LCD are turned off. MCU stops all the activities it was doing (e.g. ends a call), sends power off command to CCONT by writing a 'zero' amount of time to the watchdog register, and goes to idletask. After the delay CCONT cuts all the supply voltages from the phone. Only the 32 kHz sleep clock remains running. Note that the phone doesn't go to power off (from HW point of view) when the charger is connected and PWRkey is pushed. The user perceives that the phone is off, but in fact the phone is just acting as if it is off (this state is usually called "acting dead"). Battery charge low As a battery discharges, energy management software keeps a constant watch on the voltage and displays an appropriate amount of battery bars. E Nokia Mobile Phones Ltd.

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When the battery discharges to a critical level the software notifies the user by beeping. If left on, the software will power off the phone at a VBAT of TBD V. If the SW fails to power down the phone, hardware will take over and CCONT will do a reset and power down the phone when the battery voltage drops below 2.8 V. Watchdog expires If the SW fails to update the watchdog, the watchdog will eventually expire and CCONT cuts all the supply voltages to the phone. On startup, the initial value set in CCONT's watchdog timer register is 32.5 seconds. The watchdog is programmable from 0 to 63 seconds. Disconnected battery When battery is disconnected, immediate and totally uncontrolled power down happens. Therefore a power off procedure in this case can not be described. One possible risk is that if the MCU is writing something to the EEPROM exactly at the same moment, the memory contents may be corrupted. RF to Baseband Interface The RF to Baseband interface consists of MAD4 and CAF communicating with various parts of the RF module. The MAD4 ASIC produces the Pulse Duration Modulators (PDMs) which allow analog voltages to be used for RF control. It also controls the VCTCXO enable, as well as band and mode selects. MAD also controls the RF supply voltages through CCONT. The CAF ASIC performs the A/D and D/A conversions for CDMA and AMPS RX and TX paths. CAF also receives the VCTCXO 19.2 MHz signal and provides MAD4 with the 19.2 MHz system clock.

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Audio control
Audio Controls and Processing The audio control is handled by the MAD4 MCU. Speech coding functions are performed in MAD4 DSP. In transmission mode, the speech code is then sent to the CAF ASIC for D/A conversion. In receiver mode, PCM coded blocks are read from the CAFE ASIC Both audio and RF CODECs reside in CAF. Earpiece The internal earpiece is connected to the UI board by means of mounting springs for automated assembly. The 32ohm impedance, dynamic type earpiece is connected to the differential output of the CAF ASIC. Microphone The internal microphone is connected to the bottom connector by means of mounting springs. The microphone bias is provided by the CAF ASIC. Audio Accessory Interface External audio is interfaced to the phone through the system connector. XEAR, XMIC, and SGND are the phone's external audio signal pins used for communication during a hands free accessory call.

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Digital control MAD4
The baseband functions are controlled by the MAD asic, which consists of a MCU, a system ASIC and a DSP. The CDMA specific asic is named as MAD4. MCU For general purpose processing applications. DSP The DSP is in charge of the channel and speech coding. The Main interfaces are to the MCU, and via System Logic to CAFE and RF. System Logic Peripheral interface: S S S S S S S S MCU Parallel I/O, UART, and PWM control (PUP) Autobauding support (AccIf) Interface to external memories Address lines and chip select decoding (BUSC) RF Interface and Control (RFIfCtrl) Clocking, timing and interrupts (CTI) Sleep Control (SleepBlk) CAFE Control (CAFECtrl) Serial Accessory Interface (FBUS):

User Interface Control (UserIf) Reset Generator (RstGen) Clock Generator (ClkGen) Test Interface (TestIf) MAD Interfaces UI and CCONT Serial interface MAD4s serial interface is used to control the Serial LCD on the User Interface board, and to provide access to CCONTs registers. The DataSelX and DataClk are generated by MAD4 during both transmit and receive cycles. Each device has its own chip select signal and must hold its data pin in a high impedance state if its chip select is not active. Data must be valid on the rising edge of DataClk during both transmit and receive. CAFE Interface The MAD4 ASIC supplies an interface to the CAFE ASIC. This interface consists of parallel transmit and receive busses for CDMA and AMPS data, and a serial interface for Codec control and data.

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FBUS FBUS (Fast Bus) is a fast serial interface between the DSP and data accessories or the DSP and multipath analyzer. This interface is a fullduplex, asynchronous, twoline bus. Tsds Tsdh Data 0 Data 1 ... Data 7

mdMCUSDIO (Serial Clk) accFBusRXD (Serial Data)

USART Synchronous Mode Receive (Flashing Mode) MBUS MBUS is the MCUs serial interface which is used for FLASH downloading (not program code), testing, and communication with external devices. Supported baud rates are 9.6, 19.2, 38.4 and 57.6 kbit/s. JTAG Interface The JTAG interface is used for MAD4 ASIC emulation. This interface provides for coemulation of the DSP and MCU. TRUST Interface TRUST (Trace Utility for Software Testing) is a hardware module used to capture tracing data from a phone during testing. It serves as a buffer memory, storing data from the address and data buses of the phone MCU until read by a PC. A time label is attached to each data word. The unit also includes a buffer for commands from the PC to the phone. Signal Definitions
SIGNAL NAME Busses, Strobes, and Clocks ADD(20:0) DATA(15:0) RXD(11:0) TXD(7:0) EEPROMSCLK EEPROMSDA DESCRIPTION Includes parallel and serial busses as well as data clocks, and chip selects 21Bit Memory Address Bus 16Bit Memory Data Bus Receive Data Transmit Data SCLK to serial EEPROM Serial data line for serial EEPROM. MAD4 to FLASH 0 to 2.8V Digital and SRAM MAD4 to FLASH 0 to 2.8V Digital and SRAM CAFE to MAD4 MAD4 to CAFE MAD4 to EEPROM MAD4 to EEPROM MAD4 to CCONT and UI connector MAD4 to CCONT and UI connector 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital (Pullup) 0 to 2.8V Digital From/To Signal Characteristics Notes

UIF_CCONT_SCLK Clock for UI and CCONT serial interface UIF_CCONT_SDIO User Interface and CCONT Serial Data

0 to 2.8V Digital

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SIGNAL NAME CCONTCSX LCDCS MEM(3) MEM(2) MEM(1) MEM(0) MBUS FBUS_TX FBUS_RX ADATA CAFESIO(2) CAFESIO(1) CAFESIO(0) CLK9M20 CLK9M83 SLEEPCLK DESCRIPTION CCONT Chip Select LCD Chip Select Memory Read Strobe Memory Write Strobe RAM Chip Select FLASH chip enable MCU serial bus for external communication DSP Accessory UART Data Output DSP Accessory UART Data Input AMPS Data Input to RxModem (MAD4) CAFE I/F Frame Sync CAFE I/F Serial Data from CAFE CAFE I/F Serial Data to CAFE 19.2MHz System Clock 9.8304MHz CDMA Clock 32.768kHz Sleep Clock

PAMS Technical Documentation
From/To MAD4 to CCONT Signal Characteristics 0 to 2.8V Digital Notes

MAD4 to UI con- 0 to 2.8V Digital nector MAD4 to FLASH 0 to 2.8V Digital and SRAM MAD4 to FLASH 0 to 2.8V Digital and SRAM MAD4 to SRAM 0 to 2.8V Digital MAD4 to FLASH 0 to 2.8V Digital MAD4 to System 0 to 2.8V Digital connector MAD4 to System 0 to 2.8V Digital connector System connector to MAD4 CAFE to MAD4 MAD4 to CAFE CAFE to MAD4 MAD4 to CAFE CAFE to MAD4 CAFE to MAD4 CCONT to MAD4 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital Oscillator still running when phone is powered down.

RF Interface Control Signals CAFE_TX_GATE TIF_EN SYN_ACQ&SYN_P WR_DN SYN_LK1 RIF_EN TX_LIM SYN_CLK SYN_DAT SYN_LE1 CEL_MODE BAND_SEL MODE_SEL Indicates TX Power Greater than TXI_REF R/F I/F Serial Clock R/F I/F Serial Data R/F I/F Serial Latch Enable #1 R/F I/F Serial Latch Enable #2 RF Frequency Band Select (PCS or Cellular) RF Mode Select (CDMA or AMPS) Transmitter Gating Signal TIF chip enable MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF RF to MAD4 MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital

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SIGNAL NAME AFC RX_IF_AGC TX_IF_AGC TX_RF_AGC TX_VCO_CAL TX_LIM_ADJ FILT_SEL BOOST RX_GS RF_TX_GATE_P RF_TX_GATE_C CLK_EN DESCRIPTION AFC PDM Receive IF AGC PDM Transmit IF AGC PDM Transmit RF AGC PDM PENTA Regulator control (P5) General Purpose PDM2 General Purpose PDM3 General Purpose PDM4 RF Receive Gain Switch function Transmitter Gating Signal (PCS Mode) Transmitter Gating Signal (Cellular Mode) VCTCXO Enable (to CCont "SLEEPX" input) From/To MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to RF MAD4 to CCONT

NSD3 System Module
Signal Characteristics 0 to 2.8V continuously variable 0 to 2.8V continuously variable 0 to 2.8V continuously variable 0 to 2.8V continuously variable 0 to 2.8V 0 to 2.8V continuously variable 0 to 2.8V Digital 0 to 2.8V continuously variable 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital Signal to CCONT which controls regulators to RF. Not used as a PDM Not used as a PDM Notes

VLIM

Used to select the max battery voltage for the charging circuit in CHAPS (VLIM1 or VLIM2). Peripherals, Accessory Interface, and A/Ds

MAD4 to CHAPS 0 to 2.8V Digital

BUZZER VIBRA

Buzzer PWM Output PWM output for vibra motor

MAd4 to UI connector

0 to 2.8V Digital

MAD4 to on 0 to 2.8V Digital board VIBRA circuit, and to battery connector via BTEMP line CAFE to MAD4 CAFE to MAD4 and CCONT MAD4 N306 (regulator) to System connector Battery connector to CCONT 0 to 2.8V Digital 0 to 2.8V Digital Controlled by MAD4 Voltage divider A/D input to CCONT 0 to 2.8V Digital

HOOKINT EAD_HEADINT tp4 RS232_PWR

Hook Interrupt Headset Interrupt (CCONT performs A/D on this signal). DBUS data line test point Control for switching power onto SGND while using a data cable accessory. Intelligent Battery Interface. A/D input to CCONT.

BSI

DC voltage level that varies with different battery types.

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SIGNAL NAME BTEMP DESCRIPTION A/D input to CCONT. Used for battery temperature detection and battery VIBRA control. A/D input to CCONT. Used for RF power amp temperature detection. A/D input to CCONT. Receive signal strength indicator for AMPS mode.

PAMS Technical Documentation
From/To Battery Connector to CCONT Signal Characteristics DC voltage level which changes with battery temperature. Notes Thermistor voltage divider A/D input to CCONT

PA_TEMP

RF to CCONT

DC voltage level Thermistor voltwhich changes age divider A/D with PA tempera- input to CCONT ture. DC voltage level which changes with received signal strength. ACP9 DC ACP7 Rectified AC Voltage will change with charge control PWM.

RSSI

RF to CCONT

V_IN

Power in from charger

System connector to CHAPS System connector to GND via inductor

L_GND

Ground reference for charger (Separated from GND through an inductor). Regulator Control Signals

0V

VREGP1 VREGP2

Controls voltage regulator P1 (PENTA). Used to control voltage regulator P2 (PENTA). This signal is also the MSB (bit21) of the Memory Address Bus but is not used as an address bit. Controls voltage regulator P3 (PENTA). Controls voltage regulator P4 (PENTA). CCONT interrupt to MAD4 User Interface Board Peripherals

MAD4 to CCONT MAD4 to CCONT

0 to 2.8V Digital 0 to 2.8V Digital

VREGP3 VREGP4 CCONT_INT

MAD4 to CCONT MAD4 to CCONT CCONT to MAD4

0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital

FLIP

Flip interrupt (detects status of hinge) on variants with flip feature. Controls illumination on UI board. Controls the call LED on UI board. Resets the LCD on the UI board. Keyboard Columns on UI board. Keyboard Rows and LCD I/F

UI connector to MAD4

0 to 2.8V Digital

BACKLIGHT CALL_LED LCD_RESETX COL(4:0) UIF(5:0)

MAD4 to UI con- 0 to 2.8V Digital nector MAD4 to UI con- 0 to 2.8V Digital nector MAD4 to UI con- 0 to 2.8V Digital nector MAD4 to UI con- 0 to 2.8V Digital nector MAD4 to UI con- 0 to 2.8V Digital nector

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SIGNAL NAME PWRONX Resets PURX RESETX CAFE RF/IF IQSEL RXIQ(3:0) TXIQ(3:0) LIM_P LIM_N CLK19M2RF AMPSMOD IQ Select control line for selecting I or Q data CDMA Receive I and Q data CDMA Transmit I and Q data noninverting AMPS receive modulated signal Inverting AMPS receive modulated signal 19.2MHz sinusiod from RF AMPS audio signal (after DSPand D/A) to be transmitted. Test & Emulation JTAG1_TRST JTAG2_TDI JTAG3_TDO JTAG4_TCK JTAG5_PD JTAG0 JTAG6 JTAG Reset JTAG Scan Input JTAG Scan Output JTAG Clock & ATPG Scan Clock JTAG Mode Select & ATPG Scan Enable DSP/MCU Emulation (NOT USED) DSP/MCU Emulation (NOT USED) DSP External Flag (NOTE: This pin has a dual function as General Purpose I/O "P0GPIO(6)". DSPXF is default function.) CHRG_CTRL_A TP5 WDDIS DSP Serial Port Input Clock (for multipath analyzer) DSP Serial Port Frame Sync(for multipath analyzer) Watchdog Disable MAD4 MAD4 MAD4 MAD4 MAD4 MAD4 MAD4 MAD4 to CAFE RF to CAFE CAFE to RF RF to CAFE RF to CAFE RF to CAFE CAFE to RF Power Up Reset System Reset CCONT to MAD4 MAD4 to CAFE DESCRIPTION Power button signal From/To UI connector to MAD4

NSD3 System Module
Signal Characteristics 0 to 2.8V Digital Notes

0 to 2.8V Digital 0 to 2.8V Digital

0 to 2.8V Digital Differential I and Differential Q Differential I and Differential Q analog analog sinusoid analog (voice)

0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital

MAD4

0 to 2.8V Digital

MAD4 MAD4 Test Connector to CCONT

0 to 2.8V Digital 0 to 2.8V Digital 0 to 2.8V Digital Used in factory while still in panel

CCONT Outputs

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SIGNAL NAME VBB DESCRIPTION LEAD power pins (DSP)

PAMS Technical Documentation
From/To CCONT to MAD4 and memories as the UI connector CCONT to V201 (CAFE) to RF to RF to RF to RF to RF to RF to RF to RF to CAFE CCONT to MAD4 to RF CCONT to FLASH Signal Characteristics 2.8V regulator Notes

VR1_SW VR1 VR2 VR3 VR4 VR5 VR6 VR7 VR7A VREF VMAD +5V_POWER 3V_5V

Power for microphone bias Provides RF power Provides RF power Provides RF power Provides RF power Provides RF power Provides power to CAFE Provides RF power provides RF power Used by CAFE as an A/D voltage reference Provides power to the MAD4 core. Will be used only with the ROM3 version of MAD4. Provides 5V power to RF Provides 3V to flash (Vpp) for programming Charge control PWM signal for accessories

2.8V regulator 2.8V regulator 2.8V regulator 2.8V regulator 2.8V regulator 2.8V regulator 2.8V regulator 2.8V regulator 2.8V regulator 1.244V reference 1.8V regulator 4.7 to 5.2V 2.7 to 3.3V Programmable to different voltages Charge pump used at 3V regulator external to CCONT

CHRG_CTRL Audio Signals EARN

System connector to CHAPS. 0 to 2.8V Digital Can also be driven by CCONT

Inverting part of the audio differential signal to the earpiece.

CAFE to UI connector

1.8Vpp max

combined differential output from earn and earp is 3.6Vpp max combined differential output from earn and earp is 3.6Vpp max single ended combined differential input from MICP and MICN is 2Vpp max

EARP

Noninverting part of the audio differential signal to the earpiece.

CAFE to UI connector

1.8Vpp max

XEAR MICP

Single ended audio signal to bottom connector. Noninverting part of the audio differential signal to the internal microphone.

CAFE to System 1.8Vpp max connector System connector (mic) to CAFE Can be used up to 1Vpp

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SIGNAL NAME MICN DESCRIPTION Inverting part of the audio differential signal to the internal microphone. Single ended external audio input from the bottom connector. Return path for accessory audio, and power for data cable. From/To System connector (mic) to CAFE System connector to System connector to CAFE and N306

NSD3 System Module
Signal Characteristics Can be used up to 1Vpp Notes combined differential input from MICP and MICN is 2Vpp max

XMIC SGND

Can be used up to 1Vpp nearly 0V. Has some AC components. Capacitively coupled input to CAFE. Resistive pulldown

CAFE Submodule CDMA RX
The MAD/CAFE RX Interface consists of a 12bit data bus RXD(11:0) output from the CAFE ASIC to the MAD ASIC. In CDMA mode the data transfer rate is 9.8304MHz. The RX data is clocked out of the CAFE ASIC on the falling edge of the 9.8304MHz clock, and clocked into the MAD ASIC on the rising edge. For CDMA mode the 4bit RXI data is supplied on bits RXD(5:2) and the 4bit RXQ data is supplied on bits RXD(11:8). Bits (7), (6), (1) and (0) are not used in CDMA mode.
CLK9M8O tDRXD RXD(11:0) LAST VALUE READ DATA FROM CAFE tDRXD LAST VALUE

Digital Mode RX Data Bus Timing

CDMA TX
CDMA TX data is transferred from MAD4 to CAFE by using an 8bit multiplexed parallel data bus TXD(7:0). The data is clocked out of MAD on the rising edge of the clock and clocked into the CAFE on the falling edge of the clock. The bus data rate is 9.8304 MHz.
TXGATE tTXGON tTXGOFF
VALID DATA FROM MAD VALID DATA FROM MAD DATA FROM MAD DON'T CARE

TXD(7:0)

DON'T CARE

VALID DATA FROM MAD

tTXGS CLK9M8O

tDSU

tDH

tTXGH

tIQH tIQSU IQSEL
I Q

Digital Mode TX Data Bus Timing E Nokia Mobile Phones Ltd.

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AMPS RX
AMPS receive data from the RF section is differential, through pin 23 and 24 of the CAFE ASIC. RX data is transferred at 40 kHz through a 12bit data bus RXD(11:0) output from the CAFE ASIC to the MAD4 ASIC. Wide band data (ADATA) is one bit asynchronous data running at 150 kHz. Data conversion and the bus interface is synchronous. Data is clocked out of CAFE on the falling edge of the clock and clocked into the MAD4 on the rising edge of the clock.

AMPS TX
The TX data in AMPS mode is transferred at 120 kHz using an 8bit multiplexed parallel data bus TXD(7:0). The AMPS transmit channel uses the Q channel. TX data is clocked out of MAD4 on the rising edge and clocked into the CAFE on the falling edge. System Connector
TXIQ(3..0) XEAR SGND XMIC MICP MICN

RF Section

CLK19M2 AMPS_MOD

LIM_N LIM_P RXIQ(3..0) CLK_EN IQSEL TXD(7..0)

CAFE Module
VREF VR6

RXD(7..0) CAFE_TX_GATE ADATA CLK9M83 CLK19M20 RESETX INTERUPTIONS

MAD Module

CCONT

CAFE and Peripherals Block Diagram

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Audio CODEC
The audio CODEC has the following functional blocks: 8 kHz interface for speech codec Microphone amplifiers and mux for 3 differential microphone inputs Variable gain amplifier for TX audio Variable gain amplifier for sidetone audio 13 bit Analog to Digital converter and lowpass filter 13 bit Digital to Analog converter and lowpass filter Variable gain amplifier for RX audio Speaker amplifiers for 3 speakers Transmit The microphone signal, MICP and MICN, is sent to CAFE differentially through pin 66 and pin 69. The maximum input signal level at either input is 1.0 V, which gives a differential level of 2.0 Vpp. Audio data is transferred in 16 bit frames (2 LSBs are not used). The audio signal from an external accessory (XMIC) drives pin 68. The ground reference for XMIC is SGND (pin 67), which is a virtual ground. Receive The audio receive path consists of a D/A converter, lowpass filter and output attenuator with three selectable outputs. Only one output can be active at a time. The biasing at the outputs can be independently controlled to be ON at all outputs to avoid switching transients. The EAR output from pin 77 and pin 80 is intended to drive a phone earpiece having typically 32 ohm resistance. The output is differential, having positive (EARP) and negative (EARN) output terminals. The HF output is intended to drive external audio circuitry via XEAR. The output is singleended, but also has another pin (HFCM) which drives signal ground for it. Detection The external microphone input is detected by the voltage divider between R205 and R219 (EAD_HEADINT, A/D to by CCONT). When XEAR is loaded, it can pull down R213 and generate an interrupt to MAD4 (HOOKINT). External Microphone Biasing AUXOUT is used to generate biasing voltage for the external microphone, and will provide 1.5 V bias voltage to the external microphone. If AUXOUT is not selected, the output will be in high impedance state. R202, R220, C212, and V201 provide an alternative means of biasing the internal microphone. E Nokia Mobile Phones Ltd.

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EMC Strategy
The baseband EMC strategy is divided into electrical and mechanical items. As electrical guide lines, clocks and high speed signals should be routed in inner layers and away from the PCB edges. Clock signals distributed to other circuits should have series resistors incorporated to reduce rise times and reflections. Slew rate controlled buffers should be used on custom components wherever possible to reduce the EMC produced by the circuit. Separate power supplies for digital, analog and rf blocks should be used as much as possible. Baseband and RF supply power rails should be isolated from each other by means of inductors in the power supply rail to prevent high frequency components produced on the baseband power supply rail to spread out over the RF power supply plane. This might be required to avoid interference from digital circuits to affect the performance of RF section. All external connectors and connection must be filtered using RC or LC networks to prevent the high frequency components from entering connection cables that then will act as antennas. The amount of this type of EMC component is in straight relation to the amount of external connections. The type of network and amount of components to be used is determined by the AC and DC impedance characteristic of that particular signal. Low impedance signals requires LC network while medium impedance level signals, input signals at moderate band width can use RC networks. The EMC protection should also prevent external or internal signals to cause interference to baseband and in particular to audio signals. Internal interference is generated by the transmitter CDMA frequency and the switch mode charging. The transmitter CDMA frequency interference is likely to cause noise to both microphone and earphone signals. The transmitter RF interference is likely to cause more problems in the microphone circuitry than in the earphone circuitry since the earpiece is a low impedance dynamic type. As mechanical guide lines, the baseband and RF sections should be isolated from each other using EMC shielding, which suppresses radiated interferences. The transmitter CDMA frequency can also generate mechanical vibrations that can be picked up by the microphone if it is not properly isolated from the chassis using rubber or some other soft material. A spring connected microphone is used to prevent microphone interference problems. Connection wires to internal microphone and earphone should be as short as possible to reduce the interference caused by internal signals. ESD protection has to be implemented on each external connection that is accessable during normal operation of the phone.

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RF Module
Transmitter
The following sections describe the 800, 1900MHz transmitters working from the Duplexers back to the Base Band signals. Antenna A dual band antenna was developed for the phone. The Antenna has two electrical contacts that must be made to the phone. Diplexer Since the product is Dual Band we have two Duplexers. A ceramic 1900 MHz duplexer and a SAW 800 MHz duplexer. Since only one antenna is used it is necessary to diplex the two duplexers together. This is done using a discrete network that is shown in the figure below. Part of this network is printed on the PCB.
1900 Duplexer

800 Duplexer

1900 MHz Transmitter
The following sections describe the 1900MHz transmitters working from the Duplexers back to the Base Band signals. 1900MHz Duplexer Scorpion The 1900 MHz duplexer known, as "Scorpion" is a ceramic mono block device. The front of the duplexer is covered with a shield. It is crucial that this shield is well soldered down to avoid rejection problems. Solder joints along the mono block front (i.e. shield side) are also critical for rejection while solder joints at the rear of duplexer serve only as mechanical securing. Due to the problem of silver leaching the corners of the duplexer should NOT be soldered, only flat sections of the part should be soldered. 1900 MHz Isolator RF Isolators are used the 1900MHz transmitter, its reference designators is Z605. It is in the industry standard 7 x 7 mm packages and an arrow on E Nokia Mobile Phones Ltd.

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the top of the package indicates the direction of power flow. It allows power to flow only from the PA to the Duplexer and not in the reverse direction. This means that the impedance that is presented to the PA remains the same regardless of channel. It also avoids the use of a directional coupler for power detection. 1900 MHz Power Amplifiers Snapper The Power Amplifier is a GaAs HBT Device. The 1900MHz PA is are referred to as SNAPPER, reference designator N606. The device is two stage and requires both external inter stage and external output matching, part of this matching is printed on the PCB. It is packaged in a standard SSOP16 plastic package with a heat sink slug underneath. The metal slug on the underside, which serves primarily as a heat sink, but also as an RF ground connection. A grid of vias are present under the slug to help conduct heat into the PCB and all layers have a maximum amount of copper under the PA's to assist with heat dissipation. The PA is connected directly to Vbatt through an inductor. It is through this inductor that most of the current consumed by the PA flows. The PA is switched on and off by controlling its bias. Since a voltage of greater than 3.8v was required for the bias the 5 volt output from CCONT has been utilized. The signal for controlling the PA comes from MAD and are called TX_GATE_P. This lines switches the +5 volts from CCONT via N60x to the VREF pin on SNAPPER. When the TX_GATE line is high (i.e. at 2.7 volts) the 5 volts is switched onto the bias and the PA is on, if there is no RF input to the PA then it will draw approximately 100 mA. 1900 MHz Transmitter Interstage Filtering Due to the small separation between the Tx Band 1850 1910MHz and the Rx band 1930 1900 MHz it is extremely difficult to filter the Tx noise from the Rx band to a level acceptable to the receiver. To achieve the rejection we required using SAW filter technology, it was necessary to split the band into two 30 MHz wide sections. Splitting the band into two allowed us to get significantly more rejection, however we now have the problem of switching between the two bands. Fortunately it was possible for the vendor to place both these SAW filters in a single 4 x 4mm package reference designator Z602. In order to use this filter, the Tx signal obviously needs to be switched to the correct filter section. This is achieved on the output (before the PA) with a GaAs switch reference designator N609, and on the input by a switch integrated into the upconverter IC Apache reference designator N601. Both switches are controlled by a signal from MAD4 called FILT_SEL. The GaAs switch N609 requires a transistor to control it V614 since it requires both high and low signal simultaneously and only one control line is available from MAD4 to control the switch. 1900 MHz Transmitter Upconverter Apache Apache reference designator N601 is the 1900MHz Up converter. This IC is contained in an SSOP24 plastic package and is responsible for mixing

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NSD3 System Module

the transmit IF signal up to the required RF and amplifying in to a level sufficient to drive the PA to produce the required output power. Apache also incorporates a Voltage Variable Attenuator (VVA), this attenuator provides nearly 20dB of RF power control by varying the TX_RF_AGC line. The VVA is included since it is very difficult to provide all of the huge dynamic range required by CDMA at the intermediate frequency. The Tx upconverter incorporates an IF amplifier (IFA) a mixer with LO buffer followed by RF amplifier (RFA), Voltage Variable Attenuator (VVA) followed by a driver. Finally the driver output is switched to two outputs for each of the split band filter inputs. A SAW filter reference designator Z601 prior to the VVA input filters the output of the RFA. The Apache IC runs on two power supplies for two reasons, one the CCONT was not able to source enough current for the whole IC and secondly the extra 0.3 volts gained by using Vbatt for the Driver stage allows a big improvement in both output power and ACPR. The IFA and the LO buffer are powered by VR4 from CCONT. The RFA and driver supplies come from Vbatt switched by a FET reference designator V606. The control for switching the power to the driver is TX_GATE_P i.e. the same line used to control the PA. The Driver stages are therefore "punctured" in exactly the same way, as the PA's to save current. A block diagram of the Apache IC is shown below:
External BP Filter RFA2_OUT IF+_VDDIF_VDDRFA1_VDD RFA2_VDD DRV_IN DRV_VDD1 DRV_VDD2

VVA Switch RFA1 RFA2 Driver

SW_CNTRL DRV_SRC2 DRV_SRC1

LO_SRCLO_VDD

RFA1_SRC VVA_CNTRL

RFA2_SRC

GNDS

800 MHz Transmitter
The following sections describe the 800MHz transmitters working from the Duplexers back to the Base Band signals. 800 MHz SAW Duplexer The 800 MHz duplexer used is of SAW technology. Proper soldering of all pins is necessary for correct rejection performance. E Nokia Mobile Phones Ltd.

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NSD3 System Module 800 MHz Isolator

PAMS Technical Documentation

RF Isolators are used the 800MHz transmitter, its reference designators is Z60x. It is in the industry standard 7 x 7 mm packages and an arrow on the top of the package indicates the direction of power flow. It allows power to flow only from the PA to the Duplexer and not in the reverse direction. This means that the impedance that is presented to the PA remains the same regardless of channel. It also avoids the use of a directional coupler for power detection. 800 MHz Power Amplifiers Shark The Power Amplifier PA is a GaAs HBT Device. The PA is referred to as SHARK reference designator N605. The device is two stage and requires both external inter stage and external output matching, part of this matching is printed on the PCB. It is packaged in a standard SSOP16 plastic package with a heat sink slug underneath. The metal slug on the underside, which serves primarily as a heat sink, but also as an RF ground connection. A grid of vias are present under the slug to help conduct heat into the PCB and all layers have a maximum amount of copper under the PA's to assist with heat dissipation. Shark 800MHz PA has been designed to work in both Digital (CDMA mode) and Analog (AMPS Mode). The PA is connected directly to Vbatt through an inductor. It is through this inductor that most of the current consumed by the PA flows. The PA is switched on and off by controlling its bias. Since a voltage of greater than 3.8v was required for the bias the 5 volt output from CCONT has been utilized. The signal for controlling the PA come from MAD4 and is called TX_GATE_C for Snapper 1900MHz. This line switches the +5 volts from CCONT via N60x to the appropriate VREF pin on SHARK. When the TX_GATE line is high (i.e. at 2.7 volts) the 5 volts is switched onto the bias and the PA is on, if there is no RF input to the PA then it will draw approximately 100 mA. 800 MHz Transmitter Upconverter Odyssey Odyssey reference designator N604 is the 800 MHz Up converter. This IC is contained in an SSOP28 plastic package and is responsible for mixing the transmit IF signal up to the required RF and amplifying in to a level sufficient to drive the PA to produce the required output power. Odyssey also incorporates a Voltage Variable Attenuator (VVA), this attenuator provides nearly 20dB of RF power control by varying the TX_RF_AGC line. The VVA is included since it is very difficult to provide all of the huge dynamic range required by CDMA at the intermediate frequency. The Tx upconverter incorporates an IF amplifier (IFA) a mixer with LO buffer followed by RF amplifier (RFA), Voltage Variable Attenuator (VVA) followed by a driver. Finally the driver output is switched to two outputs for each of the split band filter inputs. A SAW filter reference designator Z606 prior to the VVA input filters the output of the RFA.

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PAMS Technical Documentation

NSD3 System Module

The Odyssey IC runs on two power supplies for two reasons, one the CCONT was not able to source enough current for the whole IC and secondly the extra 0.3 volts gained by using Vbatt for the Driver stage allows a big improvement in both output power and ACPR. The IFA and the LO buffer are powered by VR5 from CCONT. The RFA and driver supplies come from Vbatt switched by a FET reference designator V602. The control for switching the power to the driver is TX_GATE_C i.e. the same line used to control the PA. The Driver stages are therefore "punctured" in exactly the same way as the PA's to save current.
External BP Filter Mixer_OUT RFA_IN

IF+_VDD

IF_VDD

RFA_SRC

RFA_VDD

DRV_VDD1

DRV_VDD2

IF+_IN IF_IN RFA Mixer VGA Upconverter

LO_VDD

LO_IN

LO_SRC

GNDS

VVA_CNTRL

DRV_SRC2 DRV_SRC1

800 MHz and 1900 MHz Transmitter Intermediate Frequency (TIF) The TIF IC generates the Intermediate Frequency (IF) for both the 800MHz and 1900MHz transmitters. This IC reference designator N604 incorporates the IQ modulator for CDMA mode, 85dB of dynamic range control and a switch for the two transmitters. Also included in the TIF IC is most of the circuitry required for the power detection for both CDMA over power detection and AMPS mode closed loop power control.

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NSD3 System Module
MODE_SEL TX_IP TX_IN TX_QP

PAMS Technical Documentation
BAND_SEL RF_IP RF_IN

RF_QP TX_QN RF_QN

AGC L