Text preview for : 03sys.pdf part of Nokia 5110 Service Manual Gsm Telephone - File 17 - Part 1/3



Back to : gsm_NSE-1NX_İ_.part1.rar | Home

PAMS Technical Documentation NSE­1 Series Transceivers

Chapter 3 System Module

Original 03/98

NSE­1 System Module

PAMS Technical Documentation

CONTENTS
Transceiver NSE­1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External and Internal Connectors . . . . . . . . . . . . . . . . . . . . . System Connector Contacts . . . . . . . . . . . . . . . . . . . . . . . RF Connector Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltages and Power Consumtion . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bottom Connector External Contacts . . . . . . . . . . . . . . . Bottom Connector Signals . . . . . . . . . . . . . . . . . . . . . . . . Battery Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SIM Card Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Microphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RTC Backup Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buzzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Startup Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery Overvoltage Protection . . . . . . . . . . . . . . . . . . . . Battery Removal During Charging . . . . . . . . . . . . . . . . . . Different PWM Frequencies ( 1Hz and 32 Hz) . . . . . . . Battery Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . Switched Mode Supply VSIM . . . . . . . . . . . . . . . . . . . . . . Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power up with a charger . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up With The Power Switch (PWRONX) . . . . . . . Power Up by RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up by IBI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Acting Dead . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Audio control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­5 3­5 3­5 3­6 3­7 3­7 3­8 3­9 3­9 3­9 3 ­ 10 3 ­ 10 3 ­ 10 3 ­ 12 3 ­ 12 3 ­ 14 3 ­ 15 3 ­ 15 3 ­ 15 3 ­ 16 3 ­ 17 3 ­ 17 3 ­ 18 3 ­ 18 3 ­ 19 3 ­ 20 3 ­ 21 3 ­ 22 3 ­ 23 3 ­ 23 3 ­ 25 3 ­ 25 3 ­ 26 3 ­ 26 3 ­ 26 3 ­ 27 3 ­ 27 3 ­ 27 3 ­ 27 3 ­ 27 3 ­ 28 3 ­ 28 3 ­ 29 Original 03/98

Page 3 ­ 2

PAMS Technical Documentation

NSE­1 System Module

External Audio Connections . . . . . . . . . . . . . . . . . . . . . . . Analog Audio Accessory Detection . . . . . . . . . . . . . . . . . Headset Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Audio Connections . . . . . . . . . . . . . . . . . . . . . . . . 4­wire PCM Serial Interface . . . . . . . . . . . . . . . . . . . . . . . Alert Signal Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MAD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SRAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EEPROM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MCU Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . COBBA­GJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RTC backup battery charging . . . . . . . . . . . . . . . . . . . . . . Vibra Alerting Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IBI Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Phone Power­on by IBI . . . . . . . . . . . . . . . . . . . . . . . . . . . IBI power­on by phone . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGC strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AFC function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RX interstage filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1st mixer in CRFU_1a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1st IF­filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TX interstage filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power amplifier MMIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synthesizer blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VHF VCO and low pass filter . . . . . . . . . . . . . . . . . . . . . . . . UHF PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UHF PLL block in PLUSSA . . . . . . . . . . . . . . . . . . . . . . . . . .

3 ­ 30 3 ­ 31 3 ­ 31 3 ­ 32 3 ­ 32 3 ­ 33 3 ­ 33 3 ­ 33 3 ­ 43 3 ­ 43 3 ­ 43 3 ­ 43 3 ­ 43 3 ­ 44 3 ­ 44 3 ­ 45 3 ­ 45 3 ­ 45 3 ­ 46 3 ­ 46 3 ­ 46 3 ­ 48 3 ­ 48 3 ­ 48 3 ­ 49 3 ­ 50 3 ­ 50 3 ­ 50 3 ­ 50 3 ­ 50 3 ­ 52 3 ­ 53 3 ­ 55 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 57 3 ­ 57 3 ­ 57 3 ­ 57 3 ­ 57 3 ­ 57 3 ­ 57

Original 03/98

Page 3 ­ 3

NSE­1 System Module

PAMS Technical Documentation

UHF VCO module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UHF local signal input in CRFU_1a . . . . . . . . . . . . . . . . . . . Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF connector and antenna switch . . . . . . . . . . . . . . . . . . . . Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synthesizer control timing . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter power switching timing diagram . . . . . . . . . . . Synthesizer clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram of Baseband Blocks . . . . . . . . . . . . . . . . . . . Parts list of UP8S (EDMS Issue 7.1) Code: 0200952 . . . . . . . . Parts list of UP8R (EDMS Issue 3.2) Code: 0201190 . . . . . . . Schematic Diagrams: UP8S and UP8R Block Diagram of System/RF Blocks . . . . . . . . . . . . . . . . . . . . . . Circuit Diagram of Baseband (Version 9 Edit 64) for layout 09 Circuit Diagram of Power Supply (Version 9 Edit 216) for layout 09 Circuit Diagram of SIM Connectors (Version 9 Edit 54) for layout 09 Circuit Diagram of CPU Block (Version 9 Edit 155) for layout 09 Circuit Diagram of Audio (Version 9 Edit 115) for layout 09 . . Circuit Diagram of IR Module (Version 9 Edit 93) for layout 09 Circuit Diagram of RF Block (Version 9 Edit 187) for layout 09 User Interface Connector (Version 9 Edit 75) for layout 09 . . . Layout Diagram of UP8S ­ Top (Version 09) . . . . . . . . . . . . . . . . Layout Diagram of UP8S ­ Bottom (Version 09) . . . . . . . . . . . . . Block Diagram of System/RF Blocks . . . . . . . . . . . . . . . . . . . . . .

3 ­ 58 3 ­ 58 3 ­ 58 3 ­ 58 3 ­ 61 3 ­ 61 3 ­ 63 3 ­ 63 3 ­ 64 3 ­ 65 3 ­ 72

3/A3­S1 3/A3­S2 3/A3­S3 3/A3­S4 3/A3­S5 3/A3­S6 3/A3­S7 3/A3­S8 3/A3­S9 3/A3­S10 3/A3­S11 3/A3­R1

Circuit Diagram of Baseband (Version 15.1 Edit 4) for layout 15 . . . . . 3/A3­R2 Circuit Diagram of Power Supply (Version 15.1 Edit 8) for layout 15 . . 3/A3­R3 Circuit Diagram of SIM Connectors (Version 15.1 Edit 5) for layout 15 3/A3­R4 Circuit Diagram of CPU Block (Version 15.1 Edit 7) for layout 15 . . . . . 3/A3­R5 Circuit Diagram of Audio (Version 15 Edit 5) for layout 15 . . . 3/A3­R6

Circuit Diagram of IR Module (Version 15.1 Edit 10) for layout 15 . . . . 3/A3­R7 Circuit Diagram of RF Block (Version 15 Edit 8) for layout 15 . User Interface Connector (Version 15.1 Edit 5) for layout 15 . Layout Diagram of UP8R ­ Top (Version 15) . . . . . . . . . . . . . . . . Layout Diagram of UP8R ­ Bottom (Version 15) . . . . . . . . . . . . 3/A3­R8 3/A3­R9 3/A3­R10 3/A3­R11 Original 03/98

Page 3 ­ 4

PAMS Technical Documentation

NSE­1 System Module

Transceiver NSE­1
Introduction
The NSE­1 is a radio transceiver unit designed for the GSM network. It is a GSM phase 2 power class 4 transceiver providing 15 power levels with a maximum output power of 2 W. The transceiver is a true 3 V transceiver. The transceiver consists of System/RF module (UP8S/UP8R), User interface module (UE4S) and assembly parts. The transceiver has full graphic display and one soft key based user interface. The antenna is a fixed helix. External antenna connection is provided by rear RF connector

Functional Description
There are six different operation modes: ­ power off mode ­ idle mode ­ NSPS mode ­ active mode ­ charge mode ­ local mode In the power off mode only the circuits needed for power up are supplied. In the idle mode circuits are powered down and only sleep clock is running. In the No Serve Power Save mode circuits are powered down, and only sleep clock is running if no carrier is found during the scanning period. The purpose of this mode is to reduce power consumption in the non­ network area. In the active mode all the circuits are supplied with power although some parts might be in the idle state part of the time. The charge mode is effective in parallel with all previous modes. The charge mode itself consists of two different states, i.e. the charge and the maintenance mode. The local mode is used for alignment and testing.

Original 03/98

Page 3 ­ 5

NSE­1 System Module

PAMS Technical Documentation

Interconnection Diagram

Keypad

10

9

User Interface Module UE4S
28 6

Display

2

Earpiece

SIM

4

Antenna

1

System/RF Module UP8S or UP8R
2 Mic System Connector 6 2 Charger 3+3

Battery

RF Connector

Page 3 ­ 6

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

System Module
External and Internal Connectors

Rubber boot Microphone Solderable element, 2 pcs

Contact 1 DC­jack Contact 2 Microphone port Contacts 3...8 Contact 9 Cable/Cradle connector, guiding/fixing hole, 3 pcs

Original 03/98

Page 3 ­ 7

NSE­1 System Module

PAMS Technical Documentation

System Connector Contacts

Contact 1

Line Symbol VIN

Parameter

Minimum

Typical / Nominal 8.4 800 7.6 370 0 8.4 800 7.6 370

Maximum 9.3 850 16.0 420 0 9.3 850 16.0 420 2.8

Unit / Notes

Charger input volt- 7.1 age 720 Charger input cur- 7.24 rent 320 0

V/ Unloaded ACP­9 Charger mA/ Supply current V/ Unloaded ACP­7 Charger mA/ Supply current V/ Supply ground V/ Unloaded ACP­9 Charger mA/ Supply current V/ Unloaded ACP­7 Charger mA/ Supply current V/ Charger control (PWM) high Hz /PWM frequency for charger V V/ Charger control (PWM) high Hz /PWM frequency for charger Microphone sound ports mVrms mVrms mVrms Serial bidirectional control bus. Baud rate 9600 Bit/s V/ Fbus receive. V/ Serial Data, Baud rate 9.6k­230.4kBit/s V/ Fbus transmit. V/ Serial Data, Baud rate 9.6k­230.4kBit/s V/ Supply ground

DC­ JACK DC­ JACK

L_GND Charger ground input VIN

Charger input volt- 7.1 age 720 Charger input cur- 7.24 rent 320 Output high voltage PWM frequency output low voltage 2.0

DC­ JACK

CHRG CTRL

32 0 2.0 32 0.5 2.8

2

CHRG CTRL

Output high voltage PWM frequency Acoustic signal

Mic ports 3 4 5 6 XMIC SGND XEAR MBUS

N/A

N/A 60

N/A 1 Vpp 0

Input signal voltage Signal ground Output signal voltage I/O low voltage I/O high voltage Input low voltage Input high voltage 0 2.0 0 2.0 0

80

1 Vpp 0.8 2.8 0.8 2.8 0.8 2.8

7

FBUS_ RX FBUS_ TX

8

Output low voltage 0 Output high volt2.0 age 0 0

9

L_GND Charger ground input

0

Page 3 ­ 8

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

RF Connector Contacts
Contact 1 2 Line Symbol EXT_ANT GND Im edance Impedance 50ohm Parameter Minimum Typical / Nominal Maximum Unit / Notes

External antenna connector, tor 0 V DC

Supply Voltages and Power Consumtion
Connector Charging Charging Charging Charging Line Symbol VIN VIN I / VIN I / VIN Minimum 7.1 7.25 720 320 Typical / Nominal 8.4 7.6 800 370 Maximum/ Peak 9.3 16.0 850 420 Unit / Notes V/ Travel charger, ACP­9 V/ Travel charger. ACP­7 mA/ Travel charger, ACP­9 mA/ Travel charger, ACP­7

Functional Description
The transceiver electronics consist of the Radio Module ie. RF + System blocks, the UI PCB, the display module and audio components. The keypad and the display module are connected to the Radio Module with a connectors. System blocks and RF blocks are interconnected with PCB wiring. The Transceiver is connected to accessories via a bottom system connector with charging and accessory control. The System blocks provide the MCU, DSP and Logic control functions in MAD ASIC, external memories, audio processing and RF control hardware in COBBA ASIC. Power supply circuitry CCONT ASIC delivers operating voltages both for the System and the RF blocks. Charging control ASIC CHAPS is integrated power switch for battery charging. The RF block is designed for a handportable phone which operates in the GSM system. The purpose of the RF block is to receive and demodulate the radio frequency signal from the base station and to transmit a modulated RF signal to the base station. The PLUSSA ASIC is used for VHF and PLL functions. The CRFU ASIC is used at the front end.

Original 03/98

Page 3 ­ 9

NSE­1 System Module

PAMS Technical Documentation

Baseband Module
Block Diagram
TX/RX SIGNALS RF SUPPLIES PA SUPPLY 13MHz SYSTEM CLOCK CLK

COBBA SUPPLY

COBBA

CCONT

SIM

BB SUPPLY UI

32kHz CLK SLEEP CLOCK

MAD + MEMORIES

VBAT

BATTERY CHAPS

AUDIOLINES BASEBAND SYSCON

Technical Summary
The baseband module consists of four asics, CHAPS, CCONT, COBBA­ GJ and MAD2, which take care of the baseband functions of NSE­1. The baseband is running from a 2.8V power rail, which is supplied by a power controlling asic. In the CCONT asic there are 6 individually controlled regulator outputs for RF­section and two outputs for the baseband. In addition there is one +5V power supply output VCP for RF­part. The CCONT contains also a SIM interface, which supports both 3V and 5V SIM­cards. A real time clock function is integrated into the CCONT, which utilizes the same 32kHz clock supply as the sleep clock. A backup power supply is provided for the RTC, which keeps the real time clock running when the main battery is removed. The backup power supply is a rechargable polyacene battery. The backup time with this battery is minimum of ten minutes.

Page 3 ­ 10

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

The interface between the baseband and the RF section is handled by a specific asic. The COBBA asic provides A/D and D/A conversion of the in­phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the UI section. The COBBA supplies the analog TXC and AFC signals to rf section according to the MAD DSP digital control and converts analog AGC into digital signal for the DSP. Data transmission between the COBBA and the MAD is implemented using a parallel connection for high speed signalling and a serial connection for PCM coded audio signals. Digital speech processing is handled by the MAD asic. The COBBA asic is a dual voltage circuit, the digital parts are running from the baseband supply VBB and the analog parts are running from the analog supply VCOBBA. The baseband supports three external microphone inputs and two external earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an external microphone signal source. The microphone signals from different sources are connected to separate inputs at the COBBA asic. The output for the internal earphone is a dual ended type output capable of driving a dynamic type speaker. Input and output signal source selection and gain control is performed inside the COBBA asic according to control messages from the MAD. Keypad tones, DTMF, and other audio tones are generated and encoded by the MAD and transmitted to the COBBA for decoding. A buzzer and an external vibra alert control signals are generated by the MAD with separate PWM outputs. EMC shieding is implemented using a metallized plastic B­cover with a conductive rubber seal on the ribs. On the other side the engine is shielded with a frame having a conductive rubber on the inner walls, which makes a contact to a ground ring of the engine board and a ground plane of the UI­board. Heat generated by the circuitry will be conducted out via the PCB ground planes.

Original 03/98

Page 3 ­ 11

NSE­1 System Module

PAMS Technical Documentation

Bottom Connector External Contacts
Contact 1 DC­jack side contact (DC­plug ring) DC­jack center pin DC­jack side contact (DC­plug jacket) 2 Microphone acoustic ports 3 4 5 6 7 8 9 XMIC SGND XEAR MBUS FBUS_RX FBUS_TX L_GND Line Symbol VIN L_GND Charger input voltage Charger ground Function

VIN CHRG_CTRL

Charger input voltage Charger control output (from phone)

CHRG_CTRL

Charger control output (from phone) Acoustic signal (to phone) Accessory microphone signal input (to phone) Accessory signal ground Accessory earphone signal output (from phone) MBUS, bidirectional flash programming clock signal FBUS, unidirectional flash programming serial data input (to phone) FBUS, unidirectional flash programming serial data output (from phone) Charger ground

Bottom Connector Signals
Pin 1,3 Name VIN Min 7.25 3.25 320 7.1 3.25 720 2 4,5 L_GND CHRG_ CTRL 0 0 2.0 32 1 6 7 MICP MICN N/A N/A 99 Typ 7.6 3.6 370 8.4 3.6 800 Max 7.95 16.9 3.95 420 9.3 3.95 850 0 0.5 2.85 Unit V V V mA V V mA V V V Hz % Notes Unloaded ACP­7 Charger (5kohms load) Peak output voltage (5kohms load) Loaded output voltage (10ohms load) Supply current Unloaded ACP­9 Charger Loaded output voltage (10ohms load) Supply current Supply ground Charger control PWM low Charger control PWM high PWM frequency for a fast charger PWM duty cycle see section Internal microphone see section Internal microphone

Page 3 ­ 12

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Pin 8

Name XMIC

Min 2.0

Typ

Max 2.2 1

Unit k Vpp V V µA mV mV µF µF

Notes Input AC impedance Maximum signal level Mute (output DC level) Unmute (output DC level) Bias current Maximum signal level Microphone signal Connected to COBBA MIC3P input Output AC impedance (ref. GND) Series output capacitance Resistance to phone ground Output AC impedance (ref. GND) Series output capacitance Load AC impedance to SGND (Headset) Load AC impedance to SGND (Accessory) Maximum output level (no load) Output signal level Load DC resistance to SGND (Accessory) Load DC resistance to SGND (Headset) DC voltage (47k pull­up to VBB) Earphone signal (HF­ HFCM) Connected to COBBA HF output Serial bidirectional control bus. Baud rate 9600 Bit/s Phone has a 4k7 pullup resistor Fbus receive. Serial Data Baud rate 9 6k 230 4kBit/s 9.6k­230.4kBit/s Phone has a 220k pulldown resistor Fbus transmit. Serial Data Baud rate 9 6k 230 4kBit/s 9.6k­230.4kBit/s Phone has a 47k pullup resistor Supply ground

1.47 2.5 100 58 HMIC 9 SGND 0 3.2 47 10 380 10 XEAR 47 10 16 4.7 10 1.0 22 10 16 2.8 HEAR 11 MBUS 0 2.0 0 2.0 0 2.0 0 28 logic low logic high l i hi h logic low logic high l i hi h logic low logic high l i hi h

1.55 2.85 600 490 29.3

300

k Vpp

626

mV k

1500

V

626 0.8 2.85 0.8 2.85 0.5 2.85 0.3

mV V

12

FBUS_RX

V

13

FBUS_TX

V

14

GND

V

Original 03/98

Page 3 ­ 13

NSE­1 System Module

PAMS Technical Documentation

Battery Connector
Pin 1 Name BVOLT Min 3.0 Typ 3.6 Max 4.5 50 5.0 5.3 2 BSI 0 2.85 V Unit V Notes Battery voltage Maximum voltage in call state with charger Maximum voltage in idle state with charger Battery size indication Phone has 100kohm pull up resistor. SIM Card removal detection (Treshold is 2.4V@VBB=2.8V) 2.2 20 27 68 3 BTEMP 0 22 18 24 51 91 1.4 kohm kohm kohm kohm V Battery indication resistor (Ni battery) Battery indication resistor (service battery) Battery indication resistor (4.1V Lithium battery) Battery indication resistor (4.2V Lithium battery) Battery temperature indication Phone has a 100k (+­5%) pullup resistor, Battery package has a NTC pulldown resistor: 47k+­5%@+25C , B=4050+­3% Phone power up by battery (input) Power up pulse width Battery power up by phone (output) Power up pulse width Local mode initialization (in production) PWM control to VIBRA BATTERY Battery ground

2.1 5 1.9 90 0 20 4 BGND 0 22 100 10

3 20 2.85 200 1 25 0

V ms V ms kohm kHz V

Page 3 ­ 14

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

SIM Card Connector
Pin 4 3, 5 6 Name GND VSIM DATA Parameter GND 5V SIM Card 3V SIM Card 5V Vin/Vout 3V Vin/Vout 2 SIMRST 5V SIM Card 3V SIM Card 1 SIMCLK Frequency Trise/Tfall Min 0 4.8 2.8 4.0 0 2.8 0 4.0 2.8 5.0 3.0 "1" "0" "1" "0" "1" "1" 3.25 25 Typ Max 0 5.2 3.2 VSIM 0.5 VSIM 0.5 VSIM VSIM MHz ns SIM clock V SIM reset V SIM data Trise/Tfall max 1us Unit V V Notes Ground Supply voltage

Internal Microphone
Pin 6 Name MICP Min Typ 0.55 Max 4.1 Unit mV Notes Connected to COBBA MIC2N input. The maximum value corresponds to1 kHz, 0 dBmO network level with input amplifier gain set to 32 dB. typical value is maximum value ­ 16 dB. Connected to COBBA MIC2P input. The maximum value corresponds to1 kHz, 0 dBmO network level with input amplifier gain set to 32 dB. typical value is maximum value ­ 16 dB.

7

MICN

0.55

4.1

mV

RTC Backup Battery The RTC block in CCONT needs a power backup to keep the clock running when the phone battery is disconnected. The backup power is supplied from a rechargable polyacene battery that can keep the clock running minimum of 10 minutes. The backup battery is charged from the main battery through CHAPS.
Signal VBACK Parameter Backup battery charging from CHAPS Backup battery charging from CHAPS VBACK Backup battery supply to CCONT Backup battery supply to CCONT Min 3.02 100 2 80 Typ 3.15 200 Max 3.28 500 3.28 V uA V uA Vout@VBAT­0.2V Battery capacity 65uAh Unit Notes

Original 03/98

Page 3 ­ 15

NSE­1 System Module

PAMS Technical Documentation

Buzzer
Signal Maximum output current 2mA Input high level 2.5V Input low level 0.2V Level (PWM) range, % 0...50 (128 linear steps) Frequency range, Hz 440...4700

BuzzPWM / BUZZER

Page 3 ­ 16

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Functional Description
Power Distribution
In normal operation the baseband is powered from the phone`s battery. The battery consists of one Lithium­Ion cell. There is also a possibility to use batteries consisting of three Nickel Metal Hydride cells. An external charger can be used for recharging the battery and supplying power to the phone. The charger can be either a standard charger that can deliver around 400 mA or so called performance charger, which can deliver supply current up to 850 mA. The baseband contains components that control power distribution to whole phone excluding those parts that use continuous battery supply. The battery feeds power directly to three parts of the system: CCONT, power amplifier, and UI (buzzer and display and keyboard lights). Figure below shows a block diagram of the power distribution. The power management circuit CHAPS provides protection agains overvoltages, charger failures and pirate chargers etc. that would otherwise cause damage to the phone.

PA SUPPLY

RF SUPPLIES

VCOBBA COBBA UI VBAT VBB VBB PURX VBB CCONT PWRONX PWM CNTVR

VSIM SIM

RTC BACKUP

MAD + MEMORIES LIM CHAPS

VBAT

BATTERY

BASEBAND

VIN BOTTOM CONNECTOR

Original 03/98

Page 3 ­ 17

NSE­1 System Module

PAMS Technical Documentation

Battery charging The electrical specifications give the idle voltages produced by the acceptable chargers at the DC connector input. The absolute maximum input voltage is 30V due to the transient suppressor that is protecting the charger input. At phone end there is no difference between a plug­in charger or a desktop charger. The DC­jack pins and bottom connector charging pads are connected together inside the phone.

MAD

LIM VOUT 0R22

TRANSCEIVER
1.5A VCH GND 47k 1u VIN

CHARGER

CHAPS
RSENSE PWM

30V

VBAT MAD CCONTINT

ICHAR PWM_OUT VCHAR

22k

CHRG_CTRL

NOT IN ACP­7

CCONT
GND

1n 4k7 L_GND

Startup Charging When a charger is connected, the CHAPS is supplying a startup current minimum of 130mA to the phone. The startup current provides initial charging to a phone with an empty battery. Startup circuit charges the battery until the battery voltage level is reaches 3.0V (+/­ 0.1V) and the CCONT releases the PURX reset signal and program execution starts. Charging mode is changed from startup charging to PWM charging that is controlled by the MCU software. If the battery voltage reaches 3.55V (3.75V maximum) before the program has taken control over the charging, the startup current is switched off. The startup current is switched on again when the battery voltage is sunken 100mV (nominal).
Parameter VOUT Start­ up mode cutoff limit VOUT Start­ up mode hysteresis NOTE: Cout = 4.7 uF Start­up regulator output current VOUT = 0V ... Vstart Symbol Vstart Vstarthys Istart Min 3.45 80 130 Typ 3.55 100 165 Max 3.75 200 200 Unit V mV mA

Page 3 ­ 18

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Battery Overvoltage Protection Output overvoltage protection is used to protect phone from damage. This function is also used to define the protection cutoff voltage for different battery types (Li or Ni). The power switch is immediately turned OFF if the voltage in VOUT rises above the selected limit VLIM1 or VLIM2.
Parameter Output voltage cutoff limit (during transmission or Li­ battery) Output voltage cutoff limit (no transmission or Ni­battery) Symbol VLIM1 LIM input LOW Min 4.4 Typ 4.6 Max 4.8 Unit V

VLIM2

HIGH

4.8

5.0

5.2

V

The voltage limit (VLIM1 or VLIM2) is selected by logic LOW or logic HIGH on the CHAPS (N101) LIM­ input pin. Default value is lower limit VLIM1. When the switch in output overvoltage situation has once turned OFF, it stays OFF until the the battery voltage falls below VLIM1 (or VLIM2) and PWM = LOW is detected. The switch can be turned on again by setting PWM = HIGH.

VCH

VCH
t VOUT
VLIM1 or VLIM2

t SWITCH

ON

OFF

ON

PWM (32Hz)

Original 03/98

Page 3 ­ 19

NSE­1 System Module

PAMS Technical Documentation

Battery Removal During Charging Output overvoltage protection is also needed in case the main battery is removed when charger connected or charger is connected before the battery is connected to the phone. With a charger connected, if VOUT exceeds VLIM1 (or VLIM2), CHAPS turns switch OFF until the charger input has sunken below Vpor (nominal 3.0V, maximum 3.4V). MCU software will stop the charging (turn off PWM) when it detects that battery has been removed. The CHAPS remains in protection state as long as PWM stays HIGH after the output overvoltage situation has occured.

VCH Vpor (Standard Charger)
VLIM Drop depends on load & C in phone Istart off due to VCH
VOUT

t PWM "1" "0" t SWITCH ON OFF 1 2 3 4 5 6 7 t

1. Battery removed, (standard) charger connected, VOUT rises (follows charger voltage) 2. VOUT exceeds limit VLIM(X), switch is turned immediately OFF 3. VOUT falls (because no battery) , also VCH Vpor and VOUT < VLIM(X) ­> switch turned on again (also PWM is still HIGH) and VOUT again exceeds VLIM(X). 4. Software sets PWM = LOW ­> CHAPS does not enter PWM mode 5. PWM low ­> Startup mode, startup current flows until Vstart limit reached 6. VOUT exceeds limit Vstart, Istart is turned off 7. VCH falls below Vpor

Page 3 ­ 20

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Different PWM Frequencies ( 1Hz and 32 Hz) When a travel charger (2­ wire charger) is used, the power switch is turned ON and OFF by the PWM input when the PWM rate is 1Hz. When PWM is HIGH, the switch is ON and the output current Iout = charger current ­ CHAPS supply current. When PWM is LOW, the switch is OFF and the output current Iout = 0. To prevent the switching transients inducing noise in audio circuitry of the phone soft switching is used. The performance travel charger (3­ wire charger) is controlled with PWM at a frequency of 32Hz. When the PWM rate is 32Hz CHAPS keeps the power switch continuously in the ON state.

SWITCH

ON

OFF

ON

OFF

ON

PWM (1Hz)

SWITCH

ON

PWM (32Hz)

Original 03/98

Page 3 ­ 21

NSE­1 System Module

PAMS Technical Documentation

Battery Identification Different battery types are identified by a pulldown resistor inside the battery pack. The BSI line inside transceiver has a 100k pullup to VBB. The MCU can identify the battery by reading the BSI line DC­voltage level with a CCONT (N100) A/D­converter.

BVOLT

BATTERY
BTEMP

VBB 2.8V

TRANSCEIVER
100k

BSI
Rs

10k

BSI
10n

CCONT

BGND

SIMCardDetX

MAD

The battery identification line is used also for battery removal detection. The BSI line is connected to a SIMCardDetX line of MAD2 (D200). SIMCardDetX is a threshold detector with a nominal input switching level 0.85xVcc for a rising edge and 0.55xVcc for a falling edge. The battery removal detection is used as a trigger to power down the SIM card before the power is lost. The BSI contact in the battery pack is made 0.7mm shorter than the supply voltage contacts so that there is a delay between battery removal detection and supply power off.

Vcc 0.850.05 Vcc 0.550.05 Vcc

SIMCARDDETX GND SIGOUT

Page 3 ­ 22

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Battery Temperature The battery temperature is measured with a NTC inside the battery pack. The BTEMP line inside transceiver has a 100k pullup to VREF. The MCU can calculate the battery temperature by reading the BTEMP line DC­ voltage level with a CCONT (N100) A/D­converter.

BVOLT

BATTERY
BSI
VREF 1.5V

TRANSCEIVER

100k

BTEMP
RT NTC 1k 1k

10k

BTEMP

CCONT

BGND

10n

VibraPWM

MAD

MCUGenIO4

Supply Voltage Regulators The heart of the power distrubution is the CCONT. It includes all the voltage regulators and feeds the power to the whole system. The baseband digital parts are powered from the VBB regulator which provides 2.8V baseband supply. The baseband regulator is active always when the phone is powered on. The VBB baseband regulator feeds MAD and memories, COBBA digital parts and the LCD driver in the UI section. There is a separate regulator for a SIM card. The regulator is selectable between 3V and 5V and controlled by the SIMPwr line from MAD to CCONT. The COBBA analog parts are powered from a dedicated 2.8V supply VCOBBA. The CCONT supplies also 5V for RF. The CCONT contains a real time clock function, which is powered from a RTC backup when the main battery is disconnected.

Original 03/98

Page 3 ­ 23

NSE­1 System Module

PAMS Technical Documentation

The RTC backup is rechargable polyacene battery, which has a capacity of 50uAh (@3V/2V) The battery is charged from the main battery voltage by the CHAPS when the main battery voltage is over 3.2V. The charging current is 200uA (nominal). Operating mode Power off Power on Reset Sleep Vref Off On On On RF REG Off On/Off Off VR1 On Off VCOBBA Off On On Off VBB Off On On On VSIM Off On Off On SIMIF Pull down On/Off Pull down On/Off

NOTE: CCONT includes also five additional 2.8V regulators providing power to the RF section. These regulators can be controlled either by the direct control signals from MAD or by the RF regulator control register in CCONT which MAD can update. Below are the listed the MAD control lines and the regulators they are controlling. ­ TxPwr controls VTX regulator (VR5) ­ RxPwr controls VRX regulator (VR2) ­ SynthPwr controls VSYN_1 and VSYN_2 regulators (VR4 and VR3) ­ VCXOPwr controls VXO regulator (VR1) CCONT generates also a 1.5 V reference voltage VREF to COBBA, PLUSSA and CRFU. The VREF voltage is also used as a reference to some of the CCONT A/D converters. In additon to the above mentioned signals MAD includes also TXP control signal which goes to PLUSSA power control block and to the power amplifier. The transmitter power control TXC is led from COBBA to PLUSSA.

Page 3 ­ 24

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Switched Mode Supply VSIM There is a switched mode supply for SIM­interface and 5V regulator, which supplies to RF section. SIM voltage is selected via serial IO. The 5V SMR can be switched on independently of the SIM voltage selection, but can't be switched off when VSIM voltage value is set to 5V. NOTE: VSIM and V5V can give together a total of 30mA. In the next figure the principle of the SMR / VSIM­functions is shown. CCONT V5V_4 VBAT V5V_3 External

V5V_2 VSIM 5V reg V5V 5V 5/3V

Power Up The baseband is powered up by: 1. Pressing the power key, that generates a PWRONX interrupt signal from the power key to the CCONT, which starts the power up procedure. Connecting a charger to the phone. The CCONT recognizes the charger from the VCHAR voltage and starts the power up procedure. A RTC interrupt. If the real time clock is set to alarm and the phone is switched off, the RTC generates an interrupt signal, when the alarm is gone off. The RTC interrupt signal is connected to the PWRONX line to give a power on signal to the CCONT just like the power key. A battery interrupt. Intelligent battery packs have a possibility to power up the phone. When the battery gives a short (10ms) voltage pulse through the BTEMP pin, the CCONT wakes up and starts the power on procedure.

2.

3.

4.

Original 03/98

Page 3 ­ 25

NSE­1 System Module

PAMS Technical Documentation

Power up with a charger When the charger is connected CCONT will switch on the CCONT digital voltage as soon as the battery voltage exeeds 3.0V. The reset for CCONT's digital parts is released when the operating voltage is stabilized ( 50 us from switching on the voltages). Operating voltage for VCXO is also switched on. The counter in CCONT digital section will keep MAD in reset for 62 ms (PURX) to make sure that the clock provided by VCXO is stable. After this delay MAD reset is relased, and VCXO ­control (SLEEPX) is given to MAD. The diagram assumes empty battery, but the situation would be the same with full battery: When the phone is powered up with an empty battery pack using the standard charger, the charger may not supply enough current for standard powerup procedure and the powerup must be delayed. Power Up With The Power Switch (PWRONX) When the power on switch is pressed the PWRONX signal will go low. CCONT will switch on the CCONT digital section and VCXO as was the case with the charger driven power up. If PWRONX is low when the 64 ms delay expires, PURX is released and SLEEPX control goes to MAD. If PWRONX is not low when 64 ms expires, PURX will not be released, and CCONT will go to power off ( digital section will send power off signal to analog parts)

SLEEPX

PURX

CCPURX PWRONX VR1,VR6 VBB (2.8V) Vchar

1 2

3

1:Power switch pressed ==> Digital voltages on in CCONT (VBB) 2: CCONT digital reset released. VCXO turned on 3: 62 ms delay to see if power switch is still pressed.

Power Up by RTC RTC ( internal in CCONT) can power the phone up by changing RTCPwr to logical "1". RTCPwr is an internal signal from the CCONT digital section. Original 03/98

Page 3 ­ 26

PAMS Technical Documentation

NSE­1 System Module

Power Up by IBI IBI can power CCONT up by sending a short pulse to logical "1". RTCPwr is an internal signal from the CCONT digital section. Acting Dead If the phone is off when the charger is connected, the phone is powered on but enters a state called "acting dead". To the user the phone acts as if it was switched off. A battery charging alert is given and/or a battery charging indication on the display is shown to acknowledge the user that the battery is being charged. Active Mode In the active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. All the CCONT regulators are operating. There are several substates in the active mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc.. Sleep Mode In the sleep mode, all the regulators except the baseband VBB and the SIM card VSIM regulators are off. Sleep mode is activated by the MAD after MCU and DSP clocks have been switched off. The voltage regulators for the RF section are switched off and the VCXO power control, VCXOPwr is set low. In this state only the 32 kHz sleep clock oscillator in CCONT is running. The flash memory power down input is connected to the ExtSysResetX signal, and the flash is deep powered down during the sleep mode. The sleep mode is exited either by the expiration of a sleep clock counter in the MAD or by some external interrupt, generated by a charger connection, key press, headset connection etc. The MAD starts the wake up sequence and sets the VCXOPwr and ExtSysResetX control high. After VCXO settling time other regulators and clocks are enabled for active mode. If the battery pack is disconnect during the sleep mode, the CCONT pulls the SIM interface lines low as there is no time to wake up the MCU. Charging Charging can be performed in any operating mode. The charging algorithm is dependent on the used battery technology. The battery type is indicated by a resistor inside the battery pack. The resistor value corresponds to a specific battery capacity. This capacity value is related to the battery technology as different capacity values are achieved by using different battery technology.

Original 03/98

Page 3 ­ 27

NSE­1 System Module

PAMS Technical Documentation

The battery voltage, temperature, size and current are measured by the CCONT controlled by the charging software running in the MAD. The power management circuitry controls the charging current delivered from the charger to the battery. Charging is controlled with a PWM input signal, generated by the CCONT. The PWM pulse width is controlled by the MAD and sent to the CCONT through a serial data bus. The battery voltage rise is limited by turning the CHAPS switch off when the battery voltage has reached 4.2V (LiIon) or 5.2V (NiMH, 5V in call mode). Charging current is monitored by measuring the voltage drop across a 220mohm resistor. Power Off The baseband is powered down by: 1. 2. 3. 4. Pressing the power key, that is monitored by the MAD via keyboard line (row 4), which starts the power down procedure. If the battery voltage is dropped below the operation limit, either by not charging it or by removing the battery. Letting the CCONT watchdog expire, which switches off all CCONT regulators and the phone is powered down. Setting the real time clock to power off the phone by a timer. The RTC generates an interrupt signal, when the alarm is gone off. The RTC interrupt signal is connected to the PWRONX line to give a power off signal to the CCONT just like the power key.

The power down is controlled by the MAD. When the power key has been pressed long enough or the battery voltage is dropped below the limit the MCU initiates a power down procedure and disconnects the SIM power. Then the MCU outputs a system reset signal and resets the DSP. If there is no charger connected the MCU writes a short delay to CCONT watchdog and resets itself. After the set delay the CCONT watchdog expires, which activates the PURX and all regulators are switched off and the phone is powered down by the CCONT. If a charger is connected when the power key is pressed the phone enters into the acting dead mode. Watchdog The Watchdog block inside CCONT contains a watchdog counter and some additional logic which are used for controlling the power on and power off procedures of CCONT. Watchdog output is disabled when WDDisX pin is tied low. The WD-counter runs during that time, though. Watchdog counter is reset internally to 32s at power up. Normally it is reset by MAD writing a control word to the WDReg. Watchdog counter can be disabled b grounding CCONT (N100) pin 29. Original 03/98

Page 3 ­ 28

PAMS Technical Documentation

NSE­1 System Module

Audio control
The audio control and processing is taken care by the COBBA­GJ, which contains the audio and RF codecs, and the MAD2, which contains the MCU, ASIC and DSP blocks handling and processing the audio signals. A detailed audio specification can be found from document
COBBA
Bias + EMC MICP/N Preamp Premult.

MAD DSP MCU

Multipl.

MIC2 MIC1

System Connector

EMC + Acc. Interf.
XMIC SGND XEAR

MIC3

Pre & LP

A D

HFCM Amp AuxOut EMC HF EAR
Multipl.

Buzzer Driver Circuit

LP

A

D
Buzzer

The baseband supports three microphone inputs and two earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an external microphone signal source. The microphone signals from different sources are connected to separate inputs at the COBBA­GJ asic. Inputs for the microphone signals are differential type. The MIC1 inputs are used for a headset microphone that can be connected directly to the system connector. The internal microphone is connected to MIC2 inputs and an external pre­amplified microphone (handset/handfree) signal is connected to the MIC3 inputs. In COBBA there are also three audio signal outputs of which dual ended EAR lines are used for internal earpiece and HF line for accessory audio output. The third audio output AUXOUT is used only for bias supply to the headset microphone. As a difference to DCT2 generation the SGND ( = HFCM at COBBA) does not supply audio signal (only common mode). Therefore there are no electrical loopback echo from downlink to uplink. The output for the internal earphone is a dual ended type output capable of driving a dynamic type speaker. The output for the external accessory and the headset is single ended with a dedicated signal ground SGND. Input and output signal source selection and gain control is performed inside the COBBA­GJ asic according to control messages from the MAD2. Keypad tones, DTMF, and other audio tones are generated and encoded by the MAD2 and transmitted to the COBBA­GJ for decoding.

Original 03/98

Page 3 ­ 29

NSE­1 System Module

PAMS Technical Documentation

External Audio Connections The external audio connections are presented in figure below. A headset can be connected directly to the system connector. The headset microphone bias is supplied from COBBA AUXOUT output and fed to microphone through XMIC line. The 330ohm resistor from SGND line to AGND provides a return path for the bias current.

Baseband
47k 22k HookDet

2.8 V

MAD
22k HeadDet 1u 1u

CCONT

EAD

2.8 V

47k 47R AUXOUT 1m 10m H F 47R XEAR 2k2

10m HFC M

47R SGN D 330R

COBBA
33n MIC1 N MIC1 P 33n 33n

2k2 XMI C

MIC3 N MIC3 P

2k2 33n

Page 3 ­ 30

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Analog Audio Accessory Detection In XEAR signal there is a 47 kW pullup in the transceiver and 6.8 kW pull­down to SGND in accessory. The XEAR is pulled down when an accessory is connected, and pulled up when disconnected. The XEAR is connected to the HookDet line (in MAD), an interrupt is given due to both connection and disconnection. There is filtering between XEAR and HookDet to prevent audio signal giving unwanted interrupts. External accessory notices powered­up phone by detecting voltage in XMIC line. In Table 23 there is a truth table for detection signals.
Accessory connected No accessory connected Headset HDC­9 with a button switch pressed Headset HDC­9 with a button switch released Handsfree (HFU­1) HookDet High Low High Low HeadDet High Low Low *) High Notes Pullups in the transceiver XEAR and XMIC loaded (dc) XEAR unloaded (dc) XEAR loaded (dc)

Headset Detection The external headset device is connected to the system connector, from which the signals are routed to COBBA headset microphone inputs and earphone outputs. In the XMIC line there is a (47 + 2.2) kW pullup in the transceiver. The microphone is a low resistance pulldown compared to the transceiver pullup. When there is no call going, the AUXOUT is in high impedance state and the XMIC is pulled up. When a headset is connected, the XMIC is pulled down. The XMIC is connected to the HeadDet line (in MAD), an interrupt is given due to both connection and disconnection. There is filtering between the XMIC and the HeadDet to prevent audio signal giving unwanted interrupts (when an accessory is connected). In the XEAR line there is a 47 kW pullup in the transceiver. The earphone is a low resistance pulldown compared to the transceiver pullup. When a remote control switch is open, there is a capacitor in series with the earphone, so the XEAR (and HookDet) is pulled up by the phone. When the switch is closed, the XEAR (and HookDet) is pulled down via the earphone. So both press and release of the button gives an interrupt. During a call there is a bias voltage (1.5 V) in the AUXOUT, and the HeadDet cannot be used. The headset interrupts should to be disabled during a call and the EAD line (AD converter in CCONT) should be polled to see if the headset is disconnected.

Original 03/98

Page 3 ­ 31

NSE­1 System Module

PAMS Technical Documentation

Internal Audio Connections The speech coding functions are performed by the DSP in the MAD2 and the coded speech blocks are transferred to the COBBA­GJ for digital to analog conversion, down link direction. In the up link direction the PCM coded speech blocks are read from the COBBA­GJ by the DSP. There are two separate interfaces between MAD2 and COBBA­GJ: a parallel bus and a serial bus. The parallel bus has 12 data bits, 4 address bits, read and write strobes and a data available strobe. The parallel interface is used to transfer all the COBBA­GJ control information (both the RFI part and the audio part) and the transmit and receive samples. The serial interface between MAD2 and COBBA­GJ includes transmit and receive data, clock and frame synchronisation signals. It is used to transfer the PCM samples. The frame synchronisation frequency is 8 kHz which indicates the rate of the PCM samples and the clock frequency is 1 MHz. COBBA is generating both clocks. 4­wire PCM Serial Interface The interface consists of following signals: a PCM codec master clock (PCMDClk), a frame synchronization signal to DSP (PCMSClk), a codec transmit data line (PCMTX) and a codec receive data line (PCMRX). The COBBA­GJ generates the PCMDClk clock, which is supplied to DSP SIO. The COBBA­GJ also generates the PCMSClk signal to DSP by dividing the PCMDClk. The PCMDClk frequency is 1.000 MHz and is generated by dividing the RFIClk 13 MHz by 13. The COBBA­GJ further divides the PCMDClk by 125 to get a PCMSClk signal, 8.0 kHz. PCMDClk PCMSClk PCMTxData PCMRxData sign extended 15 14 13 sign extended MSB 12 MSB LSB 0 LSB

11

10

Page 3 ­ 32

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Alert Signal Generation A buzzer is used for giving alerting tones and/or melodies as a signal of an incoming call. Also keypress and user function response beeps are generated with the buzzer. The buzzer is controlled with a BuzzerPWM output signal from the MAD. A dynamic type of buzzer must be used since the supply voltage available can not produce the required sound pressure for a piezo type buzzer. The low impedance buzzer is connected to an output transistor that gets drive current from the PWM output. The alert volume can be adjusted either by changing the pulse width causing the level to change or by changing the frequency to utilize the resonance frequency range of the buzzer. A vibra alerting device is used for giving silent signal to the user of an incoming call. The device is controlled with a VibraPWM output signal from the MAD2. The vibra alert can be adjusted either by changing the pulse width or by changing the pulse frequency. The vibra device is not inside the phone, but in a special vibra battery.

Digital Control
The baseband functions are controlled by the MAD asic, which consists of a MCU, a system ASIC and a DSP. MAD2 MAD2 contains following building blocks: ­ ARM RISC processor with both 16­bit instruction set (THUMB mode) and 32­bit instruction set (ARM mode) ­ TI Lead DSP core with peripherials: ­ API (Arm Port Interface memory) for MCU­DSP communication, DSP code download, MCU interrupt handling vectors (in DSP RAM) and DSP booting ­ Serial port (connection to PCM) ­ Timer ­ DSP memory ­ BUSC (BusController for controlling accesses from ARM to API, System Logic and MCU external memories, both 8­ and 16­bit memories) ­ System Logic ­ CTSI (Clock, Timing, Sleep and Interrupt control) ­ MCUIF (Interface to ARM via BUSC). Contains MCU BootROM ­ DSPIF (Interface to DSP) ­ MFI (Interface to COBBA AD/DA Converters)

Original 03/98

Page 3 ­ 33

NSE­1 System Module

PAMS Technical Documentation

­ CODER (Block encoding/decoding and A51&A52 ciphering) ­ AccIF(Accessory Interface) ­ SCU (Synthesizer Control Unit for controlling 2 separate synthesizer) ­ UIF (Keyboard interface, serial control interface for COBBA PCM Codec, LCD Driver and CCONT) ­ SIMI (SimCard interface with enhanched features) ­ PUP (Parallel IO, USART and PWM control unit for vibra and buzzer) The MAD2 operates from a 13 MHz system clock, which is generated from the 13Mhz VCXO frequency. The MAD2 supplies a 6,5MHz or a 13MHz internal clock for the MCU and system logic blocks and a 13MHz clock for the DSP, where it is multiplied to 52 MHz DSP clock. The system clock can be stopped for a system sleep mode by disabling the VCXO supply power from the CCONT regulator output. The CCONT provides a 32kHz sleep clock for internal use and to the MAD2, which is used for the sleep mode timing. The sleep clock is active when there is a battery voltage available i.e. always when the battery is connected.

Pin N:o 1

Pin Name

Pin Type O

Connected to/from Audio

Drive req. mA 2

Reset State 0

Note

Explanation

MCUGenOut5

MCU General purpose output port MCU General purpose output port Lead Ground MCU General purpose output port IO VCC in 3325c10 Power MCU General purpose output port MCU General purpose output port LoByteSelX in 16­bit mode programmable pullup PR0201 MCU General purpose output port I/O line for keyboard column 4

2

MCUGenOut4

O

N101

2

0

3 4

LEADGND
MCUGenOut3 O 2 0

5 6

VCC MCUGenOut2 O 2 0

7

MCUGenOut1

O

MCU memory

2

0

8

MCUGenOut0

O

2

1

9

Col4

I/O

UIF

2

Input

Page 3 ­ 34

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Pin N:o 10

Pin Name

Pin Type I/O

Connected to/from UIF

Drive req. mA 2

Reset State Input

Note

Explanation

Col3

programmable pullup PR0201

I/O line for keyboard column 3 Ground

11 12

GND Col2 I/O UIF 2 Input programmable pullup PR0201 programmable pullup PR0201 programmable pullup PR0201 external pullup/down

I/O line for keyboard column 2 I/O line for keyboard column 1 I/O line for keyboard column 0 serial LCD driver chip select, parallel LCD driver enable Lead Power

13

Col1

I/O

UIF

2

Input

14

Col0

I/O

UIF

2

Input

15

LCDCSX

I/O

UIF

2

Input

16 17

LEADVCC
Row5LCDCD I/O UIF 2 Input, pullup pullup PR0201

Keyboard row5 data I/O , serial LCD driver command/data indicator, parallel LCD driver read/ write select Power I/O line for keyboard row 4, parallel LCD driver register selection control I/O line for keyboard row 3, parallel LCD driver data I/O line for keyboard row 2, parallel LCD driver data I/O line for keyboard row 1, parallel LCD driver data I/O line for keyboard row 0, parallel LCD driver data

18 19

VCC Row4 I/O UIF 2 Input, pullup

Core VCC in 3325c10 pullup PR0201

20

Row3

I/O

UIF

2

Input, pullup

pullup PR0201

21

Row2

I/O

UIF

2

Input, pullup

pullup PR0201

22

Row1

I/O

UIF

2

Input, pullup

pullup PR0201

23

Row0

I/O

UIF

2

Input, pullup

pullup PR0201

Original 03/98

Page 3 ­ 35

NSE­1 System Module

PAMS Technical Documentation

Pin N:o 24 25 26

Pin Name

Pin Type O

Connected to/from

Drive req. mA 2

Reset State Tri­ state

Note

Explanation

JTDO GND JTRst

JTAG data out Ground

I

Input, pulldown Input Input, pullup Input, pullup

pulldown PD0201 pulldown PD0201 pullup PR0201 pullup PR0201 IO VCC in 3325c10

JTAG reset

27 28 29 30 31 32 33

JTClk JTDI JTMS VCC CoEmu0 CoEmu1 MCUGenIO7

I I I

JTAG Clock JTAG data in JTAG mode select Power DSP/MCU emulation port 0 DSP/MCU emulation port 1 General purpose I/O port Lights

I/O I/O I/O

2 2 2

Input, pullup Input, pullup Input, pulldown Input, pulldown

pullup PR0201 pullup PR0201 pulldown PD1001 pulldown PD1001

34

MCUGenIO6

I/O

UI

2

35 36

LEADGND
MCUGenIO5 I/O UI 2 Input, pulldown pulldown PD1001

Lead Ground LCD reset

37 38 39 40 41 42 43 44 45

ARMGND
MCUAd0 O MCU MEMORY 2 0

ARM Ground MCU address bus ARM Power O O MCU MEMORY MCU MEMORY 2 2 0 0 MCU address bus MCU address bus Ground O O O MCU MEMORY MCU MEMORY MCU MEMORY 2 2 2 0 0 0 MCU address bus MCU address bus MCU address bus

ARMVCC
MCUAd1 MCUAd2 GND MCUAd3 MCUAd4 MCUAd5

Page 3 ­ 36

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Pin N:o 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Pin Name

Pin Type O

Connected to/from MCU MEMORY

Drive req. mA 2

Reset State 0

Note

Explanation

MCUAd6 VCC MCUAd7 MCUAd8 MCUAd9 MCUAd10 GND MCUAd11 MCUAd12 MCUAd13 MCUAd14 MCUAd15 MCUAd16 VCC MCUAd17 MCUAd18 MCUAd19 MCUAd20 MCUAd21 ExtMCUDa0 GND ExtMCUDa1 ExtMCUDa2

MCU address bus IO VCC in 3325c10 Power MCU address bus MCU address bus MCU address bus MCU address bus Ground

O O O O

MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

2 2 2 2

0 0 0 0

O O O O O O

MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

2 2 2 2 2 2

0 0 0 0 0 0 Core VCC in 3325c10

MCU address bus MCU address bus MCU address bus MCU address bus MCU address bus MCU address bus Power MCU address bus MCU address bus MCU address bus MCU address bus MCU address bus MCU data bus Ground

O O O O O I/O

MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

2 2 2 2 2 2

0 0 0 0 0 Input

I/O I/O

MCU MEMORY MCU MEMORY

2 2

Output Output

MCU data bus MCU data bus

Original 03/98

Page 3 ­ 37

NSE­1 System Module

PAMS Technical Documentation

Pin N:o 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

Pin Name

Pin Type I/O I/O I/O I/O

Connected to/from MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

Drive req. mA 2 2 2 2

Reset State Output Output Output Output

Note

Explanation

ExtMCUDa3 ExtMCUDa4 ExtMCUDa5 ExtMCUDa6 VCC ExtMCUDa7 MCUGenIO8 MCUGenIO9 MCUGenIO10 MCUGenIO11 GND MCUGenIO12 MCUGenIO13 MCUGenIO14 MCUGenIO15 MCURdX VCC MCUWrX ROM1SelX RAMSelX ROM2SelX

MCU data bus MCU data bus MCU data bus MCU data bus IO VCC in 3325c10 Power MCU data bus MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode General purpose I/O port General purpose I/O port General purpose I/O port General purpose I/O port Ground General purpose I/O port General purpose I/O port General purpose I/O port General purpose I/O port MCU Read strobe Core VCC in 3325c10 Power MCU write strobe ROM chip select RAM chip select Extra chip select, can be used as MCU general output pullup PR0201 General purpose I/O port External flag

I/O I/O I/O I/O I/O

MCU MEMORY

2 2 2 2 2

Output Input Input Input Input

I/O I/O I/O I/O O MCU MEMORY

2 2 2 2 2

Input Input Input Input 1

O O O O

MCU MEMORY MCU ROM MCU RAM MCU ROM2

2 2 2 2

1 1 1 1

90 91

MCUGenIO1 DSPXF

I/O O

2 2

Input, pullup 1

Page 3 ­ 38

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Pin N:o 92 93 94

Pin Name

Pin Type

Connected to/from

Drive req. mA

Reset State

Note

Explanation

SCVCC
RFClk RFClkGnd I VCXO Input Input

Special cell Power System clock from VCTCXO System clock reference ground input SIM card detection Special cell Ground O BUZZER 2 0 Buzzer PWM control LEAD Power O VIBRA 2 0 Vibra PWM control Ground I/O I/O O EEPROM EEPROM MCU EEPROM 2 2 2 Input, pullup Input, pullup 1 pullup PR1001 pullup PR1001 WP SCL Not used, can be used as MCU general output external pullup IO VCC in 3325c10 I I Input Input Accessory TX data, Flash_TX Power General purpose interrupt Non­MBUS accessory connection detector Headset detection interrupt Accessory RX data, Flash_RX Ground I/O 2 Input, pulldown Input, external pullup pulldown PD1001 external pullup General purpose I/O port, BATTI/ O MBUS, Flash clock

95 96 97 98 99 100 101 102 103

SIMCardDetX

I

Input

SCGND
BuzzPWM

LEADVCC
VibraPWM GND MCUGenIO3 MCUGenIO2 EEPROMSelX

104 105 106 107

AccTxData VCC GenDet HookDet

I/O

4

Tri­ State

108 109 110 111

HeadDet AccRxData GND MCUGenIO4

I I

Input Input

112

MBUS

I/O

2

Original 03/98

Page 3 ­ 39

NSE­1 System Module

PAMS Technical Documentation

Pin N:o 113 114 115 116 117 118

Pin Name

Pin Type O O

Connected to/from CCONT CCONT

Drive req. mA 2 2

Reset State 1 0

Note

Explanation

VCXOPwr SynthPwr VCC GenCCONTCSX

VCXO regulator control Synthesizer regulator control Core VCC in 3325c10 Power Chip select to CCONT LEAD Ground

O

CCONT

2

1

LEADGND
GenSDIO I/O CCONT, UIF 2 Input, external pullup/ down 0 0 external pullup/down depending on how to boot

Serial data in/out

119 120 121 122 123 124 125 126 127 128 129 130 131 132 133

GenSClk SIMCardData GND PURX CCONTInt Clk32k VCC SIMCardClk SIMCardRstX SIMCardIOC SIMCardPwr

O I/O

CCONT, UIF CCONT

2 2

Serial clock SIM data Ground

I I I

CCONT CCONT CCONT

Input Input Input IO VCC in 3325c10

Power Up Reset CCONT interrupt Sleep clock oscillator input Power SIM clock SIM reset SIM data in/out control SIM power control LEAD Power

O O O O

CCONT CCONT CCONT CCONT

2 2 2 2

0 0 0 0

LEADVCC
RxPwr TxPwr TestMode O O I CCONT CCONT 2 2 0 0 Input, pulldown 2 COBBA 2 0 0 IO VCC in 3325c10 pulldown PD0201

RX regulator control TX regulator control Test mode select

134 135 136

ExtSysResetX PCMTxData VCC

O O

System Reset Transmit data, DX Power

Page 3 ­ 40

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Pin N:o 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163

Pin Name

Pin Type I I I I

Connected to/from COBBA COBBA COBBA COBBA

Drive req. mA

Reset State Input Input Input Input

Note

Explanation

PCMRxData PCMDClk PCMSClk COBBADAX GND COBBAWrX COBBARdX COBBAClk COBBAAd3 COBBAAd2 COBBAAd1 COBBAAd0 COBBADa11 VCC COBBADa10 COBBADa9 COBBADa8 COBBADa7 COBBADa6 GND COBBADa5 COBBADa4 COBBADa3 COBBADa2 COBBADa1 COBBADa0 DSPGenOut5

Receive data, RX Transmit clock, CLKX Transmitframe sync, FSX Data available acknowledge Ground

O O O O O O O I/O

COBBA COBBA COBBA COBBA COBBA COBBA COBBA COBBA

2 2 4 2 2 2 2 2

1 1 1 0 0 0 0 0 Core VCC in 3325c10

COBBA write strobe COBBA read strobe COBBA clock, 13 MHz COBBA address bit COBBA address bit COBBA address bit COBBA address bit COBBA data bit Power COBBA data bit COBBA data bit COBBA data bit COBBA data bit COBBA data bit Ground

I/O I/O I/O I/O I/O

COBBA COBBA COBBA COBBA COBBA

2 2 2 2 2

0 0 0 0 0

I/O I/O I/O I/O I/O I/O O

COBBA COBBA COBBA COBBA COBBA COBBA RF

2 2 2 2 2 2 2

0 0 0 0 0 0 0

COBBA data bit COBBA data bit COBBA data bit COBBA data bit COBBA data bit COBBA data bit DSP general purpose output, COBBA reset

Original 03/98

Page 3 ­ 41

NSE­1 System Module

PAMS Technical Documentation

Pin N:o 164 165 166 167 168 169 170 171 172 173 174 175 176

Pin Name

Pin Type

Connected to/from

Drive req. mA

Reset State

Note

Explanation

VCC DSPGenOut4 DSPGenOut3 DSPGenOut2 DSPGenOut1 DSPGenOut0 MCUGenIO0 FrACtrl GND SynthEna SynthClk SynthData TxPA O O O O PLUSSA PLUSSA PLUSSA PLUSSA, power amplifier 2 2 2 2 0 0 0 0 O O O O O I/O O EEPROM RF IR 2 2 2 2 2 2 2 0 0 0 0 0 Input, pullup 0

IO VCC in 3325c10

Power DSP general purpose output IR ON DSP general purpose output DSP general purpose output DSP general purpose output

pullup PR0201

EEPROM serial data SDA SDATX0 Ground Synthesizer data enable Synthesizer clock Synthesizer data Power amplifier control

Page 3 ­ 42

Original 03/98

PAMS Technical Documentation

NSE­1 System Module

Memories The MCU program code resides in an external flash program memory, which size is 8 Mbits (512kx16bit). The MCU work (data) memory size is 512kbits (64kx8bit). A serial EEPROM is used for storing the system and tuning parameters, user settings and selections, a scratch pad and a short code memory. The EEPROM size is 16kbits (2kx8bit). The BusController (BUSC) section in the MAD decodes the chip select signals for the external memory devices and the system logic. BUSC controls internal and external bus drivers and multiplexers connected to the MCU data bus. The MCU address space is divided into access areas with separate chip select signals. BUSC supports a programmable number of wait states for each memory range. Program Memory The MCU program code resides in the program memory. The program memory size is 8 Mbits (512kx16bit). The flash memory has a power down pin that should be kept low, during the power up phase of the flash to ensure that the device is powered up in the correct state, read only. The power down pin is utilized in the system sleep mode by connecting the ExtSysResetX to the flash power down pin to minimize the flash power consumption during the sleep. SRAM Memory The work memory is a static ram of size 512k (64kx8) in a shrink TSOP32 package. The work memory is supplied from the common baseband VBB voltage and the memory contents are lost when the baseband voltage is switched off. All retainable data should be stored into the EEPROM (or flash) when the phone is powered down. EEPROM Memory An EEPROM is used for a nonvolatile data memory to store the tuning parameters and phone setup information. The short code memory for storing user defined information is also implemented in the EEPROM. The EEPROM size is 2kbytes. The memory is accessed through a serial bus and the default package is SO8. MCU Memory Map MAD2 supports maximum of 4GB internal and 4MB external address space. External memories use address lines MCUAd0 to MCUAd21 and 16­bit databus. The BUSC bus controller supports 8­ and 16­bit access for byte, double byte, word and double word data. Access wait state 2 and used databus width can be selected separately for each memory block.

Original 03/98

Page 3 ­ 43

NSE­1 System Module

PAMS Technical Documentation

Flash Programming The preprogrammable phone has to be connected to the flash loading adapter (FLA­5) via service cable SCH­5. The power supply should be taken from service battery BBD­3 via flash loading adapter FLA­5. When FLA­5 switches suppl