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28JF-73E
25
FB217WJN4 MOTHER UNIT PWB. Copper side.
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28JF-73E
FB217WJN4 MOTHER UNIT PWB. Copper side.
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28JF-73E
FB270WJZZ CONTROL UNIT PWB Component side Copper side 25 25
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28JF-73E
FB220WJZZ DOUBLE FOCUS UNIT PWB
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Component side
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Copper side
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28JF-73E
CHASSIS LAYOUT
PWB A (Mother Unit, FB217N4).
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28JF-73E
PWB B CHASSIS LAYOUT (CRT SOCKET UNIT, FB218N2).
PWB C CHASSIS LAYOUT (FRONTAL POWER-CONTROL UNIT, FB270ZZ).
PWB D CHASSIS LAYOUT (DOUBLE FOCUS UNIT, FB220ZZ).
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28JF-73E
6
handbook, full pagewidth
TDA9886 (IC201)
BLOCK DIAGRAM
CVAGC(pos) VIF-PLL filter VAGC (1) VPLL 19 (21) CBL RC VCO DIGITAL VCO CONTROL AFC DETECTOR 15 (16) 21 (23) REF AFC 16
external reference signal or 4 MHz crystal
TOP
TAGC
9 (8)
14 (15)
CAGC(neg)
TUNER AGC
VIF-AGC
VIF2 (18) 17 VIF-PLL SOUND TRAPS 4.5 to 6.5 MHz
2 (31) CVBS video output: 2 V (p-p) [1.1 V (p-p) without trap]
VIF1
1 (30)
TDA9885 TDA9886
(7) 8 SINGLE REFERENCE QSS MIXER INTERCARRIER MIXER AND AM DEMODULATOR MAD (4) 6 SIF AGC CAGC OUTPUT PORTS I 2C-BUS TRANSCEIVER NARROW-BAND FM-PLL DEMODULATOR AUDIO PROCESSING AND SWITCHES (3) 5
AUD DEEM
ICs ADDITIONAL INFORMATION
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3 (1) OP1 OP2 SCL SDA 22 (24) 11 (10) 7 (5) DGND 10 (9) 12 (11) SIOMAD 4 (2) FMPLL sound intercarrier output and MAD select
SIF2
audio output
24 (27)
SIF1
23 (26)
de-emphasis network AFD CAF
SUPPLY
20 (22)
18 (20)
(6, 12, 13, 14, 17, 19, 25, 28, 29, 32) 13
VP
AGND
n.c.
MHC108
FM-PLL filter
(1) Not connected for TDA9885. Pin numbers for TDA9885HN in parenthesis.
Fig.1 Block diagram.
28JF-73E
TDA9886 (IC201)
7 PINNING PIN SYMBOL VIF1 VIF2 n.c. OP1 FMPLL DEEM AFD DGND n.c. AUD TOP SDA SCL SIOMAD n.c. n.c. n.c. TAGC REF VAGC n.c. CVBS n.c. AGND VPLL VP AFC OP2 n.c. SIF1 SIF2 n.c. n.c. TDA9886T TDA9886TS 1 2 - 3 4 5 6 7 - 8 9 10 11 12 - 13 - 14 15 16 - 17 - 18 19 20 21 22 - 23 24 - - TDA9885T TDA9885TS 1 2 - 3 4 5 6 7 - 8 9 10 11 12 - 13 - 14 15 - 16 17 - 18 19 20 21 22 - 23 24 - - DESCRIPTION TDA9885HN 30 31 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 - 17 18 19 20 21 22 23 24 25 26 27 28 29 VIF differential input 1 VIF differential input 2 not connected output port 1; open-collector FM-PLL for loop filter de-emphasis output for capacitor AF decoupling input for capacitor digital ground not connected audio output tuner AGC TakeOver Point (TOP) for resistor adjustment I2C-bus data input and output I2C-bus clock input sound intercarrier output and MAD select with resistor not connected not connected not connected tuner AGC output 4 MHz crystal or reference signal input VIF-AGC for capacitor not connected composite video output not connected analog ground VIF-PLL for loop filter supply voltage AFC output output port 2; open-collector not connected SIF differential input 1 and MAD select with resistor SIF differential input 2 and MAD select with resistor not connected not connected
handbook, halfpage
VIF1 1 VIF2 2 OP1 3 FMPLL 4 DEEM 5 AFD 6 DGND 7 AUD 8 TOP 9 SDA 10 SCL 11 SIOMAD 12
MHC110
24 SIF2 23 SIF1 22 OP2 21 AFC 20 VP 19 VPLL TDA9885TS TDA9886TS 18 AGND 17 CVBS 16 VAGC (1) 15 REF 14 TAGC 13 n.c.
(1) Not connected for TDA9885TS.
Fig.3 Pin configuration for SSOP24.
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28JF-73E
TDA7480 (IC1301,IC1302)
PIN CONNECTION (Top view)
-VCC -VCC -VCC OUT BOOTDIODE BOOT N.C. FEEDCAP FREQ SGN-GND
1 2 3 4 5 6 7 8 9 10
D96AU537B
20 19 18 17 16 15 14 13 12 11
-VCC -VCC -VCC -VCC +VCC POW VREG +VCC SIGN N.C. STBY/MUTE IN
PIN FUNCTIONS
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name -VCC -VCC -VCC OUT BOOTDIODE BOOT NC FEEDCAP FREQUENCY SGN-GND IN ST-BY-MUTE NC +VCC SIGN VREG +VCC POW -VCC -VCC -VCC -VCC Function NEGATIVE SUPPLY. NEGATIVE SUPPLY. NEGATIVE SUPPLY. PWM OUTPUT BOOTSTRAP DIODE ANODE BOOTSTRAP CAPACITOR NOT CONNECTED FEEDBACK INTEGRATING CAPACITANCE SETTING FREQUENCY RESISTOR SIGNAL GROUND INPUT ST-BY/ MUTE CONTROL PIN NOT CONNECTED POSITIVE SIGNAL SUPPLY 10V INTERNAL REGULATOR POSITIVE POWER SUPPLY NEGATIVE SUPPLY (TO BE CONNECTED TO PIN 16 VIA C5) NEGATIVE SUPPLY NEGATIVE SUPPLY NEGATIVE SUPPLY
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MSP3410G (IC301)
Sound IF1 Demodulator Preprocessing DAC
ADC
Loudspeaker Subwoofer
Sound IF2
Loudspeaker Sound Processing
I2S1 Prescale
Headphone Sound Processing DAC
Headphone
SCART1 DAC SCART1 ADC Prescale DAC
SCART2
SCART3
SCART DSP Input Select
SCART4
Source Select
I2S2
I2S
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SCART Output Select SCART2
MONO
Fig. 11: Simplified functional block diagram of the MSP 34x0G
28JF-73E
28JF-73E
MSP3410G (IC301)
SC2_IN_L SC2_IN_R ASG SC1_IN_L SC1_IN_R VREFTOP NC MONO_IN AVSS AVSS NC NC ASG SC3_IN_R SC3_IN_L ASG SC4_IN_R SC4_IN_L NC AGNDC AHVSS AHVSS NC NC
AVSUP AVSUP ANA_IN1+ ANA_IN- ANA_IN2+ TESTEN XTAL_IN XTAL_OUT TP AUD_CL_OUT NC NC D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 1 2 3 4 5 6 7 8 9 39 38 37 36 35 34
CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R NC NC DACM_SUB NC DACM_L DACM_R VREF2 DACA_L
MSP 34x0G
33 32 31 30 29 28 27 26
25 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
NC I2C_CL I2C_DA I2S_CL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSUP NC I2S_DA_IN2 DVSS DVSS DVSS DVSUP NC NC NC RESETQ NC
DACA_R
Fig. 49: PQFP80 package
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28JF-73E
VCT3834 (IC1001)
VSUPAF
GNDAF
VSUPD
SENSE
GNDD
VCT 38xxA/B
2
2
2
VIN CIN VOUT
4 3
Video Front-end
Comb Filter
Color Decoder
Panorama Scaler
Display Processor Pict.Improv
RSW GNDM VRD XREF
SGND
VERT EW PROT HOUT
HFLB
VRT
3
Video Back-end
RGBOUT SVM
4
RGBIN VSUPAB GNDAB
Video
8
I2C MSync Color, Prio VSync
2
Audio
AOUT AIN
3
BE
I2C Master CPU 8-bit PWM 14-bit PWM 15:1 Mux 10-bit ADC 2 Timer 2 CapCom
2
I2C
TPU 24 kB ROM 24 kB
DMA
RDY
3 kB 3 kB OSD RAM OSD
1 kB CPU RAM
Reset Logic
RESQ TEST
16 kB Text RAM
96 kB CPU ROM
31 ADB, DB, CB
VSUPS GNDS
Watchdog 24 IO Ports
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VSUPP1 GNDP1 Pxy
Clock Oscillator
XTAL1 XTAL2
CLK20
Fig. 12: Block diagram of the VCT 38xxA/B (shaded blocks are optional)
The block diagram does not show the additional features of VCT 38xxB.
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28JF-73E
VCT3834 (IC1001)
P35 P34 VSUPP3 GNDP3 P33 P32 P31 P30 TEST FBLIN RIN GIN BIN VPROT SAFETY HFLB P36 P37 GNDD VSUPD HOUT CLK20 VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 VBCLK P20
VERTQ VERT EW SENSE GNDM RSW1 RSW2 SVMOUT ROUT GOUT BOUT VSUPAB GNDAB VRD XREF AIN3 AIN2 AIN1 AOUT2 AOUT1 RESQ SCL SDA XTAL1 XTAL2 VSUPS GNDS WE1Q WE2Q OE1Q OE2Q ADB18
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 97 64 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 1 2 3 4 5 6 7 8 9 63 62 61 60 59 58 57 56 55 54 53 52 51 50
P21 P22 P23 GNDP2 VSUPP2 P24 P25 P26 P27 DISINTROM VIN4 VIN3 VIN2 VIN1 CIN2/CRIN CIN1 CBIN VSUPAF GNDAF SGND VRT VOUT P10/VIN5 P11 P12 P13 GNDP1 VSUPP1 P14 P15 P16 P17
VCT 38xxA/B
49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34
33 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
ADB17 VSUPADB GNDADB ADB16 ADB15 ADB14 ADB13 ADB12 ADB11 ADB10 ADB9 ADB8 ADB7 ADB6 ADB5 VSUPADB
DB7 DB6 DB5 DB4 GNDDB VSUPDB DB3 DB2 DB1 DB0 ADB0 ADB1 ADB2 ADB3 ADB4 GNDADB
Fig. 64: PMQFP128 package
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28JF-73E
STV9380 (IC502)
PIN CONNECTION
-VCC -VCC -VCC OUT CFLY + CFLY BOOT VREG FEEDCAP FREQ
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
-VCC -VCC -VCC -VCCPOW + VCC POW +VCC EAout IN+ INSGND
1
PIN FUNCTIONS
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name -VCC -VCC -VCC OUT CFLY+ CFLYBOOT VREG FEEDCAP FREQ SGND ININ+ EA out +VCC +VCCPOW -VccPOW -VCC -VCC -VCC Negative supply Negative supply Negative supply PWM Output Flyback capacitor Flyback capacitor Bootstrap capacitor Internal voltage regulator Feed-back integrating capacitor Frequency setting resistor Signal Ground Error amplifier inverting input Error amplifier non-inverting input Error amplifier output Positive supply Positive Power supply Negative Power supply Negative supply Negative supply Negative supply Function
29
28JF-73E
STV9380 (IC502)
+VCC
100nF 100nF +VCC 16 +VCC power STV9380 TDA9380 -VCC 1000µF
15
VREG 8
Vref
-VCC Flyback generator 5 6 CFLYBOOT 7 13 _ 12 150 14 Pins 1,2,3,18,19,20 11 SGND 470pF 4.7nF 10k FREQ 100nF -VCC FEEDCAP 9 10 17 -VCC power 1000µF 560pF 4 Modulator Output drive OUT 1mH 470nF 150 + Cboot 220nF CFLYBACK 100µF
Figure 1. Test and Application Circuit
100nF
Flyback detection
CFLY+
IN+
30
-VCC
1k
IN -
Input signal
EA out
Deflect. Yoke*
200
10k
1k
Sense resistor
0.5
* Deflection yoke characteristics: R = 5.5, L = 7mH
fvert = 50Hz