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MONITOR PROCESSOR
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MC13081X
Advance Information
Multimode Color Monitor Horizontal, Vertical, and Video Combination Processor
The MC13081X includes all the signal processing functions for a scan frequency agile and multiple sync system analog RGB monitor and includes the following functions: · Automatic Horizontal Frequency Tracking of All Commonly Used Personal Computers, Continuously Adaptable from 30 kHz to 64 kHz · SynconGreen Detection
MULTIMODE COLOR MONITOR PROCESSOR
SEMICONDUCTOR TECHNICAL DATA
· · · ·
Vertical Timebase Operates from 45 to 100 Hz Vertical and Horizontal Sync Polarity Detection with Outputs for Mode Switching Video PreAmplifiers Typical Rise/Fall Time of 5.0 ns at 3.0 Vpp Output Voltage Swing Overall Contrast Control and Independent RGB Gain Controls
56 1
B SUFFIX PLASTIC SDIP PACKAGE CASE 859
ORDERING INFORMATION
Device MC13081XB Operating Temperature Range TA = 0° to +70°C Package Plastic SDIP
PIN CONNECTIONS
37 Channel 2 Collector Out
32 Channel 3 Collector Out
40 Channel 1 Collector Out
Horizontal Drive Width
42 Horizontal Drive Gnd
56 Timebase VCC2 55 Horizontal Position
46 Horizontal Flyback
34 Channel 2 Emitter Out
54 Horizontal Sync Det
51 Vertical Ramp Cap
47 Video Blanking In
33 Channel 2 Clamp
31 Channel 3 Emitter Out
Channel 1 Emitter Out
Vertical Sync Det
Vertical Ramp Out
30 Channel 3 Clamp Channel 3 Video In 27
38 Channel 1 Clamp
41 XRay Shutdown
Horizontal Drive
Vertical Size
45 PD2
53
52
44
43
39
36 N/C
50
49
48
FHIA 15
FHIB 17
PD1 10
Horizontal Freq Control 12
Timebase Gnd 13
FH Switch A 14
FH Switch B 16
Contrast 18
Channel 1 Subcontrast 20
N/C 21
11
35
Channel 1 Video In 23
Channel 2 Subcontrast 24
Channel 2 Video In 25
Channel 3 Subcontrast 26
Brightness 19
Vertical Hold
Vertical Intergrator Cap
Composite Video In
Horizontal TTL Sync
Vertical TTL Sync
Vertical Osc Cap
(Top View)
This document contains information on a new product. Specifications and information herein are subject to change without notice. DEVICE DATA MOTOROLA ANALOG IC © Motorola, Inc. 1996 Rev 0
Video Gnd 28
5.0 V Reg
AFC
N/C 22
4
5
6
7
8
2
1
3
N/C
N/C
9
29
Video VCC1
N/C
N/C
N/C
1
MC13081X
Figure 1. Block Diagram
TTL TTL VSync HSync 4 5 CVS 6 VSync Polar Det 53 HSync Polar Det 54 Vosc Vert Hold 2 1 Vert Ramp Cap 51 Vert Size 52 Vert Ramp 48
3 Vert Integrator Cap
Sync Source Decoder and Polarity Control
Vertical Oscillator
10 K Vertical Ramp Generator
VCC 47 Blanking
HSync
VSync 55 Hori Position Adjust 5 Count Latch 1 Blanking Ramp 1 2 Phase Detector 46 45 PD2F HFlyback
PD1F
10
Phase Detector Down X1 64 H Up
#1 Ramp Generator 1/8 Line Shift Horizontal Driver
43 42
HDrive Timebase Gnd
Digital Horizontal Lock Control
11 AFC 64 Divider and Clamp Pulse Decoder 12 Hori Freq Control 56 Timebase VCC 9 5 V Regulator 13 Timebase Gnd 14 FHA Switch FHA Threshold FHB Switch 17 FHB Threshold 23 Clamp Pulse Position SOG Detector 25 Channel 2 Video In Channel 3 15 16 Channel 2 Channel 1 64x Oscillator #2 Ramp Generator Ramp 2 3
41 XRay XRay Shutdown
44 HDrive Width Adjust 29 Video VCC
40
+5.0 V Output
Collector Out
39 Emitter Out 38 Clamp 20 Subcontrast 37
Collector Out
34 33 24
Emitter Out Clamp Subcontrast
Channel 1 Video In
32
Collector Out
27 Channel 3 Video In
31 30
Emitter Out Clamp
18 Contrast 19 Brightness Brightness and Contrast Processor 26
Subcontrast
28 Video Gnd
This device contains 1074 active transistors.
2
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)
Rating Power Supply Voltage Video Section VCC1 Timebase Section VCC2 Brightness, Contrast, Horizontal Flyback Input, Frequency Switch when Off XRay Shutdown Subcontrast RGB Controls Horizontal Drive Width, Horizontal Position Voltage on Horizontal Drive when Off, Vertical TTL Sync Input, Horizontal TTL Sync Input, Composite Video Sync Input, Video Amplifier Output Collectors Current into Horizontal Drive when On Current into Frequency Switch when On Video Amplifier Inputs Video Amplifier Output Current (Total for the Three Channels) Storage Temperature Junction Temperature
NOTE: ESD data available upon request.
Pin 29 56 19, 18, 46, 14, 16 41 20, 24, 26 44, 55 43, 4, 5, 6, 32, 37, 40
Value 0.5, +10 0.5, +10 0 to VCC 0.5, +0.9 0 to +2.0 0 to +5.0 0.5 to VCC + 0.5
Unit Vdc
Vdc Vdc Vdc Vdc Vdc
43 14, 16 23, 25, 27 40, 39, 37, 34, 32, 31
100 30 0.5, + 5.0 120 65 to +150 +150
mA mA Vdc mA °C °C
RECOMMENDED OPERATING CONDITIONS
Characteristic Power Supply Voltage Video Section VCC1 Timebase Section VCC2 Power Supply Voltage Difference, VCC2 VCC1 Internal 5.0 V Regulator Output Current Contrast Control Brightness Control Subcontrast Control Horizontal Drive Width Adjust Horizontal Position Adjust Horizontal Flyback Signal Amplitude Horizontal Flyback Signal DC Input Voltage Level Voltage on Horizontal Drive Collector when "Off" Current into Horizontal Drive Collector when "On" Voltage on Horizontal Drive Emitter W.R.T. Circuit Ground Blanking Input Signal Amplitude Voltage on FH Switches when "Off" Current into each FH Switch when "On" XRay Shutdown Composite Video Sync Input Vertical Sync Frequency Horizontal Sync Frequency Vertical Sync Pulse Width Horizontal Sync Pulse Width Pin 29 56 9 18 19 20, 24, 26 44 55 46 46 43 43 42 47 14, 16 14, 16 41 6 Min 7.6 7.6 0.3 20 0 0 0 0 1.0 0.7 0.2 0 0 0.3 1.5 0 0 0 1.0 45 30 Typ 8.0 8.0 0 5.0 0 0 70 1.0 Max 8.4 8.4 0.8 0 5.0 5.0 2.0 5.0 4.0 8.0 VCC 40 2.0 4.0 8.0 20 0.7 2.0 100 64 Vdc mA Vdc Vdc Vdc Vdc Vdc V Vdc V mA Vdc V Vdc mA Vdc Vpp Hz kHz µs µs Unit Vdc
MOTOROLA ANALOG IC DEVICE DATA
3
MC13081X
RECOMMENDED OPERATING CONDITIONS (continued)
Characteristic Video Signal Amplitude (with 75 Termination) Voltage on Video Amplifier Collector Current Through Video CollectorEmitter Vertical Hold Set Resistance, R9 + VR2 (Figure 2) Vertical Size Set Resistance, R10 + VR3 (Figure 2) Vertical Linearity Set Resistance, R12 + VR4 (Figure 2) Operating Ambient Temperature FH Switches Set Resistance Vertical TTL Sync Input Horizontal TTL Sync Input Pin 23, 25, 27 32, 37, 40 40, 39, 37 34, 32, 31 2 52 51 15, 17 4 5 Min 0.5 4.5 0 0 Typ 0.7 10 220 1000 25 Max 1.2 VCC 40 70 Unit Vpp Vdc mA k k k °C Vdc Vdc
See Application Section 5 TTL Voltage Level TTL Voltage Level
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 8.0 Vdc)
Characteristic POWER SUPPLIES Supply Current Total Consumption 5.0 V Regulator Output Voltage Line Regulation Load Regulation Temperature Coefficient Thermal Resistance, JunctiontoAmbient HORIZONTAL PROCESSING Horizontal Oscillator Frequency Range Horizontal Oscillator Free Running Frequency @ I12 = 240 µA Horizontal Sync Detector Output/+VE Sync Horizontal Sync Detector Output/VE Sync Horizontal Sync Input Input Impedance Input Level Low Input Level High Composite Video Sync Input Input Impedance Internal Bias Level Minimum Input Amplitude Short Term Horizontal PullIn Range Long Term Horizontal PullIn Range Horizontal Frequency Control (Current Transfer Constant) Horizontal Free Running Frequency Change versus Temperature FH Switch Threshold Pins Output Current Threshold Hysteresis FH Switch Voltage when "On" Sink 240 µA from Pin 12 with Resistor R5 Opened 43 43 54 54 5 0 2.4 6 0.1 Time < 5.0 ms Time > 500 ms Current Flowing Out of Pin 12 Pin 11 is Opened 12 15, 17 0 I = 10 mA 14, 16 I12/2 5.0 200 200 µA V mV mVdc 30 115 1.0 1.55 ±5.0 122 300 64 129 k Vdc Vpp %FH kHz Hz/µA ppm/°C 22 0 0.8 5.0 k Vdc Vdc 30 29 31 0 3.6 64 33 kHz kHz Vdc Vdc 29, 56 9 Load Current ( B) = 0 mA (I 7.6 7 6 V < VCC < 8.4 V, IB = 0 mA 84V A 10 mA < IB < 0 mA 10 A A 4.75 5.0 25 100 0.3 59 5.25 Vdc mV mV mV/°C °C/W 70 85 110 mA Condition Pin Min Typ Max Unit
4
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C, VCC = 8.0 Vdc)
Characteristic HORIZONTAL DRIVE Horizontal Position Adjust Range Input Impedance Horizontal Drive Width Adjust Range Input Impedance Horizontal Flyback Threshold Input Amplitude Input Impedance Horizontal Drive Output Low Output High Time Delay from Flyback to Video Output Blanking Time Delay from Blanking to Video Output Blanking XRay Shutdown Activate Voltage Temperature Coefficient of XRay Threshold Voltage Horizontal Jitter VERTICAL PROCESSING Vertical Ramp Frequency Vertical Ramp Amplitude Minimum Peak Maximum Peak Output Current NonLinearity Vertical Ramp Free Running Temperature Drift Vertical Ramp Free Running Drift with VCC Vertical Ramp Discharge Rate (Retrace) Vertical Sync Detector Output/+VE Sync Vertical Sync Detector Output/VE Sync Vertical Sync Input Input Impedance Input Level Low Input Level High VIDEO AMPLIFIERS Input Impedance Internal DC Bias Voltage Output Signal Amplitude Voltage Gain Contrast Control Subcontrast Control Brightness Control Vin = 0.7 Vpp, V18 = 5.0 V V20 = V24 = V26 = 0 V V18 = 0 to 5.0 V; V20, 24, 26 = 0 V V20, 24, 26 = 2.0 to 0 V; V18 = 5.0 V V19 = 0 to 5.0 V, Measure Pin 39, 34, 31 DC Level 23, 25,27 39, 34, 31 18 20, 24, 26 19 100 1:2.5 2.4 3.6 5.1 20 ±0.5 k Vdc Vpp V/V dB Vdc FV = 50 Hz, R12 + VR4 = 820 k R10 + VR3 =120 k, C6 = C7 = 1.0 µF 48 48 48 48 48 53 53 4 0 2.4 22 0.8 5.0 k Vdc Vdc 3.0 1.9 3.4 2.0 0.45 0.01 0.5 9.5 0 3.6 1.0 Vpp V V mA % Hz/°C Hz/V V/ms Vdc Vdc 45 100 Hz 0 < V55 < 5.0 V, FH = 30 k 56 kHz See Application Section 7 FH = 35 kHz, 0 < V44 < 5.0 V 55 44 2:1 See Application Section 4 Input Signal Should Not Fall Below 0.2 V 46 0 43 Isink = 40 mA V43 = VCC See Application Section 7 See Application Section 7 See Application Section 11 30 kHz < FH < 56 kHz 41 41 43 0 0.4 250 400 0.58 2.3 3.0 0.3 100 0.7 Vdc µA ns ns Vdc mV/°C ns 0.7 10 8.0 V V k 30 1:2 % k 10 31 % k Condition Pin Min Typ Max Unit
FV = 50 Hz FV = 50 Hz FV = 50 Hz
MOTOROLA ANALOG IC DEVICE DATA
5
MC13081X
ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C, VCC = 8.0 Vdc)
Characteristic VIDEO AMPLIFIERS Emitter DC Level Minimum Brightness Nominal Brightness Maximum Brightness Crosstalk, Amplifier to Amplifier Output Rise Time p Output Fall Time 39, 34, 31 V19 = 0 V V19 = 2.5 V V19 = 5.0 V Frequency = 10 MHz Vin = 0.7 Vpp; Vout = 3.0 Vpp pp; pp 39, 34, 31 39, 34, 31 , , 1.25 1.0 1.5 2.0 34 5.0 5.0 1.75 dB ns Vdc Condition Pin Min Typ Max Unit
PIN FUNCTION DESCRIPTION
Pin 1 Name Vertical Oscillator Capacitor Equivalent Internal Circuit
VCC 2.5 k I2 5.0 V 1.0 k I2 10.7 I2 21.3 2 R2 C1 1 Vertical Ramp Gen Switching Control
Description This capacitor should be 100 nF film type to give good temperature stability.
2
Vertical Hold Control
The potentiometer at Pin 2 adjusts the free running frequency of the oscillator. It should normally be set for about 55 Hz with no vertical signal input such that it will lock to 60 Hz.
3
Vertical Integrator Capacitor
3 C3 1.0 k
VCC ICIS Switching Control ISID
The capacitor on this pin integrates the sync pulses with a long time constant. C3 is typically 0.01 µF.
4
Vertical TTL Sync
5.0 V Sync Input 4 22 k 10 k
2.0 V
Vertical TTL Sync input. The input threshold voltage at this pin is 2.0 V.
To Logic
5
Horizontal TTL Sync
5.0 V Sync Input 5 22 k 10 k
2.0 V
Composite or Horizontal TTL Sync input. The input threshold voltage at this pin is 2.0 V.
To Logic
6
Composite Video Input
5.0 V 10 k
This pin requires a coupling of min 100 nF. The composite sync input should consist of VE sync signal only with amplitude > 500 mVpp. The source impedance of the sync signal should be <1.0 k. Sync information at Pin 5 will override this pin, but signals at Pin 4 will not. Minimum pulse width is 2.0 µs.
Comp Input
6 0.1
1.0 k 1.0 k 68 k
To Sync Separator
7, 8
N/C
These two pins are internally connected to each other, and nothing else.
6
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin 9 Name 5.0 V Regulator Output
5.0 V 10 µF R 0.8 R
Equivalent Internal Circuit
VCC 9 Band Gap Regulator
Description 5.0 V (±5%) regulator. Minimum 10 µF capacitor is required for noise filtering and compensation. Up to 20 mA can be supplied to external circuitry. It can source but not sink current. Output impedance is 10 . This 5.0 V regulator is recommended for use as a reference only. External components at this pin will determine the PLL gain and phase characteristics. The capacitors should be nonpolarized.
5.0 V
10
Phase Detector 1 Filter
400 µA Phase Detector #1 400 µA Sync Horiz OSC R10 C10B 10 C10A
The voltage at this pin nominally ranges from 1.5 V to 5.0 V with corresponding horizontal frequency from 25 kHz to 68 kHz.
11
Automatic Frequency Control
64x Oscillator
From Pin 10
11 R11A
VCC
Pin 11 is a buffered equivalent of Pin 10, and ranges from a minimum of 1.5 V at horizontal high frequency to near 5.0 V at low frequency. Pin 11 can sink a maximum of 1.0 mA, but cannot source current.
R11B 5.0 V 12 R11C
12
Horizontal Frequency Range
The current out of Pin 12 determines the horizontal frequency by a current transfer constant of 122 Hz/µA. Pin 12 is internally maintained at 5.0 V.
13 14, 16
Timebase Ground FH Switch A, B
14 16
Ground for the timebase section. Connect to a clean, low impedance ground. Pin 14 (Switch A), and Pin 16 (Switch B) are open collector NPN switches to ground. Each switch is "on" when the horizontal frequency is higher than the set points set by resistors at Pins 15 and 17, respectively. Maximum voltage is 8.0 V, and maximum sink current is 20 mA.
15, 17
FH Switch A, B Threshold Setting
1.0 k 15,17 R15 (R17) 3.0 k
VCC I12 2
Pin 15 and Pin 17 are current mirror at 1/2 of Pin 12 current. External resistors at these pins set the horizontal frequency at which Pins 14 and 16 will switch, respectively. The threshold voltage is 5.0 V.
To Output Switches 5.0 V
18
Contrast Control
5.0 V
VCC 50 k 18,19
The input control range is from 0 to 5.0 V. An increase of voltage increases contrast.
19
Brightness Control
R18 (R19)
The input control range is from 0 to 5.0 V. An increase of voltage increases brightness.
MOTOROLA ANALOG IC DEVICE DATA
7
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin Name Subcontrast Control Ch l Channel 1 Channel 2 Channel 3 Equivalent Internal Circuit
VCC 50 k 20, 24, 26 7.5 k Gain
Description Subcontrast controls the gain of each video channel. 0 V for maximum gain, and 2.0 V for minimum gain.
20 24 26
21, 22
N/C Video Inputs Channel 1 Channel 2 Channel 3
Video Input
These two pins are internally connected to each other, and nothing else.
Clamp 2.4 V 2.2 µF 23, 25, 27 75 6.2 k 2.7 k 5.0 V
23 25 27
The input coupling capacitor is used for input clamp storage. The maximum source impedance is 100 . Polarity of the input video signal is positive. Amplitude should be nominally 0.7 Vpp.
28
Video Ground
Ground for the video section (video amplifiers, contrast and brightness controls, subcontrast, and video reference voltage). Noise from the timebase section, and other digital circuits, should not be allowed to produce ground bounce at this pin.
29
Video VCC1 Video Clamp Channel 1 Channel 2 Channel 3
Connected to a 8.0, V ±5%, dc supply. Decoupling is required at this pin.
Clamp Pulse p 1.5 V Video Out 38, 33, 30
38 33 30
Normally a 100 nF capacitor is connected to each of these pins pins.
39 34 31
Video Emitter Output Channel 1 Channel 2 C Channel 3 Video Collector Output Channel 1 Channel 2 Channel 3
VCC VCC Blanking 40, 37, 32 Video Amp 39, 34, 31 B i ht Brightness Contrast To Clamp Circuit Rc
Pins 39, 34, and 31 are the emitter outputs of the three video amplifier and have an internal 33 amplifier, resistor. The emitter dc voltage is controlled by the brightness g y g control. l The Th current through each collector and emitter should t th h h ll t d itt h ld not exceed 40 mA.
40 37 32
Re R
35, 36
N/C
These two pins are internally connected to each other, and nothing else.
8
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin 41 Name XRay Shutdown Equivalent Internal Circuit
5.0 V
Description If the voltage at this pin is > 0.58 V, the horizontal driver device (Pins 42 and 43) will be "on" until power is removed, or the voltage on this pin is taken below 0.4 V.
47 k XRay Shutdown 41
42
Horizontal Drive Ground
VCC 2.7 k 43 R43 VCC
This emitter pin must be connected externally to a low impedance ground. Pin 43 is an open collector pin and normally is pulled up by a resistor to VCC. Maximum current through Pins 42 and 43 must be less than 40 mA.
43
Horizontal Drive
42
To Horizontal Deflection Circuit
44
Horizontal Drive Width
5.0 V 44 R44 22 k
5.0 V 24 k Ramp 2
Varying the voltage at this pin will change the horizontal drive duty cycle. As the voltage of this pin is increased, the "on" time at Pin 43 is decreased. Input impedance is 30 k.
13.5 k
45
Secondary Phase Detector Filter
Phase Detector #2
VCC 250 µA 45 250 µA Sync Horiz OSC C45
Typically a 10 to 100 nF decoupling capacitor is connected to this pin.
46
Horizontal Flyback
Flyback Signal
46
10 k To Phase Detector #2 0.7 V
The flyback signal should be a +VE pulse of peak voltage 8.0 V. The internal switching voltage is 0.7 V and it controls the secondary PLL Input impedance is 10 k
47
Video Blanking Input
47 Blanking 2.0 k 20 k
The video blanking signal should be positive pulse in the range of 1.5 to 4.0 V.
MOTOROLA ANALOG IC DEVICE DATA
9
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin 48 Name Vertical Ramp Output
Vertical Oscillator
Equivalent Internal Circuit
2.0 V, 5.0 V Trip Pts VCC 10 k 48 To Vertical Deflection Circuit
Description This ramp signal drives the external vertical output devices. Voltage ramps from 2.0 V to less than 5.0 V, depending on frequency and components at Pins 51 and 52. Loading on this pin must be > 30 k to avoid distorting or clipping the ramp.
Vertical Ramp Generator
49, 50 51
N/C Vertical Ramp Capacitor
VCC Ramp Output Buffer Switching Control Vertical Oscillator
These two pins are internally connected to each other, and nothing else.
I I 2
5.7
The slope of the output ramp is determined by the components at Pins 51 and 52. The resistor at Pin 52 sets the charging current of the capacitor, and therfore the vertical height of the picture. The linearity of the ramp can be modified by external feedback.
1.0 k 200
52
Vertical Size Control
52 51 C51
53
Vertical Sync Polarity Detector
5.0 V
The output goes low when the vertical sync input polarity is positive. It goes high when the vertical sync input polarity is negative.
54
Horizontal Sync Polarity Detector
53, 53 54
The output goes low when the horizontal sync input polarity is positive. It goes high when the horizontal sync input polarity is negative.
55
Horizontal Position Control
5.0 V 5.0 V 55 R55 10 k 15 k 25 k
Varying the voltage at this pin will change the horizontal position of the picture. Input impedance is 31 k.
Ramp 1
56
Timebase VCC2
Connected to a 8.0 V, ±5%, dc supply. Decoupling is required at this pin.
10
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
APPLICATION INFORMATION
The MC13081X is an integrated multisync color monitor processor. It combines horizontal/vertical deflection processing circuitry and video preamplifiers into a single device. The overall timebase section consists of two parts: horizontal and vertical. The horizontal timebase can be operated from 30 kHz to 64 kHz, and can be driven from TTL separate sync, composite sync, or a composite video signal. There are two PLLs which ensure proper timing throughout the whole system. The first PLL provides line locking of the horizontal sync signal with the builtin oscillator, while the second one maintains fixed timing with the horizontal flyback signal such that a stable display can be achieved. The vertical timebase section operates from 45 Hz to 100 Hz, and can receive various sync signals as the horizontal one does. This section consists of an oscillator and a ramp generator. Adjustments include linearity, ramp amplitude, and minimum free running frequency in the absence of sync signal. The video section has three 70 MHz bandwidth preamplifiers. The outputs of these amplifiers are uncommitted collector/emitter facilitating cascode configuration with subsequent stages. Controls include brightness and contrast. In addition, the voltage gain of each amplifier can be adjusted individually which provides flexibility in adjusting color correctness. Blanking and clamping signals are provided to the amplifiers internally from the timebase section. Additionally, a blanking signal can also be supplied externally. Separate power supply and ground pins are provided to the timebase and video section in order to minimize the cross interference between these two sections.
Figure 2. Application Circuit
VR2 VR3 C6 R12 C4 1
Vertical Osc Cap
5.0 Vref VR4 VR5
Vd R13 VR6 C8 C9 44 46
Horizontal Flyback
Vd R14
C5 3
Vertical Integrator Cap
R9 2
Vertical Hold
R10 52
Vertical Size
C7 51
Vertical Ramp Cap
48
Vertical Ramp Out
47
Video Blanking In
55
Horizontal Position
43
Horizontal Drive Video VCC1 Timebase VCC2 Channel 1 Emitter Out
Horizontal Drive Width
29 56 39
Va Vd
VSync HSync C1 R C2 G B R1 R2 R3 C3
4 5 23 25 27
Vertical TTL Sync Horizontal TTL Sync Channel 1 Video In Channel 2 Video In Channel 3 Video In
Channel 1 Clamp
38 C22 34
R19
Channel 2 Emitter Out
MC13081X
28 Vd 11 R4 VR1 R6
PD1 AFC Channel 1 Subcontrast Channel 2 Subcontrast Channel 3 Subcontrast
Channel 2 Clamp Channel 3 Emitter Out
33 31 C23
R20
Video Gnd Channel 3 Clamp
30 C24 40 37 32
R21 Va
Channel 1 Collector Out Composite Video In Channel 2 Collector Out Timebase Gnd Channel 3 Collector Out Horizontal Drive Gnd XRay Shutdown
R5 12
Horizontal Freq Control 5.0 V Reg
Brightness
Contrast
10
C10 C11
9
R16
20
24
26
18
6 19 5.0 Vref 5.0 Vref VR10 VR11 R17
PD2
13 C19
42
45
41 C20 C21 R18
Vd R7 R8 R15 C13
VR7 C12
VR8 C14
VR9 C15
C17 C16 C18
8.0 Vdc L1 Va C25 C26 C27 C28 C29 L2 Vd
R1R3,R17 R4R6 R7 R8 R9 R10 R12 R13 R14 R15 R16 R18 R19R21
75 15 k 3.9 M 6.8 M 8.2 k 220 k 220 k 2.2 k 470 5.6 k 5.1 k 10 k 330
C1C3 C4,C6C9,C13C19,C22C24,C29 C5,C20 C10 C11 C12 C21 C27 C26,C28 C30,C31
2.2 µF 100 nF 10 nF 1.0 nF 100 nF 22 µF 10 nF 100 µF 47 µF 1.0 µF
L1 L2
50 µH 50 µH 10 k 5.0 k 200 k 1.0 M
VR1,VR5VR11 VR2 VR3 VR4
MOTOROLA ANALOG IC DEVICE DATA
11
MC13081X
The following describes a stepbystep procedure in using the MC13801 for a typical multisync color monitor chassis; component notations refer to Figure 2. 1. Horizontal Frequency Range Resistor Network (Pins 11, 12) FHm = Minimum Horizontal Frequency FHx = Maximum Horizontal Frequency Oscillator Transfer Constant = 122 Hz/µA 6.35 x 10 8 R5 F F Hx Hm The threshold voltage for Pin 46 is 0.7 V. The blanking period depends on the amplitude, as shown in Figure 3 (X and Y, respectively). A larger amplitude provides better consistency and control of the blanking period. Figure 3. Voltage for Flyback
+
R6
+
5 Hx 3.5 R5 122 x 10 6 V 1.5 CC R4 F
X
R4
v VCC 6.0 1.5
x R5 and
t 1.0 mA
Y
0.7 V
For most applications, R4 = R5 provides the required results.
NOTE: In order to compensate device/component tolerance, a potentiometer is recommended in series with R6, as VR1.
2. Horizontal Frequency Range Phase Detector Filter Network (Pin 10) Typical values are: C10 = 1.0 nF C11 = 100 nF R15 = 5.6 k C11 100 x C10
NOTE: C10 and C11 should have less than 1.0 µA leakage.
5. Frequency Switch (Pin 14 to 17) There are two frequency switches available for screen size compensation for different timing standards. Each switch will turn on at the switch frequency set with its external resistor. See Figure 4. Figure 4. FH Switches
VCC
I12 2
3. Horizontal Free Running Frequency The voltage at Pin 10 will be buffered to Pin 11, and hence control the internal oscillator. In the absence of horizontal sync signal, the free running horizontal frequency will vary between preset minimum and maximum horizontal frequency values. If an undetermined free running frequency value is not desired, a large impedance resistor can be used to pull Pin 10 to VCC or Gnd, and the free running frequency will be equal to FHm or FHx, respectively. The free running frequency can also be set to any value within the horizontal frequency range by using a voltage divider, as R7 and R8 indicate. R7 V11 V x D R7 R8
15, 17 Ra Rb
1.0 k 3.0 k 5.0 V
The switch frequency is calculated as follow: SF
+ Switch Frequency
SF
+
I12
+ R6 V11 ) VR1
)
Free Running Frequency
+ I12 µA x 122 Hz µA
V11 5 5
The above formula provides the ratio of R7 and R8. The values chosen should be similar to those shown in Figure 2. 4. Horizontal Flyback Input (Pin 46) The horizontal flyback signal not only provides proper timing reference for the horizontal drive output, but also supplies the necessary blanking for the video outputs. There are two precautions for the flyback input. First, the signal should have a zero volt reference, and second, the peak value should be as near to VCC as possible.
In considering the ratio of Ra to Rb, the following parameters, and their tolerances, need to be clarified: 1. Iosc ±10% 2. 5.0 Vref ±5% 3. Vhys ±5% 4. Ra, Rb ±?% Internally, the lockin horizontal frequency will build up a current reference, and half of this current reference is used for setting up a voltage and then compared with the internal 5.0 Vref. Looking at the four parameters above, the first three are IC related, while the last item depends on the external component tolerance. By adding up the first three items, the value of Ra and Rb should be chosen to compensate for about 20% of system tolerance. Therefore, if Ra is chosen to be 70% of the calculated value (Ra + Rb), Rb should be 60% of (Ra + Rb). That
x x + 5 x 2Ra 122Rb 106 )
12
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
means, the overall adjustment is about 70% to 130%, which provides additional ±10% margin. During normal operation, the frequency switch will switch "off" when the pin voltage falls 60 mV below the 5.0 V reference voltage ( 4.94 V), and will switch "on" when the pin voltage rises to 40 mV above the 5.0 V reference ( 5.04 V). An Example: Require Trip Point @ 35 kHz I12 This function is particularly useful for high frequency scan rates. The higher the frequency, the more significant the storage time becomes, compared to the horizontal scan time. Figure 5.
+
HSync HDrive Without Shift
35 x 10 3 µA 122
Trip Point Reference Current
+ I12 2 35 + 122 xk 2
µA
X To Be Determined By Application
Ra
) Rb +
HDrive With FHA On
+ 34857 Hysteresis @ 35 kHz + 5.04 4.94 V 34857 [ 350 Hz
From above, Ra + Rb = 34857 Select Ra = 24 k, and Rb = 20 k Trim Pot
5.0 V 35 k µA 122 x 2
x 122 Hz µA
The Temperature Coefficient of the potentiometer can also be considered. If the value of the potentiometer and Ra vary by 1% (for example) over temperature, the error would be: 5 x 1 1 x 122 Hz 34857 x 1.01 34857 x 0.99 µA
[ 350 Hz
6. Horizontal Position Compensation for Selected Scan Frequency in Using FHA Switch Refering to Figure1 (block diagram), there is an output from the FHA switch to the horizontal drive output. When the FHA switch is switched on, at a specified horizontal frequency, there is a 1/8th horizontal line shift of HRamp1. Referring to Figures 5 and 9, a shift of HRamp1 will result in a shift of the HDrive output timing with respect to flyback input. The exact HDrive output shift will be determined by the PD2 voltage (Pin 45), which is generated by the flyback input and the internal Comp1 output. That is related to the HDrive output transistor storage time.
7. Proper Horizontal Phase Control The horizontal adjustment range depends on the phase angle between the HSync signal and the horizontal flyback input. In reality, the actual adjustment range is a combination of horizontal frequency, front porch/back porch timing, flyback pulse width, and horizontal output transistor storage time. The following paragraph conveys the concept for normal operation. There are two clamping situations for video signals. In case 1, separate VTTL and HTTL sync are provided, the video signal is clamped at sync tip, and the dc voltage built up is used for black level reference. In this instance, the clamp pulse has the same pulse width as HSync, and nearly the same position. This clamp pulse is blanked out internally. In order to allow the video output to complete the blanking action during horizontal retrace, the horizontal phase should not be overadjusted. See Figure 6 for a pictorial perception. Accordingly, the total horizontal position adjustment range is calculated as the sum of t1 and t2. Should the phase of horizontal flyback/HSync move further left or right from the normal adjustment range, the black level reference voltage will be restored, and consequently a slightly brighter than screen dark region will be observed onscreen. See Figure 7 for pictorial explanation. Horizontal Blanking Time
+ FPtime ) Sync Width
+ BPtime = THB |Dt2|
Criterion for Normal Operation: |Dt1|
t THB 2
t THB 2
In other words, the left/right 0.7 V threshold flyback reference should be within the HSync pulse (shaded area of Figure 6).
MOTOROLA ANALOG IC DEVICE DATA
13
MC13081X
Figure 6. Horizontal Position Adjustment at Normal Operation
HTTL Sync A t2 t1 HSync Width
14
ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ
Flyback Threshold = 0.7 V
B
Flyback Pulse Width
Video Output
C Blanking Width
Video Output
Black Level Ref 0V
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
Figure 7. Horizontal Position Adjustment at Overscan Operation
HTTL Sync
Flyback Threshold = 0.7 V
Video Output X Blanking Width
Flyback Threshold = 0.7 V
Video Output
X
Black Level Ref 0 Vref
NOTE:
Region X will appear as bright vertical stripe.
MOTOROLA ANALOG IC DEVICE DATA
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MC13081X
Figure 8.
Video Input
Clamp Pulse Position
Flyback Threshold = 0.7 V
Video Output Black Level Ref Blanking Width
In case 2, composite sync is used instead of VTTL and HTTL sync, the clamp pulse is located at the backporch of the video signal, and the width of the clamp pulse is calculated as follows: 1 Clamp Pulse Width x 3 64 x Line Frequency
+
Blanking Width = Sync Width + Clamp Pulse Width + Flyback Threshold (0.7 V) (See Figure 8) From the above diagram, it can be seen that the horizontal position adjustment is basically the same as case 1 except slightly wider with the addition of clamp pulse blanking. 8. Horizontal Timing Relationship for Phase Detector 2 The following paragraphs explain the PLL2 mechanism. Figure 9 portrays the timing signals of various parts of the IC. In using the HSync pulse, which is generated from PLL1, a horizontal ramp 1 signal is created. HRamp1 starts at
1/4th line before HSync and the ramping slope is directly proportional to horizontal frequency. The lower tip of this ramp is at approximately 1.2 V, and the amplitude is about 4.2 V. By adjusting the dc bias to the HPhase control, a pulse waveform is derived from this HRamp1. A phase detector is used to compare the phase between the pulse generated above, and the incoming flyback pulse. An integrating capacitor is applied to generate a dc voltage. This dc voltage, PD2F output, is used to slice the HRamp1 signal in order to generate Comp2 output pulse. A second ramp signal, HRamp2, is triggered from this Comp2 output. By applying a dc voltage (HWidth control) to HRamp2, the Comp3 output pulses are generated. The HDrive output is formed by the rising edge of Comp2 output and the rising edge of Comp3 output. It can be seen from Figure 9, if the HPhase control is over or under driven, it will reach the upper/lower tip of HRamp1, and thus PLL2 will be disturbed.
16
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
Figure 9. Horizontal Timing for PLL2 Internal Sections
1/4 H 1/2 H
HSync
4.2 V HPhase PD2 Output 1.2 V HRamp1
HFlyback
Comp1 Output
Comp2 Output
H Pulse Width HRamp2
Comp3 Output
HDrive
MOTOROLA ANALOG IC DEVICE DATA
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MC13081X
Figure 10. Vertical Section
Free Running VRamp
Vert Sync Pulse 1/4 V 3/4 V
Vert Oscillator
Vert Ramp Output
9. Vertical Frequency Range (Pins 48, 51, 52) The MC13081X vertical oscillator is an injectionlock type. The device can handle vertical frequency from 45 Hz to 100 Hz. The internal ramp generator will generate a ramp output in the absence of a VSync signal. Upon receiving an external vertical sync pulse, the ramp up portion is forced to retrace, and therefore, the vertical ramp output is synchronized with incoming VSync. The slope of the Vertical Ramp output is directly proportional to the current flowing out of Pin 52. Half of this current is used to charge up the Vertical Ramp Capacitor. As the charging current is increased, so does the ramp slope. External feedback can be provided from Pin 48 to Pins 51 and 52 for linearity adjustment. 10. Vertical Free Running Frequency (Pins 1, 2) The purpose of the vertical oscillator is to maintain a vertical ramp to the deflection circuitry in the event the vertical sync is not present. Because of the injectionlock type, the free running frequency must be lower than the system's lowest vertical frequency. While various combinations of C4 and R9 can produce a given frequency, it is recommended C4 be 0.1 µF in order to obtain practical values for R9. The free running frequency should be set at about 10% lower than the minimum operating vertical frequency (54 Hz for a 60 Hz system). R9 is then calculated from: V 1.4 CC R9 2.5 k 96 x C4 x FV Connecting a potentiometer, (VR2) provides "Vertical Hold" adjustment.
11. XRay Shutdown Protection (Pin 41) The XRay input (Pin 41) permits shutting off the horizontal drive, usually by external circuitry which monitors faults within the high voltage supply, such as excess anode current. This input is activated by taking it above 0.6 V which causes the drive transistor at Pin 43 to be turned on (low) permanently by an internal latch. An external resistor must be connected to Pin 41 to limit the input current, and to assist with the latching action (see Figure 11). 10 k is a typical value, but the value can be chosen based on the specifies of the driving circuit. The external resistor reduces the sensitivity of Pin 41 to noise and transients which may otherwise result in false latches. To resume normal operation (after correction of the fault), lower Pin 41 below 0.4 V. If the external circuit's normal operation does not take it below 0.4 V, but does take it below 0.6 V, then recycle VCC "off""on". If the pin is not used, it must be connected to ground. The minimum holding current to keep the latch on is 70 µA, while the minimum turnon current is 0.4 µA. Figure 11. XRay Shutdown Circuit
5.0 V HDrive Shutdown 47 k XRay Shutdown 10 k 41
+
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MOTOROLA ANALOG IC DEVICE DATA
MC13081X
OUTLINE DIMENSIONS
B SUFFIX PLASTIC SDIP PACKAGE CASE 85901 ISSUE O
NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH. MAXIMUM MOLD FLASH 0.25 (0.010). INCHES MIN MAX 2.035 2.065 0.540 0.560 0.155 0.200 0.014 0.022 0.035 BSC 0.032 0.046 0.070 BSC 0.300 BSC 0.008 0.015 0.115 0.135 0.600 BSC 0° 15° 0.020 0.040 MILLIMETERS MIN MAX 51.69 52.45 13.72 14.22 3.94 5.08 0.36 0.56 0.89 BSC 0.81 1.17 1.778 BSC 7.62 BSC 0.20 0.38 2.92 3.43 15.24 BSC 0° 15° 0.51 1.02
-A56 29
-B1 28
L H C
-TSEATING PLANE
K F D 56 PL 0.25 (0.010) E
M
DIM A B C D E F G H J K L M N
G
N J 56 PL T B S
M
T A
S
0.25 (0.010)
M
MOTOROLA ANALOG IC DEVICE DATA
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MC13081X
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*MC13081X/D*
MOTOROLA ANALOG IC DEVICE DATA
MC13081X/D