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PAMS Technical Documentation NSC1 Series Transceivers
Chapter 3 System Module US4RSM
Original 11/99
NSC1 System Module US4RSM
PAMS Technical Documentation
CONTENTS Page No
System Module US4RSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External and Internal Connectors . . . . . . . . . . . . . . . . . . . . . System Connector Signals . . . . . . . . . . . . . . . . . . . . . . . . RFConnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Control Channel (ACCH) Mode . . . . . . . . . . . . . . . . Analog Voice Channel (AVCH) Mode . . . . . . . . . . . . . . . . . Digital Control Channel (DCCH) 800 MHz Mode . . . . . . . . Digital Traffic Channel (DTCH) 800 MHz Mode . . . . . . . . . Out of Range (OOR) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . Locals Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . External interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signals between baseband and User Interface section . . User Interface module connection . . . . . . . . . . . . . . . . . . . . Earphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buzzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charging Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2wire charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3wire charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power up when powerbutton is pushed . . . . . . . . . . . . . . IBI (Intelligent Battery Interface) . . . . . . . . . . . . . . . . . . . . . . Mixed trigger to power up . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power off by pushing Powerkey . . . . . . . . . . . . . . . . . . . . . Power off when battery voltage low . . . . . . . . . . . . . . . . . . . Power off when fault in the transmitter . . . . . . . . . . . . . . . . Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Waking up from the Sleepmode . . . . . . . . . . . . . . . . . . . . . Baseband submodules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CTRLU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MCU main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSP main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Logic main features . . . . . . . . . . . . . . . . . . . . . . . . . 35 35 36 36 37 37 38 38 38 39 39 39 3 10 3 10 3 11 3 12 3 12 3 12 3 12 3 12 3 13 3 13 3 14 3 14 3 15 3 15 3 16 3 16 3 17 3 17 3 17 3 17 3 18 3 18 3 18 3 18 3 19 3 19 3 19 3 20 3 20 Original 11/99
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Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AUDIORF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cobba main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Speech processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Alert Signal Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWRU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CCONT main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CHAPS main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution Typical Currents . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAMPS800 RX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAMPS800 TX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency Synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAMPS800 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltages in different modes of operation . . . . . . . . Software Compensations . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Levels (TXC) vs. Temperature . . . . . . . . . . . . . . . Power Levels (TXC) vs. Channel . . . . . . . . . . . . . . . . . . . Power levels vs. Battery Voltage . . . . . . . . . . . . . . . . . . . TX Power Up/Down Ramps . . . . . . . . . . . . . . . . . . . . . . . Modulator Output Level . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Mode RSSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Block Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DAMPS 800 Mhz Front End . . . . . . . . . . . . . . . . . . . . . . . . . First IF Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UHF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VHF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFBaseband signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Interface and Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital control channels . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog control channel . . . . . . . . . . . . . . . . . . . . . . . . . . . Parts list of US4RSM (EDMS Issue 4.0) Code: 0201343 . . . . .
3 20 3 21 3 21 3 22 3 22 3 23 3 23 3 23 3 24 3 24 3 24 3 24 3 26 3 27 3 27 3 27 3 28 3 28 3 28 3 29 3 29 3 30 3 30 3 30 3 30 3 30 3 30 3 30 3 31 3 31 3 31 3 31 3 32 3 32 3 32 3 32 3 32 3 33 3 33 3 34 3 34 3 40 3 41 3 42 3 43
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Parts list of US4RSM (EDMS Issue 6.0) Code: 0201343 . . . . .
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Schematic Diagrams: US4RSM
Circuit Diagram of System Blocks (Version 4.03 Edit 3) . . . . . Circuit Diagram of Power Supply (Version 04.03 Edit 5) . . . . . Circuit Diagram of CTRLU Block (Version 04.03 Edit 3) . . . . . . Circuit Diagram of Audio (Version 4.03 Edit 6) . . . . . . . . . . . . . Circuit Diagram of Transmitter (Version 4.3 Edit 5) . . . . . . . . . . Circuit Diagram of Receiver (Version 4.3 Edit 03) . . . . . . . . . . . Circuit Diagram of Synthesizer (Version 4.3 Edit 3) . . . . . . . . . Circuit Diagram of RF Block (Version 04.03 Edit 2) . . . . . . . . . . Circuit Diagram of RFBB Interface (Version 4.03 Edit 03) . . . Layout Diagram 1/2 of US4RSM (Layout version 04) . . . . . . . . Layout Diagram 2/2 of US4RSM (Layout version 04) . . . . . . . . Circuit Diagram of System Blocks (Version 06.43 Edit 10) . . . Circuit Diagram of Power Supply (Version 06.43 Edit 9) . . . . . Circuit Diagram of CTRLU Block (Version 06.43 Edit 10) . . . . . Circuit Diagram of Audio (Version 0.643 Edit 7) . . . . . . . . . . . . . Circuit Diagram of Transmitter (Version 06.43 Edit 11) . . . . . . . Circuit Diagram of Receiver (Version 06.43 Edit 7) . . . . . . . . . . Circuit Diagram of Synthesizer (Version 06.43 Edit 6) . . . . . . . Circuit Diagram of RF Block (Version 06.43 Edit 4) . . . . . . . . . . Circuit Diagram of RFBB Interface (Version 06.43 Edit 7) . . . Layout Diagram 1/2 of US4RSM (Layout version 06) . . . . . . . . Layout Diagram 2/2 of US4RSM (Layout version 06) . . . . . . . . 3/A31 3/A32 3/A33 3/A34 3/A35 3/A36 3/A37 3/A38 3/A39 3/A310 3/A311 3/A312 3/A313 3/A314 3/A315 3/A316 3/A317 3/A318 3/A319 3/A320 3/A321 3/A322
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NSC1 System Module US4RSM
System Module US4RSM
The purpose of the system module is to control the phone and process audio signals to and from RF. The module also controls the user interface.
External and Internal Connectors
IBI connector (6 pads)
B side view
8 Fixing pads (2 pcs) 1 7 14
Engine PCB
DC Jack
Microphone acoustic ports
Bottom connector (6 pads)
Charger pads (3 pcs)
A side view
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ÁÁ ÁÁ ÁÁ
ÂÂÂÂÂÂÂ
Cable locking holes (3 pcs) Cavity for microphone
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System Connector Signals
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 V_IN L_GND V_IN CHRG_CTRL CHRG_CTRL MICP MICN XMIC SGND XEAR MBUS FBUS_RX FBUS_TX L_GND Name DC Jack DC Jack DC Jack Bottom charger contacts Microphone Microphone Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom & IBI connectors Bottom charger contacts Function Bottom charger contacts Description Charging voltage. Logic and charging ground. Charging voltage. Charger control. Charger control. Microphone signal, positive node. Microphone signal, negative node. Analog audio input. Audio signal ground. Analog audio output. Bidirectional serial bus. Serial data in. Serial data out. Logic and charging ground.
RFConnector The RFconnector is needed to utilize the external antenna with Car Cradle. The RFconnector is located on the back side of the transceiver on the top section. The connector is plug type connector with special mechanical switching. Accessory side of connector Part will be floating in car holder Phone side of connector
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Battery Contacts
Pin 1 2 3 Name BVOLT BSI BTEMP Function Battery voltage Battery Size Indicator Battery temperature indication Phone power up Battery power up PWM to VIBRA BATTERY Battery voltage Input voltage Input voltage Input voltage Output voltage PWM output signal frequency Ground Description
4
BGND
Operating Conditions
Environmental condition Normal operation conditions Extreme operation conditions Reduced performance conditions Intermittent operation conditions Cessation of operation Long term storage conditions Short term storage, max. 24 h LCD operation Ambient temperature +7 oC ... +40 oC 20 oC ... +40 oC +40 oC ... +60 oC 40 oC ... 30 oC and +60 oC ... +80 oC <40 oC and >80 oC 0 oC ... +40 oC 40 oC ... +80 oC 30 oC ... +70 oC Notes Specifications fulfilled and fast charging possible Specifications fulfilled Operational only for short periods Operation maybe not possible but attempt to operate will not damage the phone No storage or operation is allowed Battery only up to +30 oC ! Cumulative for lifetime of battery Functions are delayed in low temperatures
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Functional Description
The US4RSM engine consist of a Baseband/RF module with connections to a separate User Interface module. Baseband and RF submodules are interconnected with PCB wiring. The engine can be connected to accessories via bottom system connector and an Intelligent Battery Interface (IBI) connector. The RF submodule receives and demodulates radio frequency signals from the base station and transmits modulated RF signals to the base station. It consists of functional submodules Receiver, Frequency Synthesizer and Transmitter. The RF submodule can further be devided into lower band and upper band functions. The Baseband module containes audio, control, signal processing and power supply functions. It consists of functional submodules CTRLU (Control Unit; MCU, DSP, logic and memories), PWRU (Power Supply; regulators and charging) and AUDIO_RF (audio coding, RFBB interface). The US4RSM engine consist of a Baseband/RF module with connections to a separate User Interface module. Baseband and RF submodules are interconnected with PCB wiring. The engine can be connected to accessories via bottom system connector and an Intelligent Battery Interface (IBI) connector.
Modes of Operation
US4RSM operates in five cellular modes and a local mode for service:
Analog Control Channel (ACCH) 800 MHz Mode, Analog Voice Channel (AVCH) 800 MHz Mode, Digital Control Channel (DCCH) 800 MHz Mode, Digital Traffic Channel (DTCH) 800 MHz Mode, Out of Range (OOR) Mode, Locals mode, used by Production and After Sales.
Analog Control Channel (ACCH) Mode On analog control channel the phone receives continuous signalling messages on Forward Control Channel (FOCC) from the base station, being most of the time in IDLE mode. Only the receiver part is on. The phone scans the preferred dedicated control channels to find and lock to the strongest channel for reading information from this control channel. DSP is not used on ACCH (it stays in sleep mode), except during channel scanning for loading the synthesizers. As a separate sleep clock is used, also the VCTCXO can be turned off periodically with the RF parts. Only the sleep clock and necessary timers in MCU are operational. Original 11/99
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When registration is demanded the phone sends (TX on) it's information on Reverse Control Channel (RECC) to the base station. The phone's location is updated in the switching office. If a call is initiated, either by the user or the base station, the phone moves to the allocated analog voice channel or digital traffic channel depending on the orders by the base station. Analog Voice Channel (AVCH) Mode The phone receives and transmits analog audio signal. All circuitry is powered on (except the receiver parts used only in digital modes). DSP does the audio processing and in Hands Free mode also performs echocancellation and HF algorithms. The COBBA IC makes A/D conversion for the MIC signal, and D/A conversion for the EAR signal. With audio signal also the Supervisory Audio Tone (SAT) is being received from the base station. The SAT frequency can be 5970 Hz, 6000Hz or 6030 Hz, defined by the base station. The DSP phase lock loop locks to the SAT, detects if the frequency is the expected one and examines the signal quality. DSP reports SAT quality figures regularily to the MCU. The received SAT signal is transmitted back (transponded) to the base station. The base station can send signalling messages on Forward Voice Channel (FVC) to the phone, by replacing the audio with a burst of Wide Band Data (WBD). These are typically handoff or power level messages. The RX modem in System Logic receives the signalling message burst and gives an interrupt to the MCU for reading the data. MCU gives a message to DSP to mute the audio path during the burst. MCU can acknowledge the messages on Reverse Voice Channel (RVC), where DSP sends the WBD to transmitter RF. Digital Control Channel (DCCH) 800 MHz Mode On digital control channel (DCCH) DSP receives the paging information from the Paging channels and sends the messages to MCU for processing. Each Hyperframe (HFC) comprises two Superframes (SF), the Primary (p) and the Secondary (s) paging frame. The assigned Page Frame Class (PFC) defines the frames which must be received, and thus defines when the receiver must be on. The phone is in sleep mode between the received time slots. The sleep clock timer is set and MCU, DSP and RF parts (including VCTCXO) are powered down. Only sleep clock and the respective timers are running. From DCCH phone may be ordered to analog control channel or to analog or digital traffic channel. Digital Traffic Channel (DTCH) 800 MHz Mode Digital Voice Channel (SDTCH)
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On digital voice channel DSP processes the speech signal in 20 ms time slots. DSP performs the speech and channel functions in time shared fashion and is in sleep mode whenever possible. RX and TX parts are powered on and off according to the slot timing. MCU is waken up mainly by DSP, when there is signalling information for the Cellular Software. Digital Data Channel (DDTCH) In Digital Data Channel Mode audio processing is not needed and audio circuitry can be shut down. Otherwise the mode is similar to Digital Voice Channel Mode. Out of Range (OOR) Mode If the phone can't find signal from the base station on any control channel (analog or digital) it can go into OOR mode for power saving. All RF circuits are powered down and the baseband circuits in a low power mode, VCTCXO stopped and only the sleep clock running. After a programmable timer in MCU has elapsed the phone turns the receiver on and tries to receive signalling data from base station. If it succeeds, the phone goes to standby mode on analog or digital control channel. If the connection can not be established the phone returns to OOR mode until the timer elapses again.
Locals Mode Locals mode is used for testing purposes by Product Development, Production and After Sales. The Cellular Software is stopped (no signalling to base station), and the phone is controlled by MBUS/FBUS messages by the controlling PC.
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NSC1 System Module US4RSM
Power Distribution Diagram
UT4U Engine PA 1900 MHz PA 800 MHz
VR8 VR9 VR10 VR11 VR12
RF
1900 MHz
PENTA
Charger
Charge control
VR1 VR2 CCONT VR3 VR4 VR5 VR6 VR7 VREF VSIM VBB V5V
800 MHz
Baseband
COBBA analog Flash ROM
Battery
UI Module
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External interfaces
Antenna 4 Battery Pack US4RSM ENGINE 28 User Interface Module Display Keyboard Backlights 2 Bottom connector Accessories Connector Name Bottom connector + IBI connector UIconnector Battery connector RFinterface Notes Includes control, data, charging and audio signals includes keyboard, backlight, display,buzzer, call led, and earpiece signals VBAT, GND, BTYPE, BTEMP Connection Mic Speaker Buzzer
3
Charger
6 IBI connector
Signals between baseband and User Interface section
The User interface section is implemented on separate UI board, which connects to the engine board with a board to board spring connector. User Interface module connection The User interface section comprises the keyboard with keyboard lights, display module with display lights, an earphone and a buzzer. Earphone The internal earphone is connected to the UI board by means of mounting springs for automatic assembly. The low impedance, dynamic type earphone is connected to a differential output in the COBBA audio codec. The voltage level at each output is given as reference to ground. Earphone levels are given to 32 ohm load. Buzzer Alerting tones and/or melodies as a signal of an incoming call are generated with a buzzer that is controlled with a PWM signal by the MAD. The buzzer is a SMD device and is placed on the UI board. Original 11/99
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Baseband Module Power Distribution
In normal operation the baseband is powered from the phone`s battery. The battery consists of one Lithiumcell. There is also a possibility to use batteries consisting of three Nickel cells. An external charger can be used for recharging the battery and supplying power to the phone. The charger can be either so called fast charger, which can deliver supply current up to 850 mA or a standard charger that can deliver around 300 mA. VCXO COBBA CHAPS
VCHAR
LCDDRVR
BATTERY MAD
VBAT
CCONT
VR1 PWM VR6 VBB SIO VR1VR7 V2V VR1_SW VSIM V5V Vref
FLASH
RF
Battery voltage VBAT is connected to CCONT which regulates all the supply voltages VBB, VR1VR7, V2V, VR1_SW, VSIM and V5V. VR7 is divided into VR7 and VR7_bias. VR7_bias is for RF, because PA is heating and this reduces the heat. CCONT enables automatically VR1, VBB, V2V_core, VR6 and Vref in powerup. VBB is used as baseband power supply for all digital parts, and it is constantly on whenever the phone is powered up. There is also another Baseband voltage, V2V, which is reserved for later version of MAD circuit. V2V will be used as a lower core voltage for MAD internal parts, by supplying it to specific MAD core voltage pins. Until that time, VBB will be used for all MAD pins. VSIM can be used as programming voltage for the Flash memory, if reflashing is needed after initial flash programming in production. V5V is used for RF parts only. VR1 is used for the VCXO supply. VR1_SW is derived from VR1 inside CCONT, and is actually the same voltage, but can be separately switched
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on and off. This VR1_SW is used as bias voltage for microphone, during talk modes. Voltage VR6 is used in COBBA for analog parts and also in RF parts. RFCEN signal to CCONT controls both the VR1 and VR6 regulators; they can be switched off in sleep modes, during standby. CCONT regulators are controlled either through SIO from MAD or timing sensitive regulators are controlled directly to their control pins. These two control methods form a logical ORfunction, i.e. the regulator is enabled when either of the controls is active. Most of the regulators can be individually controlled. CHAPS connects the charger voltage (VCHAR) to battery. MCU of MAD controls the charging through CCONT. MAD sets the parameters to PWMgenerator in CCONT and PWMoutput controls the charging voltage in charger. When battery voltage is under 3.0V, CHAPS controls independently the charging current to battery.
Charging Control
CHAPS Vin System Connector CCONT
PWMOUT
BATTERY MAD
To charger
Charging Control serial control
Charging is controlled by MCU SW, which writes control data to CCONT via serial bus. CCONT output pin PWMOUT (Pulse Width Modulation) can be used to control both the charger and the CHAPS circuit inside phone. 2wire charging With 2wire charging the charger provides constant output current, and the charging is controlled by PWMOUT signal from CCONT to CHAPS. PWMOUT signal frequency is selected to be 1 Hz, and the charging switch in CHAPS is pulsed on and off at this frequency. The final charged energy to battery is controlled by adjusting the PWMOUT signal pulse width. Original 11/99
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Both the PWMOUT frequency selection and pulse width control are made MCU which writes these values to CCONT. 3wire charging With 3wire charging the charger provides adjustable output current, and the charging is controlled by PWMOUT signal from CCONT to Charger, with the bottom connector signal. PWMOUT signal frequency is selected to be 32 Hz, and the charger output voltage is controlled by adjusting the PWMOUT signal pulse width. The charger switch in CHAPS is constantly on in this case.
Watchdog
VCXO BATTERY MAD COBBA
CCONT
VR1 32 kHz VR6 VBB SLCLK SIO LOGIC MCU
Both MAD and CCONT include a watchdog, and both use the 32 kHz sleep clock. The watchdog in MAD is the primary one, and this is called SWwatchdog. MCU has to update it regularly. If it is not updated, logic inside MAD gives reset to MAD. After the reset, MCU can read an internal status bit to see the reason for reset, whether it was from MAD or CCONT. The SWwatchdog delay can be set between 0 and 63 seconds at 250 millisecond steps; and after powerup the default value is the max. time. MAD must reset CCONT watchdog regularly. CCONT watchdog time can be set through SIO between 0 and 63 seconds at 1 second steps. After powerup the default value is 32 seconds. If watchdog elapses, CCONT will cut off all supply voltages. After total cutoff the phone can be restarted through any normal powerup procedure.
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Power up
When the battery is connected to phone, nothing will happen until the powerup procedure is initiated, for instance by pressing the powerbutton (or by connecting charger voltage). After that the 32kHz crystal oscillator of CCONT is started (can take up to 1 sec), as well as the regulators are powered up. If power down is done, and the battery remains connected, the 32 kHz crystal oscillator keeps still running in the CCONT. When powerup is initiated again, the complete powerup sequence is like in the figure below. This time the powerup sequence is faster, because the oscillator is already running. Power up when powerbutton is pushed
PWRONX VR1, VBB, VR6 RFCEN RFCSETTLED RFC (VCXO) COBBACLK PURX SLCLK
t1 t2 t3
t1 t2 t3
< 1 ms 1 6 ms, VCXO settled 62 ms, PURX delay generated by CCONT
After PWRkey has been pushed, CCONT gives PURX reset to MAD and COBBA, and turns on VR1, VBB and VR6 regulators (if battery voltage has exceeded 3.0 V). VR1 supplies VCXO, VBB supplies MAD and digital parts of COBBA, and VR6 supplies analog parts of COBBA and some RF Original 11/99
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parts. After the initial delay t2 VCXO starts to give proper RFC to COBBA that further divides it to COBBACLK for MAD. COBBA will output the COBBACLK only after the PURX reset has been removed. After delay t3 CCONT releases PURX and MAD can take control of the operation of the phone. After that MCUSW in MAD detects that the PWRkey is still pushed and shows the user that the phone is powering up by starting the LCD and turning on the lights. MCUSW must start also RF receiver parts at this point. CCONT will automatically powerup also VSIMregulator (used for possible reFlashing), regardless of the control pin SIMPWR state, and the regulator default voltage is 3V. VSIM voltage could be selected to be 5V, by writing the selection via serial bus to CCONT, but that is not needed with the new Flash versions (Jaguar). V5Vregulator (for RF) default value is off in powerup, and can be controlled on via serial bus when needed. IBI (Intelligent Battery Interface) Phone can be powered up by external device (accessory or similar) by providing a start pulse to the battery signal BTEMP; this is detected by CCONT. After that the powerup procedure is similar to pushing power button. Mixed trigger to power up It is possible that PWRkey is pushed during charger initiated powerup procedure or charger is connected during PWRkey initiated power up procedure. In this kind of circumstances the powerup procedure (in HW point of view) continues as nothing had happened. When the Baseband HW is working normally and SW is running, SW detects that both conditions are fulfilled and then acts accordingly.
Power Off
Power off by pushing Powerkey MAD (MCU SW) detects that PWRkey is pressed long enough time. After that the lights and LCD are turned off. MCU stops all the activities it was doing (e.g. ends a call), sends power off command to CCONT (i.e. gives a short watchdog time) and goes to idletask. After the delay CCONT cuts all the supply voltages from the phone. Only the 32 kHz sleep clock remains running. Note that the phone doesn't go to power off (from HW point of view) when the charger is connected and PWRkey is pushed. It is shown to user that the phone is in power off, but in fact the phone is just acting being powered off (this state is usually called acting dead).
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Power off when battery voltage low During normal discharge the phone indicates the user that the battery will drain after some time. If not recharged, SW detects that battery voltage is too low and shuts the phone off through a normal power down procedure. Anyway, if the SW fails to power down the phone, CCONT will make a reset and power down the phone if the battery voltage drops below 2.8 V. Power off when fault in the transmitter If the MAD receives fault indication, from the line TXF, that the transmitter is on although it shouldn't be, the control SW will power down the phone.
Sleep Mode
The phone can enter SLEEP only when both MCU and DSP request it. A substantial amount of current is saved in SLEEP. When going to SLEEP following things will happen 1. 2. Both MCU and DSP enable sleep mode, set the sleep timer and enter sleep mode RFCEN and RFCSETTLED > 0 > COBBACLK will stop (gated in COBBA). Also VR1 is disabled > VCXO supply voltage is cut off > RFC stops. LCD display remains the same, no changes Sleep clock (SLCLK) and watchdog in CCONT running Sleep counter in MAD running, uses SLCLK
3. 4. 5.
Waking up from the Sleepmode In the typical case phone leaves the SLEEPmode when the SLEEP counter in MAD expires. After that MAD enables VR1 VCXO starts running after a preprogrammed delay RFCSETTLED rises => MAD receives COBBACLK clock MAD operation restarts. There are also many other cases when the SLEEP mode can be interrupted, in these cases MAD enables the VR1 and operation is started similarly some MCU or DSP timer expires DSP regular event interrupt happens MBUS activity is detected FBUS activity is detected Charger is connected, Charger interrupt to MAD any key on keyboard is pressed, interrupt to MAD HEADSETINT, from system connector XMIC line (EAD) HOOKINT, from system connector XEAR line Original 11/99
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Baseband submodules
CTRLU
CTRLU comprises MAD ASIC (MCU, DSP, System Logic) and Memories. The environment consists of three memory circuits (FLASH,SRAM,EEPROM), 22bit address bus and 8/16bit data bus. Besides there are ROM1SELX, ROM2SELX, RAMSELX and EEPROMSELX signals for chip select. MCU main features System control Cellular Software (CS) Cellular Software takes care of communication with switching office, as well call buildup, maintenance and termination. Communication control M2BUS is used to communicate to external devices. This interface is also used for factory testing, service and maintenance purposes. User Interface (UI) PWRkey, keyboard, LCD, flip/door switch, backlight, mic, ear and alert (buzzer, vibra, led) control. Serial interface from MAD to LCD (common for CCONT). Authentication Authentication is used to prevent fraud usage of cellular phones. RF monitoring RF temperature monitoring by VCXOTEMP, ADC in CCONT. Received signal strength monitoring by RSSI, ADC in CCONT. False transmission detection by TXF signal, digital IOpin. Power up/down and Watchdog control When power key is pressed, initial reset (PURX) has happened and default regulators have powered up in CCONT, MCU and DSP take care of the rest of power up procedures (LCD, COBBA, RF). MCU must regularly reset Watchdog counter in CCONT, otherwise the power will be switched off. Accessory monitoring Accessory detection by EAD (XMIC/HEADSETINT), ADconverter in CCONT. Connection (FBUS) for data transfer.
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Battery and charging monitoring MCU reads the battery type (BTYPE), temperature (BTEMP) and voltage (VBAT) values by ADconverter in CCONT, and phone's operation is allowed only if the values are reasonable. Charging current is controlled by writing suitable values to PWM control in CCONT. MCU reads also charger voltage (VCHAR) and charging current values (ICHAR). Production/after sales tests and tuning Flash and EEPROM loading, baseband tests, RF tuning Control of CCONT via serial bus MCU writes controls (regulators on/off, Watchdog reset, charge PWM control) and reads ADconversion values. For ADconversions MCU gives the clock for CCONT (bus clock), because the only clock in CCONT is sleep clock, which has too low frequency. DSP main features DSP (Digital Signal Processor) is in charge of the channel and speech coding according to the IS136 specification. The block consists of a DSP and internal ROM and RAM memory. The input clock is 9.72 MHz, and DSP has it's own internal PLLmultiplier. Main interfaces are to MCU, and via System Logic to COBBA and RF. System Logic main features MCU related clocking, timing and interrupts (CTIM) DSP related clocking, timing and interrupts (CTID) DSP general IOport reset and interrupts to MCU and DSP interface between MCU and DSP (API) MCU interface to System Logic (MCUif) MCU controlled PWMs, general IOport and USART for MBUS (PUP) Receive Modem (Rxmodem) Interface to Keyboard, CCONT and LCD Drivers (UIF) Interface to MCU memories, address lines and chip select decoding (BUSC) DSP interface to System Logic (DSPif) serial accessory interface (AccIf, DSPUART) Modulation, transmit filter and serial interface to COBBA (MFI) Serial interface for RF synthesizer control (SCU) Memories The speed requirement of FLASH and SRAM is assumed to be 120 ns. Original 11/99
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FLASH size 8 Mbit (512k * 16 bit), optional 4 Mbit and 16 Mbit, all made layout compatible by having additional higher address lines ready in the layout. Flash memory contains the main program code for the MCU, and EEPROM default values. SRAM size 128k/256 * 8 bit, all in STSOP32 package EEPROM size 16k * 8 bit, optional 8k * 8 bit serial or optional parallel interface can be used (MAD1 supports both), but serial interface is used.
AUDIORF
Audio interface and basebandRF interface converters are integrated into COBBA circuit. COBBA main features The codec includes microphone and earpiece amplifier and all the necessary switches for routing. There are 2 different possibilities for routing; internal and external devices. There are also all the AD and DA converters for the RF interface. New solution, DEMO block, is used for FMdemodulation in analog mode. A slow speed DAconverter provides automatic frequency control (AFC). In addition, there is a DAconverters for transmitter power control (TXC). COBBA also passes the RFC (19.44 MHz) to MAD as COBBACLK (9.72 MHz). COBBA is connected to MAD via two serial busses: RXTXSIO, for interfacing the RFDACs and DEMO; and also for audio codec and general control. Signals used: COBBACLK (9.72 MHz, from COBBA), COBBACSX, COBBASD (bidirectional data) and COBBADAX (data ready flag for rxsamples). Codec SIO, for interfacing the audio ADCs / DACs (PCMsamples). Signals: PCMDCLK (data clock 1.08 MHz / 1.215 MHz), PCMSCLK (frame sync 8.0 kHz / 8.1 kHz), PCMTxdata and PCMRxdata.
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Speech processing The speech coding functions are performed by the DSP in the MAD and the coded speech blocks are transferred to the COBBA for digital to analog conversion, down link direction. In the up link direction the PCM coded speech blocks are read from the COBBA by the DSP. There are two separate interfaces between MAD and COBBA: 2 serial buses. The first serial interface is used to transfer all the COBBA control information (both the RFI part and the audio part). The second serial interface between MAD and COBBa includes transmit and receive data, clock and frame synchronisation signals. It is used to transfer the PCM samples. The frame synchronisation frequency is 8 kHz ( the sample rate is in digital mode 8.0 kHz and in analog mode 8.1 kHz) which indicates the rate of the PCM samples and the clock frequency is 1 MHz. COBBA is generating both clocks. Alert Signal Generation A buzzer is used for giving alerting tones and/or melodies as a signal of an incoming call. The buzzer is controlled with a BuzzerPWM output signal from the MAD. A dynamic type of buzzer must be used since the supply voltage available can not produce the required sound pressure for a piezo type buzzer. The low impedance buzzer is connected to an output transistor that gets drive current from the PWM output. The alert volume can be adjusted either by changing the pulse width causing the level to change or by changing the frequency to utilize the resonance frequency range of the buzzer. A vibra alerting device is used for giving silent signal to the user of an incoming call. The device is controlled with a VibraPWM output signal from the MAD. The vibra alert can be adjusted either by changing the pulse width or by changing the pulse frequency. The vibra device is not inside the phone, but in a special vibra battery.
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PWRU
PWRU comprises CCONT circuit and CHAPS circuit.
CCONT main features CCONT generates regulated supply voltages for baseband and RF. There are seven 2.8 V linear regulators for RF, one 2.8 V regulator for baseband, one special switched output (VR1_SW), one programmable 2V output (V2V), one 3/5 V output (VSIM), one 5V output (V5V), and one 1.5 V +/ 1.5% reference voltage for RF and COBBA. Other functions are power up/down procedures and reset logic charging control (PWM), charger detection watchdog sleep clock (32 kHz) and control 8channel ADconverter.
CHAPS main features CHAPS comprises the hardware for charging the battery and protecting the phone from overvoltage in charger connector. The main function are transient, overvoltage and reverse charger voltage protection limited startup charge current for a totally empty battery voltage limit when battery removed with SW protection protection against too high charging current
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RF Module
RF Frequency Plan
Intermediate frequencies of the RX are the same in all operation modes. LO and modulator frequencies in TDMA800 operation modes. See figure 1 for details.
2nd IF 450 kHz
IF2 Amode 450 kHz
869.01893.97 MHz
1st IF 116.19 MHz 116.64 MHz
IF2 Dmode 450 kHz
LO 1
985.201010.16 MHz
PLL 2f f
LO 3
PLL f/2
f
824.01848.97 MHz
161.19 MHz
PLL PLUSSA 3f f
VCTCXO 19.44 MHz RFC 19.44 MHz 58.32 MHz
LO 2
322.38 MHz
DC Characteristics Power Distribution Diagram
Power distribution in a 800 MHz DAMPS phone. Current consumptions in the diagrams are only suggestive.
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DAMPS OPERATION
2 mA 3 mA 2 mA
Freq. doubler VHF presc.
3 * Multiplier 19.44 MHz VCTCXO & Buffer
6 mA
RFCEN
VR1
VREF
8 mA
Bias
SPWR1
VR2
UHF VCO
8 mA
UHF presc. & PLL Phase det.
5 mA (peak)
V5V
30 mA 2 mA
VR6
COBBA_D (Analog)
Digital supply Power control Modulator Digital m. IF parts Analog m. IF parts
1 mA
TXPWR1
VR5
2 mA
RX FRONT END
19 mA
Detector
35 mA
RXPWR
VR4
1 mA 4 mA
IF1 amp. VHF VCO TQ UHF LObuffer TX mixer TX PA MMIC bias
26 mA/5.6 mA
SPWR2 (via serial bus)
VR3
3 mA
CCONT
15 mA
1 mA
Limiter
TXPWR3 TXP MODE VR7
Enable 3 mA
PLUSSA
Control block
55 mA
TX driver SDATA SCLK SENA1
VRBB
BASEBAND
VBATT
TX PA
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Power Distribution Typical Currents
800 MHz Ext. Standby [mA]
VR1 VR2 VR3 VR4 VR5 VR6 VR7 VR8 VR9 VR10 VR11 VR12 V5V Total 3.0 / 0.0 16.0 / 0.0 0.0 11.6 / 0.0 0.0 2.0 / 0.1 0.0 19.0 / 0.0 0.0 0.0 0.0 0.0 5.0 / 0.0 56.6 / 0.1
800 MHz Analog Control Channel [mA]
3.0 16.0 0.0 11.6 0.0 2.0 0.0 19.0 0.0 0.0 0.0 0.0 5.0 56.6
800 MHz Analog Traffic Channel [mA]
9.0 16.0 23.0 11.6 37.0 32.0 *** 58.0 19.0 0.0 0.0 0.0 0.0 5.0 210.6
800 MHz Digital Control Channel [mA]
3.0 / 0.0 16.0 / 0.0 0.0 32 / 0.0 0.0 2.0 / 0.1 0.0 19.0 / 0.0 0.0 0.0 0.0 0.0 5.0 / 0.0 77.0 / 0.1
800 MHz Digital Traffic Channel [mA]
9.0 16.0 13.0 12.8* 13.0 ** 32.0 *** 19.2 ' 7.6 '' 0.0 0.0 0.0 0.0 5.0 127.6
NOTES: * Mean value (ON/OFF=8/20ms), peak current 32.0 mA ** Mean value (ON/OFF=7/20ms), peak current 37.0 mA *** Cobba_D mean current consumption estimated to be 30 mA ' Mean value (ON/OFF=6.6/20ms), peak current 180.0 mA '' Mean value (ON/OFF=8/20ms), peak current 10.0 mA
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Functional Description
Receiver
DAMPS800 RX The receiver is a double conversion receiver. Most of the RX functions are integrated in two ICs, namely receiver front end and PLUSSA. Receiver front end contains a LNA and the 1st mixer. Analog and digital IF parts are integrated in the PLUSSA. The received RF signal from the antenna is fed via a duplex filter to the receiver unit. The signal is amplified by a low noise preamplifier. In digital mode the gain of the amplifier is controlled by the AGC2 control line. The nominal gain of 17 19 dB is reduced in the strong signal condition about 15 dB (in the digital mode). After the preamplifier the signal is filtered by SAW RF filter. The filter rejects spurious signals coming from the antenna and spurious emissions coming from the mixer and IF parts. AGC2 gain step is also used to improve receiver's performance against spurious responses in real field situations, when received signal level is high enough for reduced gain and there are radio signals causing on channel intermodulation results. The filtered RFsignal is down converted by an active mixer. The frequency of the first IF is 116.19 MHz. The first local signal is generated in the UHF synthesizer. The IF signal is fed to a SAW IFfilter. The filter rejects intermodulating signals and the second IF image signal. The filtered 1st IF is amplified and fed to the receiver section of the integrated RF circuit PLUSSA, which has separate IF paths for analog and digital modes of operation. In digital mode the IF1 signal is amplified by an AGC amplifier, which has gain control range of 57 dB. The gain is controlled by an analog signal via AGC1line. The amplified IF signal is down converted to the second IF in the mixer of PLUSSA. The second local signal is the 6th overtone of the 19.44 MHz VCTCXO. LO frequency multiplier is implemented in two stages. First multiplication by 3 is done within the VCTCXOmodule and the second multiplication by 2 is done in the PLUSSA. The second IF frequency is 450 kHz. The second IF is filtered by a ceramic filter. The filter rejects signals of the adjacent channels. The filtered second IF is fed back to PLUSSA, where it is amplified and fed out to COBBA_D via balanced IF2D lines. In analog mode the filtered and amplified IF1 signal is fed to a mixer. This mixer has been optimized for low current consumption. After this the mixer down converted signal is fed through the same IF2 filter as in digital mode and finally it is amplified in the limiter amplifier. The limited IF2 signal is fed via balanced IF2A lines to COBBA_D, which has a FMdetector. The limiter amplifier produces also a RSSI voltage for analog mode field strength indication.
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Transmitter
DAMPS800 TX The TX intermediate frequency is modulated in digital mode by an I/Q modulator contained in the transmitter section of PLUSSA IC. The TX I and TXQ signals are generated in the COBBA_D interface circuit and they are fed differentially to the modulator. In analog mode the FM modulation is also generated in the I/Q modulator. Intermediate frequency level at the modulator output is controlled via serial bus. Modulator output level control is used to tune out tolerances of the TX chain and expand the range of the VGA. The output level of the modulator is typically 18dBm on the highest power level (PL2). For lower power levels modulator output is reduced by 4 dB for each power level. In analog mode PLUSSA modulator has fixed output level. All power levels are defined by adjusting driver amplifier's gain. The output signal from PLUSSA modulator is filtered to reduce harmonics and RXband noise. The final TX signal is achieved by mixing the UHF VCO signal and the modulated TX intermediate signal in an active mixer. After the mixing TX signal is amplified by a driver stage. Driver amplifier has a gain control stage, which is used for power level adjustment and generating ramps. From driver stage the signal is fed trough TX filter to PA MMIC. The PA amplifies the signal TX 2730 dB. Amplified TX signal is filtered in duplex filter. Then signal is fed to the antenna switch, where the signal is coupled either to antenna or to external antenna connector. The typical maximum output level is 600 mW. The power control loop controls the gain of the driver amplifier. The power detector consists of a directional coupler and a diode rectifier. The output voltage of the detector is compared to TXC voltage in PLUSSA. The power control signal (TXC), comes from the RF interface circuit, COBBA_D. TXP signal sets driver power down to ensure offburst level requiremensts. False transmission indication is used to protect transmitter against false transmission caused by component failure. Protection circuit is in Plussa. The level for TXF is set by internal resistor values in Plussa.
Frequency Synthesizers
The stable frequency reference for the synthesizers and base band circuits is a voltage controlled temperature compensated crystal oscillator VCTCXO. Frequency of the oscillator is 19.44 MHz. It is controlled by an AFC voltage, which is generated in the base band circuits. In digital mode operation, the receiver is locked to base station frequency by AFC. Next to detector diode, there is a sensor for temperature measurement. Voltage RFTEMP from this sensor is fed to baseband for A/D conversion. Original 11/99
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This information of RF PAblock temperature is used as input for compensation algorithms. The ON/OFF switching of the VCTCXO is controlled by the sleep clock in the baseband via RFCEN. Other parts of the synthesizer section are 1 GHz VCO, 2 GHz VCO, VHF VCO, PLL for 2 GHz VCO and PLL sections of the Plussa IC. DAMPS800 operation 1GHz UHF synthesizer generates the down conversion injection for the receiver and the up conversion injection for the transmitter. UHF frequency is 985.20 ... 1010.16 MHz, depending on the channel which is used. 1GHz UHF VCO is a module. The PLL circuit is dual PLL, common for both UHF and VHF synthesizers. These PLLs are included in the PLUSSA IC. LO signal for the 2nd RX mixer is multiplied from the VCTCXO frequency as described above. VHF synthesizer is running only on digital or analog traffic channel. 322.38 MHz signal (divided by 2 in Plussa) is used as a LO signal in the I/Q modulator of the transmitter chain. Supply voltages in different modes of operation
800 MHz Ext. Stadby
VR1 VR2 VR3 VR4 VR5 VR6 VR7 VR8 VR9 VR10 VR11 VR12 VSIM NOTE: ON/OFF ON/OFF OFF ON/OFF OFF ON OFF ON/OFF OFF OFF OFF OFF ON/OFF
800 800 800 800 MHz MHz MHz MHz Analog Analog Digital Digital Control Traffic Control Traffic Channel Channel Channel Channel
ON ON OFF ON OFF ON/OFF OFF ON OFF OFF OFF OFF ON ON ON ON ON ON ON ON ON OFF OFF OFF OFF ON ON/OFF ON/OFF OFF ON/OFF OFF ON/OFF OFF ON/OFF OFF OFF OFF ON/OFF ON ON ON ON/OFF ON/OFF ON ON/OFF ON/OFF OFF OFF OFF ON
ON/OFF* ON/OFF*
* ON during interband MAHO
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Software Compensations
Power Levels (TXC) vs. Temperature Because of wide temperature range and poor cooling of the RF block, it is neccessary to compensate the effect of temperature on the output power. To monitor this environment change, temperature measurement is done by using NTC resistor. Factor table is used for temperature compensation,. The table contains common values for all power levels and operating modes. Table values are defined without factory measurements. Temperature is measured and right compensation value is added to TXCvalue. Requirement for compensation update is for every 1 minutes or after every 5 degrees C of temperature change. This means, that during analog mode transmission there will be a need for temperature reading and TXC compensation update. Because of poor cooling of RF block and insufficient linearity in high temperatures, output power is reduced from level 2 to level 2.5 when temperature inside the phone is above +55 C in analog mode and above +60 C in digital mode. Power Levels (TXC) vs. Channel Duplexer frequency response ripple is compensated by software. Power levels are calibrated on four channels in production. Values for channels between these tuned channels are calculated by using linear interpolation. Power levels vs. Battery Voltage For saving battery capacity and because of insufficient linearity in digital mode, output power is decreased from level 2 to level 2.5, when battery voltage drops below 3.3V. (tbd.). The power reduction is done linearly as a function of battery voltage. Vcc 3.3V ... 3.1V > PL2 ... PL2.5. TX Power Up/Down Ramps Transmitter output power up/down ramps are controlled by SW. A special ramp tables are used for that. Requirement is for nine different ramps in digital mode for both operating bands and one ramp for analog mode. Separate ramps are used in power up and power down ramps. Modulator Output Level For optimum linerity and efficiency the output level of the modulator is adjusted in the production. AGC amplifier is used as 2 dB step attenuator to define power levels. The 0 dB level is the production tuned reference level. Digital Mode RSSI Digital mode RSSI vs. input signal is calibrated in production, but RSSI vs. temperature and RSSI vs. channel are compensated by software. Original 11/99
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RF Block Specifications
Receiver DAMPS 800 Mhz Front End
Parameter Gain, LNA gain enabled (gain variations vs temp. included) Gain, LNA gain disabled Gain step Gain variation vs temp 30...+85 amplifier enabled, ref. to nominal gain Noise figure, LNA enabled 2.5
dC,
Minimum 19
Typical / Nominal 21 4
Maximum 24
Unit / Notes dB dB dB
14
17 1.5 3.0
dB dB
First IF Amplifier
Parameter Operation frequency Supply voltage Current consumption Insertion gain Noise figure IIP3 Input impedance Output impedance 20 TBD TBD 10 2.7 Minimum Typical / Nominal 116.19 2.8 1.0 2.9 1.5 14 3 Maximum MHz V mA dB dB dBm matched to the IF filter matched to PLUSSA Unit / Notes
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Transmitter
RF Characteristics
Item TX frequency range Type Intermediate frequency Nominal power on highest power level Power control range Maximum rms error vector DAMPS 824.01...848.97 MHz Upconversion 161.19 MHz 0.6 W ( 27.8 dBm) 30+38 dB 12.5 %
Power Levels ( see tuning instructions, Section: Tuning instructions p 17 &18). Synthesizers
UHF
Parameter UHF 800MHz UHF 800MHz analog mode digital mode rx/tx injecrx/tx slot tion 985.20 ... 1010.16 30 31 70 20 115 150 985.20 ... 1010.16 30 38 57 20 101 121 4 Unit / Notes
Frequency range Reference frequency Reference peaks @ 30 kHz @ 60 kHz 2 x fo level Phase noise, fo 60 kHz fo 120 kHz Phase error Residual FM Filters: 300 Hz HP 3 kHz LP Frequency settling time within 3 kHz within 30 Hz Start up settling time
MHz kHz dBc, max dBc dBc/Hz, max
d rms,
max
Hz, max
20 30
1.4 2.0 3
ms, max ms, max
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VHF
Parameter VHF, 800MHz VHF, 800MHz analog mode digital mode tx injection rx/tx slot 322.38 30 31 66 30 105 2 322.38 30 41 60 30 105 2 Unit / Notes MHz kHz dBc, max dBc dBc/Hz, max
d rms,
Frequency range Reference frequency Reference peaks @ 30 kHz @ 60 kHz 2 x fo level Phase noise, fo 60 kHz fo 120 kHz Phase error Frequency settling time within 3 kHz within 30 Hz Start up settling time
max
ms, max 20 20 20 20 ms, max
Output Levels
Parameter 2G UHF synthesizer to Lo buffer level resistive load parallel capacitance 1G UHF synthesizer to TX mixer level impedance VHF synthesizer to PLUSSA level resistive load parallel capacitance VCTCXO 19.44 MHz to BB level resistive load parallel capacitance VCTCXO 19.44 MHz to PLUSSA level resistive load parallel capacitance VCTCXO 58.32 MHz to PLUSSA 3 * fo level fo and 2xfo level harmonic supression resistive load parallel capacitance 100 1k tbd 1000 10k 10 100 tbd tbd 50 25 25 5k tbd 100 Minimum Typical / Nominal Maximum Unit / Notes dBm W pF dBm W mVpp W pF mVpp W pF mVpp W pF mVpp dBc dBc W pF
10 tbd tbd 5 tbd
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Connections
RFBaseband signals
Signal name VBAT From/ Control battery To RF 2V8 regul., PA Plussa Parameter Voltage Voltage during TX Current Voltage Current VR1 CCONT / RFCEN Plussa, Voltage VCTCXO, Current, tdma 800 2GHz PLL Current, tdma1900 Plussa, UHF VCO1 VHF VCO, LObuff, TX mixer Voltage Current, tdma800 Current, tdma1900 VR3 CCONT / SPWR2 (via serial bus) CCONT / RXPWR1 CCONT / TXPWR1 CCONT Voltage Current, tdma800 Current, tdma1900 2.7 20 4 2.7 10 30 2.7 33 2.7 2.7 3.0 3.0 2.7 14 2.8 7 17 2.8 16 off 2.8 24 9 2.8 12 32 2.8 37 2.8 2.0 2.7 2.8 55 2.7 2.8 3 4.8 5.0 3.0 0 5.2 5.0 1.5 2.85 30 12 2.85 15 34 2.85 41 2.85 3.0 2.85 60 2.85 1.478 1.50 Min 3.1 3.0 Typ 3.6 3.6 Max 5.3 5.0 1200 1.523 10 2.85 9 19 2.85 20 Unit V V mA V uA V mA mA V mA mA V mA mA V mA mA V mA V mA V mA V mA V mA V Supply for Plussa modulator, TX pwr control Plussa & disc PLL: digital supply, Cobba_D: analog supply TX PA and driver supply TX PA bias 800 band Plussa and discrete synthesizer phase det RF temperature sensor (47 k NTC to GND) Supply for Plussa IF parts, IF1amp. Supply for VHF VCO, LO buffer, tdma800 TX mixer and TXF Supply voltage for tdma 800 UHF VCO and prescaler Function Supply voltage for discrete 2V8 regulators in dual band phone and PA PLUSSA reference voltage Supply for VCTCXO & multiplier, Plussa VHF prescaler and bias and 2 GHz PLL
VREF
CCONT
VR2
CCONT / SPWR1
VR4
Plussa, Voltage VCTCXO Current, anal.RX IF1amp Current, digi.RX Plussa, TX pwr control Voltage Current, TXmode
VR5
VR6
Voltage Plussa disc.PLL Cobba_D Current (RF block) TX PA Voltage Current, tdma800 TX PA Voltage Current, tdma800 PLUSSA Voltage Current CCONT Voltage
VR7
CCONT TXP1 CCONT TXP1 & MODE CCONT / RFCEN RF
VR7_bias
V5V
RFTEMP
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Signal name AFC
From/ Control Cobba_D
To
Parameter
Min 0.05
Typ 1.2 11 10 110
Max 2.25
Unit V bits kW kW
Function Automatic frequency control signal for VCTCXO. When DAC is switched OFF AFC output is in highZ mode
VCTCXO Voltage Min Resolution Load resistance (dynamic) Load resistance (DC)
AGC1
Cobba_D
PLUSSA
Voltage Min Load resistance Load capacitance Resolution Timing inaccuracy
0.5 10
1.40
V kW
Digital mode receiver gain control.
10 10 8 2.0 0.7 20 10 8 2.1 0 0.4 1.0 10 1 2.1 0 0.4 2.0 tbd
pF bits us V V uA pF us V V mA pF ms V V mA pF ms DSP Differential IF2signal from limiter to DEMO detector in Cobba_D DSP, MCU Digital 800 operation Analog 800 operation DSP TDMA1900 operation TDMA800 operation DSP LNA gain switch. Polarity: 0=reduced 1=normal
AGC2
MAD (CTID AGC2, genpio)
RX LNA
Logic high "1" Logic low "0" Sink/source curr. Load capacitance Timing inaccuracy
BAND 1)
Cobba_D
VHF VCO
Logic high "1" Logic low "0" Sink/source curr. Load capacitance Timing inaccuracy
MODE
MAD
Analog/ digital mode PA bias control
Logic high "1" Logic low "0" Sink/source curr. Load capacitance Timing inaccuracy
IF2AP/ IF2AN
PLUSSA
Cobba_D IF2 frequency Output level, Load resistance Load capacitance 10
450 0.6
kHz Vpp W kW 5 pF kHz 1400 600
mVpp
IF2DP/ IF2DN
PLUSSA
Cobba_D IF2 frequency Output level Source imp.
450 170
Differential IF2signal to RX A/Dconverter, PGA = 0 dB
W
Original 11/99
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NSC1 System Module US4RSM
PAMS Technical Documentation
Signal name RFC
From/ Control VCTCXO
To
Parameter
Min
Typ 19.44
Max
Unit
Function
Cobba_D Frequency Signal amplitude Load resistance Load capacitance 0.2 10
1.0
MHz High stability clock signal for the locig Vpp circuits kW pF V Supply voltage VR1 ON, RFC enable Supply voltage VR1 OFF, RFC disable
5 2.0 0.5 100 50 0.1 1 50 0.1 2.0 0.5 100 30 2.0 0.5 100 30 2.0 0.5 100 30 2 0.8 50 20 1.62 1.5
RFCEN
MAD (CTID, RFCEN)
CCONT, Logic high "1" Cobba_D Logic low "0" Current timing inaccuracy
V uA us V MW pF V V V uA us V V uA us V V uA us V V kW pF MHz
MCU, DSP Analog mode field strength indicator voltage Digital mode Supply voltage VR4 ON Supply voltage VR4 OFF
RSSI
PLUSSA
CCONT
Voltage Load resistance Load capacitance Voltage
RXPWR1
MAD (CTID, LNASEL)
CCONT
Logic high "1" Logic low "0" Current timing inaccuracy
DSP Supply voltage VR8 ON Supply voltage VR8 OFF
RXPWR2 1)
MAD (CTID, DSP FTC) MUX
RF block 2V8 regulator
Logic high "1" Logic low "0" Current timing inaccuracy
DSP Supply voltage VR9 ON Supply voltage VR9 OFF
RXPWR3 1)
MAD (CTID, DSP FTC) MUX
RF block 2V8 regulator
Logic high "1" Logic low "0" Current timing inaccuracy
DSP Synthesizer and control clock
SCLK
MAD (SCU, SCLK)
PLUSSA, Logic high "1" UHF Logic low "0" PLL tdma1900 Load resistance Load capacitance Data rate freq.
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PAMS Technical Documentation
NSC1 System Module US4RSM
Signal name SDATA
From/ Control MAD (SCU, SDATA)
To
Parameter
Min 2.0
Typ
Max
Unit V
Function Synthesizer and control data
PLUSSA, Logic high "1" UHF Logic low "0" PLL tdma1900 Load resistance Load capacitance Timing accuracy
0.8 50 20 20 2.0 0.8 50 20 2.0 0.8 50 20 2.0 0.5 100 200
V kW pF us V V kW pF V V kW pF V V uA us
SENA1
MAD (SCU, SENA1)
PLUSSA
Logic high "1" Logic low "0" Load resistance Load capacitance
Synthesizer and Plussa control enable
SENA2 1)
MAD (SCU, SENA2)
Logic high "1" UHF PLL Logic low "0" tdma1900 Load resistance Load capacitance
TDMA1900 UHF synthesizer enable
SPWR1
Cobba_D
CCONT
Logic high "1" Logic low "0" Current timing inaccuracy
Supply voltage VR2 ON Supply voltage VR2 OFF
DSP Supply voltage VR3 ON Supply voltage VR3 OFF
SPWR2
Cobba_D
CCONT
Control sent via CCONT serial bus "1" Control sent via CCONT serial bus "0" Current timing inaccuracy 100 200 2.0 0.5 100 200 2.5 0.2 uA us V V uA us V V
DSP Supply voltage VR10 ON Supply voltage VR10 OFF DSP Power control loop mode during tx burst Power control loop mode during ramp up/down
SPWR3 1)
Cobba_D
RF 2v8 regul.
Logic high "1" Logic low "0" Current timing inaccuracy
TXA
MAD (MFI, TXA)
PLUSSA
Logic high "1" Logic low "0"
Load resistance Load capacitance Timing inaccuracy
10 20 10
kW pF us DSP
Original 11/99
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NSC1 System Module US4RSM
PAMS Technical Documentation
Signal name TXC
From/ Control Cobba_D
To PLUSSA
Parameter Voltage Min value Max value Load resistance Load capacitance Number of bits
Min 0.12 2.27 10
Typ 0.15 2.30
Max 0.18 2.33 10
Unit V kW pF
Function Makes transmitter power ramps and sets transmitter power level
10 2.5 0 3.0 0.5 10 1.18 0.8 200 1.18 0.8 200 2.1 0 0.6 8.0 10 8 2.1 0 0.6 8.0 10 8 2.0 0.5 100 10 10 V V pF Vpp V kW Vpp V kW V V mA pF us V V mA pF us V V uA pF us DSP Low power level mode for power detector High power level mode for power detector Timing tied to TXPWR1 DSP Low power level mode for power detector High power level mode for power detector Timing tied to TXPWR1 DSP Supply voltage VR7 ON Supply voltage VR7 OFF Differential quadrature phase TX baseband signal for the RF modulator. False transmission indicator, function controlled via Plussa register Differential inphase TX baseband signal for the RF modulator.
TXF
PLUSSA
MAD
Logic high "1" Logic low "0" Load capacitance
TXIP/ TXIN
Cobba_D
PLUSSA
Differential voltage swing Common mode v. (digital mode) Load resistance (differential)
TXQP/ TXQN
Cobba_D
PLUSSA
Differential voltage swing Common mode v. (digital mode) Load resistance (differential)
TXLX1
MAD (CTID, TXLX)
RF tdma800
Logic high "1" Logic low "0" Sink/source curr. Load capacitance Timing inaccuracy
TXLX2 1)
MAD (TXLX2, DSPGenPio(6)) 2)
Logic high "1" RF tdma1900 Logic low "0" Sink/source curr. Load capacitance Timing inaccuracy
TXP1
MAD (MFI, TXP) 3)
CCONT,
Logic high "1"
TX driver, Logic low "0" TX PA, in tdma800 Current mode Load capacitance Timing inaccuracy
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Original 11/99
PAMS Technical Documentation
NSC1 System Module US4RSM
Signal name TXP2 1)
From/ Control MAD (MFI, TXP) 3)
To Penta reg,
Parameter Logic high "1"
Min 2.0
Typ
Max
Unit V
Function Supply voltage VR11 ON Supply voltage VR11 OFF
TX driver, Logic low "0" TX PA, in Current tdma1900 Load capacitance mode Timing inaccuracy
0.5 100 10 10 2.0
V uA pF us V
DSP Supply voltage VR5 ON, TX power control enable. 800 txmixer enable Supply voltage VR5 OFF, TX power control disable 800 txmixer disable
TXPWR1
MAD (CTID, TXPWR1 )
CCONT
Logic high "1"
Logic low "0"
0.5
V
Current Timing inaccuracy TXPWR2 1) MAD (CTID, BENA) RF 2v8 regul. Logic high "1" Logic low "0" Current Timing inaccuracy TXPWR3 MAD (CTID, BENA) RF 800 MHz upcon. Logic high "1" Logic low "0" Current Timing inaccuracy 2.0 2.0
50 8
uA us V DSP Supply voltage VR12 ON Supply voltage VR12 OFF
0.5 50 1
V uA us V
DSP Upconv enabled Upconv disabled
0.5 50 1
V uA us
DSP
1) Signal in use only in dual band engine 2) Valid from MAD80 3) Multiplexed with band signal at BB
Original 11/99
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NSC1 System Module US4RSM
PAMS Technical Documentation
Data Interface and Timing
PLUSSA is programmed via a 3 wire serial bus. Control wires in the RF/ BB interface are named SENA1, SDATA and SCLK. SDAT: Serial data input The PLUSSA programming data is applied to that pin. The data is qualified by SCLK clock. SCLK: Serial clock input Qualifies the data applied to SDAT pin. Rising edge of the SCLK signal shifts the data to the PLUSSA's internal shift register. The falling edge after the third rising edge qualifies the internal addressing SLE: Serial latch enable (active low) By forcing SLE line down the serial interface of the PLUSSA is activated. During the active state PLUSSA interface accepts the clocking and the data applied to the SCLK and SDAT pins. While SLE is high the interface is completely inactive, so multiple devices can share the same SCLK and SDAT lines.
SLE SDAT SCLK
t slc t sdc
t cl t ch
t hcl t lh
Serial data input timing Timing ratings.
abbr tslc tsdc tch tcl thcl tlh Definition SLE to SCLK setup time SDAT to SCLK setup time SCLK high period SCLK low period SCLK to SLE hold time SLE high period Min [ns] 40 20 50 50 20 4000 Max [ns]
Page 3 40
Original 11/99
PAMS Technical Documentation
NSC1 System Module US4RSM
Digital control channels
RX
RX
NL or MACA
5 ms 5 ms
N x 20 ms
SPWR1
546 us min 22 ms
SPWR2 SPWR3
546 us
RXPWR1
200 us
RXPWR2
100 us
AGC1
AGC2
2 ms
TXPWR1 TXLX
TXP1 TXA TXC
AFC
RFCEN
VHF synth init & load
SDATA, SCLK
NL or MACA ch loads 0 ... 24 pcs 1GHz UHF synth.
ch load 1GHz UHF synth.
TXAGC
TDMA800 digital control channel timing diagram
Original 11/99
ÍÍ ÍÍ
Page 3 41
TX
ÇÇ ÇÇ
ÄÄÄ ÄÄÄ
ÇÇ ÇÇ
NSC1 System Module US4RSM
PAMS Technical Documentation
Analog control channel
92.6 ms 46.3 ms
A4
B4 A5 B5 D S A1 B1
A2..B4 A5 B5 D S A1 B1
A2..B4 A5
B5 D S A1 B1
VRBB AGC2
"1"
1.5 ms
RXPWR1 RXPWR2
3.0 ms
AFC
3.0 ms
SPWR1
6 ms
RFCEN
Extended stand by mode timings
Page 3 42
Original 11/99
PAMS Technical Documentation
NSC1 System Module US4RSM
Parts list of US4RSM (EDMS Issue 4.0)
ITEM R150 R152 R153 R154 R156 R159 R161 R163 R164 R165 R166 R168 R169 R200 R201 R202 R203 R204 R205 R206 R207 R208 R209 R210 R211 R212 R213 R214 R215 R216 R218 R256 R257 R258 R259 R260 R261 R264 R265 R266 R267 R268 R270 CODE 1620019 1620025 1422881 1430826 1430853 1430764 1620025 1