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PAMS Technical Documentation NHM7 Series Transceivers
System Module & UI
Issue 2 03/2002
E Nokia Corporation
NHM7 System Module & UI
PAMS Technical Documentation
CONTENTS
Transceiver NHM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Regulators and Supply Voltage Ranges . . . . . . . . . . . . . External and Internal Signals and Connections . . . . . . . . . Internal Signals and Connections . . . . . . . . . . . . . . . . . . . . . FM Radio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal microphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC and DC Characteristics of RFBB voltage supplies AC and DC Characteristics of RFBB digital signals . . AC and DC Characteristics of RFBB analogue signals External Signals and Connections . . . . . . . . . . . . . . . . . . . . UI (boardtoboard) connector . . . . . . . . . . . . . . . . . . . . LCD connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Headset connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SIM connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up and Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A/D Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FM Radio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IR Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Backup Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SIM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buzzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Microphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UPP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 6 7 7 8 8 8 9 10 10 11 11 11 12 12 13 14 15 16 16 17 18 18 19 20 20 21 22 22 23 24 25 25 25 26 26 27 27 29 29 30 30 31
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NHM7 System Module & UI 32 32 32 33 34 35 36 36 37 38 38 39
RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter characteristics . . . . . . . . . . . . . . . . . . . . . . . . Receiver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . RF Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AFC function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DCcompensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UI Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LCD & Keypad Illumination . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Schematic Diagrams (at the back of the binder): LA5 layout 15 and LK5 layout 11 (covers layout version 10) RF & BB (Version 0.0 Edit 61) for layout version 15 . . . . . . . . RF (Version 1.0 Edit 167) for layout version 15 . . . . . . . . . . . . BB Connections (Version 0.0 Edit 96) for layout version 15 . . System Connector (Version 1.3 Edit 156) for layout version 15 Audio Interface (Version 1.3 Edit 15) for layout version 15 . . . UEM of BB (Version 2.0 Edit 164) for layout version 15 . . . . . . Light Filtering (Version 2.0 Edit 34) for layout version 15 . . . . Infrared Module (Version 2.0 Edit 37) for layout version 15 . . FM Radio (Version 1.3 Edit 104) for layout version 15 . . . . . . SIM Reader (Version 4.0.1 Edit 49) for layout version 15 . . . . AMD (Version 2.0 Edit 31) for layout version 15 . . . . . . . . . . . . Layout Diagram of LA5 Top (Version 15) . . . . . . . . . . . . . . . . . Layout Diagram of LA5 Bottom (Version 15) . . . . . . . . . . . . . . Testpoints of LA5 Top (Version 15) . . . . . . . . . . . . . . . . . . . . . . Testpoints of LA5 Bottom (Version 15) . . . . . . . . . . . . . . . . . . . UI Board LK5 for version 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Layout Diagram LK5 for version 11 . . . . . . . . . . . . . . . . . . . . . . A1 A2 A3 A4 A5 A6 A7 A9 A10 A11 A13 A14 A14 A15 A15 A16 A17
Display and Keyboard Interface (Version 1.3 Edit 201) for layout version 15 A8
UPP and decoupling capacitors (Version 2.0 Edit 89) for layout version 15A12
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Schematic Diagrams (at the back of the binder): LA5 layout 17 and LK5 layout 11 (covers layout version 10)
RF & BB (Version 0.0 Edit 65) for layout version 17 . . . . . . . . RF (Version 1.0 Edit 180) for layout version 17 . . . . . . . . . . . . BB Connections (Version 0.0 Edit 113) for layout version 17 . System Connector (Version 1.3 Edit 162) for layout version 17 Audio Interface (Version 1.3 Edit 80) for layout version 17 . . . UEM of BB (Version 2.0 Edit 168) for layout version 17 . . . . . . Light Filtering (Version 2.0 Edit 34) for layout version 17 . . . .
B1 B2 B3 B4 B5 B6 B7
Display and Keyboard Interface (Version 1.3 Edit 210) for layout version 17 B8 Infrared Module (Version 2.0 Edit 38) for layout version 17 . . FM Radio (Version 1.3 Edit 110) for layout version 17 . . . . . . . SIM Reader (Version 1.3 Edit 48) for layout version 17 . . . . . . B9 B10 B11
UPP and decoupling capacitors (Version 2.0 Edit 91) for layout version 17B12 GSM RF BB Interface (Version 1.3 Edit 35) for layout version 17 Flash Memory (Version 2.0 Edit 32) for layout version 17 . . . . Layout Diagram of LA5 Top (Version 17) . . . . . . . . . . . . . . . . . Layout Diagram of LA5 Bottom (Version 17) . . . . . . . . . . . . . . Testpoints of LA5 Top (Version xx) . . . . . . . . . . . . . . . . . . . . . . . Testpoints of LA5 Bottom (Version 17) . . . . . . . . . . . . . . . . . . . UI Board LK5 for version 11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Layout Diagram LK5 for version 11 . . . . . . . . . . . . . . . . . . . . . . B13 B14 B15 B15 B16 B16 B17 B18
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Abbreviations
A/D ADC AFC AGC ASIC AVG BB BGA CMT CSP D/A DAC DCE EAD EMC EMI ESD FBUS FFS HAGAR HF HSCSD HW IC INL IO IR IrDA LCD MAD MBUS MCU MFI MMU MPU NTC PCI PCM PLL PPM PWB PWM R&D RAM RF RFI ROM AnalogtoDigital AnalogtoDigital Converter Automatic Frequency Control Automatic Gain Control Application Specific Integrated Circuit Average Baseband Ball Grid Array package Cellular Mobile Transceiver Chip Scale Package DigitaltoAnalog DigitaltoAnalog Converter Data Communication Equipment External Accessory Detect Electromagnetic Compatibility Electromagnetic Interference Electrostatic Discharge Full Duplex Serial Bus in NOKIA's phones Flash File System Direct conversion RF ASIC Hands Free High Speed Circuits Switched Data Hardware Integrated Circuit Integral nonlinearity Input/Output Infrared Infrared Data Association Liquid Crystal Display MCU+ASIC+DSP chip (MCUASICDSP) 1wire half duplex serial bus in NOKIA's phones Micro Controller Unit Modulator and filter interface in MAD2 Memory Management Unit Micro Processor Unit Negative Temperature Coefficient (resistor) Phone Control Interface Pulse Code Modulation Phase Locked Loop Post Programmable Memory Printed Wiring Board Pulse Width Modulation Research and development Random Access Memory Radio Frequency RF Interface Read Only Memory
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PAMS Technical Documentation RTC SCU SDRAM SIM SW TI TVS UART UEM UPP USART UI VCTCXO VCXO
NHM7 System Module & UI
Real Time Clock Synthesizer Control Unit Synchronous Dynamic RAM Subscriber Identify Module Software Texas Instruments Transient Voltage Suppressor Universal Asynchronous Receiver Transmitter Universal Energy Management Universal Phone Processor Universal Synchronous/Asynchronous Receiver Transmitter User Interface Voltage Controlled Temperature Compensated Oscillator Voltage Controlled Oscillator
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Transceiver NHM7
Introduction
The NHM7 is a dual band radio transceiver unit for the EGSM900 and GSM1800 networks. GSM power class is 4 and GSM1800 power class is 1. It is a true 3 V transceiver, with an internal antenna and vibra. The NHM7 phone includes integrated FM radio. Radio is used as a normal mono receiver. FM radio is highly integrated. Only few external components are needed. Headset is used as an antenna for radio. The transceiver has a full graphic display and the user interface is based on a Jack style UI with two soft keys. An internal antenna is used, there is no connection to an external antenna. The transceiver has a low leakage tolerant earpiece and an omnidirectional microphone, providing an excellent audio quality. The transceiver supports a full rate, an enhanced full rate and a half rate speech decoding. An integrated IR link provides a connection between two NHM7 transceivers or a transceiver and a PC (internal data), or a transceiver and a printer. The small SIM ( Subscriber Identity Module ) card is located under the battery. SIM interface supports both 1.8V and 3V SIM cards.
Electrical Modules
The radio module consists of Radio Frequency (RF) and baseband (BB). User Interface (UI) contains display, keyboard, IR link, vibra, HF/HS connector and audio parts. UI is divided into radio PWB LA5 and UI PWB LK5. FM radio is located on the main PWB. The electrical part of the keyboard is located in separate UI PWB named LK5. LK5 is connected to radio PWB through spring connectors. The System blocks provide the MCU, DSP, external memory interface and digital control functions in UPP ASIC (Universal Phone Processor). Power supply circuitry, charging, audio processing and RF control hardware are in UEM ASIC (Universal Energy Management). The purpose of the RF block is to receive and demodulate the radio frequency signal from the base station and to transmit a modulated RF signal to the base station.
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Operation Modes
The transceiver has six different operation modes: power off mode active mode local mode idle mode charge mode test mode
In the power off mode circuits are powered down and only sleep clock is running. In the idle mode only the circuits needed for power up are supplied. In the active mode all the circuits are supplied with power although some parts might be in the idle state part of the time. The charge mode is effective in parallel with all previous modes. The charge mode itself consists of two different states, i.e. the fast charge and the maintenance mode. The local and test modes are used for alignment and testing.
Interconnection Diagram
Keyboard module
Display
SIM Radio Module Antenna LA5
Battery
Charger
MIC
IR Link
Earpiece
HF + FM antenna
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System Module LA5
Baseband Module
The baseband architecture supports a power saving function called "sleep mode". This sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and baseband. During the sleep mode the system runs from a 32 kHz crystal. The phone is waken up by a timer running from this 32 kHz clock supply. The sleep time is determined by network parameters. Sleep mode is entered when both the MCU and the DSP are in standby mode and the normal VCTCXO clock is switched off. NHM7 supports both three and two wire type of Nokia chargers. Three wire chargers are treated like two wire ones. There is not separate PWM output for controlling charger but it is connected to GND inside the bottom connector. Charging is controlled by UEM ASIC (Universal Energy Management) and EM SW running in the UPP (Universal Phone Processor). BLB2 Liion battery is used as main power source for the phone.
Block Diagram
TX/RX SIGNALS RF SUPPLIES PA SUPPLY 13MHz SYSTEM CLOCK CLK
PWR
IR
SIM UEM
Digital Control FM radio
UPP UI BB SUPPLIES
32kHz CLK SLEEP CLOCK
RAM
VBAT
BATTERY FLASH MEMORY
BASEBAND
EXT. AUDIO
HSconnector
Charger connector
UPP ASIC (Universal Phone Processor) provides the MCU, DSP, external memory interface and digital control functions. UEM ASIC (Universal Energy Management) contains power supply circuitry, charging, audio processing and RF control hardware.
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Technical Summary
Baseband is running from power rails 2.8V analog voltage and 1.8V I/O voltage. UPP core voltage Vcore can be lowered down to 1.0V, 1.3V and 1.5V. UEM includes 6 linear LDO (low dropout) regulators for baseband and 7 regulators for RF. It also includes 4 current sources for biasing purposes and internal usage. UEM also includes SIM interface which has supports both 1.8V and 3V SIM cards. Note: 5V SIM cards are no longer supported by NHM7 baseband. A real time clock function is integrated into the UEM which utilizes the same 32kHz clock supply as the sleep clock. A backup power supply is provided for the RTC which keeps the real time clock running when the main battery is removed. The backup power supply is a rechargeable surface mounted capacitor. The backup time with the capacitor is 30 minutes minimum. The analog interface between the baseband and the RF section is handled by a UEM ASIC. UEM provides A/D and D/A conversion of the in phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the user interface. The UEM supplies the analog TXC and AFC signals to RF section according to the UPP DSP digital control. Data transmission between the UEM and the UPP is implemented using two serial busses, DBUS for DSP and CBUS for MCU. RF ASIC, Hagar, is controlled through UPP RFBUS serial interface. There is also separate signals for PDM coded audio. Digital speech processing is handled by the DSP inside UPP ASIC. UEM is a dual voltage circuit, the digital parts are running from the baseband supply 1.8V and the analog parts are running from the analog supply 2.78V also VBAT is directly used by some blocks. The baseband supports both internal and external microphone inputs and speaker outputs. UEM also includes third microphone input which is used in NHM7 for FM radio. Input and output signal source selection and gain control is done by the UEM according to control messages from the UPP. Keypad tones, DTMF, and other audio tones are generated and encoded by the UPP and transmitted to the UEM for decoding. A buzzer and external vibra alert control signals are generated by the UEM with separate PWM outputs. NHM7 has two external serial control interfaces: FBUS and MBUS. These busses can be accessed only through production test pattern. EMC shielding for baseband is implemented using a metallized plastic frame and UI PWB ground plane. On the other side the engine is shielded with PWB grounding. Heat generated by the circuitry will be conducted out via the PWB ground planes. NHM7 radio module is implemented to 8 layer PWB. UI module is divided between main PWB LA5 and separate UI PWB LK5.
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DC Characteristics
Regulators and Supply Voltage Ranges Battery Voltage Range
Signal VBAT 3.1V Min 3.6V Nom Max Note
4.2V (charging 3.1V SW cut off high limit voltage)
BB Regulators
Signal VANA VFLASH1 VFLASH2 VSIM VIO VCORE 2.70V 2.70V 2.70V 1.745V 2.91V 1.72V 1.0V 1.235V 1.425V 1.710V Min 2.78V 2.78V 2.78V 1.8V 3.0V 1.8V 1.053V 1.3V 1.5V 1.8V Nom 2.86V 2.86V 2.86V 1.855V 3.09V 1.88V 1.106V 1.365V 1.575V 1.890V Max Note Imax = 80mA Imax = 70mA ISleep = 1.5mA Imax = 40mA Imax = 25mA ISleep = 0.5mA Imax = 150mA ISleep = 0.5mA Imax = 200mA ISleep = 0.2mA Default value = 1.5V
RF Regulators
Signal VR1A VR2 VR3 VR4 VR5 VR6 VR7 4.6V 2.70V 3.20V 2.70V 2.70V 2.70V 2.70V 2.70V Min 4.75V 2.78V 3.3V 2.78V 2.78V 2.78V 2.78V 2.78V Nom 4.9V 2.86V 3.40V 2.86V 2.86V 2.86V 2.86V 2.86V Max Note Imax = 10mA Imax = 100mA Imax = 20mA Imax = 50mA ISleep = 0.1mA Imax = 50mA ISleep = 0.1mA Imax = 50mA ISleep = 0.1mA Imax = 45mA
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External and Internal Signals and Connections
This section describes the external and internal electrical connection and interface levels on the baseband. The electrical interface specifications are collected into tables that covers a connector or a defined interface.
Internal Signals and Connections
FM Radio Interface
BB Signal VFLASH2 FM Radio Signal Vcc1 Vcc2 VDD GenIO(3) FMClk Min 2.7V 2.7V 2.7V 1.4V 0 Nom 2.78V 2.78V 2.78V 1.8V Max 2.86V 2.86V 2.86V 1.88V 0.4V High Low Frequency Stability 2 µs GenIO(8) FMWrEn 1.4V 0V 20µs 1.8V 1.88V 0.4V trise High Low twd rise / fall time Condition Note max. Icc1 19mA max. Icc2 800uA max. IDD 3mA Reference clock for FM radio module In GSM
75581 kHz 30ppm
FMWrEn high before rising edge of FMCtrlClk (write operation)
max. 300kHz rise / fall time
GenIO(11)
FMCtrlClk
1.4V 0 50 ms
1.8V
1.88V 0.4V 1 µs
High Low tr / tf tstart
FMCtrlClk delay after switching on the VFLASH2 (oscillator running)
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BB Signal GenIO(12) FM Radio Signal FMCtrlDa Min 1.4V 0 Nom 1.8V
PAMS Technical Documentation
Max 1.88V 0.4V 14us Condition High Low tda Note Bidirectional shift register available after "search ready" data available after FMCtrlClk rising edge (read operation)
10 µs
tshift
1.5 µs
thold
FMCtrlDa stabile after FMCtrlClk rising edge (write operation)
from FM module to UPP (FMCtrlClk = '1')
GenIO(27)
FMTuneX
1.4V 0
1.8V
1.88V 0.4V
High Low
MIC3P
FMAudio
228mVpp 50dB
326mVpp
460mVpp S/N 2% Harmonic distortion
Internal microphone
Signal MICP 2.0 V MICN 2.0V 2.1 V 2.1V Min Nom Max 200mVpp 2.25 V 2.25V Condition AC DC DC Note 2.2k to MIC1B
Internal speaker
Signal EARP 0.75V EARN 0.75V 0.8V 0.8V Min Nom Max 2.0 Vpp 0.85V 2.0 Vpp 0.85V Condition AC DC AC DC (Vdiff = 4.0 Vpp) Differential output out ut Note
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PAMS Technical Documentation AC and DC Characteristics of RFBB voltage supplies
NHM7 System Module & UI
Signal name VBAT
From Battery
To PA & UEM
Parameter Voltage Current Current drawn by PA when "off"
Min 2.95
Typ 3.6
Max 4.2 V
Unit
Function Battery supply. Cutoff level of DCT4 regulators is 3.04V. Losses in pcb tracks and ferrites are taken account to minimum battery voltage level. Supply for varactor for f UHF VCO tuning.
2000 mA 0.8 2 uA
VR1A
UEM
VCP
Voltage Current Noise density
4.6
4.75 2
4.9 10 240
V mA nVrms/ sqrt(Hz) V mA nVrms/ sqrt(Hz) V mA nVrms/ sqrt(Hz) V
VR2
UEM
VRF_TX
Voltage Current Noise density f=100Hz f>300Hz
2.70
2.78 65
2.86 100 120
Supply for part of transmit strip. t it t i Su ly Supply for TX I/Qmodulators.
VR3
UEM
VCTCXO
Voltage Current Noise density
2.70
2.78 1
2.86 20 240
Supply for VCTCXO
VR4
UEM
VRF_RX
Voltage Current Noise density f = 6 Hz f = 60 Hz f y 600Hz
2.70
2.78
Supply for Hagar RX; preamp., mixer, DTOS 50 mA Noise density decades 20dB/d d d 20dB/dec from 6Hz to 600Hz. 5500 nVrms/ From f >600Hz 550 sqrt(Hz) maximum noise density 55 55nVRMS/Hz. 2.86 50 240 V mA nVrms/ sqrt(Hz) V mA nVrms/ sqrt(Hz) Supply for Hagar BB and LNA d Supply for Hagar PLL; dividers, LO PLL di id LO buffers, prescaler, rescaler,
2.86
VR5
UEM
VDIG, VPRE, VPRE VLO
Voltage Current Noise density BW=100Hz... 100kHZ
2.70
2.78
VR6
UEM
VBB
Voltage Current Noise density BW=100Hz... 100kHz
2.70
2.78
2.86 50 240
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Signal name VR7 From UEM To UHF VCO Parameter Voltage Current Noise density 100Hz
PAMS Technical Documentation
Typ 2.78 Max 2.86 30 70 55 35 30 30 1.35 V mA nVrms/ sqrt(Hz) Unit Function Supply for UHF VCO
1.366 V 100 +65 60 uA uV/C
Voltage Reference for RF IC RFIC.
Note: Below 600Hz noise density is nVrms/ allowed to sqrt(Hz) increase 20 dB/oct
uA uV/C nVrms/ sqrt(Hz) Supply for RFBB digital interface and di it l i t f d some digital parts of arts RF.
1.35
1.377 V 100 +65 350
AC and DC Characteristics of RFBB digital signals
Input Characteristics Signal name From To Parameter Min TXP (RFGenOut3) UPP PA & RFIC "1" 1.38 Typ Max 1.88 Unit V Fun ction
"0"
0
0.4
Load Resistance
10
220
Load Capacitance
20
Timing Accuracy
1/4
Tran smit ter pow V er amp lifier kohm ena ble / DC pF N2 timi ng? symbol ??
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Signal name From To Parameter Min RFBusEna1X UPP RFIC "1" "0" Current Load resistance Load capacitance RFBusData UPP RFIC "1" "0" Load resistance Load capacitance Data frequency RFBusClk UPP RFIC "1" "0" Load resistance Load capacitance Data frequency RESET (GENIO6) UPP RFIC "1" "0" Load capacitance Load resistance Timing accuracy 10 1.38 0 1.38 0 10 1.38 0 10 10 1.38 0 Typ
NHM7 System Module & UI
Max 1.88 0.4 50 220 20 1.88 0.4 220 20 10 1.88 0.4 220 20 10 1.85 0.4 20 220 1/4 Unit V V uA kohm pF V V kohm pF MHz V V kohm pF MHz V V pF kohm symbol Res et t t to Hag ar RFb us data ; read /writ e RFb us cloc k Fun ction RFb us ena ble
AC and DC Characteristics of RFBB analogue signals
Signal name VCTCXO From To Parameter Signal amplitude Input Impedance Input Capacitance Harmonic Content Clear signal window (no glitch) Duty Cycle VCTCXOGnd RXI/RXQ VCTXO RFIC UPP UEM DC Level Differential voltage swing (static) DC level I/Q amplitude missmatch I/Q phase missmatch 5 1.35 1.3 200 40 0 1.4 1.35 1.45 1.4 0.2 5 60 Min 0.2 10 10 8 Typ 0.8 Max 2.0 Unit Vpp kohm pF dBc mVpp % V Vpp V dB deg Ground for reference clock RX baseband signal. Function High stability clock signal f th l i i l for the logic circuits, AC coupled. Distorted sine wave eg. eg sawtooth.
VCTCXO UPP
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NHM7 System Module & UI
Signal name TXIP / TXIN From UEM To RFIC Parameter Differential voltage swing (static) DC level Source Impedance TXQP / TXQN UEM RFIC
PAMS Technical Documentation
Min 2.23 Typ Max 2.48 Unit Vpp Function Programmable voltage swing. Programmable common mode voltage voltage. Between TXIPTXIN Differential quadrature phase TX baseband signal for the RF modulator 0.1 2.6 V bits 100 0.2 0.1 2.4 200 10 800 ohm bits nVrms/ NOTE; Assumed sqrt(Hz) power control o am G 1 opamp G=1 uV/C V Temperature sensor of RF f RF. kohm nF ms V Transmitter power control Automatic frequency control signal f i l for VCTCXO
1.17
1.20
1.23 200
V ohm
Same spec as for TXIP / TXIN
AFC
UEM
VCTCXO Voltage Min Max Resolution Load resistance and capacitance Step settling time
0.0 2.4 11 1
Aux_DAC (TxC)
UEM
RF
Voltage Min Max Source Impedance Resolution Noise density BW=100Hz... 100kHz Temp Coef
65 1,57 1,7 1,79
+65
RFTemp
RF
UEM
Voltage at 20oC Voltage at +25oC Voltage at +60oC
Vbase
RF
UEM
Voltage
2.7
V
Detected voltage from PA power level sensing unit
External Signals and Connections
UI (boardtoboard) connector
Pin 1 2 3 Signal SLOWAD(2) VBAT ROW(4) Min 1.5V 0.1V 3.0V 0.7xVIO 0 3.6V Nom Max 2.7V 1.0V 4.2V 1.8V 0.3xVIO High Low Condition Flip closed Flip open Note used for flip identification Battery voltage for leds Keyboard matrix row 4
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Pin 4 5 6 7 8 9 10 11 12 13 14 15 16 Signal ROW(3) COL(2) ROW(2) COL(1) ROW(0) KLIGHT ROW(1) COL(3) COL(4) GND GND GND GND 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0V 0V 0V 0V Min 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 Nom Max VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VBAT 0.3xVBAT VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO
NHM7 System Module & UI
Condition High Low High Low High Low High Low High Low LED off LED on High Low High Low High Low Note Keyboard matrix row 3 Keyboard matrix column 2 Keyboard matrix row 2 Keyboard matrix column 1 Keyboard matrix row 0 two colour led control Keyboard matrix row 1 Keyboard matrix column 3 Keyboard matrix column 4
LCD connector
Pin 1 Signal XRES Min 0.8*VIO 0 100ns 2 XCS 0.8*VIO 0 130ns VIO 0.22*VIO Nom Max VIO 0.22*VIO Condition Logic '1' Logic '0' trw Logic '1' Logic '0' tcss Note Reset Active low Reset active Chip select Active low XCS low before SCLK rising edge XCS low after SCLK rising edge XCS high pulse width Serial data (driver input) Serial data (driver output) Data setup time Data hold time
130ns
tcsh
300ns 3 4 GND SDA 0.8*VIO 0 0.7*VIO 0 100ns 100ns 0V VIO 0.22*VIO VIO 0.3*VIO
tcsw
Logic '1' Logic '0' Logic '1' Logic '0' tsds tsdh
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NHM7 System Module & UI
Pin 5 Signal SCLK Min 0.8*VIO 0 250ns 110ns 110ns 6 VDDI (VIO) 1.72V 1.8V 1.88V Nom Max VIO 0.22*VIO 4.0MHz
PAMS Technical Documentation
Condition Logic '1' Logic '0' Max frequency tscyc tshw tslw Note Serial clock input
Clock cycle Clock high Clock low Logic voltage supply Connected to VIO
7
VDD (VFLASH1)
2.72V
2.78V
2.86V
Voltage supply Connected to VFLASH1
8
VOUT
9V
Booster output, C=1uF connected to GND
DC connector
Pin 2 1 Signal VCHAR CHGND Min 7.0 VRMS Nom 8.4 VRMS 0 Max 9.2 VRMS 850 mA Condition Fast charger Note Charger positive input Charger ground
Headset connector
Pin 5 Signal XMICP Min Nom Max 1Vpp 100 mVpp 2.0 V 3 XMICN 2.1 V 2.25 V 1Vpp 100 mVpp 4 XEARN 0.75V 0.8V 0.85V 1Vpp 7 XEARP 0.75V 0.8V 0.85V 1Vpp 5 HookInt 0V 2.86V (VFLASH1) 2.86V (VANA) Condition G = 0dB G = 20dB DC G = 0 dB G = 20dB DC AC DC AC Connected to UEM ADconverter Accessory detection 1k to GND Note 1k to MIC2B
6
HeadInt
0V
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PAMS Technical Documentation SIM connector
Pin 1 Name VSIM Parameter 1.8V SIM Card 3V SIM Card 2 SIMRST 1.8V SIM Card 3V SIM Card 3 SIMCLK Frequency Trise/Tfall 1.8V Voh 1.8V Vol 3 Voh 3 Vol 4 DATA 1.8V Voh 1.8V Vol 3 Voh 3 Vol 1.8V Vih 1.8V Vil 3V Vil 3V Vil 5 6 NC GND GND 0 0.9xVSIM 0 0.9xVSIM 0 0.9xVSIM 0 0.9xVSIM 0 0.7xVSIM 0 0.7xVSIM 0 VSIM 0.15xVSIM VSIM 0.15xVSIM VSIM 0.15xVSIM VSIM 0.15xVSIM VSIM Min 1.6 2.8 0.9xVSIM 0 0.9xVSIM 0 3.25 50 VSIM Typ 1.8 3.0 Max 1.9 3.2 VSIM 0.15xVSIM VSIM 0.15xVSIM
NHM7 System Module & UI
Unit V
Notes Supply voltage
V
SIM reset (output)
MHz ns V
SIM clock
V
SIM data (output)
SIM data (input) Trise/Tfall max 1us
V
Ground
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PAMS Technical Documentation
Functional Description Modes of Operation
LA5 baseband engine has six different operating modes: No supply Backup Acting Dead Active Sleep Charging No supply In NO_SUPPLY mode the phone has no supply voltage. This mode is due to disconnection of main battery and backup battery or low battery voltage level in both of the batteries. Phone is exiting from NO_SUPPLY mode when sufficient battery voltage level is detected. Battery voltage can rise either by connecting a new battery with VBAT > VMSTR+ or by connecting charger and charging the battery above VMSTR+. Backup In BACKUP mode the backup battery has sufficient charge but the main battery can be disconnected or empty (VBAT < VMSTR and VBACK > VBUCOFF). VRTC regulator is disabled in BACKUP mode. VRTC output is supplied without regulation from backup battery (VBACK). All the other regulators are disabled. Acting Dead If the phone is off when the charger is connected, the phone is powered on but enters a state called "Acting Dead". To the user the phone acts as if it was switched off. A battery charging alert is given and/or a battery charging indication on the display is shown to acknowledge the user that the battery is being charged. Active In the active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. There are several substates in the active mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc. One of the substate of the active mode is FM radio on state. In that case UEM audio blocks and FM radio are powered on. FM radio circuitry is controlled by the MCU and 75kHz reference clock is generated in the UPP. VFLASH2 regulator is operating. In active mode the RF regulators are controlled by SW writing into UEM's registers wanted settings: VR1A can be enabled or disabled. VR2 can be enabled or disabled and its output voltage can be programmed to be
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2.78V or 3.3V. VR4 VR7 can be enabled or disabled or forced into low quiescent current mode. VR3 is always enabled in active mode. Sleep mode Sleep mode is entered when both MCU and DSP are in standby mode. Sleep is controlled by both processors. When SLEEPX low signal is detected UEM enters SLEEP mode. VCORE, VIO and VFLASH1 regulators are put into low quiescent current mode. All RF regulators are disabled in SLEEP. When SLEEPX=1 is detected UEM enters ACTIVE mode and all functions are activated. The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or by some external interrupt, generated by a charger connection, key press, headset connection etc. In sleep mode VCTCXO is shut down and 32 kHz sleep clock oscillator is used as reference clock for the baseband. Charging The battery voltage, temperature, size and current are measured by the UEM controlled by the charging software running in the UPP. The charging control circuitry (CHACON) inside the UEM controls the charging current delivered from the charger to the battery. The battery voltage rise is limited by turning the UEM switch off when the battery voltage has reached 4.2 V. Charging current is monitored by measuring the voltage drop across a 220 mOhm resistor.
Supply Voltage Regulation
Supply voltage regulation is controlled by UEM asic. There are six separate regulators used by baseband block. BB Regulators
Signal VANA VFLASH1 VFLASH2 VSIM VIO VCORE 2.70V 2.70V 2.70V 1.745V 2.91V 1.72V 1.0V 1.235V 1.425V 1.710V Min 2.78V 2.78V 2.78V 1.8V 3.0V 1.8V 1.053V 1.3V 1.5V 1.8V Nom 2.86V 2.86V 2.86V 1.855V 3.09V 1.88V 1.106V 1.365V 1.575V 1.890V Max Note Imax = 80mA Imax = 70mA ISleep = 1.5mA Imax = 40mA Imax = 25mA ISleep = 0.5mA Imax = 150mA ISleep = 0.5mA Imax = 200mA ISleep = 0.2mA Default value = 1.5V
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NHM7 System Module & UI
PAMS Technical Documentation
Battery
Liion battery pack BLB2 is used in NHM7. Nominal discharge cutoff voltage Nominal battery voltage Nominal charging voltage Pin numbering of battery pack
Signal name VBAT BSI BTEMP GND Pin number 1 2 3 4 Function Positive battery terminal Battery capacity measurement (fixed resistor inside the battery pack) Battery temperature measurement (measured by ntc resistor inside pack) Negative/common battery terminal
3.1V 3.6V 4.2V
BLB2 battery pack pin order
4(GND) 3(BTEMP) 2(BSI) 1 (+)
Power Up and Reset
Power up and reset is controlled by the UEM ASIC. NHM7 baseband can be powered up in following ways: 1. Press power button which means grounding the PWRONX pin of the UEM 2. Connect the charger to the charger input 3. Supply battery voltage to the battery pin 4. RTC Alarm, the RTC has been programmed to give an alarm After receiving one of the above signals, the UEM counts a 20ms delay and then enters it's reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+ a 200ms delay is started to allow references etc. to settle. After this delay elapses the VFLASH1 regulator is enabled. 500us later VR3, VANA, VIO and VCORE are enabled. Finally the PURX (Power Up Reset) line is held low for 20 ms. This reset, PURX, is fed to the baseband ASIC UPP, resets are generated for the MCU and
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NHM7 System Module & UI
the DSP. During this reset phase the UEM forces the VCTCXO regulator on regardless of the status of the sleep control input signal to the UEM. The FLSRSTx from the ASIC is used to reset the flash during power up and to put the flash in power down during sleep. All baseband regulators are switched on at the UEM power on except SIM and VFLASH2 regulators which are controlled by the MCU. The UEM internal watchdogs are running during the UEM reset state, with the longest watchdog time selected. If the watchdog expires the UEM returns to power off state. The UEM watchdogs are internally acknowledged at the rising edge of the PURX signal in order to always give the same watchdog response time to the MCU.
A/D Channels
The UEM contains the following A/D converter channels that are used for several measurement purpose. The general slow A/D converter is a 10 bit converter using the the UEM interface clock for the conversion. An interrupt will be given at the end of the measurement. The UEM's 11channel analog to digital converter is used to monitor charging functions, battery functions, voltage levels in external accessory detection inputs, user interface and RF functions. When the conversion is started the converter input is selected. Then the signal processing block creates a data with MSB set to '1' and and others to '0'. In the D/A converter this data controls the switches which connect the input reference voltage (VrefADC) to the resistor network. The generated output voltage is compared with the input voltage under measurement and if the latter is greater, MSB remains '1' else it is set '0'. The following step is to test the next bit and the next...until LSB is reached. The result is then stored to ADCR register for UPP to read. The monitored battery functions are battery voltage (VBATADC), battery type (BSI) and battery temperature (BTEMP) indication. The battery type is recognized through a resistive voltage divider. In phone there is a 100kOhm pull up resistor in the BSI line and the battery has a pull down resistor in the same line. Depending on the battery type the pull down resistor value is changed. The battery temperature is measured equivalently except that the battery has a NTC pull down resistor in the BTEMP line. KEYB1&2 inputs are used for keyboard scanning purposes. These inputs are also routed internally to the miscellaneous block. In NHM7 KEYB1 input is used for flip detection. The HEADINT and HOOKINT are external accessory detection inputs used for monitoring voltage levels in these inputs. They are routed internally from the miscellaneous block and they are connected to the converter through a 2/1 multiplexer. The monitored RF functions are PATEMP and VCXOTEMP detection. PATEMP input is used to measure temperature of the RFIC, Hagar. VCXOTEMP is not used in NHM7. E Nokia Corporation
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PAMS Technical Documentation
FM Radio
FM radio circuitry is implemented using highly integrated radio IC, TEA5757. Only few external components like filters, discriminator and capacitors are needed. TEA5757 is an integrated AM/FM stereo radio circuit including digital tuning and control functions. NHM7 radio is implemented as superheterodyne FM mono receiver. FM stage of the TEA5757 incorporates a tuned RF stage, a double balanced mixer, one pin oscillator and is designed for distributed IF ceramic filters. IF frequency is 10.7 MHz. Channel tuning and other controls are controlled by the MCU. Reference clock, 75kHz, is generated by the UPP CTSI block. FM radio circuitry is controlled through serial bus interface by the MCU SW. TEA5757 informs MCU when channel is tuned by setting FMTuneX signal to logic '0'. Digital Interface UPP
GenIO(3)
TEA5757
FMClk VIO
XTAL
GenIO(12) GenIO(11) GenIO(8)
FMCtrlDa FMCtrlClk FMWrEn VIO
DATA BUSCLK WREN
GenIO(27)
FMTuneX
MO/ST
NOTE: FMCtrlClk needs to be set to logic '1' when data is not written or read. This is required for correct operation of the FMTuneX signal. FM radio audio & antenna connections UEM Bottom Connector
XEARP 1n 1000@100MHz HF MIC3 3.9nF XEARN 1n 18pF 18pF HFCM FM_RFI 100k 100nF 4.7k AFLO
TEA5757
72nH
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IR Module
The IR interface, when using 2.7V transceiver, is designed into the UEM. The IR link supports speeds from 9600 bit/s to 1.152 MBit/s up to distance of 1m. Transmission over the IR if halfduplex. The lenght of the transmitted IR pulse depends on the speed of the transmission. When 230.4 kbit/s or less is used as a transmission speed, pulse length is maximum 1.63us. If transmission speed is set to 1.152Mbit/s the pulse length is 154ns according to IrDA specification.
Backup Battery
Backup battery is used in case when main battery is either removed or discharged. Backup battery is used for keeping real-time clock running for minimum of 30 minutes. Rechargeable backup battery is connected between UEM VBACK and GND. In UEM backup battery charging high limit is set to 3.2V. The cut off limit voltage (VBUCoff) for backup battery is 2.0V. Backup battery charging is controlled by MCU by writing into UEM register. Polyacene SMD battery type is used. The nominal capacity of the battery is 0.2 mAh.
SIM Interface
UEM contains the SIM interface logic level shifting. SIM interface can be programmed to support 3V and 1.8V SIMs. SIM supply voltage is selected by a register in the UEM. It is only allowed to change the SIM supply voltage when the SIM IF is powered down. The SIM power up/down sequence is generated in the UEM. This means that the UEM generates the RST signal to the SIM. Also the SIMCardDet signal is connected to UEM. The card detection is taken from the BSI signal, which detects the removal of the battery. The monitoring of the BSI signal is done by a comparator inside UEM. The comparator offset is such that the comparator output do not alter state as long as the battery is connected. The threshold voltage is calculated from the battery size specifications. The SIM interface is powered up when the SIMCardDet signal indicates "card in". This signal is derived from the BSI signal.
Parameter SIMCARDet, BSI comparator Threshold SIMCARDet, BSI comparator Hysteresis (1) Variable Vkey Vsimhyst Min 1.94 50 Typ 2.1 75 Max 2.26 100 V mV Unit
The whole SIM interface locates in two chip UPP and UEM. The SIM interface in the UEM contains power up/down, port gating, card detect, data receiving, ATRcounter, registers and level shifting buffers logic. The SIM interface is the electrical interface between the Subscriber Identity Module Card (SIM Card) and mobile phone (via UEM device). E Nokia Corporation
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PAMS Technical Documentation
The data communication between the card and the phone is asynchronous half duplex. The clock supplied to the card is in GSM system 1.083 MHz or 3.25 MHz. The data baud rate is SIM card clock frequency divided by 372 (by default), 64, 32 or 16. The protocol type, that is supported, is T=0 (asynchronous half duplex character transmission as defined in ISO 78163).
GND SIM
SIMDATA C5 C6 C7 C8 C1 C2 C3 C4 SIMCLK SIMRST VSIM SIMIO SIMClk Data
GND
SIMIO SIMClk Data
UEM
SIMIF register UIF Block UEM digital logic UEMInt CBusDa CBusEnX CBusClk
UPP
From Battery Type contact BSI
The internal clock frequency from UPP CTSI block is 13 MHz in GSM. Thus to achieve the minimum starting SIMCardClk rate of 3.25 MHz (as is required by the authentication procedure and the duty cycle requirement of between 40% and 60%) then the slowest possible clock supplied to the SIM has to be in the GSM system clock rate of 13/4 MHz.
Buzzer
Buzzer is used to generate alerting tones and melodies to indicate incoming call. It is also used to generate keypress and warning tones for the user. Buzzer is controlled by PWM (Pulse Width Modulation) signal generated by the buzzer driver of the UEM. Target SPL is 100dB (A) at 5cm.
Internal Microphone
The internal microphone capsule is mounted in the bottom connector. Microphone is omnidirectional. The internal microphone is connected to the UEM microphone input MIC1P/N. The microphone input is asymmetric and microphone bias is provided by the UEM MIC1B. The microphone input on the UEM is ESD protected. Spring contacts are used to connect the microphone contacts to the main PCB.
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22pF 100nF MIC1B
NHM7 System Module & UI
MIC1N 33nF 2k2 33nF MIC1P 27pF 22pF 2k2 600@100MHz
UPP
UPP (Universal Phone Processor) is the digital ASIC of the baseband. UPP includes 8MBit internal RAM, ARM7 Thump 16/32bit RISC MCU core, LEAD3 16bit DSP core, ROM for MCU boot code and all digital control logic. Main functions of the custom logic are: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. Interface between system logic and MCU/DSP (BodyIf) Clocking, timing, sleep and interrupt block (CTSI) for system timing control MCU controlled general purpose USART, MBUS USART and general purpose IOs (PUP). SIM card interface (SIMIf) GSM coder (Coder) GPRS support (GPRSCip) Interfaces for keyboard, LCD and UEM (UIF) Accessory interface for IrDA SIR, IrDA FIR and LPRF (AccIf) SW programmable RF interface (MFI) Programmable serial interface for Hagar RFIC (SCU) Test interface (TestIf)
Memory Block
For the MCU UPP includes ROM, 2 kbytes, that is used mainly for boot code of MCU. To speed up the MCU operation small 64 byte cache is also integrated as a part of the MCU memory interface. For program memory 8Mbit (512 x 16bit) PDRAM is integrated. RAM block can also be used as data memory and it is byte addressable. RAM is mainly for MCU purposes but also DSP has also access to it if needed. E Nokia Corporation
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PAMS Technical Documentation
MCU code is stored into external flash memory. Size of the flash is 64Mbit (4096 x 16bit) The NHM7 baseband supports a burst mode flash with multiplexed address/data bus. Access to the flash memory is performed as 16bit access. The flash has Read While Write capabilities which makes the emulation of EEPROM within the flash easy.
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NHM7 System Module & UI
RF Module
This RF module takes care of all RF functions of the engine. RF circuitry is located on one side (Bside) of the PCB. EMC leakage is prevented by using a metal Bshield, which screens the whole RF side (included FM radio) of the engine. The conductive (silicon or metal) gasket is used between the PCB and the shield. The metal Bshield is separated to three blocks. The first one include the FM radio. The second block include the PA, antenna switch, LNAs and dual RX SAW. The last, but not least, block include the Hagar RF IC, VCO, VCTCXO, baluns and balanced filters. The blocks are divided on the basis that the attenuation between harmonics of the transmitter and the VCO signal (including Hagar IC) is a high (over 100dB). The VCO and TX outputs of the Hagar RF IC are located one another as far as possible. In order to guard against the radiated spurious inside blocks, the RF transmission lines are made with striplines after PA. The baseband circuitry is located on the Aside of the board, which is shielded with a metallized frame and ground plane of the UIboard. Maximum height inside on Bside is 1.8 mm. Heat generated by the circuitry will be conducted out via the PCB ground planes and metallic Bshield
RF Frequency Plan
925960 MHz 18051880 MHz
HAGAR
Isignal Qsignal
RX
f f/4 f/2
f
f f/4 f/2
f PLL
3420 3840 MHz 26 MHz
17101785 MHz
VCTCXO
880915 MHz
Isignal Qsignal
TX
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PAMS Technical Documentation
DC characteristics
Regulators Transceiver has a multifunction power management IC on baseband section, which contains among other functions; 7 pcs of 2.78 V regulators and 4.8V upswitcher for charge pump. All regulators can be controlled individually with 2.78 V logic directly or through control register. In GSM direct controls are used to get fast switching, because regulators are used to enable RFfunctions. Use of the regulators can be seen in the Power Distribution Diagram. VrefRF01and VrefRF02 are used as the reference voltages for HAGAR RFIC, VrefRF01 (1.35V) for bias reference and VrfeRF02 (1.35V) for RX ADC's reference. Regulators (except VR2 and VR7) are connected to HAGAR. Different modes were switched on by the aid of serial bus. List of the needed supply voltages : Volt. source VR1 VR2 VR3 VR4 VR5 VR6 VR7 VrefRF01 VrefRF02 Vbatt Load PLL charge pump (4,8 V) TX modulator VCTCXO + buffer HAGAR IC (LNAs+mixer+DTOS) HAGAR IC (div+LObuff+prescaler), HAGAR (Vdd_bb) VCO ref. voltage for HAGAR ref. voltage for HAGAR PA
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SOURCE
NHM7 System Module & UI
LOAD
VR1
4.75 V +/ 3.2 % 10 mA 2.78 V +/ 3 % 100 mA
Charge pump in HAGAR TX IQ modulator, power control opamp in Hagar VCTCXO VCTCXO buffer in Hagar
VR2
VR3
2.78 V +/ 3 % 20 mA
VR4
2.78 V +/ 3 % 50 mA
EGSM & DCS LNA RX mixer in Hagar DTOS in Hagar
VR5
2.78 V +/ 3 % 50 mA
PLL in Hagar Dividers in Hagar
UEM
LO buffers in Hagar Prescaler in Hagar Power detector
VR6
2.78 V +/ 3 % 50 mA 2.78 V +/ 3 % 50 mA 1.35 v +/ 1.15 %
BB section in Hagar
VR7
SHF VCO Module
VrefRF01
< 100 ua 1.35 V +/ 2 %
Ref. volt. for Hagar RX
VrefRF02
< 100 ua
Ref. volt. for Hagar
VBATT
3.2 4.5 V 1700 mA (max)
Dual PA module
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RF characteristics
Item Receive frequency range Transmit frequency range Duplex spacing Channel spacing Number of RF channels Power class Number of power levels Values (EGSM / GSM1800) 925 ... 960 MHz / 1805...1880 MHz 880 ... 915 MHz / 1710...1785 MHz 45 MHz / 95 MHz 200 kHz 174 / 374 4 (2 W) / 1 (1 W) 15 / 16
Transmitter characteristics
Item Type LO frequency range Output power Gain control range Maximum phase error ( RMS/peak ) Values (EGSM/GSM1800) Direct conversion, nonlinear, FDMA/TDMA 3520...3660 MHz / 3420...3570 MHz 2 W / 1 W peak min. 30 dB max 5 deg./20 deg. peak
Receiver characteristics
Item Type LO frequencies Typical 3 dB bandwidth Sensitivity Total typical receiver voltage gain ( from antenna to RX ADC ) Receiver output level ( RF level 95 dBm ) Typical AGC dynamic range Accurate AGC control range Typical AGC step in LNA Usable input dynamic range RSSI dynamic range Compensated gain variation in receiving band Values, EGSM/GSM1800 Direct conversion, Linear, FDMA/TDMA 3700...3840 MHz / 3610...3760 MHz +/ 91 kHz min. 102 dBm (GSM1800 norm.cond. only) 86 dB 230 mVpp, singleended I/Q signals to RX ADCs 83 dB 60 dB 30 dB GSM1800 102 ... 10 dBm 110 ... 48 dBm +/ 1.0 dB 25 dB EGSM
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HAGAR Dual SAW LNA SAW
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PCN
RF Block Diagram
PAMS Technical Documentation
I Q LNA SAW
f/2
EGSM
VrefRF01
f
VrefRF02 CTRL SERIAL CTRL BUS
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f/2
ANT SW
f
PLL SHF VCO
f f/2
13 MHz to ASIC
Coupler
f f f/2
f/2
26 MHz VCXO
AFC TXC TXP
NHM7 System Module & UI
PCN
TXIP TXIN TXQP TXQN
Dual PA SAW
EGSM
RF_temp
NHM7 System Module & UI
PAMS Technical Documentation
Frequency synthesizers
VCO frequency is locked with PLL into stable frequency source, which is a VCTCXOmodule ( voltage controlled temperature compensated crystal oscillator ). VCTCXO is running at 26 MHz. Temperature drifting is controlled with AFC ( automatic frequency control ) voltage. VCTCXO is locked into frequency of the base station. AFC is generated by baseband with a 11 bit conventional DAC. 13MHz VCTCXO can also be used if multislot operations is not needed. If more than 1(RX)+1(TX) slot is wanted settling times have to be less than 300us from channel to channel. This can be achieved when PLL loopbandwith is ~35kHz. Noise coming from the loop and noise from dividers (20*logN) increases rms phase error over 3 degrees which is the maximum for synthesizer.
26 MHz frequency reference R AFCcontrolled VCTCXO LP
f ref
f_out /M PHASE DET. CHARGE PUMP Kd VCO Kvco
f_out
M
M = A(P+1) + (NA)P= = NP+A
PLL is located in HAGAR RFIC and is controlled via serial RFBus. There is 64/65 (P/P+1) prescaler, N and Adivider, reference divider, phase detector and charge pump for the external loop filter. SHF local signal, generated by a VCOmodule ( VCO = voltage controlled oscillator ), is fed thru 180deg balanced phase shifter to prescaler. Prescaler is a dual modulus divider. Output of the prescaler is fed to N and Adivider, which produce the input to phase detector. Phase detector compares this signal to reference signal (400kHz), which is divided with reference divider from VCTCXO output. Output of the phase detector is connected into charge pump, which charges or discharges integrator capacitor in the loop filter depending on the phase of the measured frequency compared to reference frequency. Loop filter filters out comparison pulses of phase detector and generates DC control voltage to VCO. Loop filter defines step response of the PLL ( settling time ) and effects to stability of the loop, that's why integrator capacitor has a resistor for phase compensation. Other filter components are for sideband rejection. Dividers are controlled via serial bus. RFBusData is for data, RFBusClk is serial clock for the bus and RFBusEna1X is a latch enable, which stores new data into dividers. LOsignal is generated by SHF VCO module. VCO has double frequency in GSM1800 and x 4 frequency in EGSM compared to actual RF channel
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frequency. LO signal is divided by two or four in HAGAR (depending on system mode).
Receiver
Receiver is a direct conversion, dual band linear receiver. Received RF signal from the antenna is fed via RFantenna switch module to 1st RX bandpass RFSAW filters and MMIC LNAs (low noise amplifier). RFantenna switch module contains upperband and lowerband operation. The LNA amplified signal is fed to 2nd RX bandpass RFSAW filters. Both 2nd RX bandpass RFSAW filters have unbal/bal configuration to get the balanced (balanced) feed for Hagar. Discrete LNAs have three gain levels. The first one is max. gain, the second one is about 30dB(GSM1800) and 25dB(EGSM900) below max. gain and the last one is off state. The gain selection control of LNAs comes from HAGAR IC. RX bandpass RFSAW filters define how good are the blocking characteristics against spurious signals outside passband and the protection against spurious responses. Differential RX signal is amplified and mixed directly down to BB frequency in HAGAR. Local signal is generated with external VCO. VCO signal is divided by 2 (GSM1800) or by 4 (EGSM900). PLL and dividers are in HAGARIC. From the mixer output to ADC input RX signal is divided into I and Qsignals. Accurate phasing is generated in LO dividers. After the mixer DTOS amplifiers convert the differential signals to single ended. DTOS has two gain stages. The first one has constant gain of 12dB and 85kHz cut off frequency. The gain of second stage is controlled with control signal g10. If g10 is high (1) the gain is 6dB and if g10 is low (0) the gain of the stage is 4dB. The active channel filters in HAGAR provides selectivity for channels (3dB @ +/91 kHz typ.). Integrated base band filter is activeRCfilter with two offchip capacitors. Large RCtime constants needed in the channel select filter of direct conversion receiver are produced with large offchip capacitors because the impedance levels could not be increased due to the noise specifications. Baseband filter consists of two stages, DTOS and BIQUAD. DTOS is differential to singleended converter having 8dB or 18dB gain. BIQUAD is modified SallenKey Biquad. Integrated resistors and capacitors are tunable. These are controlled with a digital control word. The correct control words that compensate for the process variations of integrated resistors and capacitors and of tolerance of off chip capacitors are found with the calibration circuit. Next stage in the receiver chain is AGCamplifier, also integrated into HAGAR. AGC has digital gain control via serial mode bus. AGCstage provides gain control range (40 dB, 10 dB steps) for the receiver and also the necessary DC compensation. Additional 10 dB AGC step is implemented in DTOS stages. E Nokia Corporation
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DC compensation is made during DCN1 and DCN2 operations (controlled via serial bus). DCN1 is carried out by charging the large external capacitors in AGC stages to a voltage which cause a zero dcoffset. DCN2 set the signal offset to constant value (VrefRF_02 1.35 V). The VrefRF_02 signal is used as a zero level to RX ADCs. Single ended filtered I/Qsignal is then fed to ADCs in BB. Input level for ADC is 1.45 Vpp max. Rftemp port is intended to be used for compensation of RX SAW filters thermal behavior. This phenomena will have impact to RSSI reporting accuracy. The current information is 35ppm/C for center frequency drift for all bands. This temperature information is a voltage over two diodes and diodes are fed with constant current.
Transmitter
Transmitter chain consists of two final frequency IQmodulators for upper and lower band, a dual power amplifier and a power control loop. I and Qsignals are generated by baseband. After post filtering (RCnetwork) they go into IQmodulator in HAGAR. LOsignal for modulator is generated by VCO and is divided by 2 or by 4 depending on system mode. There are separate outputs one for EGSM and one for GSM1800. In EGSM branch there is a SAW filter before PA to attenuate unwanted signals and wideband noise from the Hagar IC. The final amplification is realized with dual band power amplifier. It has two different power chains one for EGSM and one for GSM1800. PA is able to produce over 2 W (0 dBm input level) in EGSM band and over 1 W (0 dBm input level) in upperband band into 50 ohm output . Gain control range is over 45 dB to get desired power levels and power ramping up and down. Harmonics generated by the nonlinear PA are filtered out with filtering inside the antenna switch module. Power control circuitry consists of discrete power detector (common for lower and upperband) and error amplifier in HAGAR. There is a directional coupler connected between PA output and antenna switch. It is a dualband type and has input and outputs for both systems. Dir. coupler takes a sample from the forward going power with certain ratio. This signal is rectified in a schottkydiode and it produces a DCsignal after filtering. The possibility to improve efficiency in low power levels has been specified in power amplifier module. The improved efficiency will take place on power level 7 and lower in EGSM. For this option there is control input line in PA module.
AFC function
AFC is used to lock the transceivers clock to frequency of the base station. AFCvoltage is generated in BB with 11 bit DAconverter. There is a
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RCfilter in AFC control line to reduce the noise from the converter. Settling time requirement for the RCnetwork comes from signalling, how often PSW ( pure sine wave ) slots occur. They are repeated after 10 frames. AFC tracks base station frequency continuously, so transceiver has a stable frequency, because changes in VCTCXOoutput don't occur so fast ( temperature ). Settling time requirement comes also from the start uptime allowed. When transceiver is in sleep mode and "wakes" up to receive mode , there is only about 5 ms for the AFCvoltage to settle. When the first burst comes in system clock has to be settled into +/ 0.1 ppm frequency accuracy. The VCTCXOmodule requires also 5 ms to settle into final frequency. Amplitude rises into full swing in 1 ... 2 ms, but frequency settling time is higher so this oscillator must be powered up early enough.
DCcompensation
DC compensation is made during DCN1 and DCN2 operations (controlled via serial bus). DCN1 is carried out by charging the large external capacitors in AGC stages to a voltage which cause a zero dcoffset. DCN2 set the signal offset to constant value (RXREF 1.35 V). The RXREF signal is used as a zero level to RX ADCs.
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UI Board LK5
NHM7 consists of separate UI board, named as LK5, which includes contacts for the keypad domes and LEDs for keypad illumination. UI board is connected to main PWB through 16 pole boardtoboard connector with springs. Signals of the connector are described in section External and Internal Signals and Connections. 5x4 matrix keyboard is used in NHM7. Key pressing is detected by scanning procedure. Keypad signals are connected UPP keyboard interface. When no key is pressed row inputs are high due to UPP internal pullup resistors. The columns are written zero. When key is pressed one row is pulled down and an interrupt is generated to MCU. After receiving interrupt MCU starts scanning procedure. All columns are first written high and then one column at the time is written down. All other columns except one which was written down are set as inputs. Rows are read while column at the time is written down. If some row is down it indicates that key which is at the cross point of selected column and row was pressed. After detecting pressed key all register inside the UPP are reset and columns are written back to zero.
LCD & Keypad Illumination
In NHM7 white leds are used for LCD and keypad illumination. For LCD illumination four leds are used and for keypad six leds. Current through leds is controlled by transistor circuitry. External transistor driver circuitry is used as constant current source in order to prevent any change in battery voltage be seen as changing led brightness. Battery voltage is changing for example during charging depending on a charger, battery type and age. VBATT 10R VBATT 15R VBATT
Keypad leds
LCD leds
330R
KLight
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LEDs are controlled by the UEM PWM outputs. Both LEDs are controlled by KLight output of the UEM. Current flow through the LEDS is set by biasing the transistor and limiting the current by resistors. Current is set separately to keyboard and LCD leds.
Internal Speaker
The internal earpiece is a dynamic earpiece with an impedance of 32 ohms. The earpiece is low impedance one since the sound pressure is to be generated using current and not voltage as the supply voltage is restricted to 2.7V. The earpiece is driven directly by the UEM and the earpiece driver in UEM is a bridge amplifier. UEM
22 1000@100MHz
EARP
22
1000@100MHz
EARN 27pF 27pF
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