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SCHEMATIC DIAGRAMS
HARD DISK CAMCORDER
8 2004 YF053
GZ-MG40EX, GZ-MG40EY, GZ-MG40EZ, GZ-MG50EK, GZ-MG50EX, GZ-MG50EY, GZ-MG50EZ
CD-ROM No.SML200509
GZ-MG40EX, GZ-MG40EY, GZ-MG40EZ[M5E327] GZ-MG50EK, GZ-MG50EX, GZ-MG50EY, GZ-MG50EZ[M5E329]
Lead free solder used in the board (material : Sn-Ag-Cu, melting point : 219 Centigrade)
COPYRIGHT © 2005 Victor Company of Japan, Limited
No.YF110SCH 2005/9
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions ! The Components indentified by the symbol are critical for safety. For continued safety, replace safety critical components only with manufacturer's recommended parts. 1. Units of components on the schematic diagram Unless otherwise specified. 1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to parts list). Chip resistors are 1/16 W. K: K(1000), M: M (1000K) 2) All capacitance values are in µF, (P: PF). 3) All inductance values are in µH, (m: mH). 4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts list). Note: The Parts Number, value and rated voltage etc. in the Schematic Diagram are for references only. When replacing the parts, refer to the Parts List. 2. Indications of control voltage AUX : Active at high. AUX or AUX(L) : Active at low.
Playback and recording signal path Recording signal path (including E-E signal path) Capstan servo path
CIRCUIT BOARD NOTES
1. Foil and Component sides 1) Foil side (B side) : Parts on the foil side seen from foil face (pattern face) are indicated. 2) Component side (A side) : Parts on the component side seen from component face (parts face) indicated. rts location are indicated by guide scale on the circuit board. 2. Parts location guides Parts location are indicated by guide scale on the circuit board.
1 2 1.8 PB and REC modes (Voltage of PB and REC modes are the same) 3
REF No. IC101 B : Foil side (A : Component side) C : Chip component D : Discrete component) LOCATION IC B C Category : IC 6A Horizontal "A" zone Vertical "6" zone
4. Voltage measurement 1) Regulator (DC/DC CONV) circuits REC : Colour bar signal. PB : Alignment tape (Colour bar). -- : Unmeasurable or unnecessary to measure. 2) Indication on schematic diagram Voltage indications for REC and PB mode on the schematic diagram are as shown below.
REC mode
2.5 (5.0) PB mode
Note: If the voltages are not indicated on the schematic diagram, refer to the voltage charts. 5. Signal path Symbols The arrows indicate the signal path as follows. NOTE : The arrow is DVC unique object.
Playback signal path
Note: For general information in service manual, please refer to the Service Manual of GENERAL INFORMATION Edition 4 No. 82054D (January 1994).
3. Interpreting Connector indications
1 2 3 1 2 3
Removable connector
(Example)
Drum servo path
Wire soldered directly on board
R-Y Y
Playback R-Y signal path Recording Y signal path
1 2 3 1 2 3 4
Non-removable Board connector
6. Indication of the parts for adjustments The parts for the adjustments are surrounded with the circle as shown below.
Board to Board
Connected pattern on board The arrows indicate signal path
7. Indication of the parts not mounted on the circuit board Note: For the destination of each signal and further line connections that are cut off from the diagram, refer to "BOARD INTERCONNECTIONS" "OPEN" is indicated by the parts not mounted on the circuit board. R216 OPEN
(No.YF110)2-1
2-2(No.YF110)
CN106
YTU94074-12 YTU94077-12
(Page2-37)
GCS GDA GCL 38 39 1 ZOOM04 2 ZOOM03 3 ZOOM02 4 ZOOM01 5 FOCUS01 6 FOCUS04
GND
CN7601
CN402
HWRESETZ 37
CN401
VSSD
GND
REG_3.1V
REG_2.5V
REG_4.8V
SPKSPK+
NPC VDD POL 33 3 HDCVF/HD 3 2 LCD_CS 44 34 2 VDCVF/VD 2 1 LCD_RVS ANA_OUT ANA_CLK LCD_CTL ASPECT VDCVF HDCVF MON_R MON_G 36 35 34 33 32 31 30 29 28 DV2CKOUT REG+CCD 27 26 DV2CKOUT 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 P_GYAMP 3 CAM_CLK CAM_OUT 5 7 G_RST DSP_RST ANA_CLK ANA_OUT 37 38 39 40 41 42 43 45 3 4 5 6 7 8 9 10 MON_B 11 BL_POWER[15V] 12 REG_4.8V[BL/LED] 13 REG_4.8V[BL/LED] 14 REG_4.8V[SIG] 15 REG_3.1V 16 REG_3.1V 17 HRP 18 GND 19 GND 20 GND 21 GND 22 GND 23 GND 24 GND 25 LAMP_ON 26 RESET_SW/SJIG_RST 27 LCD_OPEN 28 P_MEDIA 29 KEY_A 30 SET_SW 31 INFO_SW 32 KEY_C 33 ACES_LED 34 CHRG_LED 35 REC_SW 36 PLAY_SW 37 POFF_SW 38 LITHIUM 39 Y_OUT 40 S_DET 41 C_OUT 42 V_OUT 43 P_DET 44 AU_SIG/R 45 AU_SIG/L C_OUT Y_OUT V_OUT
YTU94105-40 YTU94077-40 YTU94074-22 YTU94077-22
40 36
INT_L INT_R INT_GND
PMA0 XPMWAIT
REG_3.1V
REG_2.5V
REG_1.5V
35
GND
VS HS DE VC[B] VB[G] VA[R] PDO VCOIN VSS1 NC VDD1 VDD NC VSS DRV VFB VDDA 16 8 LCD_CS 20 17 7 ANA_OUT 19 18 6 ANA_CLK 18 19 5 BL_GND/GND 17 20 4 BL_GND/GND 16 21 3 LCD_CTL 15 22 2 BL_REG/BL_POWER 14 23 1 BL_REG/BL_POWER 13 24 12 SIG_GND/GND 12 AIBD AIOLRCK AIOBCK AOBD AOMCLK 26 10 SIG_GND/GND 10 27 9 SIG_GND/GND 9 28 8 REG_4.8V 8 29 7 REG_3.1V 7 30 6 REG_3.1V 6 31 5 REG_3.1V 5
OPE IF (Page2-31)
REG_4.8V
REG_3.1V
M_REG4.8
32
AUDIO
BOARD INTERCONNECTION
(Page2-9)
(Page2-13)
V I/O
25
CN7603
1 REG_4.8V 1 MON_R MON_G MON_B HRP VDCVF HDCVF S_SHUT AIBD AOBD AIOLRCK AOMCLK AIOBCK 7 FOCUS03 8 FOCUS02 9 F_LED 10 F_PTR_AD 11 F_VCC 12 OP_THRMO 13 GND 14 DRIVE-IS 15 DRIVE+IS 16 HGVCC+IS 17 HGOUT+IS 18 HGVSS-IS 19 HGOUT-IS 20 Z_PTR_AD 21 Z_VCC 22 Z_LED 4 HRP 4 MPGFLD MPGHSYNC MPGVSYNC VI0 VI1 VI2 VI3 VI4 VI5 VI6 VI7 BUZZER AUDIO_CS L_MUTE PD_L A_MUTE CLK4M5 F/Z_CS CAM_VD LENS_LED HDIRS VDIRS CLK1M0 F/Z_RST IRIS_PS IRIS_CS CAM_IN FOCUS02 FOCUS03 FOCUS04 FOCUS01 F_VCC ZOOM02 ZOOM03 ZOOM04 ZOOM01 HGVCC+IS HGOUT+IS HGVSS-IS HGOUT-IS DRIVE-IS DRIVE+IS Z_LED 11 SIG_GND/GND 11 DV2OUT0 DV2OUT1 DV2OUT2 DV2OUT3 DV2OUT4 DV2OUT5 DV2OUT6 DV2OUT7 VI0 VI1 VI2 VI3 VI4 VI5 VI6 VI7 MPGHSYNC MPGVSYNC MPGFLD
MPEG2
(Page2-11)
LCD MODULE
OP BLOCK
OP DRV
(Page2-23)
ANA_RST ANA_IN ANA_CS OSD_CS OSD_VD PSCTL
REG_4.8V
REG_3.1V
ANA_CLK ANA_OUT
AU_SIG/L AU_SIG/R
GND
C21P C21N 14 10 MON_R 22
15
9 M_RVS/LCD_RVS
21
IR_OUT
CAM_OUT CAM_CLK
ASPECT
OUTV2
C22P C22N C23P 11 12 12 MON_B PMA15 PMA14 PMA13 PMA12 24
13
11 NON_G
23
CLK27B XCACK XCREQ
XPMOE XPMWE PMD15 PMD14 PMD13 PMD12 PMD11 PMD10 PMD9 PMD8 PMD7 PMD6 PMD5 PMD4 PMD3 PMD2 PMD1 PMD0 PMA11 PMA10 PMA9 PMA8 PMA7 PMA6 PMA5 PMA4 PMA3 PMA2 PMA1
CN7602
C23N VGL C31P C31N VGH C41P C41N 4 5 6 8 9
DV1IN0 DV1IN1 DV1IN2 DV1IN3 DV1IN4 DV1IN5 DV1IN6 DV1IN7 DV1CLKIN XCINT XVOEN XPMCS0 MPEG_RST PLLSTOP
NOTE: The number of patch cords ( ) are indicated by interconnected.
10
LCD HINGE
YTU94074-12 YTU94077-12
YTU94074-24 YTU94077-24
YTU94074-24 YTU94077-24
7
REV SW
VCL VCOML VCOMH 1 2
7654321
8 9 1011121314
3
JP7601 JP7603 M_RVS JP7602 SIG_GND REG_3.1V OUTV2 XCREQ XCACK CLK27B
PMA0 XPMWAIT
Vdd RG SUB VL H1 H2 TEST
Vout GND GND V1 V2 V3 V4
CN5001
CN105
1 REG+CCD/REG_+15V 2 REG+CCD/REG_+15V REG-CCD/REG_-7.5V 4 REG-CCD/REG_-7.5V CCD_CTL 6 GND GND 8 GND
1 2 3 4 5 6 7 8
LAMP_ON
CLK4M5 F/Z_CS CAM_VD LENS_LED HDIRS VDIRS CLK1M0 F/Z_RST IRIS_PS IRIS_CS CAM_IN
Z_PTR_AD F_PTR_AD OP_THRMO
0 4 OPERATION
CN7701
LCD_BLK LCD_BLK NC NC BL_REGA BL_REGA 1 2 3 4 5 6 MCLKI TG_CS TG_HD TG_ID TG_VD S_SHUT
GND
REG-CCD
REG_4.8V
CAM_3.1V
GND
9 11 13
CCD_OUT 10 GND GND 12 GND RG 14 H1 H2 15 TG2_RST 16 SUB 17 CAM_CLK CAM_OUT 19 21 SDWP 23 V1 18 v2 V3 20 V4 GND 22 G_RST REG_3.1V 24 P_GYAMP
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 MCLKI TG_VD TG_ID TG_HD TG_CS
REG_+15V REG_-7.5V CCD_OUT CCD_CTL RG H1 H2 SUB V1 V2 V3 V4
REG_4.8V
REG+CCD
CAM_3.1V
(Page2-29)
CCD133
CCD_OUT
CAM_CLK CAM_OUT
0 6 MONI-BL
B/L(LED)SMS
CN101
LCD OPEN SW LED LIGHT
GND
TG133
(Page2-25)
CDS
P.PRCS
GYRO_CCD
(Page2-21)
(Page2-17)
(Page2-30)
YTU94074-6 YTU94077-6 VIDEO
CN103 CN6001
ACHI0 ACHI1 ACHI2 ACHI3 ACHI4 ACHI5 ACHI6 ACHI7 ACHI8 ACHI9 CDS_CS
REG_3.1V G_RST P_GYAMP GND
DSC
PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 PMD0 PMD1 PMD2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15 XPMWE XPMOE
RG H1 H2 SUB V1 V2 V3 V4 CCD__CTL
TRASH MENU SW SW OFF REC PLAY
45 BL_POWER 44 UNREGCHK 43 I_MTR 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 CAM_3.1V DATA_OUT 6 5 4 3 2 1 REG_3.1V REG_3.1V REG_3.1V SJIG_RST REG-CCD KEY_B 39 7 40 41 42 43 44 45 42 V_BATT 41 REG_2.5V 40 REG_2.5V 39 CLK_OUT 38 AL_3.1V 37 AL_3.1V 36 REG_CS 35 DRV_3.3V 34 DRV_3.3V 33 DRV_3.3V 32 DC_CHEK 31 REG_1.2V 30 REG_1.2V 29 REG_1.2V 28 D_BATT 27 GND 26 GND 25 GND 24 GND 23 GND 22 GND 21 GND 20 GND 19 GND 18 T_BATT 17 REG_1.5V 16 REG_1.5V 15 REG_1.5V 14 ADP_L 13 REG_4.8V 12 REG_4.8V 11 REG_4.8V 10 CHRG_EVR 9 CAM_3.1V DSP_RST 2 1
OBCLP PBLK ADCLK SHD SHP CDS_3V
OBCLP PBLK ADCLK SHD SHP CDS_3V CCD_CTL
LIGHT INFO SW SW LED RED POW/CHRG
0 2
CCD
G_RST
DECK OPERATION S JACK LED BLUE ACCESS LITHIUM
Y_GYAMP
AFE_RST SYSSEL1 SYSSEL0 EEPRM_CK EEPRM_CS EEPRM_DI EEPRM_DO TVSEL V27_OUT SCPU_CS SCPU_SCK SCPU_SI SCPU_SO
ACHI0 ACHI1 ACHI2 ACHI3 ACHI4 ACHI5 ACHI6 ACHI7 ACHI8 ACHI9 CDS_CS
Y_GYAMP
REG_3.1V REG_1.5V GND
(Page2-27)
GYRO
PPRD0 PPRO1 PPRO2 PPRO3 PPRO4 PPRO5 PPRO6 PPRO7 PPRO8 PPRO9 PPRO10 PPRO11 VLD_PIX SOF VCLK SSGFLD DMACLR DMABREQ DMASREQ XPMBLS1 XPMBLS0 XPMCS1 PMINT FLDCPU VDCPU ID_LAT CLK27A
REG_3.1V GND
YTU94128A-4
CN107
4 INT_L
(No.YF110)2-3
A/V JACK
GND
SDWP
(Page2-33)
DV2CKOUT
3 2
REG_3.1V
CCD_CTL
INT MIC
FLSH_RST
PPRO0 PPRO1 PPRO2 PPRO3 PPRO4 PPRO5 PPRO6 PPRO7 PPRO8 PPRO9 PPRO10 PPRO11 VLD_PIX SOF VCLK SSGFLD DMACLR DMABREQ DMASREQ XPMBLS1 XPMBLS0 XPMCS1 PMINT FLDCPU VDCPU ID_LAT CLK27A
INT_GND
IR_OUT SDWP
GND LITHIUM BL_POWER
1
INT_GND INT_R
CN109
2 SPK1 SPK+
SPEAKER
TRIG SW DC JACK
8
MAIN_IF
(Page2-5)
REG_3.1V REG+CCD
0 5 REAR
D T
2-4(No.YF110)
+
M_REG4.8
BATT_TERM
REAR IF (Page2-34) OPE REG (Page2-35)
P_DET S_DET POFF_SW PLAY_SW REC_SW CHRG_LED ACES_LED KEY_C INFO_SW SET_SW KEY_A P_MEDIA LCD_OPEN LCD_RVS LCD_CS LCD_CTL KEY_B DATA_OUT CHRG_EVR ADP_L T_BATT D_BATT DC_CHEK REG_CS CLK_OUT V_BATT I_MTR UNREGCHK ZOOM_SW
XCFCE1 XCFCE0 CFA2 CFA0 CFA1 XCFIORD XCFIOWR CFD15 CFD0 CFD14 CFD1 CFD13 CFD2 CFD12 CFD3 CFD11 CFD4 CFD10 CFD5 CFD9 CFD6 CFD8 CFD7 CFRESET
3AAZEROG IR_RMC LIT_3V PS_ZEROG
SDDAT0 SDDAT1 SDDAT2 SDDAT3 SDCD SDCLK SDCMD USBDN USBDP XUSB_DET XCFIORD XCFIOWR
USB
AL_3.1V
DRV_3.3V
DSP
RMC
CN104
DSP MEM
(Page2-15)
(Page2-19)
DMACKDIORDIOWDMARQ 3.3V CFBVD2 CFBVD1 CFRDY XCFWAIT
W
1 REG_3.1V 2 REG_3.1V
W/B
XCFWAIT CFRDY CFBVD1 CFBVD2
3 GND 4 GND 5 ZOOM_SW 6 ZOOM_SW
ZOOM UNIT
(Page2-28)
TG2_RST
ANA_RST ANA_IN ANA_CS OSD_CS OSD_VD PSCTL
FLSH_RST
T
SDR_DQ31 SDR_DQ30 SDR_DQ29 SDR_DQ28 SDR_DQ27 SDR_DQ26 SDR_DQ25 SDR_DQ24 SDR_DQ23 SDR_DQ22 SDR_DQ21 SDR_DQ20 SDR_DQ19 SDR_DQ18 SDR_DQ17 SDR_DQ16 SDR_DQ15 SDR_DQ14 SDR_DQ13 SDR_DQ12 SDR_DQ11 SDR_DQ10 SDR_DQ9 SDR_DQ8 SDR_DQ7 SDR_DQ6 SDR_DQ5 SDR_DQ4 SDR_DQ3 SDR_DQ2 SDR_DQ1 SDR_DQ0 SDR_DQM3 SDR_DQM2 SDR_DQM1 SDR_DQM0 SDR_WE SDR_CAS SDR_RAS SDR_CSO SDR_BA1 SDR_BAO SDR_CKE SDR_CLK SDR_A10 SDR_A9 SDR_A8 SDR_A7 SDR_A6 SDR_A5 SDR_A4 SDR_A3 SDR_A2 SDR_A1 SDR_A0 SDR_A11 SDR_A12 XPMCS7 PMA16 PMA17 PMA18 PMA19 PMA20 PMA21 SDR_VDD SCPU_CS SCPU_SCK SCPU_SI SCPU_SO V27_OUT TVSEL EEPRM_DO EEPRM_DI EEPRM_CK EEPRM_CS SYSSEL0 SYSSEL1 AFE_RST ANA_CLK ANA_OUT DSP_RST PMA0 XPMWAIT BUZZER AUDIO_CS L_MUTE PD_L A_MUTE
SDR_DQ31 SDR_DQ30 SDR_DQ29 SDR_DQ28 SDR_DQ27 SDR_DQ26 SDR_DQ25 SDR_DQ24 SDR_DQ23 SDR_DQ22 SDR_DQ21 SDR_DQ20 SDR_DQ19 SDR_DQ18 SDR_DQ17 SDR_DQ16 SDR_DQ15 SDR_DQ14 SDR_DQ13 SDR_DQ12 SDR_DQ11 SDR_DQ10 SDR_DQ9 SDR_DQ8 SDR_DQ7 SDR_DQ6 SDR_DQ5 SDR_DQ4 SDR_DQ3 SDR_DQ2 SDR_DQ1 SDR_DQ0 SDR_DQM3 SDR_DQM2 SDR_DQM1 SDR_DQM0 SDR_WE SDR_CAS SDR_RAS SDR_CSO SDR_BA1 SDR_BA0 SDR_CKE SDR_CLK SDR_A10 SDR_A9 SDR_A8 SDR_A7 SDR_A6 SDR_A5 SDR_A4 SDR_A3 SDR_A2 SDR_A1 SDR_A0 SDR_A11 SDR_A12 XPMCS7 PMA16 PMA17 PMA18 PMA19 PMA20 PMA21 SDR_VDD
8
12 13
7
6
5
4
3
2
1
9
YTU94074-6 YTU94077-6
SDDAT3 SDCMD SDCLK SDDAT0 SDDAT1 SDDAT2 SDCD USBDP USBDN XUSB_DET XCFIOWR XCFIORD
11
LOCK
10 14
JVC
SD CARD
SD
CN111
SUB CPU
(Page2-7)
REG_3.1V GND AL_3.1V
8MB CU-SD008U ZEROG_H SJIG_RST ZGH_THRU ZGH_OUT SBD5 SBT5 VPP SJIG_TX SJIG_RX WORD
ARMTDO ARMTCK ARMTMS ARMTDI XARMTRST XJRESET NU_RX NU_TX MOD0
REG_2.5V
ZEROG_H
PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 PMD0 PMD1 PMD2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15 XPMWE XPMOE
PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 PMD0 PMD1 PMA2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15 XPMWE XPMOE
PMA12 PMA13 PMA14 PMA15
PS_ZEROG LIT_3V IR_RMC 3AAZEROG
CN110
PMA15 PMA14 PMA13 PMA12
DV2OUT7 DV2OUT6 DV2OUT5 DV2OUT4 DV2OUT3 DV2OUT2 DV2OUT1 DV2OUT0
REG_4.8V GND
DV1IN0 DV1IN1 DV1IN2 DV1IN3 DV1IN4 DV1IN5 DV1IN6 DV1IN7 DV1CLKIN XCINT XVOEN XPMCS0 MPEG_RST PLLSTOP
REG_3.1V REG_1.2V
0 1 MAIN
CN102
1
30
29
28
27
39
38
21
20
19
12
26
25
24
23
22
21
20
19
18
17
16
y10569001a_rev0.1
JIG CONNECTOR
18 GND
17 GND
15 GND
13 GND
10 CFA1
8 CFA0
7 CFA2
37 CFD7 GND
GND
36 CFD8
35 CFD6
34 CFD9
33 CFD5
31 CFD4
29 CFD3
27 CFD2
25 CFD1
23 CFD0
32 CFD10
30 CFD11
28 CFD12
26 CFD13
24 CFD14
22 CFD15
11 CFRDY
9 CFBVD1
6 XCFCE0
5 XCFCE1
4 CFBVD2
13 NC
NC
HRP
GND
GND
16 XCFIORD
14 XCFWAIT
40 CFRESET
15 SBT5 WORD
2 DRV_3.3V 3
7 MOD0
5 NU_TX
12 VDCVF
9 MON_B
10 MON_R
11 MON_G NC
6 SJIG_TX
1 ARMTDO
2 ARMTMS
SJIG_RST 8 NC
4 REG_3.1V
14 ZGH_THRU SBD5
NU_RX
ARMTDI
AL_3.1V
SJIG_RX
ARMTCK
XJRESET
3 XARMTRST
ZGH_OUT
YTU94105-40 YTU94077-40
DMARQ
DMACK/NC
/GROUND /NC /NC 1 2 /RESET3 4
/3.3V
/GROUND 21
/GROUND 23
/GROUND 26
/GROUND 28
/PDIAG- 32
/IOROY 27
/INTRQ 30
/DASP- 37
/DIOW- 24
/DIOR- 25
/DD10 10
/DD11 12
/DD12 14
/DD13 16
/DD14 18
/DD15 20
/CS0- 35
/CS1- 36
/DD7 5
/DD8 6
/DD6 7
/DD9 8
/DD5 9
/DD4 11
/DD3 13
/DD2 15
/DD1 17
/DD0 19
/DA1 31
/DA0 33
/DA2 34
22
29
38
39
40
HDD
TO HDD
TO ZOOM UNIT TO SPEAKER
1 2 CN109 QGA1001F1-02X 1mm_ML
1 2 3 4 5 6 CN104 QGF0508F1-06X 0.5mm_FPC_BOTTOM R111 R112 R113 R114 R115
3.3V 3.3V 3.3V DASPCS1CS0DA2 DA0 PDIAGDA1 INTRQ DMACKGROUND IORDY GROUND DIORDIOWGROUND DMARQ GROUND GROUND DD15 DD0 DD14 DD1 DD13 DD2 DD12 DD3 DD11 DD4 DD10 DD5 DD9 DD6 DD8 DD7 GROUND GROUND RESET1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 CN102 QGF0508F1-40X 0.5mm_FPC_BOTTOM 1k 47k 47k 47k 47k
0 1 MAIN(MAIN IF)
SPK+ SPKGND ZOOM_SW REG_3.1V
WIDE
TELE
MAIN(MAIN IF) SCHEMATIC DIAGRAM
0 0
TL111
TO AUDIO
L131 NQR0506-002X
TO DSP
TO DSP
USBDN USBDP
4 1
3 2
XCFWAIT
CFBVD2 XCFCE1 XCFCE0 CFA2 CFA0 CFBVD1 CFA1 CFRDY
TO SUB CPU
XCFIORD XCFIOWR
CFD15 CFD0 CFD14 CFD1 CFD13 CFD2 CFD12 CFD3 CFD11 CFD4 CFD10 CFD5 CFD9 CFD6 CFD8 CFD7
CFRESET
7 5 4 3 2 1 6
J101 QNZ0497-001
R116 R117
DRV_3.3V [2125] C111 T 47/6.3 GND
TO CN103
TO DSP
L111 SHORT
GND REG_3.1V R131 47k
TO DSP
XUSB_DET
Q131 DTC144EE-X
L171 NQR0129-002X REG_4.8V R172 1.5k IR_OUT W/B C172 T 10/6.3 Q171 RPM-22PB
TO OP DRV TO CN101,CN103
47k 47k 47k 47k 47k 47k 10k
GND
BL_POWER R165 OPEN R164 OPEN Q161 OPEN 3 5 4 R162 OPEN Q162 OPEN 2 1 R163 OPEN C162 OPEN R169 0 6
R141 R142 R143 R144 R145 R146 R147
IC171
KSM-2003LN2E RMC SDDAT2 SDDAT3 SDCMD R171 0
OUT GND VCC
R148 R149
22 22
1 2 3
C142
0.1
C171 T 10/6.3 REG_3.1V GND
TO DSP
SDCLK SDDAT0 SDDAT1 SDCD SDWP L141 NQR0129-002X R150 R151 22 22
10 CARD_DET
IR_RMC
TO SUB CPU
TO DSP,P.PRCS
5
4
5
4
TO SUB CPU
PS_ZEROG
C141 T 10/6.3 REG_3.1V GND L121 SHORT C122 0.1
1 2 3
1 2 3 D141 D142 OPEN OPEN
11 TERMINAL 12 WP_SW 13 GND
9 1 2 3 4 5 6 7 8
SD_DATA2 SD_DATA3 SD_CMD VSS(GND) VDD(DSC_3V) SD_CLK VSS2 SD_DATA0 SD_DATA1
GND 14
R161 OPEN
TO V I/O,TG133
REG+CCD
TO SD
CN111 NNZ0134-001X GND
C161 OPEN [2125]
TO OPERATION (CN401)
CN101 QGF0547C2-45X 0.5mm_FPC_VERTICAL
TO REAR (CN6001)
CN103 QGF0508F1-45X 0.5mm_FPC_BOTTOM
NC DVCC VREF AVCC GND STBYB
TO CN103, CN110, SUB CPU
AL_3.1V GND
C121 OPEN [2125]
23 15 14 13 12 11
TO AUDIO TO SUB CPU TO V I/O
NC NC NC NC NC AOX 22 10 9 8 7 6 ! R191 1k AL_3.1V
3AAZEROG
16 17 18 19 20 24
GND GND GND ZeroG DGND NC
IC121
NAL0035-001X
3
TO SUB CPU TO V I/O
AU_SIG/L AU_SIG/R P_DET V_OUT C_OUT S_DET Y_OUT POFF_SW PLAY_SW REC_SW CHRG_LED ACES_LED KEY_C INFO_SW SET_SW KEY_A P_MEDIA LCD_OPEN SJIG_RST LAMP_ON GND
TO SUB CPU
LIT_3V
1 RB715W-X D191 !
2
1 2 3 4 5 21
TO SUB CPU
TO CN103,CN110,SUB CPU TO P.PRCS
TO CN110,V I/O TO CN103,CDS,TG133
SYMBOL NO. 101~ LAST NO. VACANT NO. CN 111 105,106,108 J 101 SYMBOL NO. 161~ LAST NO. VACANT NO. Q 162 166168 R 169 C 162 SYMBOL NO. 191~ LAST NO. VACANT NO. D 191 R 198 192195
TO DSP
TO AUDIO
HRP REG_3.1V CAM_3.1V REG_4.8V
R166 R167
OPEN 0
TO CN103 TO CN110,V I/O TO V I/O TO CN110,V I/O TO SUB CPU TO SUB CPU,AUDIO,V I/O TO SUB CPU
R196
R197
R198
CN107 QGA1001F1-04X 1mm_ML 4 3 2 1 1
16 2
17 3
18 4
19 5
20 6
21 7
22 8
23 9
24 10
25 11
26 12
27 13
28 14
29 15
30
CN110 QGB0512L1-30X 0.5mm_BtoB
BL_POWER MON_B MON_G MON_R HDCVF VDCVF LCD_CTL ANA_CLK ANA_OUT LCD_CS LCD_RVS
INT_L INT_GND
INT_R
0
0
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
AU_SIG/L AU_SIG/R P_DET V_OUT C_OUT S_DET Y_OUT LITHIUM POFF_SW PLAY_SW REC_SW CHRG_LED ACES_LED KEY_C INFO_SW SET_SW KEY_A P_MEDIA LCD_OPEN RESET_SW LAMP_ON GND(BL/LED) GND(BL/LED) GND(BL/LED) GND GND GND GND HRP REG_3.1V REG_3.1V REG_4.8V(SIG) REG_4.8V(BL/LED) REG_4.8V(BL/LED) BL_POWER MON_B MON_G MON_R HDCVF VDCVF LCD_CTL ANA_CLK
TO CN101 TO SUB CPU TO MPEG2,V I/O, DSP MEM TO SUB CPU TO CN110,SUB CPU TO SUB CPU TO CN102 TO SUB CPU TO DSP TO SUB CPU
BL_POWER UNREGCHK I_MTR V_BATT REG_2.5V CLK_OUT AL_3.1V REG_CS DRV_3.3V
DC_CHEK REG_1.2V
D_BATT GND
TO SUB CPU
TO SUB CPU
TO SUB CPU TO MPEG2,P.PRCS TO SUB CPU TO OP DRV TO SUB CPU TO CN101,CDS,TG133 TO SUB CPU
T_BATT REG_1.5V
ADP_L REG_4.8V M_REG4.8 L161 NQL38DK-100X CHRG_EVR CAM_3.1V DATA_OUT REG_3.1V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
BL_POWER UNREGCHK I_MTR V_BATT REG_2.5V REG_2.5V CLK_OUT AL_3.1V AL_3.1V REG_CS DRV_3.3V DRV_3.3V DRV_3.3V DC_CHEK REG_1.2V REG_1.2V REG_1.2V D_BATT GND GND GND GND GND GND GND GND GND T_BATT REG_1.5V REG_1.5V REG_1.5V ADP_L REG_4.8V REG_4.8V REG_4.8V CHRG_EVR CAM_3.1V CAM_3.1V DATA_OUT REG_3.1V REG_3.1V REG_3.1V
GND Tout AGND AOZ AOY NC
TO DSP TO CN101,CN103,SUB CPU
TO DSP TO CN103,SUB CPU
ARMTDO ARMTCK ARMTMS ARMTDI XARMTRST XJRESET REG_3.1V NU_RX NU_TX AL_3.1V SJIG_TX SJIG_RX MOD0 SJIG_RST
TO CN101,V I/O
ZGH_OUT ZGH_THRU SBD5 SBT5 WORD
MON_G
GND MON_B HRP MON_R
VDCVF
43 ANA_OUT 44 LCD_CS 45 LCD_RVS
TO CN101,110,SUB CPU TO CN105,TG133 TO SUB CPU
SJIG_RST REG-CCD KEY_B
43 SJIG_RST 44 REG-CCD 45 KEY_B
TO INT MIC
TO JIG CONNECTOR
y10558001a_rev0.1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
(No.YF110)2-5
2-6(No.YF110)
MAIN(SUB CPU) SCHEMATIC DIAGRAM
C1034 0.01 R1074 10k TC75S56FU-X
VSS
R1072 82k
R1075 100k
TO MAIN IF (CN101) TO MAIN IF (CN103,110)
LIT_3V REG_3.1V
L1001 NQR0129-002x
1
2
C1004 0.1
GND
R1001 100k
IC1002
RS5C314-X CS CLK SIO VSS VDD XIN XOUT INTR
1 8
R1063 47k R1064 1k DBATT
S-80827CNNB-G-W
TO MAIN IF(CN103)
D_BATT V_BATT T_BATT I_MTR DC_CHEK ADP_L
2
3
4
100k R1070 T_BATT BATT_H PS_ZEROG ZGH_OUT AVREF_OF SYSSEL0 SYSSEL1 ZGH_THRU ANA_OUT V27_OUT SETSW PDET DBATT SBD5 AVREF_OF SBT5
ADP_L
CHRG_EVR REG_CS
2.2K
REG_CS
CLK_OUT
2.2K
R1004 R1005 2.2K
FLSH_RST
ANA_IN
C1043 0.01
TO MAIN IF(CN103)
UNREGCHK SBD5
R1003
R1069
TO MAIN IF(CN103)
3
CHRG_EVR
VSS
4
100k
DC_CHEK
5
I_MTR
IC1003
C1025 0.1
6
T_BATT
OUT
DET
7
V_BATT
2
1
NAX0564-001X X1002 C1006 8p
R1073 62k
R1076 100k
AL_3.1V
L1002 10u
[+]
[-]
3
T C1005 10/6.3
R1077 1M
IC1007
0 1 MAIN(SUB CPU)
5
VDD
4
OUT
UNREGCHK SBD5 SBT5 ZGH_THRU ZGH_OUT
R1036 OPEN
R1046 OPEN S 3 G 2 D 1 Q1005 2SJ347-X
PDET
R1037 1k R1045 1k
TO MAIN IF(CN101)
P_DET
TO MAIN IF (CN110)
SBT5 ZGH_THRU ZGH_OUT
TL1088
SDET
S_DET
0R0
0R0
TO MAIN IF (CN101,CN103,CN110)
SJIG_RST SJIG_RX
R1084
R1015 OPEN
0.01
0.01
0.01
0.01
0.01
0.01
0.01
VSS
MODE
AVSS
SBT5
VDD
KENTO
D_BATT
ZGH_OUT
PS_ZEROG
AVREF_OF
ANA_OUT
FLSH_RST
RESERVED
RESERVED
RESERVED
C1008
C1013
C1014
C1015
C1016
C1017
C1018
2
ANA_CLK
4
C1020
WORD
1 5
RESERVED
ZDH_THRU
V27_OUT
SET_SW
ANA_IN
VREF+
P_DET
VREF-
SBD5
AVDD
TO MAIN IF (CN110)
0.01
SJIG_TX
72 71
27
49 95
88
74 73 92 25
100 99 98 18 37 11
8
R1085
D1002 1SS376-X
R1007 4.7k
7 59 57 61 66 34 43 54
C1045 0.01
70 55 56
I_MTR 45
I_MTR
R1014 OPEN
R1006 4.7k D1003 OPEN
3
IC1004
SN74AHC1G08DC-X 74AHC1G08GW-X
EEPRM_CS SCPU_SO SCPU_SI SCPU_SCK
97 EEP_CS 51 SCPU_IN 52 SCPU_OUT 50 SCPU_CLK 68 DATA_IN 69 DATA_OUT 67 CLK_OUT
ANA_CLK RXD TXD KEY_C 46 KEY_B 64 KEY_A 63 KEY_CCH KEY_BCH KEY_ACH R1068 100k SYSSEL0 SYSSEL1 TVSEL SCPU_CS SCPU_SCK ZOOM_SW 47 UNREGCHK 62 T_BATT 44 R1065 1k ZOOMSW UNREGCHK T_BATT SCPU_SO SCPU_SI EEPRM_CS EEPRM_CK EEPRM_DO EEPRM_DI
TO P.PRCS
SYSSEL0 SYSSEL1 TVSEL SCPU_CS SCPU_SCK SCPU_SO SCPU_SI EEPRM_CS EEPRM_CK EEPRM_DO EEPRM_DI AFE_RST
R1016 2.2k
Q1004 2SC5658/ QRS/-X
TO MAIN IF(CN103)
DATA_OUT
TO MAIN IF(CN101), AUDIO,V I/O
ANA_CLK ANA_OUT LCD_CS
SCPU_CS
C1026 0.1
79 SCPU_CS
ANA_CLK ANA_OUT LCD_CS
22 VDD
TO MAIN IF (CN101)
LCD_CTL
LCD_CTL
C1044 0.01 28 RTC_CS REG_CS
4 3
V_BATT 65
V_BATT R1071 100k
1
REG_CS
V27_OUT
V27_OUT
2
TG2_RST
TO TG133
TG2_RST
OSD_CS
IC1001
39 OSD_CS 14 EEP_IN 15 EEP_OUT 13 EEP_CLK 9 ANA_CS NT_PAL 48 AFE_RST 16 TVSEL MN102H60GJA RTC_INT 96
R1043 100k
5
1
IC1005
TO MAIN IF(CN101), AUDIO,V I/O
ANA_CLK ANA_OUT AUDIO_CS L_MUTE A_MUTE SN74AHC1G04DC-X 74AHC1G04GW-X ANA_CLK ANA_OUT AUDIO_CS L_MUTE A_MUTE Q1002 2SC4617/QR/-X R1052 18k R1053 150k R1051 2.7k 3 1 D1001 DA221-X 2
EEPRM_DI EEPRM_DO EEPRM_CK ANA_CS
FLSH_RST
TO DSP MEM
FLSH_RST
TO DSP
ZEROG_H
93 BZ_FREQ 94 BZ_ENV ANA_RST DSP_RST 29 ZEROG_H 26 90 ANA_RST CHRGLED 81 ACESLED 60 ZEROG_H CHRGLED ACESLED IR_RMC C1001 0.1 R1086 0R0
TO V I/O,DSP
DSP_RST
TO AUDIO
PD_L BUZZER PD_L R1055 10k Q1003 DTA124EE-X CHRGLED R1056 4.7k LCD_CS C1046 0.1 LCDRVS 2 LCD_CS Q1001 DTC124EE-X R1054 47k C1031 1 TG2_RST 10 SYTG_RST
REMOTE 58
TO MAIN IF (CN101)
CHRG_LED R1009 680
VDD 83 3AAZEROG 53 ZEROZINT 77 OSD_VD 78 ADP_L 36 BATT_H 80 LCD_OPEN 33 6 LCD_RVS
MODE_SW/P_MEDIA
3AAZEROG
OSD_CS
TO V I/O
OSD_CS OSD_VD
R1066
1k
ADP_L BATT_H MONI_SW INFOSW
17 VDD
INFO_SW 38 JLIP_INT 76 NMI 75
RESERVED AUDIO_CS FAN_CTL2 FAN_CTL1
TO MAIN IF(IC121)
3AAZEROG PS_ZEROG 3AAZEROG
CHRG_EVR
PS_ZEROG
PSCTL
84 PS_CTL
DIAL_REC DIAL_OFF DIAL_PB LCD_BL S_DET
DC_CHEK
A_MUTE
L_MUTE
RESET
WORD
OSCO
PD_L
OSCI
VSS
XO
XI
ANA_RST ANA_CS ANA_CLK
TO V I/O
ANA_RST ANA_CS ANA_CLK ANA_OUT ANA_IN PSCTL
91
89 31 32 30
5 35
42
12 82 19 20 21 24 23
40 86
87
85
4 41
3
100k
100k
100k
100k
100k
100k
100k
100k
ANA_OUT ANA_IN PSCTL
TO MAIN IF (CN101), V I/O, AUDIO TO V I/O
R1057
R1058
R1059
R1060
R1061
R1062
R1082
R1083
TO MAIN IF(CN101)
LCD_OPEN LCD_RVS
R1017 R1018
1k 1k
MONI_SW LCDRVS
ACES_LED
R1020
1K
ACESLED
PLAY_SW POFF_SW REC_SW P_MEDIA SET_SW
R1022 R1023 R1024 R1025 R1019
1k 1k 1k 1k 1k
DIAL_PB DIAL_OFF
CHRG_EVR DIAL_REC DIAL_OFF
3
2
1
AUDIO_CS
DC_CHEK
DIAL_REC
LCD_CTL DIAL_PB
A_MUTE
TL1031
PMEDIA
PMEDIA SETSW
L_MUTE
SDET
X1001 NAX0784-001X
TO MAIN IF(CN104) ZOOM_SW TO MAIN IF (CN101) KEY_A TO MAIN IF KEY_B (CN103) KEY_C TO MAIN IF INFO_SW (CN101) TO MAIN IF(RMC)
IR_RMC
R1028 R1029 R1030 R1031 R1008
1k 1k 1k 1k 1K
ZOOMSW KEY_ACH KEY_BCH KEY_CCH INFOSW
IR_RMC
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
PD_L
y10563001a_rev0.1
(No.YF110)2-7
2-8(No.YF110)
MAIN(AUDIO) SCHEMATIC DIAGRAM 0 1 MAIN(AUDIO)
L2401 10u Q2401 2SC4617/QR/-X Q2403 2SC4617/QR/-X REG_4.8V REG_3.1V R2401 4.7k R2402 4.7k GND
C2401 10/6.3
T
R2408 OPEN
C2404 10/6.3
T
R2403 18k
C2402 10/6.3
T
R2202 560k
TO P.PRCS
S_SHUT
R2203 C2223 0.1 39k
C2224 0.1
C2204 1 29 HVCM
R2204 150k
C2202 1
C2203 1
C2405 0.1
36 BEEP1 C2624 10p
35 BEEP2
34 MIN
33 MOUT
32 VCOM
31 AVDD
30 AGND
C2205 1 28 MUTET
27 HVDD
26 HPR
25 HPL
R2610 22k 37 C2612 1 R2608 2.2k 38 C2656 0.047 39 L2603 NQR0269-013X C2606 0.0047 C2604 0.022 40 INTR LOUT1 21 EXTR LIN1 22 PRENR ROUT1 23 PREOR RIN1 24
C2214 1 R2207 C2210 1 C2213 1 R2206 C2209 1 33k 33k
R2209 22k R2211 820 R2208 22k R2210 820
TO MAIN IF(CN101)
AU_SIG/R AU_SIG/L
R2233 560k
R2234 560k
TO INT MIC (CN107)
INT_R INT_GND INT_GND INT_L L2602 NQR0269-013X
41 C2602 OPEN R2602 2.2k 42
MGND
DVSS 20
3 5 4
6 2 1 Q2202 UMX18N-W
T
MVDD
IC2201
AK4660VQ
C2406 10/6.3
R2235 3.3k
R2407 10
DVDD 19
43 C2601 OPEN R2601 2.2k C2613 1 44 C2603 0.022 45 C2605 0.0047 C2611 1 R2607 2.2k 47 R2609 22k 48 C2623 10p C2655 0.047 46
MPWR
LRCK2 18
R2241 100k
MRF
MCLK2 17
L2601 NQR0269-013X
INTL
BCLK2 16
TO MPEG2
AIBD AOBD R2217 10 AIOLRCK AOMCLK AIOBCK
EXTL
SDTI2 15
PRENL
SDTO1/SDTO2 14
PREOL MCLK1
SDTI1 13
LRCK1
BCLK1
SGND
MUTE
SVDD
1
2
3
4
5
6
7
8
9
10
11
12
TO SPEAKER (CN109)
SPK+ SPKC2235 OPEN C2233 OPEN
CCLK
SPK+
SPK-
CDTI
PDN
CSN
C2229 OPEN
TO SUB CPU
BUZZER ANA_CLK AUDIO_CS ANA_OUT L_MUTE PD_L A_MUTE
TO MAIN IF(CN101), SUB CPU,V I/O TO SUB CPU TO MAIN IF(CN101), SUB CPU,V I/O TO SUB CPU
R2212 2.7 C2217 0.1
R2213 2.7
C2403 10/6.3 C2218 0.1
L2402 10u T
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
y20385001a_rev0.1
(No.YF110) 2-9
2-10(No.YF110)
MAIN(MPEG2) SCHEMATIC DIAGRAM
10k
R3038 OPEN
10k
R3030 4.7k
R3029 4.7k
0 1 MAIN(MPEG2)
R3021 4.7k
OPEN R3018
R3016
TO P.PRCS
CLK27B
R3039 0
R3037 OPEN R3041 0
R3017
R3019
OPEN
C3017
OPEN
0
C3018 OPEN
TO DSP
MPEG_RST PLLSTOP
C3016 0.1 L3001 NQR0129-002X
C3015 0.01
C3014 0.1
C3013 0.01
C3012 0.1
C3011 0.01
C3010 0.1
TO DSP
R3014 0 0 XCINT XCACK XCREQ XPMWAIT XPMOE XPMWE R3015
R3020
TO P.PRCS TO DSP,P.PRCS TO P.PRCS,DSP,DSP MEM TO DSP
4.7k
4.7k
4.7k
47k
10k
10k
10k
10k
10k
10k
10k
R3036
R3035
R3034
R3033
R3032
R3031
R3028
R3027
R3026
R3025
R3024
R3023
R3022
L3002 NQR0154-003X
C3002 OPEN [2125]
10k
10k
XPMCS0 PMD15 PMD14 PMD13 PMD12 PMD11 PMD10 CD9 130 CD8 197 CD7 131 CD6 57 CD5 58 CD4 132 CD3 59 CD2 133 CD1 60 CD0 135 CA15 118 CA14 187 CA13 44 CA12 119 CA11 45 CA10 188 CA9 120 CA8 46 CA7 47 CA6 122 CA5 48 CA4 190 CA3 123 CA2 191 CA1 49 CA0 124 HMODE2 36 HMODE1 113 HMODE0 35 MDQM 94 MWE 15 MCAS 164 MRAS 93 MCS 92 MCLKE 13 MCLK 14 MD31 7 MD30 85 MD29 157 MD28 MD26 MD24 6 5 4 MD27 84 MD25 83 MD23 81 MD22 80 MD21 MD20 1 2 R3013 100 MDQM XMWE XMCAS XMRAS XMCS MMCLKE MMCLK MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 MA13 MA12 MD21 MD22 MD23 MDQM MD19 MD20 MD17 MD18 MD16 MDQM XMWE XMCAS XMRAS XMCS MA13 MA12 MA10 MA0 MA1 MA2 MA3 C3022 0.001 TL3008 TL3009 TL3003 TL3004 TL3005 TL3006 TL3007 MD7 MD5 MD6 MD3 MD4 MD1 MD2 C3020 0.01 MD0 TL3002 46 VDD 75 DQO 5 VDDQ 58 DQ1 90 DQ2 3 VSSQ 73 DQ3 89 DQ4 11 VDDQ 72 DQ5 57 DQ6 4 VSSQ 71 DQ7 56 VDD 85 DQMO 70 WE_ 55 CAS_ 84 RAS_ 69 CS_ 54 BA0 68 BA1 52 A10/AP 67 A0 82 A1 51 A2 36 A3 60 VDD 81 VDD 65 DQ16 29 VDDQ 49 DQ17 64 DQ18 32 VSSQ 77 DQ19 63 DQ20 59 VDDQ 76 DQ21 48 DQ22 44 VSSQ 61 DQ23 87 VDDQ 66 DQM2 40 NC C3023 0.1 50 NC 88 VDDQ VSS 6 DQ15 30 VSSQ 12 DQ14 43 DQ13 15 VDDQ 17 DQ12 28 DQ11 14 VSSQ 13 DQ10 27 DQ9 42 VDDQ 47 DQ8 26 VSS 31 NC 25 DQM1 10 CLK 9 CKE 24 NC 38 A11 83 A9 39 A8 23 A7 8 A6 37 A5 22 A4 7 VSS 45 VSS 41 DQ31 20 VSSQ 62 DQ30 34 DQ29 19 VDDQ 78 DQ28 2 DQ27 18 VSSQ 74 DQ26 1 DQ25 33 VDDQ 79 DQ24 16 VSSQ 80 NC 35 DQM3 21 NC 53 VSSQ 86 MDQM C3024 0.01 MD24 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MDQM MMCLK MMCLKE MA11 MA9 MA8 MA7 MA6 MA5 MA4 C3021 0.1 MD8 MD15 MD14 MD13 MD12 MD11 MD10 MD9 K4S28323LF-HN75 PMD9 PMD8 PMD7 PMD6 PMD5 PMD4 PMD3 PMD2 PMD1 PMD0 PMA15 PMA14 PMA13 PMA12 PMA11 PMA10 PMA9 PMA8 PMA7 PMA6 PMA5 PMA4 PMA3 PMA2 PMA1 PMA0
XCWAIT XCWE XCINT XCRE XCCS CD15 CD14 CD13 CD12 CD11 XCACK1 XCREQ1 XCACK0 XCREQ0 CD10
C3001 OPEN [2125]
265 216 271 268 262 255 156 158 224 226 232 171 234 239 242 251 247 198 270 269 264 261 233 237 240 241 243 112 34 111 33 179 110 182 37 114 116 115 38 209 210 72 42 186 134 117 43 189 121 192 195 56 144 127 245 194 126 193 51 52 125 50 39 53 128 196 54 129 55
[10kPup] XGNT PSTOP GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 JMOD PWM [OPEN] XREQ [OPEN] XPME [GND] IDSEL STCLK VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 [4.7kPup] NDO/JTDO [4.7kPup] NDI/JTDI [10kPup]XCBE3 [10kPup]XCBE2 [10kPup]XCBE1 [4.7kPup] NMOD/JTMS [47kPup] XNRST/XJTRST [4.7kPup] NCLK/JTCLK [10kPup] XCLKRUN [10kPup]XCBE0 [GND] PCICLK [Pup] CB16 XRESET
C3005 0.1 217 VDDR 273 VDDR 219 VDDR C3006 0.01 221 VDDR 222 VDDR 225 VDDR 227 VDDR 230 VDDR 169 VDDR
TO DSP,DSP MEM,P.PRCS
TO MAIN IF(CN103), V I/O,DSP MEM TO MAIN IF(CN103), P.PRCS
REG_3.1V REG_2.5V REG_1.5V GND
C3003 OPEN [2125]
C3007 0.01
199 VDDH 256 VDDH 254 VDDH 252 VDDH
TO DSP,DSP MEM
C3008 0.1
248 VDDH 246 VDDH 249 GND 61 GND 62 GND 201 GND 202 GND 214 GND 215 GND 263 GND 267 GND 236 GND 231 GND 180 GND 184 GND 181 GND 260 GND 266 GND
TO DSP,DSP MEM,P.PRCS
TO DSP,P.PRCS
IC3002
TO V I/O
MPGFLD MPGHSYNC MPGVSYNC VI0 VI1 VI2 VI3 VI4 VI5 VI6 VI7
MPGFLD MPGHSYNC MPGVSYNC VI0 VI1 VI2 VI3 VI4 VI5 VI6 VI7
258 GND 218 GND 223 GND 250 GND 229 GND 244 GND 238 GND 235 GND 272 GND 155 GND 220 GND 160 GND 163 GND 228 GND 168 GND 170 GND 259 GND 200 GND 257 GND 253 GND 185 GND 208 GND 71 GND 79 GND 212 GND 178 GND 147 PVDD C3004 10/6.3 C3009 0.1 T R3001 10k 183 CSCLK [10kPup] 40 CSDI [10kPup] R3002 10k R3047 0
VIHSYNC [GND] VIVSYNC [GND]
IC3001
UPD61152F1-A03
MD19 154 MD18 153 MD17 3 MD16 82 MD15 100 MD14 22 MD13 99 MD12 21 MD11 20 MD10 98 MD9 19 MD8 97 MD7 16 MD6 165 MD5 95 MD4 17 MD3 166 MD2 96
SOVLD/SORDY [OPEN] SOCLK/SOSTB [OPEN]
TO DSP
DV1IN0 DV1IN1 DV1IN2 DV1IN3 DV1IN4 DV1IN5 DV1IN6 DV1IN7 DV1CLKIN XVOEN
1 2 RA3001 3 100 4 1 2 RA3002 3 100 4 R3040
8 7 6 5 8 7 6 5 100
VO0 VO1 VO2 VO3 VO4 VO5 VO6 VO7 VOCLK XVOEN
L3005 NQR0006-001X
73 PVDD 146 PGND 145 PGND
41 CSDO [OPEN]
SICLK/SISTB [GND] VIFLD/VIVLD [GND]
MD1 18 MD0 167
XSOEN [OPEN]
VOVSYNC [10kPup]
VOHSYNC [10kPup]
AIOLRCK [10kPup]
AIOBCK [10kPup]
AIOBD [10kPup]
XSOREQ [GND]
SISYNC [GND]
AIMCLK [GND]
SIREQ [OPEN]
TO V I/O,DSP
SOSYNC [OPEN]
DV2CKOUT
MA13 10 MA12 88
MA10 MA11
SIVLD [GND]
SO0 [OPEN]
SO1 [OPEN]
SO2 [OPEN]
SO3 [OPEN]
SO5 [OPEN]
SO4 [OPEN]
SO6 [OPEN]
SO7 [OPEN]
SI0 [GND]
SI1 [GND]
SI3 [GND]
SI4 [GND]
SI5 [GND]
SI6 [GND]
SI7 [GND]
SI2 [GND]
AOMCLK
AILRCK
XVOEN
VOCLK
AIBCK
VICLK
AIBD
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
213 75 149 76 150 77 151 78 211 148 74 152 67 206 68 207 142 69 143 70 141 66 140 205 138 204 65 203 64 137 136 139 63 174 23 173 27 101 172 24 102 25 103 26 104 32 28 31 109 175 106 29 107 30 177 108 176 105 86 8 87 159 89 161 11 90 162 12 9 91
0 0 0 10 10 10 10
MPGHSYNC
MPGVSYNC
R3010
R3011
R3042
R3044
R3043
R3006
MPGFLD
TO AUDIO
TL3001 MA10
XVOEN
VOCLK
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
R3045
MA9
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
ATX
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
AIOLRCK AIOBCK AOBD AOMCLK
10k 10k 10k
MA11
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
AIBD
[128M FBGA]
L3006 OPEN R3012 10k C3019 47/4 L3007 NQR0129-002X
R3003 10k
R3004 10k
R3007 R3008 R3009
T
LAST NO. IC L R RA C 3002 3007 3047 3002 3024 3003,3004 3005,3046
VACANT NO.
y10562001a_rev0.1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
(No.YF110)2-11
2-12(No.YF110)
MAIN(V I/O) SCHEMATIC DIAGRAM
TO DSP
DV2OUT0 DV2OUT1 DV2OUT2 DV2OUT3 DV2OUT4 DV2OUT5 DV2OUT6 DV2OUT7
0 1 MAIN(V I/O)
R3220 0
TO MPEG2, DSP
DV2CKOUT
0.1
C3218 0.01
C3217
180 179 178 177 176 160 96 51 132 159 95 50 131 94 49 130 93 48 92 47 158 129 157 46 91 128 45 90 156 127 44 89 126 43 155 88 125 124 42 87 154 86 75 64 53
VSS VSS VSSQ VSSQ VSSQ VSS INV VCCQ VCCQ VCCQ VSSQ YSI7 YSI6 YSI5 YSI4 YSI3 YSI2 YSI1 YSI0 VCC INH VCCQ CSI7 CSI6 CSI5 CSI4 CSI3 CSI2 CSI1 CSI0 NC2 NC2 NC2 NC2 NC2 NC1 NC1 NC1 VDD(I/O) VDD(I/O) VDD(CORE) VDD(CORE) VDD(CORE) VDD(I/O) NC1
C3216
0.1
1 NC1 2 NC1 13 NC1 14 NC1 54 VSS 3 RST 97 CSO0 55 CSO1 133 CSO2 99 CSO3 4 YSO0 98 YSO1 134 YSO2 C3201 0.01 56 YSO3 5 VDD(I/O) 100 OUTH 135 OUTV 6 OUTH2 57 OUTV2 0 0.01 101 ZCNT(L:OUTV,OUTH=HiZ) 7 SDOUT 58 VDD(CORE) 102 VSS R3205 R3206 R3207 0 0 0 136 CLK 8 SDIN 59 SCLK 103 CS 9 VC0 60 VC1 137 VC2 104 VC3 10 BLK1 61 BLK2 138 BLK3 1 SCLK 2 CS 3 SIN 4 RST 5 VDD 6 SDR C3219 0.1 7 NC 8 EXD 9 TEST 10 GND HD 20 VD 19 VC0 18 VC1 17 VC2 16 BLKA 15 VC3 14 BLKB 13 TSTO 12 BLKC 11 R3208 100 11 HDOUT 62 VDOUT 105 CLKOSD 139 HDCVF 12 VDCVF 63 VSS 161 NC2 162 NC2 163 NC2 164 NC2
SCANMODE VDD(CORE)
NC2 175 NC2 174 NC2 173 NC2 172 NC2 171 VSS 85 VSS(8AD) 38 VDD(8AD) 123 CIN 84 VRH 37 VRL 153 VRM 122 VDD(8AD) 36 VSS(8AD) 83 VYIN 121 CLPY 82 IREF1 35 YCOUT 152 ABAR1 120 COMP1 34 YSOUT 81 VREF1 151 VSS(10DA) 80 VDD(10DA) 33 NC 119 NC 150 NC 32 NC 79 VSS(8DA) 118 VDD(8DA) 149 IREF2 31
CLK-OUT
TO MPEG2
VI0 VI1 VI2 VI3 VI4 VI5 VI6 VI7 MPGFLD MPGVSYNC MPGHSYNC 1 2 3 4 1 2 3 4 8 7 6 RA3201 5 10 8 7 6 RA3202 5 10
R3201
0
C3215 OPEN C3214 OPEN
C3213 OPEN C3212 R3215 SHORT 2.7k _0.5% C3211 C3210 C3209 1 0.1 2 0.1 6 R3216 820 _0.5% 3 R3217 820 _0.5% 8
GND
R3202 TL3201 0 R3203 TL3202 0 R3204 C3202
R3218 1.5k
R3219 1.5k Q3201 UMT1N-W 4 5
IC3201
JCP8075
1
C3707 1 C3708 1 7
Y-IN
TO P.PRCS
OUTV2
C3706 0.01
C3705 0.01
R3704 68 _0.5%
6
RIP-FIL
5
C-IN
4
C-MUTE-CTL
3
C-OUT
2
P-SAV-CTL
1
S_CTL
R3214 2.7k _0.5% C3208 1
IC3701
LA73076V-X
VCC_NVG
R3705 10k
TO MAIN IF(CN101)
C_OUT Y_OUT
MIX-OUT
CBOUT 77 VREF2 116 COUT 147 VDD(8DA) 115 VSS(8DA) 30 SCANI3 29 VDD(CORE) 76 NC1 52 NC1 41 NC1 40
VDD(CORE) VDD(CORE) ADDATEST
9 C3207 0.01 C3206 0.1 L3701 10µ
10
ND
COMP2 148
11
12
13
14
15
16
A-GND
Y-OUT
-VCC
MB90099PFV137EX
ABAR2 117
VCC_A
IC3202
CROUT 78
V_OUT
R3703 68 _0.5%
C3702 2.2
R3702 68 _0.5%
L3702 10µ C3709 T 10/6.3 C3701 T 10/6.3 C3703 4.7 C3704 0.1 C3710 0.1
TO SUB CPU
ANA_RST ANA_IN ANA_OUT
165 NC2
VDD(I/O) CSYNC
NC2 39
SCANI1 SCANI2 RESHD AMUTE RESVD
VDD(I/O)
VCC
VSS
VSS
VSS
NC1
NC1
NC1
NC1
NC2
NC2
NC2
NC2
ANA_CS
TO SUB CPU TO SUB CPU,DSP TO SUB CPU
OSD_CS OSD_VD DSP_RST PSCTL
R3209 0
15 26 27 28 106 107 140 65 16 141 66 17 108 67 18 142 109 19 68 143 110 20 69 144 21 70 111 71 22 112 145 23 146 72 25 24 73 113 114 74 166 167 168 169 170 6 2 1
0.01 0.01 0.1 0 TL3203 0
NC2
ANA_CLK
VDD(I/O)
IPTEST
WCSI0
WCSI1
WCSI2
WCSI3
MONI1
MONI2
WYSI0
WYSI1
WYSI2
WYSI3
WCLK
HRP1
HRP2
WINH
WINV
TO MAIN IF(CN101), SUB CPU,AUDIO
SDR_ONH
SCANEN
4 5 3 Q3701 BC847PN-X
C3203
C3204
C3205
R3210
R3211
R3212 18k _0.5%
R3213 12k _0.5%
R3707 2.2k
R3706 1.2k
L7851 SHORT L7801 SHORT R7801 36k L3201 NQR0129-002X C7852 0.01
R7805 12k _0.5%
R7810 12k _0.5%
R7815 12k _0.5%
6 2 R3222 33 [1608]
VOUT
3 5 Q7801 UMX1N-W 2
6
3 5 Q7802 UMX1N-W 2
6
3 5 Q7803 UMX1N-W
R7851 33k _0.5%
R7854 33k _0.5%
R7857 33k _0.5%
TO OP DRV
ASPECT
IC3204
R1100D251C-X
GND
C7801 OPEN
C7802 1/16
1
4
1
4
1
4
TO MAIN IF (CN101,110)
MON_G MON_R
R3221 100
VDD
C7804 1/16 R7804 2.2k _0.5% R7809 2.2k _0.5%
Q3202 2SC4617/QR/-X
C7805 1/16
1
2
3
R7814 2.2k _0.5%
MON_B C7806 1/16 HRP VDCVF HDCVF
C3220 4.7
L3203 SHORT C3225 1 C3224 1 C3227 1 L3206 SHORT C3230 OPEN [1608] R7803 620 _0.5% R7808 620 _0.5% R7813 620 _0.5% R7853 36k _0.5% R7802 8.2k R7807 8.2k R7812 C7803 1 8.2k R7817 8.2k R7856 36k _0.5% R7859 36k _0.5%
TO MAIN IF (CN101)
TO MAIN IF, TG133(CN105) TO MAIN IF(CN103), MPEG2,DSP MEM
REG+CCD REG_4.8V REG_3.1V REG_2.5V GND
SYMBOL NO. 3201~ LAST NO. IC Q L R RA C 3204 3202 3206 3222 3202 3230 32213223,3226,3228,3229 3202,3204,3205 3203 VACANT NO.
SYMBOL NO. 3701~ LAST NO. IC Q L R C 3701 3701 3702 3707 3710 3701 VACANT NO.
SYMBOL NO. 7801~ LAST NO. Q L R C 7803 7801 7817 7806 7806,7811,7816 VACANT NO.
SYMBOL NO. 7851~ LAST NO. L R C 7851 7859 7852 7852,7855,7858 7851 VACANT NO.
y10564001a_rev0.1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
(No.YF110)2-13
2-14(No.YF110)
TO MAIN IF(CN111) TO MAIN IF(CN111), P.PRCS
MAIN(DSP) SCHEMATIC DIAGRAM
TO P.PRCS TO MAIN IF (CN110) TO MPEG2
TO P.PRCS
SDR_DQ30 SDR_DQ28 SDR_DQ26 SDR_DQ25 SDR_DQ23 SDR_DQ22 SDR_DQ20 SDR_DQ19 SDR_DQ18 SDR_DQ13 SDR_DQ24 SDR_DQ21 SDR_DQ16 SDR_DQ29 SDR_DQ27 SDR_DQ31 SDR_DQ14 SDR_DQ12 SDR_DQ17 SDR_DQ15 SDR_DQ11 SDR_DQ10 SDR_DQ8 SDR_DQ9 SDR_DQ7 VLD_PIX PPRO10 PPRO11 PPRO7 PPRO2 PPRO9 PPRO6 PPRO5 PPRO4 PPRO8 PPRO3 PPRO1 PPRO0
TO DSP MEM
SDR_DQM3 SDR_DQM2 SDR_DQM1 SDR_DQM0 SDR_DQ6 SDR_DQ3 SDR_DQ5 SDR_DQ4 SDR_DQ2 SDR_RAS SDR_DQ1 SDR_DQ0 SDR_CAS SDR_CKE SDR_CS0 SDR_BA0 SDR_CLK SDR_BA1 SDR_A12 SDR_A11 SDR_A10 SDR_WE
TO MAIN IF (CN111)
SDDAT3 SDDAT2 SDDAT1 DV1CLKIN SDCMD SDDAT0 DV1IN7
TO MPEG2
DV1IN5 DV1IN4 DV1IN6 DV1IN3 DV1IN2 DV1IN1 DV1IN0
SDR_A5
SDR_A2
SDR_A1
SDR_A7
SDR_A9
SDR_A8
SDR_A6
SDR_A4
SDR_A3
SDR_A0
VDCPU
ID_LAT
SDCLK
PMINT
XCINT
MOD0
SDWP
SOF
SDCD
VCLK
C4036 OPEN R4035 47k R4034 47k R4033 OPEN
47 22
SDR_DQ31
SDR_DQ30
SDR_DQ29
SDR_DQ28
SDR_DQ27
SDR_DQ26
SDR_DQ25
SDR_DQ24
SDR_DQ23
SDR_DQ22
SDR_DQ21
SDR_DQ20
SDR_DQ19
SDR_DQ18
SDR_DQ17
SDR_DQ16
SDR_DQ15
SDR_DQ14
SDR_DQ13
SDR_DQ12
SDR_DQ11
SDR_DQ10
SDR_WE
SDR_BA1
SDR_DQM3
SDR_DQM2
SDR_DQM1
SDR_DQM0
SDR_BA0
SDR_A12
SDR_A11
SDR_CKE
SDR_CAS
SDR_RAS
SDR_DQ9
SDR_DQ8
SDR_DQ7
SDR_DQ6
SDR_DQ5
SDR_DQ4
SDR_DQ3
SDR_DQ2
SDR_DQ1
SDR_DQ0
SDR_A10
SDR_A9
SDR_A8
SDR_A7
SDR_A6
SDR_A5
SDR_A4
SDR_A3
SDR_A2
SDR_A1
TL4023
TL4022
TL4021
R4043 47k
TL4020
R4038
SDR_CLK
SDR_CS0
0
0
82
SDR_A0
0 1 MAIN(DSP)
TL4019
R4037 R4041 R4040 R4039 47
R4042 47k
AFESOF
AFEVPIX
GPIO5
GPIO4
GPIO3
GPIO2
GPIO6
XMWE
SDRAMBS1
SDRAMBS0
SDRAMCLKR
SDRAM_A12
SDRAM_A11
SDRAM_A10
SDRAMCLK
AFECLK
SDRAM_A9
SDRAM_D9
SDRAM_D8
SDRAM_D7
SDRAM_D6
SDRAM_D5
SDRAM_D4
SDRAM_D3
SDRAM_D2
SDRAM_D1
SDRAM_D0
SDRAM_D31
SDRAM_D30
SDRAM_D29
SDRAM_D28
SDRAM_D27
SDRAM_D26
SDRAM_D25
SDRAM_D24
SDRAM_D23
SDRAM_D22
SDRAM_D21
SDRAM_D20
SDRAM_D19
SDRAM_D18
SDRAM_D17
SDRAM_D16
SDRAM_D15
SDRAM_D14
SDRAM_D13
SDRAM_D12
SDRAM_D11
SDRAM_D10
SDRAM_A8
AFED11
AFED10
AFED9
AFED8
AFED7
AFED6
AFED5
AFED4
AFED3
AFED2
AFED1
AFED0
3CCDCLK
XMCS0
MCKE
DQM3
DQM2
DQM1
DQM0
XCAS
XRAS
DV1CLKOUT
SD_WP
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
SDRAM_A7
SDRAM_A6
SDRAM_A5
SDRAM_A4
SDRAM_A3
SDRAM_A2
SDRAM_A1
SDRAM_A0
DV1VSYNC
DV1CLKIN
SD_DAT3
SD_DAT2
SD_DAT1
SD_DAT0
VSS10
VSS9
VSS8
VSS6
VSS5
VSS4
VSS3
DV1HSYNC
SD_CMD
SD_CLK
DV1UV7
DV1UV6
DV1UV5
DV1UV4
DV1UV3
DV1UV2
DV1UV1
DV1UV0
SD_CD
VSS2
R4044 47k
145 144 75 77 201 140 71 299 254 74 143 204 73 142 203 256 72 141 202 255 300 37 180 117 46 283 236 181 118 47 284 237 182 119 48 285 238 183 286 239 184 121 326 287 240 185 122 51 288 241 186 123 52 289 231 41 112 175 42 279 232 40 176 113 50 49 235 282 45 116 179
234 281 178 233 280 43 114 177
66 196 135 199 295 252 138 197 250 65 294 297 68 137 198 251 296 67 136 249 104 374 373 372 371 370 343 391 390 389 388 369 342 392 399 398 387 368 341 120 393 400 397 386 367 340 394 395 396 385 366
R4036
381 382 383 384 365
360 361 362 363 364
XMCS3 38 XMCS2 39 GND for the digital core and I/O XMCS1 111
2 GPIO7
TO MPEG2
PLLSTOP
AFE Serial R4045 R4046 0 0 298 GPIO26 139 GPIO28 200 GPIO25 253 GPIO27 70 GPIO29 NuCORE AFE SSG
AFE Parallel Interface
SDRAM Interface
SD Interface
DV Portl 656+ IO
TO P.PRCS
SSGFLD
TO MPEG2
MPEG_RST
TL4024 0 R4047
TO DSP MEM
MVDD11 323 MVDD10 354 MVDD9 377 C4027 0.1 SDR_VDD
R4048
47k 47k 22 22 47k 22 47k
TO MAIN IF(CN102)
XCFWAIT CFRESET CFRDY XCFIOWR XCFIORD CFD0 CFD1 CFD2 CFD3 CFD4 CFD5 CFD6 CFD7 CFD8 CFD9 CFD10 CFD11 CFD12 CFD13 CFD14 CFD15 XCFCE0 XCFCE1
R4049 R4050 R4051 R4052 R4053 R4054
132 CFWP 195 XCFWE 128 XCFWAIT 187 CFRESET 58 XCFREG 134 CFRDY 292 XCFOE 133 XCFIOWR 248 XCFIORD 242 CFCSEL 193 CFD0 246 CFD1 291 CFD2 62 CFD3 131 CFD4 192 CFD5 245 CFD6 290 CFD7 61 CFD8 130 CFD9 191 CFD10 244 CFD11 60 CFD12 129 CFD13 190 CFD14 59 CFD15 194 XCFCE0 247 XCFCE1 64 XCFCD1 293 XCFCD2 63 CFBVD1 57 CFBVD2 56 CFA0 127 CFA1 55 CFA2 126 CFA3 189 CFA4 54 CFA5 125 CFA6 188 CFA7 243 CFA8 53 CFA9 124 CFA10
/GPIO14 /GPIO55 /DVCLK /GPIO15 /GPIO53 /GPIO52 /GPIO51 /GPIO(option) /DVVSYNC /DVHSYNC /GPIO56 /GPIO57 /GPIO58 /GPIO59 /GPIO60 /GPIO61 /GPIO62 /GPIO63 /DVINOUTY0 /DVINOUTY1 /DVINOUTY2 /DVINOUTY3 /DVINOUTY4 /DVINOUTY5 /DVINOUTY6 /DVINOUTY7 /GPIO48 /GPIO49 /GPIO47 /DV_SOF /GPIO46 /DVFIELD /DVINOUTUV0 /DVINOUTUV1 /DVINOUTUV2 /DVINOUTUV3 /DVINOUTUV4 /DVINOUTUV5 /DVINOUTUV6 /DVINOUTUV7 /DVDACK /DVUVSEL /DVVLD Power for TV encoder block :3.3V Power for I/O :3.3V DV1 ITU-R601 16bit OUT Power for memory interface :2.5V
MVDD8 324 MVDD7 355 MVDD6 378 MVDD5 325 MVDD4 356 MVDD3 379 MVDD2 357 MVDD1 380 VDD26 312 VDD25 311 VDD24 310 VDD23 267 VDD22 320 VDD21 351 VDD20 345 VDD19 344 VDD18 309 VDD17 266 VDD16 352 VDD15 375 VDD14 308 VDD13 265 VDD 158 C4022 0.1 C4023 0.001 C4024 0.01 C4002 T 10/6.3 C4025 0.1 C4026 0.01 C4001 T OPEN
L4003 NQR0129-002X
R4055 R4056 R4057 R4058 R4059 R4060 R4061 R4062 R4063 R4064 R4065 R4066 R4067 R4068 R4069 R4070 R4071 R4072 R4073 R4074 R4075
47k 220 220 220 220 220 220 220 220 220 220 220 220 220 220 220 220 22 22 47k 47k
IC4001
SIP1280ISD-DVA2
IC4001
SIP1280ISD-DVA2
VDD10 327 VDD9 358 VDD8 359 VDD7 302 VDD6 328 VDD5 329 VDD4 330 VDD3 335 VDD2 336 VDD1 301 AVDD5 259 AVDD4 208 AVDD3 258 AVDD2 207 AVDD1 257 AVDD0 206 AVSS10 205 AVSS9 150 AVSS8 149 AVSS7 148 AVSS6 147 C4019 0.1 C4020 0.001 C4021 0.01
CFBVD1 CFBVD2 CFA0 CFA1 CFA2 R4076 R4077 R4078 TL4025 TL4026 TL4027 TL4028 TL4029 TL4030 TL4031 TL4032 22 22 22
TL4033 TL4034 TL4035 TL4036
226 PWM0 169 PWM1 276 PWM2 168 PWM3
GND for TV encoder block
AVSS5 146 AVSS4 83 AVSS3 82 AVSS2 81 AVSS1 80 AVSS0 79 PLLDVDD2 277 PLLDVDD1 349 C4017 C4018 0.01 0.1 L4004 NQR0006-001X C4016 0.1 REG_3.1V PLLPVDD 350
PLL digital power :3.3V
TO TG133
CCD_CTL 86 GPIO31 Operating Mode 13 NC3 TL4037 89 NC4 214 GPIO39
AMBACLKIN
ETM Minimum SCANTEST Port
External Memory Bus
JTAG
DMA
USB
AC'97 Interface
to TCCS UART1
TV Encoder Digital Pins or GPIO TV Encoder Analog Pins
GPIO34/ZEBRASKIN
PLL analog power :3.3V
PLLAVDD2 278 PLLAVDD1 348 PLLDVSS2 318 PLLDVSS1 316 PLLPVSS 317 PLLAVSS2 319 PLLAVSS1 315
DBETRST
XAUDRESET/GPIO8 AUDBITCLK/GPIO9 AUDSYNC/GPIO10 GPIO33/XVRESET
PLL digital GND DV Part2 656+ IO PLL analog GND
DBETDO
AUDOUT/GPIO12 AUDIN/GPIO13 XRESETPERH TRACESYNC USBPHYCLK
GPIO32/PHASEERR
C4003 T 10/6.3
GPIO35/CSYNC
GPIO36/HSYNC
GPIO37/VSYNC
Power for the digital core :1.2V
DV2CLKOUT TVOUTCHR DV2HSYNC DV2VSYNC DV2CLKIN TVOUTG TVOUTR
XARMTRST
UART2RXD
TESTSCAN
TRACECLK
UART2TXD
USB4XCLK
DMASREQ
DMABREQ
AMBATDO
USBREXT
XPMWAIT
XPMBLS0
XPMBLS1
DBQACK
DMACLR
USBVDD
USBVDD
USBVDD
XPMCS7
XPMCS1
XPMCS0
USBVSS
USBVSS
USBVSS
USBVSS
TVOUTB
TVOUTY
XRESET
CVDD10
CVDD11
CVDD12
CVDD13
CVDD14
CVDD15
CVDD16
R4079 47k
R4080 0
115 44 31
217 15
12 87 157 153 263 212 269 220 163 98 25 270 221 164 99 26 271 222 165 100 27 272 223 166 101 28 273 224 19 20 94 21 160 95 22 218 161 96 23 268 219 162 97 24 17 93 18 91 16 159 92 88 215 90 14 216 156 1 76
69 275 30 103
L4006 SHORT
151 339 307 338 264 337 10 32 209 210 260 261 154 213 167 102 274 29 225 11 106 33 228 171 227 170 9
155 84 262 211 85 152 3 78 4
OPEN
5
6
7
8 110 36 172 229 109 174 35 108 173 230 34 107 334 333 332 331 303 304 305 306 376 353 322 321 346 347 313 314 105
6 RA4001 220 5 7 RA4002 220 6
CVDD17
DV2UV7
DV2UV6
DV2UV5
DV2UV4
DV2UV3
DV2UV2
DV2UV1
DV2UV0
MCLKIN
XPMWE
FSADJp
FSADJn
DBGRQ
GPIO24
GPIO11
GPIO41
GPIO40
GPIO43
GPIO42
VCLKIN
XPMOE
SCANE
CVDD1
CVDD2
CVDD3
CVDD4
CVDD5
CVDD6
CVDD7
CVDD8
CVDD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
USBDp
USBDn
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
GPIO0
GPIO1
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMA0
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
SIO0
SIO1
TMS
TCK
TDI
NC
L4005 NQR0154-003X
TO MAIN IF (CN103)
REG_1.2V
0
0
0
0
0
0
0
0
0
OPEN
100
TL4006
TL4007
TL4008
TL4009
TL4010
TL4017
TL4013
TL4014
TL4015
TL4002
TL4003
TL4012
R4001 100
TL4004
TL4005
R4009
R4010
R4008
R4012
R4014
R4007
R4013
R4011
R4015
C4007
C4008
C4009
R4005 47k C4034 0.1
R4006 47k
L4007 OPEN
R4022
TL4016
TL4018 8
47k
2.7k
47k
0.1
TL4001
TL4011
_0.5%
0.01
220
47k
47k
47k
0
0
47k
7
8
5
R4024
R4086
R4025
R4026
R4027
R4030
R4018
R4019
R4023
C4006 OPEN
1
2
3
4
1
2
3
4
T
C4035 OPEN
R4028 47k
R4029
R4031
C4010 0.1
C4011 0.001
C4012 0.01
C4013 0.1
C4014 0.001
C4015 0.01
D4001 OPEN
C4005 OPEN [2125]
C4004 T 47/4
GND DRV_3.3V
SN74AHC1G04DC-X
R4016
IC4002
C4029 1 Q4001 2SC4617/RS/-X
R1114N331B-X 1 VDD 2 GND 3 CE NC 4 VOUT 5
IC4003
REG_4.8V
L4008 SHORT
R4081 10
1k
1 2 3
5 4 R4084 4.7k C4028 0.01
10k
R4002 3.3k
R4003 0
R4017
R4020 47k
R4021 47k
4 VDD ENA 1
3 OUT GND 2
C4032 0.01
D4002 OPEN
R4085 OPEN
C4031 1
R4083 4.7k D4003 1SS376-X
TO MAIN IF (CN110)
NU_TX NU_RX
R4004 OPEN
X4001 NAX0710-001X
TO SUB CPU, V I/O
TO SUB CPU
TO MPEG2, P.PRCS
DMASREQ
DMABREQ
DSP_RST
XJRESET
DMACLR
PMD10
PMD13
PMD14
PMD11
PMA11
PMD12
PMA18
PMD15
PMA14
PMA15
PMA19
PMA16
PMA10
PMA12
PMA13
PMA17
PMA20
PMA21
XPMCS7
XPMCS1
TO MPEG2,V I/O
PMD6
PMD5
PMD0
PMD1
PMD2
PMD3
PMD4
PMD7
PMD8
PMD9
XUSB_DET
ZEROG_H
XARMTRST
ARMTMS
XPMWAIT
XPMBLS0
XPMBLS1
ARMTCK
ARMTDO
XPMCS0
FLDCPU
ARMTDI
XPMWE
CLK27A
USBDP
XPMOE
USBDN
PMA3
PMA5
PMA0
PMA1
PMA2
PMA6
PMA7
PMA4
PMA8
PMA9
DV2CKOUT
DV2OUT7
DV2OUT6
DV2OUT5
DV2OUT4
DV2OUT3
DV2OUT1
TO MPEG2
DV2OUT2
DV2OUT0
XVOEN
y10560001a_rev0.1
LAST NO. VACANT NO. 4001,4002 4032,4082 4030,4033 L R RA C 4008 4086 4002 4036
TO MAIN IF (CN110)
TO P.PRCS
TO MAIN IF (J101)
TO SUB CPU
TO P.PRCS
TO MPEG2,DSP MEM P.PRCS
TO MPEG2, TO DSP MEM DSP MEM
TO MPEG2,DSP MEM,P.PRCS
TO DSP MEM TO P.PRCS TO MPEG2 TO MPEG2, P.PRCS, DSP MEM TO P.PRCS TO MPEG2, P.PRCS
TO V I/O
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
(No.YF110)2-15
2-16(No.YF110)
MAIN(CDS) SCHEMATIC DIAGRAM 0 1 MAIN(CDS)
C4202
TO TG133
CDS_3V ADCLK PBLK SHP OBCLP R4208 SHD
3
CTL
2
GND
1
VIN VOUT
IC4202 (3.1V_REG)
MM3143BN-X
NOISE
4
5
C4217 0.1
C4216 22/6.3
L4202 10µ T
L4201 C4201 C4203 REG_4.8V GND
C4205 0.1
C4204 0.1
CAM_3.1V R4207 0
TO CCD(CN5001)
CN105 QGF0547C2-24X REG+CCD
AVSS 18 SPSIG 17 SPBLK 16 OBP 15 PBLK 14 DVDD 13
TO MAIN IF (CN101,CN103), TG133
ADCLK 12
DVSS 11
REG+CCD REG-CCD REG-CCD CCD_CTL GND GND GND CCD_OUT GND GND 11 GND RG H1 H2 SUB V1 V2 V3
C4218 #
C4206 0.1 6 7 8 9 10 C4207 1 C4208 1/16 C4209 # R4201 33k 12 C4210 0.1
19
DRDVDD 10
AVDD BLKSH BLKFB CDSIN BLKC BIAS AVDD AVSS ADCIN
D9 D8 D7
9
1 2 3 4 1 2 3 4
8 7 RA4201 6 10 5 8 7 RA4202 6 10 5
TO P.PRCS
ACHI9 ACHI8 ACHI7 ACHI6 ACHI5 ACHI4 ACHI3 ACHI2 ACHI1 ACHI0
20
21
22
IC4201
# (CDS/AGC/AD)
D6 D5 D4 D3 D2 D1
23
24
25
26
27
1
2
3
4
5
6
7
8
C4211 0.1
SDATA DVDD DVSS VRM VRB SCK VRT
R4205 10 R4206 10
CS
28
29
30
31
32
33
34
35
36
D0
V4 GND G_RST
C4219 #
TO P.PRCS, OP DRV,TG133
R4202
C4215 0.1
10 CAM_CLK 10 CAM_OUT 10 CDS_CS
R4203 R4204
P_GYAMP C4212 #
C4213 C4214 # # #:EXCHANGE PARTS LIST SYMBOL MEGA NonMEGA IC4201 HD49340HNP-X HD49340NP-X C4212 0.1 0.1 C4213 0.012 0.022 0.1 0.1 C4213 C4214 C4218 1 C4219 1 C4220 1
C4220 #
REG_3.1V
TO P.PRCS
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
y30330001a_rev0.1
(No.YF110)2-17
2-18(No.YF110)
MAIN(DSP MEM) SCHEMATIC DIAGRAM
L4301 NQR0129-002X PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 PMA12 PMA13 PMA14 PMA15 PMA16 PMA17 PMA18 PMA19 PMA20 PMD0 PMD1 PMD2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15 PMA21 XPMCS7 XPMWE XPMOE PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 PMA12 PMA13 PMA14 PMA15 PMA16 PMA17 PMA18 PMA19 PMA20 PMD0 PMD1 PMD2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15 PMA21 XPMCS7 XPMWE XPMOE
PMD11 PMD3 PMD10 PMD2 PMD9 PMD1 PMD8 PMD0 XPMOE
XPMCS7 PMA1
PMA17
PMD15 PMD7 PMD14 PMD6 PMD13 PMD5 PMD12 PMD4
C4301 4.7
TO MPEG2,DSP, P.PRCS
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
BYTE VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE VSS CE A0 A16
C4302 0.1
TO MPEG2,DSP
#
IC4301
A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE RESET NC WP/ACC RY/BY A18 A17 A7 A6 A5 A4 A3 A2 A1
TO DSP
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
PMA16 PMA15 PMA14 PMA13 PMA12 PMA11 PMA10 PMA9 PMA20 PMA21 XPMWE
PMA19 PMA18 PMA8 PMA7 PMA6 PMA5 PMA4 PMA3 PMA2
R4301 47k
TO MPEG2,DSP, P.PRCS
TO DSP TO MPEG2,DSP, P.PRCS
TO SUB CPU
FLSH_RST
L4302 OPEN L4303 NQR0154-003X C4304 4.7 SDR_A0 SDR_A1 SDR_A2 SDR_A3 SDR_A4 SDR_A5 SDR_A6 SDR_A7 SDR_A8 SDR_A9 SDR_A10 SDR_DQ0 SDR_DQ1 SDR_DQ2 SDR_DQ3 SDR_DQ4 SDR_DQ5 SDR_DQ6 SDR_DQ7 SDR_DQ8 SDR_DQ9 SDR_DQ10 SDR_DQ11 SDR_DQ12 SDR_DQ13 SDR_DQ14 SDR_DQ15 SDR_DQ16 SDR_DQ17 SDR_DQ18 SDR_DQ19 SDR_DQ20 SDR_DQ21 SDR_DQ22 SDR_DQ23 SDR_DQ24 SDR_DQ25 SDR_DQ26 SDR_DQ27 SDR_DQ28 SDR_DQ29 SDR_DQ30 SDR_DQ31 SDR_DQM0 SDR_DQM1 SDR_DQM2 SDR_DQM3 SDR_WE SDR_CAS SDR_RAS SDR_CS0 SDR_BA0 SDR_BA1 SDR_CKE SDR_CLK SDR_A11 SDR_A12 SDR_VDD SDR_A0 SDR_A1 SDR_A2 SDR_A3 SDR_A4 SDR_A5 SDR_A6 SDR_A7 SDR_A8 SDR_A9 SDR_A10 SDR_DQ0 SDR_DQ1 SDR_DQ2 SDR_DQ3 SDR_DQ4 SDR_DQ5 SDR_DQ6 SDR_DQ7 SDR_DQ8 SDR_DQ9 SDR_DQ10 SDR_DQ11 SDR_DQ12 SDR_DQ13 SDR_DQ14 SDR_DQ15 SDR_DQ16 SDR_DQ17 SDR_DQ18 SDR_DQ19 SDR_DQ20 SDR_DQ21 SDR_DQ22 SDR_DQ23 SDR_DQ24 SDR_DQ25 SDR_DQ26 SDR_DQ27 SDR_DQ28 SDR_DQ29 SDR_DQ30 SDR_DQ31 SDR_DQM0 SDR_DQM1 SDR_DQM2 SDR_DQM3 SDR_WE SDR_CAS SDR_RAS SDR_CS0 SDR_BA0 SDR_BA1 SDR_CKE SDR_CLK SDR_A11 SDR_A12
TO MAIN IF (CN103), MPEG2,V I/O
REG_3.1V REG_2.5V GND
C4303 T 100/4
IC4302
K4S56323LF-HN75 TL4301 SDR_DQ0 SDR_DQ1 SDR_DQ2 RA4301 100k 4 2 3 3 5 7 6 6 RA4302 100k 4 1 1 2 5 8 8 7 RA4302 100k RA4301 100k RA4302 100k RA4301 100k RA4301 100k RA4302 100k SDR_DQ31 F880[2] SDR_DQ30 CF PORT POWERUP SDR_DQ29 CF PORT POWERUP SDR_DQ28 USB PORT POWERUP SDR_DQ27 CF PORT POWERUP SDR_DQ26 CF PORT POWERUP SDR_DQ25 CPU SELECT SDR_DQ24 F89E[6] SDR_DQ3 SDR_DQ4 SDR_DQ5 SDR_DQ6 SDR_DQ7 SDR_DQM0 SDR_WE SDR_CAS SDR_RAS SDR_CS0 SDR_BA0 SDR_BA1 SDR_A10 SDR_A0 SDR_A1 SDR_A2 SDR_A3 C4305 0.1 46 75 5 58 90 3 73 89 11 72 57 4 71 56 85 70 55 84 69 54 68 52 67 82 51 36 60 81 65 29 49 64 32 77 63 59 76 48 44 61 87 66 40 50 88 VDD DQO VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD DQM0 WE_ CAS_ RAS_ CS_ BA0 BA1 A10/AP A0 A1 A2 A3 VDD VDD DQ16 VDDQ DQ17 DQ18 VSSQ DQ19 DQ20 VDDQ DQ21 DQ22 VSSQ DQ23 VDDQ DQM2 NC NC VDDQ VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 VSS NC DQM1 CLK CKE A12 A11 A9 A8 A7 A6 A5 A4 VSS VSS DQ31 VSSQ DQ30 DQ29 VDDQ DQ28 DQ27 VSSQ DQ26 DQ25 VDDQ DQ24 VSSQ NC DQM3 NC VSSQ 6 30 12 43 15 17 28 14 13 27 42 47 26 31 25 10 9 24 38 83 39 23 8 37 22 7 45 41 20 62 34 19 78 2 18 74 1 33 79 16 80 35 21 53 86 SDR_DQ15 SDR_DQ14 SDR_DQ13 C4309 0.01 SDR_DQ12 SDR_DQ11 SDR_DQ10 SDR_DQ9 SDR_DQ8
R4302
0
TL4302
RA4303 100k 3 1 4 4 6 8 5 5 RA4303 100k 2 3 2 1 7 6 7 8 RA4304 100k RA4304 100k RA4304 100k RA4303 100k RA4303 100k RA4304 100k
SDR_DQ23 F89E[5:3] SDR_DQ22 F89E[5:3] SDR_DQ21 F89E[5:3] SDR_DQ20 RESERVED SDR_DQ19 MEMORY WIDTH FOR FLASH 01: 16bit SDR_DQ18 MEMORY WIDTH FOR FLASH 01: 16bit SDR_DQ17 F880[1] SDR_DQ16 F880[0]
SDR_DQM1 SDR_CLK SDR_CKE SDR_A12 SDR_A11 SDR_A9 SDR_A8 SDR_A7 SDR_A6 SDR_A5 SDR_A4
TO DSP
C4306 0.001 SDR_DQ16 SDR_DQ17 SDR_DQ18 SDR_DQ19 SDR_DQ20 SDR_DQ21 SDR_DQ22 SDR_DQ23 SDR_DQM2
SDR_DQ31 SDR_DQ30 SDR_DQ29 SDR_DQ28 SDR_DQ27 SDR_DQ26 SDR_DQ25 C4308 0.1 SDR_DQ24
SDR_DQM3
C4307 0.01
#:EXCHANGE PARTS LIST
0 1 MAIN(DSP MEM)
NonMEGA MEGA
IC4301 SG32M90TFIR4B11 SG32M90TFIR4B10
[256M FBGA]
y10561001a_rev0.1 NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
(No.YF110)2-19
2-20(No.YF110)
MAIN(P.PRCS) SCHEMATIC DIAGRAM
1 2 3
IC4505
CLK D XQ GND VCC XPRE XCLR Q
8
*
IC4504
R4586 CLK D XQ GND VCC XPRE XCLR Q
1 8
6
7
0 1 MAIN (P.PRCS)
CLK1M0 CLK4M5 CAM_VD HDIRS VDIRS MCLKI
TG_HD TG_VD TG_ID
4
5
L4508 REG_3.1V R4585 REG_1.5V GND C4536
2
7
TO MAIN IF(CN103),MPEG2
3
4
C4537 CLK1M0 CLK4M5 CAM_VD HDIRS VDIRS
SYSSEL0 SYSSEL1 TVSEL
TO OP DRV
5
6
L4506 NQR0129-002X
SSGFLD
OUTV2
CAM_VD
CLK1M0
CLK4M5
HDIRS
VDIRS
ANA_IN_H TL4516 R4538 OPEN
L4505 NQL38DM-4R7X
SSGFLD OUTV2
C4525 10
TO DSP
SSGFLD OUTV2
R4547 OPEN
R4545 OPEN
R4543 OPEN
TO TG133
TG_HD TG_VD TG_ID
TG_VD TG_ID
L4507 NQL38DM-4R7X
R4542 0
TG_HD
TO V I/O
R4541 0
R4539 0
R4540 0
PPRO0
PPRO1
PPRO2
PPRO3
PPRO4
PPRO5
PPRO6
PPRO7
PPRO8
PPRO9
PPRO10
PPRO11
SOF
R4546 OPEN
VCLK
L4504 L4503 NQL38DM-4R7X NQR0129-002X
1k
1k
1k
1k
1k
VLD_PIX
R4555 100
R4554 100
R4548 OPEN
R4544 OPEN
PPRO0 PPRO1 PPRO2 PPRO3 PPRO4 PPRO5 PPRO6 C4524 10 PPRO7 PPRO8 PPRO9 PPRO10 C4523 0.1 PPRO11 VLD_PIX SOF
TO DSP
PPRO0 PPRO1 PPRO2 PPRO3 PPRO4 PPRO5 PPRO6 PPRO7 PPRO8 PPRO9 PPRO10 PPRO11 VLD_PIX SOF VCLK
R4553
R4551
R4552
R4550
R4549
C4528 C4529 10 0.1
TL4520
TL4519
TL4518
TL4517
TL4522
TL4525
TL4524
TL4523
TL4521
C4530 0.1
C4527 0.1
TL4515 C4526 0.1
R4537
R4536
51
VDD
214211212213166
ID OBCP VDAFE FLDAFE HDAFE
46
MCLKI
50 113168 49 48 111167112
STROB VDMDA HDIRS VDIRS MSHUT1 MSHUT2 CLK1M0 CLK4M5
44 107 45 43
PLLI1 AGNDP1 AVDDP1 PLLSEL1
109106108
3.3V_GND 3.3V_VDD 3.3V_VDD
164165161
TVSEL SYSSEL0 SYSSEL1
110 47 36 210
CTRI TMC1 TMC2 ADHTEST
209208105160163
MODE JTEST0 JTEST2 JTEST3 JTESR1
39 42 40
GND GND VDD
203202201102157204103158205159206207
DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 DOUT8 DOUT9 DOUT10 DOUT11
104 41 38
VPIX SOF VCLK
C4531 0.1 114 3.3V_VDD 52 3.3V_GND
0 TVSEL SYSSEL0/1 NTSC
1 PAL 0.68M
2 --2M ---
3
R4535
100
0
0
3.3V_VDD 35 3.3V_GND 99 VDD 34 VDD 33 VDD 31 GND 97 C4521 1 TDI 151 TMS 200 TRST 196 TCK 147 TDO 53 3.3V_VDD 29 3.3V_VDD 90 3.3V_GND 94 C4520 0.1 TL4514 TL4513 TL4512 TL4511 TL4510 C4522 0.1
1.33
TO CDS
ACHI0 ACHI1 ACHI2 ACHI3 ACHI4 ACHI5 ACHI6 ACHI7 ACHI8 ACHI9
ACHI0 ACHI1 ACHI2 ACHI3 ACHI4 ACHI5 ACHI6 ACHI7 ACHI8 ACHI9
ACHI9 ACHI8 ACHI7 ACHI6 ACHI5 ACHI4 ACHI3 ACHI2 ACHI1 ACHI0
54 ACHI0 115 ACHI1 55 ACHI2 116 ACHI3 56 ACHI4 117 ACHI5 57 ACHI6 118 ACHI7 58 ACHI8 119 ACHI9 59 ACHI10 120 ACHI11 60 ACHI12 121 ACHI13 61 BCHI0 122 BCHI1 62 BCHI2 123 BCHI3 63 BCHI4 124 BCHI5 64 BCHI6 125 BCHI7 65 BCHI8 126 BCHI9 66 BCHI10 127 BCHI11 67 BCHI12 128 BCHI13
VCLK
R4527 470K R4530 47K R4533 R4531 R4529 R4528 R4526 R4525 R4524 R4523
470k R4532 R4534 470k 22K 39K
TO OP DRV(CN106)
8.2K 12K 100 100 100 100 100 100 Z_PTR_AD F_PTR_AD OP_THRMO TL4535 TL4509 P_GYAMP Y_GYAMP TL4534
AIN0 148 AIN1 197 AIN2 92 AIN3 149 AIN4 27 AIN5 198 AIN6 93 AIN7 150 L4502 NQL38DM-4R7X AVDDA 26 AGNDA 199 AVREFP 91 AVREFM 28 C4509 0.1 VDD 88 GND 25 GND 22 CREQ 101 CACK 156 PMCS 37 PMWE 96 PMOE 30 PMWAIT 95 PMINT 152 PMBLS0 153 PMBLS1 154 DMAREQ 155 DMAREQ_B 98 DMACLR 100 PMA0 195 PMA1 194 PMA2 193 PMA3 192 PMA4 146 PMA5 145 PMA6 144 PMA7 89 PMA8 24 PMA9 23 PMA10 83 PMA11 16 VDD 17 R4518 R4517 0 0 R4519 0 R4522 R4521 0 0 XPMCS1 XPMWE XPMOE R4520 0 XPMWAIT PMINT XPMBLS0 XPMBLS1 DMASREQ DMABREQ DMACLR C4510 0.1 C4511 10
R4587 R4588
TO TG133(CN105) TO GYRO
C4519 0.01
IC4501
JCY0209-2
C4512 0.01
C4513 0.01
C4514 0.01
C4515 0.01
C4516 0.01
C4517 0.01
C4518 0.01
TO MPEG2
XCREQ XCACK XPMCS2
TO OP DRV
F/Z_RST F/Z_CS IRIS_CS IRIS_PS
C4532 0.1 F/Z_RST F/Z_CS IRIS_CS IRIS_PS R4556 100 R4557 470 R4558 470
169 VDD 173 VDD 177 VDD 171 GND 175 GND 179 GND
XPMCS1 XPMCS1 XPMWE XPMOE XPMWAIT PMINT XPMBLS0 XPMBLS1 DMASREQ DMABREQ DMACLR PMA0
TO DSP
XPMCS1 XPMWE XPMOE XPMWAIT PMINT XPMBLS0 XPMBLS1 DMASREQ DMABREQ DMACLR PMA0 PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 XPMCS0
TO DSP TO MPEG2
TO SUB CPU
V27_OUT
F/Z_RST V27_OUT TG_CS F/Z_CS IRIS_CS
182 GPIO0 132 GPIO1 184 GPIO2 170 GPIO3 216 GPIO4 215 GPIO5 R4562 47k R4565 R4567 0 172 GPIO6 219 GPIO7 217 GPIO8 218 GPIO9 183 GPIO10 R4569 100 220 GPIO11 221 GPIO12 222 GPIO13 176 GPIO14 R4571 # R4589 # 174 GPIO15 180 PWMO0 181 PWMO1 223 PWMO2/TO0 224 PWMO3/TO1 178 PWMO4/TO2
TO MPEG2,DSP,DSP MEM TO MPEG2,DSP
TO TG133
TG_CS
TO OP DRV TO GYRO, TG133(CN105) TO MAIN IF(CN101) TO MAIN IF(CN111),DSP TO CDS
LENS_LED G_RST LAMP_ON SDWP CDS_CS
IRIS_PS R4559 0 ND_CTL R4560 0 LENS_LED G_RST SDWP CDS_CS TL4526 LENS_LED SDWP TL4528 G_RST STRB_SNS R4572 0 Q4501 DTC144EE-X TL4536 CDS_CS TG_CS V27_OUT R4561 470 R4563 470 R4564 0 R4566 0 R4568 0
TO DSP
PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11 C4508 0.1
PMA0
PMA1 PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9 PMA10 PMA11
TO MPEG2,DSP
TO SUB CUP
SCPU_CS
R4570 0
External Memory Bus
TO MPEG2, DSP,DSP MEM
TO CDS,OP DRV,TG133
CAM_CLK
R4573 0 CAM_CLK CAM_IN CAM_OUT EEPRM_CK EEPRM_DI EEPRM_DO TL4530 TL4531 TL4532 TL4533 CDS_STBY R4574 R4575 0 R4576 0 R4577 0 R4578 100 C4533 0.1
TO OP DRV TO CDS,OP DRV,TG133 TO SUB CPU
CAM_IN CAM_OUT EEPRM_CS EEPRM_CK EEPRM_DI EEPRM_DO
69 3.3V_VDD 1 3.3V_GND
3.3V_GND 3.3V_GND 3.3V_VDD 3.3V_VDD PLLREF2 PLLSEL2 AGNDP2 AVDDP2 FLDCPU ENCFLD
VDD 20 GND 19 R4584 0
CLK27A
CLK27B
PLLFB2
VDCPU
PMD10
PMD11
PMD12
PMD13
PMD14
HSCK
OMT0
OMT1
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PLLI2
SCK0
SCK1
SCK2
GND
GND
GND
HSO
VDD
VDD
VDD
VDD
VDD
SO0
SO1
SO2
INH
HSI
INV
SI0
SI1
SI2
SCPU_SCK SCPU_SI SCPU_SO
KO
SCPU_SCK SCPU_SI SCPU_SO
CLR
TO SUB CPU
PMD15
PMD0 PMD1 PMD2 PMD3 5 C4535 OPEN 4 PMD4 PMD5 PMD6 PMD7 PMD8 1 2 3
TO MPEG2, DSP,DSP MEM
PMD0 PMD1 PMD2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15
2 68
72 3
4 73 74 75 70 130129 7 71 131
5
6
8
133134135186185
76 78
11 80 188137 32 162
10 77 79 136 9 187
189138190139191140 81 14 141 82 143142 87 86 85 21
12 13 15
84 18
TO SUB CPU
SYSSEL1 SYSSEL0 TVSEL ID_LAT VDCPU FLDCPU
SYSSEL1
TL4505 TL4504 TL4506 TL4507
SYSSEL0
C4501 0.1
C4504 0.1
TL4508
470
470
1K
C4502 0.1
TVSEL ID_LAT VDCPU FLDCPU
C4506 0.1
C4507 0.1
R4505
R4506
R4515
C4505 10
IC4503
OPEN
PMD9 PMD10 PMD11 PMD12 PMD13 PMD14 PMD15
CAM_CLK R4501 100
CAM_OUT R4502 100
CLK27A
CLK27A CLK27B
EEPRM_DI
R4513
ID_LAT R4509
VDCPU R4510
FLDCPU R4511
PMD10
PMD0
PMD2
PMD3
PMD5
PMD6
PMD7
PMD1
CLK27A
R4581 330
M95320-WDW6-X XCS SO XWP VSS VCC XHOLD SCK SI
1 8
IC4502
R4583 330 EEPRM_CK
EEPRM_DO
CLK27B
AFE_RST
AFE_RST
S_SHUT
PMD4
PMD8
PMD9
AFE_RST
PMD11
PMD12
PMD13
PMD14
PMD15
TO AUDIO TO SUB CPU
S_SHUT
S_SHUT
SCPU_SO
SCPU_SI
CAM_IN
R4516
CLK27B
SSGFLD R4512
R4514
TO MPEG2
L4501 NQL38DM-4R7X
R4503 470 R4504 470
SSGFLD
TL4501 DRIV_SO TL4502 DRIV_SI TL4503 SCPU_SCK R4507 470
DRIV_SCK
TO DSP
0
0
0
0
R4508 470
C4503 0.01
10
0
10
R4582 330
R4579 100 R4580 10K
C4534 0.1
Exchange Parts ASIA-PAL& NTSC R4571 R4589 0 47k EURO-PAL
2
3
4
5
6
7
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
y10559001a_rev0.1
(No.YF110)2-21
2-22(No.YF110)
MAIN(OP DRV) SCHEMATIC DIAGRAM
5
Vin
4
Vout
0 1 MAIN(OP DRV)
C4924 1u
Noise
C4923 1u
GND Cont
IC4902
MM1614GN-X
1
2
3
IC4901
C4927 0.01u 1 2 11 54 12 13 22 LY34853-001A 63 23 24 33 72 34 35 44 45
GND
VDD
Vout
IC4903
R1100D31-X
1
2
3
C4925 1u C4926 1u
L4902 10u
C4921 0.01
R4909
R4901 24k
C4922 0.1
1M
R4904 10k
C4909 C4910 0.01 OPEN
NQL38DK-100X C4904 T 10/6.3 L4901 NQR0129-002X
R4908 4.7k
R4907
R4905 15k C4906 0.1 C4907 0.1 C4908 0.1 R4906 680k
1M
R4903 8.2k R4902 10k
C4911 CH OPEN
R4910 100 R4911 100
80
DAC11
43
DAC11IN
79
SENS
42
REF
78
AVSS3
41
AVDD3
77
CREFIN
40
OP4OUT
39
CREFIN
76
VREF
38
OP3INP
75
DAC10
37
OP3INN
74
OP3OUT
36
ADIN0
73
ADIN1
T
C4902 10/6.3
46 TEST0
MONI 71
3
TEST1
DACMON 32
47 MODESEL R4944 0
OP2OUT 70
R4923 12k
4
SCK
OP2INN 31
CH C4915 120p R4924 12k C4912 0.1
48 SIN
OP2INP 69 CH C4914 68p
TO P.PRCS
F_PTR_AD OP_THRMO Z_PTR_AD
TL4948
TL4904
TL4905
TL4949
TL4906
TL4907
TL4950
TL4908
TL4951
5
SOUT
AVDD3 30
49 CS
AVSS3 68
6
PDWNB
DAC12 29
TO CDS,P.PRCS,TG133
CAM_CLK CAM_OUT CAM_IN IRIS_CS IRIS_PS
7
RSTB
IC4901
LY34853-001A
AVDD2 28 C4913 0.1 AVSS2 67 C4920 OPEN R4912 100
TO OP BLOCK
CN106 1 2 3 4 ZOOM04 ZOOM03 ZOOM02 ZOOM01 FOCUS01 FOCUS04 FOCUS03 FOCUS02 F_LED
50 CLK
8
VD
OP1INP 27
CLK1M0 VDIRS HDIRS R4935 100k 9 PLS1 OP1OUT 26
R4945 10k
TO P.PRCS
F/Z_RST
51 HD
OP1INN 66
5 6 7 8
R4917 10k
TO MAIN IF
IR_OUT
52 PLS2
OP0OUT 65
9 R4918 10k R4961 270
10 F_PTR_AD 11 F_VCC 12 OP_THRMO
10 DVSS C4905 0.1 53 DVDD
AVDD1 AVDD1 AVDD2 AVSS1 AVSS1 AVSS2
OP0INP 25
OP0INP 64
13 GND 14 DRIVE-IS Q4951 DTC114EE-X 15 DRIVE+IS 16 HGVCC+IS 17 HGOUT+IS 18 HGVSS-IS
DAC0
DAC1
DAC2
DAC3
DAC4
DAC5
DAC6
DAC7
DAC8
55
14
56
15
57
16
58
17
18
59
19
60
DAC9
20
61
21
62
C4918 0.1 C4916 0.1
C4917 0.1
19 HGOUT-IS 20 Z_PTR_AD 21 Z_VCC 22 Z_LED
TO V I/O
ASPECT
R4956 4.7
R4957 4.7
48 47 46 45 44 43 42 41 40 39 38 37
NC VMD NC ORSD GND5A D1(W2) D2(W4) VSEN_HD VSEN_LD C1(W1) VCC5A ORSC
L4954 10u NQL38DK-100X C4952 T 10/6.3 C4951 0.1 1 2 3 4 TEST0 TEST1 TEST2 TEST3 NC VCC3 VD MCSELECT SDATA
C2(W3) 36 VMC 35 VSEN_HC 34 VSEN_LC 33 NC 32
TO P.PRCS
LENS_LED CAM_VD F/Z_CS CAM_OUT R4951 R4952 R4953 R4954 1k 1k 1k 1k
5 6 7 8 9
IC4951
AN41902A
NC 31 NC 30 NC 29 VSEN_LB 28 VSEN 27 VMB 26 B2(N4) 25
TO CDS,P.PRCS,TG133 TO P.PRCS
CAM_CLK CLK4M5 F/Z_RST L4953 100
10 SCLK 11 OSCIN
R4955
100
12 RESET
VSEN_HA VSEN_LA GND5D VCC5D A1(N1) A2(N3) B1(N2) ORSA ORSB
L4955 10u NQL38DK-100X
VMD
NC
13 14 15 16 17 18 19 20 21 22 23 24
!
REG_4.8V F4951 NMFZ007-R25X-K C4959 T 10/10
C4956 T 10/6.3
C4955 0.1
C4954 T 10/6.3
C4953 0.1
C4958 22p
CH
CH C4957 22p R4959 4.7 R4960 4.7
TO MAIN IF
M_REG4.8 REG_3.1V GND
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2. The parts with marked ( ) is not used.
NC
y10566001a_rev0.1
(No.YF110)2-23
2-24(No.YF110)
MAIN(TG133) SCHEMATIC DIAGRAM
0 1 MAIN(TG133)
TO CCD(CN5001)
CN105 QGF0547C2-24X REG_+15V REG_+15V REG_-7.5V REG_-7.5V CCD_CTL GND GND GND CCD_OUT GND GND GND
C5510 0.1
1 2
C5508 0.1
NAX0674-001X X5501 (72MHz_CXO)
OUT VDD
GND CTL
3
3
4
4 5
L5504 NQR0129-002X C5509 0.1
R5514 10
1
2
TL5501
TO P.PRCS
TG_ID TG_VD TG_HD MCLKI
36
GND
35
SGEN
34
SSCK
33
SSI
32
SEN
31
WEN
30
VGAT
29
HDI
28
VDI
27
TEST3
26
GND
25
CLKI
RG 13 H1 H2 15 SUB V1 17 V2 V3 19 V4 GND 21 G_RST REG_3.1V 23 P_GYAMP 24 22 C5514 1/35 T D5501 1SS355-X C5511 0.1 20 18 16 R5515 10 R5516 10 R5517 10 R5518 10 14
C5507 0.1 37 38 39 40 41 42 43 44 45 46 VDD3 SGMOD VM V2 V4 V1 VH V3 SUB VL DSGAT VDD4
CLD(36M) GND(RG) AVD(RG)
TO CDS
OBCLP PBLK ADCLK
VDD2 NC TEST2 XPBLK XCLPDM
24 23 22 21 20 19 18 17 16 15 14 13 R5506 10 R5509 0 C5504 0.1 R5510 0 R5508 R5507 10 10 C5505 10/6.3 T C5506 L5503 NQR0129-002X
IC5501
CXD3602AR TG/V-DRIVER
GND(CDS) XSHD XSHP AVD(CDS) XCLPOB AVD(H) H2
TO CDS
CDS_3V SHD SHP
C5515 0.1
47 48
R5511 100k
C5512 4.7/25
T
T
CL(36M)
C5516 10/16
L5506 10µ
GND(H)
TEST1
VDD1
GND
GND
RST
RG
L5508 10µ
H1
R5513 1 2 3 4 5 6 7 8 9 10 11 12 C5523 1
C5503 0.1 R5504 10 R5505 10
TO P.PRCS
P_GYAMP REG_3.1V
L5505 NQR0129-002X C5513 0.1
C5526 1 C5522 0.01
MM3143AN-X (3.0V_REG)
TO GYRO, P.PRCS
G_RST GND
C5517 0.1
R5512 0 R5519 5
VOUT
C5525 0.01 5
VOUT
L5507 NQR0129-002X
4
NOISE
4
NOISE GND
C5502 C5501 0.1 0.1
IC5502
MM3143DN-X (3.3V_REG)
IC5503
GND
CTL
VIN
1
10
2
3
CCD_CTL TG_CS
R5501 R5502 R5503
10
TO DSP
1
2
C5521 1
C5524 1
TO OP DRV, CDS,P.PRCS TO SUB CPU
CAM_CLK CAM_OUT TG2_RST
L5501 10µ
CTL
VIN
3
L5502 NQR0129-002X
REG