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1. INTRODUCTION....................................................................................................................... 3
2. AUDIO AMPLIFIER STAGE WITH TDA2822M.................................................................... 3
4. TUNER........................................................................................................................................ 5
General description of UV1316: ............................................................................................. 5
Features of UV1316: ............................................................................................................... 5
5. MICROCONTROLLER (VCTI) ................................................................................................ 5
General Features...................................................................................................................... 5
DRX Features.......................................................................................................................... 6
Multistandard Sound Processor (MSP) Features .................................................................... 7
Video Features......................................................................................................................... 8
Controller Features.................................................................................................................. 9
OSD & Teletext Features ........................................................................................................ 9
Port Allocation ...................................................................................................................... 10
6. SCALER & DEINTERLACER (TSU) ..................................................................................... 13
General Features.................................................................................................................... 13
Display Features................................................................................................................... 13
Auto Detection Features........................................................................................................ 14
OSD Features ........................................................................................................................ 14
7. SAW FILTER ........................................................................................................................... 14
X6897D: ................................................................................................................................ 14
Standard:................................................................................................................................ 14
Features: ................................................................................................................................ 14
Pin configuration:.................................................................................................................. 15
Frequency response:.............................................................................................................. 15
8. IC SPECIFICATIONS ............................................................................................................. 17
8.1. LM1117.......................................................................................................................... 17
8.2. LM1086.......................................................................................................................... 18
8.3. LM317............................................................................................................................ 20
8.4. MP1593 .......................................................................................................................... 20
8.5. IRF7314.......................................................................................................................... 23
8.6. FDC642P........................................................................................................................ 24
8.7. NTGS3446 ..................................................................................................................... 25
8.8. 74HCT4053.................................................................................................................... 26
9.OPEN-SHORT CIRCUIT PROTECTION ................................................................................ 34
10.SERVCE MENU SETTINGS..................................................................................................35
11. BLOCK DIAGRAM AND SCHEMATICS............................................................................40
1. INTRODUCTION
17MB20 Main Board consists of two major blocks. The first block is analog front-end
and this block is handled by highly multifunctional VCTI49XY chip. This IC performs
demodulation of Video & Audio from Tuner IF, and CVBS, Audio, RGB, SVHS input
selection and processing. It has an audio processor that supports equalizer or tone
control, volume control, AVL, surround effect etc. and supplies audio outputs for audio
amplifier, scart and line out. It handles video processing such as colour standard
detection and demodulation, picture alignment (brightness, contrast, colour etc.). The IC
also performs teletext decoding with fastext memory. The processed video is sent to
TSU36AWL-M(-1) chip in RGB format and to the scart video output in CVBS format.
The TV Tuner is a PLL controlled asymmetrical or a symmetrical IF output type. The IF
signal is applied to a single saw filter. After the SAW filter block, VSB modulated sound
and picture signals are digitally filtered and demodulated by VCTI.
Since VCTI handles all audio processing issues, there is no need for additional audio
processor solution on the board. VCTI supports three Audio outputs. These outputs are
assigned to audio amplifier, scart audio out and line out. The board employs TDA2822M
Class AB Audio Amplifier to drive both the speaker and headphone outputs.
The Back End section is handled by TSU36AWL-M(-1) chip. TSU has two ADC inputs.
The ADC inputs can handle standard interlaced RGB output from VCTI, PC RGB
graphics input and YPbPr input via VGA Connector. ADC0 is assigned to YPbPr input or
RGB input via VGA connector and ADC1 is assigned to VCTI RGB output. Scaling and
deinterlacing is performed in Back End.
TSU chip has an integrated LVDS transmitter which provides double LVDS output
support.
Backlight brightness level adjustment and backlight on/off control for the inverter, and
Panel Logic Circuitry Power on/off control is performed by TSU chip.
OSD is displayed by the OSD generator embedded in TSU chip.


2. AUDIO AMPLIFIER STAGE WITH TDA2822M
The system is designed with 2XTDA2822M audio amplifiers for main speaker and
headphone L/R outputs. There is no any other dedicated audio amplifier for the
headphone audio output. In order to switch the audio amplifier output to the speakers or
headphone, the headphone output jack is detached for all TV sets with headphone
output option.

The TDA2822M is a monolithic integrated circuit in 8 leap minidip package, intended for
use as low frequency Class AB power amplifier in a wide range of applications in radio
and TV sets. For left and right channels two TDA2822M audio amplifiers are used in
bridge mode operation to provide 2x2W audio output power with 16 Ohm Speakers at
%10 THD.
The DC voltages required at various parts of the chassis and inverter are provided by an
external power supply unit and power interface board. The external power supply unit is
designed to provide +12Vdc supply. Various voltages required for the chassy operation
is obtained by a power interface board (17PWI20) which is mounted on the chassy. The
power interface board consist of a step down converter, Linear and LDO voltage
regulators, and power mosfets.
The output voltage of the step down converter(IC102) is determined with respect to the
panel logic boards power supply voltage. For the +3.3V panel logic board power supply
voltage option, IC105(LM1086 linear regulator) is bypassed with a jumper option.

+12V external power supply input is switched by IRF 7314 power mosfet(IC100) in TV
sets with mechanical switch option to go into standby mode. For the TV sets without
power off mode (i.e. the TV sets that go directly into standby mode when the external
power supply input is connected) this power mosfet is bypassed by a jumper option.

Second IRF7314 power mosfet(IC101) provides switching control for the +12V and
Audio Amplifier power supply voltage. +1,8V and +3.3V

Switching control for +1.8V and +3.3V voltages are achieved by NTGS3446 power
mosfets (IC103 and IC104 respectively)

Switching control for the panel logic circuit power supply voltage is achieved by FDC642
power mosfet (Q101)

Maximum voltage and current requirements for the system are given in the below table.

Main Board Requirements
Voltage Max Current
+33V 5mA
+12V Audio
+8V 12mA
+5V 160mA
+3.3V 370mA
+1.8V 220mA
+12VStby 30mA
+ 5VStby 30mA
+3.3Vstby 205mA
+1.8Vstby 400mA

Panel Logic Cct Requirments

Voltage Max Current
3.3V 1100mA
5V 1200mA
12V N/A
4. TUNER
As the depth of the TV set has a mechanical limit, a horizontal mounted tuner is used in
the product, which is suitable for CCIR systems B/G, H, L/ L', I/I', and D/K. The tuning is
available through the digitally controlled I2C bus (PLL).

General description of UV1316:
The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet
a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR
systems B/G, H, L, L', I and I'. The low IF output impedance has been designed for
direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1316:
1. Member of the UV1300 family small sized UHF/VHF tuners
2. Systems CCIR: B/G, H, L, L', I and I'; OIRT: D/K
3. Digitally controlled (PLL) tuning via I2C-bus
4. Off-air channels, S-cable channels and Hyper band
5. Compact size
6. Complies to "CENELEC EN55020" and "EN55013"

Pinning:
1. Gain control voltage (AGC) : 4.0V, Max: 4.5V
2. Tuning voltage
3. IC-bus address select : Max: 5.5V
4. IC-bus serial clock : Min:-0.3V, Max: 5.5V
5. IC-bus serial data : Min:-0.3V, Max: 5.5V
6. Not connected
7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V
8. ADC input
9. Tuner supply voltage : 33V, Min: 30V, Max: 35V
10. Symmetrical IF output 1
11. Symmetrical IF output 2

5. MICROCONTROLLER (VCTI)
General Features

The VCT 49xyI, VCT 48xyI is an IC family of high-quality single-chip TV processors.
Modular design and deep-submicron technology allow the economic integration of
features in all classes of single-scan TV sets. The VCT 49xyI, VCT 48xyI family is based
on functional blocks contained and approved in existing products like DRX 396xA, MSP
34x5G, VSP 94x7B, DDP 3315C, and SDA 55xx. Each member of the family contains
the entire IF, audio, video, display, and deflection processing for 4:3 and 16:9 50/60-Hz
mono and stereo TV sets. The integrated microcontroller is supported by a powerful
OSD generator with integrated Teletext & CC acquisition including on-chip page
memory.
Submicron CMOS technology
Low-power standby mode
Single 20.25 MHz reference crystal
8-bit 8051 instruction set compatible CPU
Up to 256 kB on-chip program ROM
WST, PDC, VPS, and WSS acquisition
Up to 10 pages on-chip teletext memory
Multi-standard QSS IF processing with single SAW
FM Radio and RDS with standard TV tuner
TV-sound demodulation:
all A2 standards
all NICAM standards
BTSC/SAP with MNR (DBX optional)
EIA-J
Baseband sound processing for loudspeaker channel:
volume and balance
bass/treble or equalizer
loudness and spatial effect (e.g. pseudo stereo)
Micronas AROUND (virtual Dolby optional)
Micronas BASS and Subwoofer output
further optional and licence requiring sound enhancements as BBE, SRS Wow
CVBS, S-VHS, YCbCr and RGB inputs
ITU656 input
4H adaptive comb filter (PAL/NTSC)
multi-standard color decoder (PAL/NTSC/SECAM)
Macrovision Detection
Nonlinear horizontal scaling "panorama vision"
Luma and chroma transient improvement (LTI, CTI)
Non-linear color space enhancement (NCE)
Dynamic black level expander (BLE)
Selective Color Enhancer (SCE)
8/10 bit ITU656 output
Soft start/stop of H-drive

DRX Features

The DRX - Analog TV IF- Demodulator performs the entire multistandard Quasi Split
Sound (QSS) TV IF processing, AGC, video demodulation, and generation of the
second sound IF (SIF) requiring only one SAW filter. The alignment-free DRX does not
need special external components. All control functions and status registers are
accessible via I2C bus interface. Therefore, it simplifies the design of high-quality, highly
standardized IF stages.

Multistandard QSS IF processing with a single SAW
Highly reduced amount of external components (no tank circuit, no potentiometers, no
SAW switching)
Programmable IF frequency (38.9 MHz, 45.75 MHz, 32.9 MHz, 58.75 MHz, 36.125
MHz)
Digital IF processing for the following standards:
B/G, D/K, I, L/L', and M/N
Standard specific digital post filtering
Standard specific digital video/audio splitting
Standard specific digital picture carrier recovery:
alignment-free
quartz-stable and accurate
stable frequency lock at 100% modulation and overmodulation up to 150%
quartz-accurate AFC information
Programmable standard specific digital group delay equalization
Automatically frequency-adjusted Nyquist slope, therefore optimal picture and sound
performance over complete lock in frequency range
Standard-specific digital AGC and delayed tuner AGC with programmable tuner Take
Over Point

Multistandard Sound Processor (MSP) Features

The MSP receives the digital Sound IF signal from the DRX part. The MSP is able to
demodulate all TV sound standards worldwide including the digital NICAM system.
Depending on the VCTI version, the following demodulation modes can be performed.
TV stereo sound standards that are unavailable for a specific VCTI version are
processed in analog mono sound of the standard. In that case, stereo or bilingual
processing will not be possible.

Sound demodulator and stereo decoder
Audio processing for loudspeaker channels:
volume
Automatic Volume Correction (AVC)
bass/treble or equalizer
loudness
balance
configurable Subwoofer output
Optional features for loudspeaker channels:
Virtual Dolby Surround (VDS)
SRS WOW
BBE High Definition Sound
PMQFP144-2 package:
6 analog audio inputs
4 analog audio outputs
PSSDIP88-1 package:
4 analog audio inputs
2 analog audio outputs
2 configurable analog audio inputs/outputs
Video Features

The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding. The TVT provides an integrated
general-purpose, fully 8051-compatible microcontroller with television-specific hardware
features. The microcontroller has been enhanced to provide powerful features such as
memory banking, data pointer, additional interrupts, etc. The on-chip display unit for
displaying Level 1.5 Teletext data can also be used for customer-defined onscreen
displays.
The TVT has an internal XRAM of 20 KB and an internal ROM of up to 256 KB.
ROMless versions can address up to 1 MB of external RAM and ROM. The 8-bit
microcontroller runs at 296 ns cycle time. The controller with dedicated hardware does
most of the internal TTX acquisition processing, transfers data to/from external memory
interface, and receives/transmits data via I2C-bus interface. In combination with
dedicated hardware, the slicer stores TTX data in a VBI buffer of 1 KB. The
microcontroller firmware performs all the acquisition tasks (hamming and parity checks,
page search, and evaluation of header control bits) once per field. Additionally, the
firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimized for minimal overhead. TVT is
realized in deep submicron technology with 1.8 V supply voltage and 3.3 V I/O (TTL
compatible).

11 analog video inputs (CVBS/Y/C/RGB/YCbCr)
3 analog video outputs
integrated Y+C adder
integrated high-quality A/D converters and associated clamp and AGC circuits
high-performance 4H comb filter (PAL/NTSC) with vertical peaking
multistandard color decoder PAL/NTSC/SECAM including all substandards
macrovision-compliant multistandard sync processing
macrovision detection
RGB/YCbCr component processing and associated contrast, color saturation and tint
circuits
high-quality soft mixer controlled by fast blank (alpha blending)
fast blank monitor via I2C
ITU656 input
linear horizontal scaling (0.25 to 4)
nonlinear horizontal scaling "panorama vision"
split screen (OSD and video side by side)
letter box detector (auto-wide)
noise measurement
Controller Features

The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding. The TVT provides an integrated
general-purpose, fully 8051-compatible microcontroller with television-specific hardware
features. The microcontroller has been enhanced to provide powerful features such as
memory banking, data pointer, additional interrupts, etc.

Single external 20.25 MHz crystal, all necessary clocks are generated internally
Normal mode: 40.5 MHz CPU clock, Power Save mode: 10.125 MHz
Up to 256 KB on-chip program ROM
256 byte on-chip program RAM
128 byte on-chip extended stack RAM
20 kilobyte on-chip extended data RAM (XRAM)
Memory banking up to 1 MB
Non-multiplexed 8-bit data and 20-bit address bus
Eight 16-bit data pointer registers (DPTR)
4-level, 24-input interrupt controller
Patch module for 16 ROM locations
Two 16-bit reloadable timers
Capture-compare timer for infrared decoding
Watchdog timer
UART
Real time clock (RTC)
PWM units (2 channels 14-bit, 6 channels 8-bit)
8-bit ADC (4 channels)
I2C bus master/slave interface
Up to 24 programmable I/O ports
Flash version for PMQFP144 and PSSDIP88 packages (SST39LF020 or compatible)
ROM-less version with 1 MB address space for external program and data memory

OSD & Teletext Features

The on-chip display unit for displaying Level 1.5 Teletext data can also be used for
customer-defined onscreen displays. The TVT has an internal XRAM of 20 KB and an
internal ROM of up to 256 KB. ROMless versions can address up to 1 MB of external
RAM and ROM.
In combination with dedicated hardware, the slicer stores TTX data in a VBI buffer of 1
KB. The microcontroller firmware performs all the acquisition tasks (hamming and parity
checks, page search, and evaluation of header control bits) once per field. Additionally,
the firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimized for minimal overhead.
Port Allocation
6. SCALER & DEINTERLACER (TSU)
The are two pin compatible IC versions. TSU36AWL-M is a total solution graphics
processing IC for LCD displays with panel resolutions up to SXGA(1280X1024), and
TSU36AWL-M-1 provides support for resolutions up to SXGA+(1400X1050).
TSU36AWL-M(-1) is configured with a high-speed integrated triple-ADC/PLL, a high
quality display processing engine, and an integrated multi-purpose output display
interface that can support all major panel interface formats. To further reduce system
costs, the TSU36AWL-M(-1) also integrates intelligent power management control
capability for green-mode requirements and spread-spectrum support for EMI
management.


General Features

- Two RGB analog input ports support up to 165 MHz (UXGA @ 60Hz)
- Full SOG and composite sync support, including copy protected signals


Display Features

- Patent-pending Hybrid Image Resolution Converter
- Variable sharpness control
- Interlaced to progressive conversion
- Patent-pending Dynamic Frame-Rate generator (DFR) short line storage frame
extension technique eliminates short lines in output frames
- Media Window Enhancement (MWE)
- Peaking and coring functions for sharpness enhancement and noise reduction
- Brightness and contrast control
- Programmable 10-bit gamma correction
- sRGB support
Auto Detection Features

- Auto input signal format (SOG, composite, separated HSYNC, and VSYNC)
- Input mode detection support analyzes input video signal (H/V polarity, H/V frequency,
interlace/field detect) extensive status registers support robust detection of all VESA
and IBM modes
- Auto-tuning function including support for phase selection, image position, offset &
gain and jitter detection
- Smart screen-fitting


OSD Features

- Built-in OSD generator with 291 character font programmable RAM
- Internal OSD rotation degree of 90 and 270
- Supports 2/4/8 multi-color fonts
- Supports 8/16/256 color palette
- Supports 1K code attributes
- Gradient color function
- Hardware button animation function
- Pattern generator for production test
- Supports OSD MUX and alpha blending
capability


7. SAW FILTER
X6897D:

Standard:
B/G
D/K
I
L/L'

Features:
IF filter for digital cable TV
Standard IC package
Pin configuration:
1 Input
2 Input - ground
3 Chip carrier - ground
4 Output
5 Output


Frequency response:
8. IC SPECIFICATIONS
LM1117
LM1086
LM317
MP1593
IRF7314
FDC642P
NTGS3446
74HCT4053
74HC4052
24C64
24LC21
TDA2822M

8.1. LM1117

8.1.1. General Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at
800mA of load current. It has the same pin-out as National Semiconductor's industry
standard LM317. The LM1117 is available in an adjustable version, which can set the
output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within 1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10F
tantalum capacitor is required at the output to improve the transient response and
stability.

8.1.2. Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
-- LM1117 0C to 125C
-- LM1117I -40C to 125C

8.1.3. Applications
2.85V Model for SCSI-2 Active Termination
Post Regulator for Switching DC/DC Converter
High Efficiency Linear Regulators
Battery Charger
Battery Powered Instrumentation
8.1.4. Absolute Maximum Ratings




8.1.5. Connection Diagram




8.2. LM1086


8.2.1. General Description
The LM1086 is a low dropout three terminal regulator with 1.5A output current capability.
The output voltage is adjustable with the use of a resistor divider. Dropout is guaranteed
at a maximum of 500 mV at maximum output current. It's low dropout voltage and fast
transient response make it ideal for low voltage microprocessor applications. Internal
current and thermal limiting provides protection against any overload condition
that would create excessive junction temperature.

8.2.2. Features
Low Dropout Voltage 500mV at 1.5A Output Current
Fast Transient Response
0.015% Line Regulation
0.1% Load Regulation
Internal Thermal and Current Limiting
Adjustable or Fixed Output Voltage(1.5, 2.5, 2.85, 3.0, 3.3, 5.0V)
Surface Mount Package SOT-223 & TO-263 (D2 Package)
100% Thermal Limit Burn-in


8.2.3. Applications
Battery Charger
Adjustable Power Supplies
Constant Current Regulators
Portable Instrumentation
High Efficiency Linear Power Supplies
High Efficiency "Green" Computer Systems
SMPS Post-Regulator
Power PC Supplies
Powering VGA & Sound Card


8.2.4. Absolute Maximum Ratings




8.2.5. Connection Diagrams
8.3. LM317

8.3.1. General Description
The LM117/LM217/LM317 are monolithic integrated circuit in TO-220, ISOWATT220,
TO-packages intended for use as positive adjustable voltage regulators. They are
designed to supply more than 1.5A of load current with an output voltage adjustable
1.2 to 37V range. The nominal output voltage is selected by means of only a resistive
divider, making exceptionally easy to use and eliminating the stocking of many fixed
regulators.

8.3.2. Features
Output voltage range: 1.2 to 37V
Output current in excess of 1.5A
0.1% Line and Load Regulation
Floating Operation for High Voltages
Complete Series of Protections: Current Limiting, Thermal Shutdown and SOA Control




8.3.3. Connection Diagram




8.4. MP1593

8.4.1. General Description
The MP1593 is a step-down converter with an internal Power MOSFET. It achieves 3A
continuous output current over a wide input supply range with excellent load and line
regulation. Current mode operation provides fast transient response and eases loop
stabilization. Fault condition protection includes cycle-by-cycle current limiting and
thermal shutdown. Adjustable soft-start reduces the stress on the input source at turn-
on. In shutdown mode the regulator draws 20A of supply current. The MP1593
requires a minimum number of readily available external components to complete a 3A
step down DC to DC converter solution.
8.4.2. Features
3A Output Current
Programmable Soft-Start
100m Internal Power MOSFET Switch
Stable with Low ESR Output Ceramic Capacitors
Up to 95% Efficiency
20A Shutdown Mode
Fixed 385KHz Frequency
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Wide 4.75 to 28V Operating Input Range
Output Adjustable from 1.22V
Under Voltage Lockout
Available in 8-Pin SOIC Package


8.4.3. Applications
Distributed Power Systems
Battery Chargers
Pre-Regulator for Linear Regulators
Flat Panel TVs
Set-Top Boxes
Cigarette Lighter Powered Devices
DVD/PVR Devices


8.4.4. Absolute Maximum Ratings




8.4.5. Electrical Characteristics
8.4.6. Pin Functions
Pin1:BS
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel
MOSFET switch. Connect a 10nF or greater capacitor from SW to BS to power the high
side switch.
Pin2:IN
Power Input. IN supplies the power to the IC, as well as the step-down converter
switches. Drive IN with a 4.75V to 28V power source. Bypass IN to GND with a suitably
large capacitor to eliminate noise on the input to the IC.
Pin3:SW
Power Switching Output. SW is the switching node that supplies power to the output.
Connect the output LC filter from SW to the output load. Note that a capacitor is required
from SW to BS to power the high-side switch.
Pin4:GND
Ground.
Pin5:FB
Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a
resistive voltage divider from the output voltage. The feedback threshold is 1.222V.
Pin6:COMP
Compensation Node. COMP is used to compensate the regulation control loop. Connect
a series RC network from COMP to GND to compensate the regulation control loop. In
some cases, an additional capacitor from COMP to GND is required.
Pin7:EN
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn
on the regulator, drive EN low to turn it off. An Under Voltage Lockout (UVLO) function
can be implemented by the addition of a resistor divider from VIN to GND. For complete
low current shutdown its needs to be less than 0.7V. For automatic startup, leave EN
unconnected.
Pin8:SS
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS
to GND to set the soft-start period. A 0.1F capacitor sets the soft-start period to 10ms.
To disable the soft-start feature, leave SS unconnected.


8.5. IRF7314

Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device design that HEXFET
Power MOSFETs are well known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications. The SO-8 has been
modified through a customized leadframe for enhanced thermal characteristics and
multiple-die capability making it ideal in a variety of power applications. With these
improvements, multiple devices can be used in an application with dramatically reduced
board space. The package is designed for vapor phase, infra red, or wave soldering
techniques.
8.5.1. Absolute Maximum Ratings


7314 (TA = 25C Unless Otherwise Noted)




8.6. FDC642P

8.6.1. General Description
This p-channel 2.5V specified MOSFET is produced using Fairchild's advanced
PowerTrench process that has been especially tailored to minimize on state resistance
and yet maintain low gate charge for superior switching performance.

8.6.2 . Features




8.6.3. Absolute Maximum Ratings
8.6.4. Connection Diagram




8.7. NTGS3446

8.7.1. General Description

NTGS3446 is an N-channel power mosfet with 5A continuous drain current and low
Rds(on) voltage.

8.7.2 . Features




8.7.3. Absolute Maximum Ratings

Tc=25C unless otherwise noted
8.7.4. Connection Diagram




8.8. 74HCT4053

8.8.1. General Description
The 74HC/HCT4053 are high-speed Si-gate CMOS devices and are pin compatible with
the "4053" of the "4000B" series. They are specified in compliance with JEDEC standard
no. 7A.
The 74HC/HCT4053 are triple 2-channel analog multiplexers/demultiplexers with a
common enable input (E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs
(S1 to S3).
With E LOW, one of the two switches is selected (low impedance ON-state) by S1 to S3.
With E HIGH, all switches are in the high impedance OFF-state, independent of S1 to
S3.
VCC and GND are the supply voltage pins for the digital control inputs (S1, to S3, and
E). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC as a positive limit
and VEE as a negative limit. VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).

8.8.2. Features
Low "ON" resistance:
80 W (typ.) at VCC - VEE = 4.5 V
70 W (typ.) at VCC - VEE = 6.0 V
60 W (typ.) at VCC - VEE = 9.0 V
Logic level translation:to enable 5 V logic to communicate with 5 V analog signals
Typical "break before make" built in
Output capability: non-standard
ICC category: MSI



8.8.3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating


8.8.4. Absolute Maximum Ratings




8.8.5. Pin Description
8.8.6. Function Table




8.9. 74HC4052

8.9.1. General Description

The 74HC/HCT4052 are high-speed Si-gate CMOS devices and are pin compatible with
the "4052" of the "4000B" series. They are specified in compliance with JEDEC standard
no. 7A.
The 74HC/HCT4052 are dual 4-channel analog multiplexers/demultiplexers with
common select logic. Each multiplexer/demultiplexer has four independent
inputs/outputs (nY0 and nY3) and a common input/output (nZ). The common channel
select logics include two digital select inputs (S0 and S1) and an active low enable
input. (E'). With E' LOW, one of the two switches is selected (low impedance ON-state)
by S0 and S1. With E' HIGH, all switches are in the high impedance OFF-state,
independent of S0 and S1.

VCC and GND are the supply voltage pins for the digital control inputs (S1, S1, and E').
The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog
inputs/outputs (nY0 and nY3, and nZ) can swing between VCC as a positive limit and
VEE as a negative limit. VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).

8.9.2. Features

Low "ON" resistance:
80 (typ.) at VCC - VEE = 4.5 V
70 (typ.) at VCC - VEE = 6.0 V
60 (typ.) at VCC - VEE = 9.0 V
Logic level translation:to enable 5 V logic to communicate with 5 V analog signals
Typical "break before make" built in
Output capability: non-standard
ICC category: MSI



8.9.3. Applications

Analog multiplexing and demultiplexing
Digitalmultiplexing and demultiplexing
Signal gating


8.9.4. Absolute Maximum Ratings
8.9.5. Pin Description




8.9.6. Function Table
8.10. TDA2822M

9.10.1. General Description
The TDA2822M is a monolithic integrated circuit in 8 leap minidip package, intended for
use as dual audio power amplifier in a wide range of applications in radios, portable
cassette players and TV sets.

8.10.2. Absolute Maximum Ratings




8.10.3. Thermal Data
8.10.3. Electrical Characteristics (Bridge Mode)

Vs=6V, Tamb=25C Unless otherwise specified




8.11. 24C64

8.11.1. General Description
24C64 is a 64Kbit E2PROM. The device is organized as four blocks of 8K x 8K-bit
memory with a 2-wire serial interface. Low-voltage design permits operation down to
1.8V, with standby and active currents of only 1 A and 1 mA, respectively. It has been
developed for advanced, lowpower applications such as personal communications or
data acquisition. The 24XX64 also has a page write capability for up to 32 bytes of data
and a random or sequential page read capability up to the 64K boundary. Functional
address lines allow up to eight devices on the same bus, for up to 512 Kbits address
space.

8.11.2. Absolute Maximum Ratings
8.11.3. Pin Connections




8.12. 24LC21

8.12.1. General Description

24LC21 is a 1Kbit E2PROM, organized by 8 bits. This device operates in two modes:
Transmit Only mode and I2C bidirectional mode. When powered the device is initially in
transmit only mode with E2PROM data clocked out during the rising edge of the signal
applied on VCLK. The device switches to the I2C bidirectional mode upon the falling
edge of the signal applied on SCL pin. The device can not switch from the I2C
bidirectional mode to the Transmit only mode(except power off-on). The device can
operate with a power supply value as low as +2.5V

8.12.2. Absolute Maximum Ratings




8.12.3. Pin Connections
9.OPEN-SHORT CIRCUIT PROTECTION
In case of a component fault(open or short) there is a risk of exceeding the maksimum
current rating for each of the power supply voltages. So a protection application is
implemented in 17MB20. When the TV is ON if one of the ON Mode voltages (+8V, +5V,
+3.3V and +12V) goes below the +2V threshold level the protection circuit pulls the
PROTECT signal to low and the controller takes the chassy into Standby Mode. Since
these voltages are only present in ON Mode, they are all switched off in the Standby
Mode. Hence the risk of fire or component damage is prevented.




For the other voltages the above application cannot be implemented. So fuses are
inserted serially in the required power supply lines in order to avoid component damage
in case of a component failure. The fuse positions and ratings are given in the below
table:

Voltage
Fuse Voltage Current
Rating
Position Label Rating
AC DC
F600 +12V_INV 7A 32V 32V
F601 +12V_PSU 5A 32V 32V
F603 +3V3Stb 500mA 32V 63V
F100 +12VStb 5A 32V 32V
F102 +12V_AUD 1A 32V 63V

In a possible case of fuse replacement, the inserted fuse must satisfy the above
specifications. The fuses are subjected to inrush current for some time time interval,
which may cause fuse interruption after service replacement. So, it is recommended to
replace the fuses with the original part numbers. The current vs. time graph is given
below.
10.SERVICE MENU SETTINGS

Remote control code for openning the SERVICE MENU: MENU 4725

1. First APS
2. BURN_IN_MODE
3. FACTORY MENU
3.1.1. Language
Svenska, Dansk, Trke, Hungarian, Czech, Polish or Croatian>
3.1.2. Country
Italy, Norway, Netherlands, Portugal, Poland, Swenden, Slovenia,
Slovakia,Turkey, S.Afrika, Others, Japan, Korea, America, Austria,
Belgium, Switzerland, Czech Rep.>
3.1.3. Volume <0..63>
3.1.4. Teletext Region
< East Europe, West Europe, Cyrillic, Turkish/Greek, Arabic/Hebrew >
3.1.5. Menu Colour
3.1.6. PC Sharpness <0..31>
3.1.7. PC Colour <0..63>
3.1.8. Picture Mode
3.1.8.1.1.1. Brightness (Bright) <0..63>
3.1.8.1.1.2. Contrast (Bright) <0..63>
3.1.8.1.1.3. Colour (Bright) <0..63>
3.1.8.1.1.4. Sharpness (Bright) <0..31>
3.1.8.1.1.5. Brightness (Standard) <0..63>
3.1.8.1.1.6. Contrast (Standard) <0..63>
3.1.8.1.1.7. Colour (Standard) <0..63>
3.1.8.1.1.8. Sharpness (Standard) <0..31>
3.1.8.1.1.9. Brightness (Soft) <0..63>
3.1.8.1.1.10. Contrast (Soft) <0..63>
3.1.8.1.1.11. Colour (Soft) <0..63>
3.1.8.1.1.12. Sharpness (Soft) <0..31>

4. VCTI DAC Adjust.
4.1.1. Cutoff Red <0..511>
4.1.2. Cutoff Green <0..511>
4.1.3. Cutoff Blue <0..511>
4.1.4. Whitedrv. Red <0..511>
4.1.5. Whitedrv. Green <0..511>
4.1.6. Whitedrv. Blue <0..511>
4.1.7. PAL CVBS Brigh <0..63>
4.1.8. PAL RGB Brigh <0..63>
4.1.9. NTSC CVBS Brigh <0..63>
4.1.10.NTSC RGB Brigh <0..63>
4.1.11.PAL CVBS Color <0..63>
4.1.12.PAL RGB Color <0..63>
4.1.13.NTSC CVBS Color <0..63>
4.1.14.NTSC RGB Color <0..63>
5. Txt & FE OSD Settings
5.1.1. Txt&FE OSD H-Shift <0..255>
5.1.2. Txt&FE OSD V-Shift <0..255>
5.1.3. Txt H-Shift Split Screen <0..255>
5.1.4. Txt&FE OSD Pixel Clock <0..255>
5.1.5. YDELAY PAL <0..3>
5.1.6. YDELAY NTSC <0..3>
5.1.7. PKCOR (RF) <0..31>

6. Options1
6.1.1. IDTV
6.1.2. SVHS-EXT2
6.1.3. FRONT-AV
6.1.4. SVHS
6.1.5. PC
6.1.6. YPBPR
6.1.7. BLUE SCREEN
6.1.8. SEARCH FOR BG, DK, I
6.1.9. SERAC FOR L/L'
6.1.10.Pref. Search Standard
6.1.11.Station Ident
6.1.12.POWER ON TO STANDBY
7. Options2
7.1.1. Tuner Options
7.1.1.1.1. Control Byte <128..256>
7.1.1.1.2. BSW1 <0..256>
7.1.1.1.3. BSW2 <0..256>
7.1.1.1.4. BSW3 <0..256>
7.1.1.1.5. VHF1-3-L <0..256>
7.1.1.1.6. VHF1-3-H <0..256>
7.1.1.1.7. VHF3-UHF_L <0..256>
7.1.1.1.8. VHF3-UHF_H <0..256>
7.1.1.1.9. Top Setting-PAL <0..15>
7.1.1.1.10. Top Setting-SECAM <0..15>
7.1.2. Blue Back. On Menu
7.1.3. Dynamic Bass On Menu
7.1.4. Vir. Dolby On Menu
7.1.5. APS Delay Time(ms) <0..250>
7.1.6. Video Peaking <-8..15>
7.1.7. Comb Filter/CTI/LTI
7.1.8. APS Test Mode
8. Audio Options
8.1.1. Carrier Mute
8.1.2. FM Presc_AVL_off <0..256>
8.1.3. NICAM Presc_AVL_off <0..256>
8.1.4. Scart Presc_AVL_off <0..256>
8.1.5. FM Presc_AVL_on <0..256>
8.1.6. NICAM Presc_AVL_on <0..256>
8.1.7. Scart Presc_AVL_on <0..256>
8.1.8. Line-out Via HP
9. 9-Auto calibration
9.1.1. Exit
9.1.2. AutoColor
9.1.3. AdcGain
R 99 G 99 B 99
9.1.4. ADC Offset
R 133 G 129 B 145
9.1.5. Color temp Cool
9.1.6. Gain
R 140 G 140 B 140
9.1.7. Offset
R 118 G 120 B 127
9.1.8. Con Max 145
9.1.9. Bri Mid 104
9.1.10.Color 32
9.1.11.Sharp 9

10. 10-INIT NVM
11. 11-SELECTED PANEL

Remote Control Type: RC1090, OTHERS, RC1243

SW Version 17MB20_STD_0.0.XX




11. BLOCK DIAGRAMS AND SCHEMATICS

17MB20 Block diagrams and schematics are give in the following pages.
+12V

+5V

+8V

+12V
+3V3 DVB DVB_I2C

+3V3Stb Self +33V
Module SW_I2C
17PWI20 Oscillating MUTEPORT DVB_AGC
Power Regulator 74HC4053
PVCC Interface +12V_AUD BKL_ON/OFF
Board TV_AGC SW_AGC
PVCC_ON/OFF
+5VStb
IF
I2C TUNER
IF




DVB_SW
STBY_ON/OFF IF




Y/G
PL100




B/C
CVBS
Soft +12VStb




R
Series
Switch




UART1
MECH_SW Regulator +5VStb IF




IRQ
+1V8 E2PROM
I2C 24LC64
SAW
+1V8Stb Filter
Transistor
BKL_ON/OFF Switch
+12V_INV +12V_PSU
PL400




BRT_ADJ STBY_ON/OFF RGB, CVBS / Y, C Option
HW I2C


BKL_ON/OFF PVCC
Adaptor CS
DC INPUT
LVDS CLK/DATA

MUTEPORT
MUTEPORT VCT- I TSU33AWL-LF
HW_RESET
PVCC_ON/OFF 15" up to XGA
TDA2822M
Panel
2X2WRMS
DVB_L/R_IN




BRT_ADJ
RGB,HS,VS




PROG_STATUS
PROG_STATUS




RGB,HS,VS /
YPbPr, SOY
74HC4052 SW_L/R_IN E2PROM
24LC21
DVB_SW
AV_STATUS


DDC I2C
SPK_L/R+
SPK_L/R-




HW_I2C




SC_L/R_OUT
LINE_L/R_OUT




AV_STATUS
SC_V_OUT
SC_L/R_IN




RGB, FB
SC_V_IN
PC_L/R_IN Transistor
Switch




PL300
UART2
SIDE Y/C
BAV_CVBS


MAIN Y/C
HP_L/R_OUT


PC_L/R_IN




BAV_L/R_IN
PC_L/R_IN




VGA
SAV_L/R_IN




DVB_UART/
SAV_CVBS




HW_I2C




SPK_L/R+
16R 16R