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S
®
Training Manual
Direct View Television
DX-1A Chassis
Models: KV-32XBR400 KV-36XBR400
Circuit Description and Troubleshooting Course: DTV-02
Table of Contents
Introduction DTV Converter Boxes
USA Analog Transmission Format USA Digital Transmission Formats Digital TV (DTV) Converter Boxes
2 3
3 5 5
Testing
35
Horizontal Drive / H Pincushion Correction / Filament Voltage
Basic Horizontal Drive Circuit PMW Circuit Filament Voltage
37
37 37 39
New Features Overall Block SD to HD Conversion Concept Video Block Picture with Picture Power ON Block
Power Supplies Standby Power Supply Primary & Secondary Power Supplies
9 11 15 21 27 29
29 29 29
G2 Circuit HV Converter Block
Start Up Protection / Shutdown HV Adjustment Testing
41 43
43 43 43 45
Communications Dynamic Focus Block
Static Focus Concept Dynamic Focus Concept Circuitry Adjustment
47 51
51 51 51 55
Primary Power Supply
Start Up Regulation Testing
31
31 31 33
DQP Circuit Corner Focus Correction Convergence Circuit
Concept Circuitry
57 61
61 61
Secondary Power Supply
Start Up Regulation
35
35 35
Adjustment
61
Appendix
Service Mode Display Digital Satellite System Converter Box DTV Set Top Box IEEE-1394 DX-1A Chassis Assembly Board Replacement HV Adj. check Bulletin 492 i ii iii iv vii viii ixi
Picture Tilt Correction Vertical Pincushion Correction Circuit
Concept Adjustment
63 65
65 65
Vertical Process Audio Block Diagram
Features Signal Path
67 71
71 71
Self Diagnostic Block Self Diagnostic Circuit
73 75
1
NOTES
Introduction
This model KV32XBR400 is a high resolution TV designed to bridge the gap between the current analog TV sets and the forthcoming high definition digital TV (HDTV) sets. This set can accept the current standard resolution NTSC TV transmissions, DVD, VHS, and Camcorder video signals, convert them, and display them on a high-resolution TV screen. An external set top converter box is necessary to receive Digital TV programs. Related Models
Circuitry Information
The power consumption and self-diagnostics remain the same as other Sony TVs. This set's change to high-resolution video results in circuitry changes to the video processing, horizontal frequency (fixed at 33.75kHz), and high voltage generation.
Power Consumption at 120Vac Snow 1.2 A Dark screen/video 1 1.1 A Surge 6 A (degaussing)
DX-1A TV Chassis Models Model KV32XBR400 KV36XBR400 Screen size 32 diagonal 36 diagonal Aspect Ratio 4:3 4:3 MSRP
Item General Servicing Information Location Circuits on A & D boards. Indicator on front panel. Comments Standby/Timer LED blinks to ID problem area. Self Diagnostics Filament Voltage High Voltage Converter G2 (Screen adjustment) Focus Control
$1999.99 $2499.99
Higher Resolution Inputs
This TV can also accept standard resolution 480p or high resolution 1080i video signal formats from an external HDTV, satellite, or cable converter box as component video (Y, Pb, Pr) inputs. These 480p and 1080i signals can have a wide 16:9 aspect ratio. If they do, the display will be in letterbox format with black above and below the picture on the 4:3 aspect ratio picture tube of these TV sets. Only the Digital TV's 720p resolution video format cannot be displayed on this set. The picture will not be synchronized.
KV32XBR400 / KV36XBR400Inputs Name RF Video 1-4 + Stereo jacks Video 5-6 + Stereo Jacks Control S NTSC S or Composite video: Standard resolution 480 interlaced lines (480i). Component video: Standard Resolution 480i, 480p or High Resolution 1080i format Sony Format Source VHF, UHF, Cable Video tape recorder, camcorder, DVD player, TiVO recorder DTV, Satellite, or Cable Converter box Audio Equipment
From 7V, A Bd The CRT filament (Primary PS) and HOT voltage comes from 2 transformer, D Bd. sources. D board near flyback On the CRT board AFC signal from HOT turns ON HV Converter. Adjustment is in the board replacement guide (appendix).
Adjust for sharp picture center and sides Filament Voltage - This CRT voltage comes from two sources: · Unregulated 7V supply from the Primary Power Supply on the A board (used as a preheat). · The HOT (horizontal output transformer) after a 6Vdc regulator on the D board (main filament voltage supply).
High Voltage Generation - An independent HV oscillator circuit with a special high frequency flyback transformer regulates the HV to 31.5kV. The HV converter stage is turned on only after the Horizontal drive signal from the HOT is detected.
On the FBT
2
3
DTV Converter Boxes
In order to compare converter box specifications you need to understand how resolution is measured in the interlaced and progressive scan methods. With this information you can also determine which one of the 18 digital formats offers better resolution.
picture is not seen and the picture is normally over-scanned (larger than the TV screen). Therefore, the TV resolution is said to be "480" (horizontal) lines instead of the transmitted 525 lines.
USA Analog Transmission Format
Interlaced and Progressive Scanning In the NTSC television transmission format a complete picture (frame) consists of two pictures (fields) interlaced together. Each half picture is a field of 262.5 scanned lines. Therefore a complete picture is 262.5 x 2 = 525 lines. The two scanned fields are interlaced so the second field of 262.5 lines fits in-between the first field.
Interlaced Scan
Resolution
The two most popular methods of measuring picture resolution are in pixels (dots) or in lines. Incremental dots called pixels are often associated with monitors. Lines of resolution is a measurement for TVs. In the monitor specifications, the number of vertical pixels is listed first. In the TV specifications, the number of horizontal lines is listed first. For these examples of specifications, a high-resolution monitor and (digital) TV standard were chosen:
Monitor Spec 1024 X 1800
Field 1
+
Field 2
=
Frame
1024 x 1800 pixels
If a picture is not interlaced, it is a progressive scan image (not NTSC format). This means the entire picture frame is presented in the first scan and a second picture is presented in the second scan.
Progressive Scan
TV Spec
X Field 1 = Frame 1080 x 1920 lines
Although the semantics are different (vertical pixels/horizontal lines), the first number in both specifications is the maximum number of black to white transitions that can occur as you count from the top of the screen to the bottom. In the current NTSC (National Television Standards Committee) TV transmission standard, 525 horizontal lines are transmitted but only about 480 lines are visible. This is because the vertical blanking area above the
30 or 60 Frames? In the NTSC standard the first field takes 1/60 second to scan a screen of 262.5 lines. Then a slightly smaller vertical sync pulse in the second field is created and the second picture field is shifted lower than the first to fit in-between. The second field also takes 1/60 sec., completing the entire picture frame in 1/60 + 1/60 = 2/60 sec = 1/30 sec.
DTV Set Top Converter Boxes (as of July, 2000)
RF Inputs Ch 1-125 Cable DTV * Ch 2-69 Analog TV Small dish Satellite Ch 1-99 Digital TV X X X X X X X X X X X X Video Output Standard Resolution High Resolution Format (# Horiz lines) Audio Output Digital Analog
Comp Video
RGB,H,V **
RF(Ch 3/4)
IEEE 1394
Y, Pr, Pb
S Video
Optical
L&R
Coax
Mfg. Model RCA DTC-100 Panasonic TU-HDST50 TU-HDS20 Pioneer SH-DO7 SH-D505 Mitsubishi SR-HD400 SR-HD500 Sony DTR-HD1 SAT-HD100 Sharp TUDTV1000 Proscan PSHD105 Samsung SIRT100
X X X X X
X X X
X X
X ? ? ? ? X X X X X X
X X X X X X X X X X X X
X X X X X X X X X X
X X X X X X X
X X X
X X X
? ?
? ?
X
X
VGA 1080i/540p 720p BNC ? 1080i *** BNC 1080i/ 720p/480p ? ? phono 1080i VGA 1080i/480p VGA/ 1080i/480p BNC VGA 1080i/540p ? 1080i/480p
X X X X X X X X X X X X
X X X X X X X X X X X X X X
X
X = Yes ? = insufficient information blank = No
* DTV must be 8VSB modulation (like terrestrial ATSC DTV transmissions) ** VGA = computer monitor jack (15 pin D type) BNC = BNC connectors, one for each of the signals *** Connection to Pioneer model PRO-700HD TV only.
4
5
30I Picture Format 1/60 sec. Field 1 1/60 sec. Field 2 = 2/60 second or 1/30
USA Digital Transmission Formats
There are 18 digital transmission formats approved by the ATSC (Advanced Television Standards Committee) in the USA. The first six offer HD (high definition/resolution) signals in a 16x9 aspect ratio. The remaining 12 formats are SD (standard definition) signals in progressive (p) or interlaced (i) scan. Note that the 480p signal can be a 4:3 or 16:9 aspect ratio transmission.
+
The NTSC format is commonly written as "30i" picture format because it takes 1/30 of a second to complete an interlaced picture. Aspect Ratio Although the first pictures were round, later TV pictures adopted a rectangular shape. The aspect ratio of these pictures is the same as they are today, 4 x 3 ratio.
3 4 16 9
18 Digital Transmission Formats Resolution 1. 1080x1920 2. 3. 4. 720 x 1280 5. 6. 7. 480x 704 8. 9. Aspect Ratio 16:9 16:9 16:9 16:9 16:9 16:9 16:9 16:9 16:9 Frame 30 i 30 p 24 p 60 p 30 p 24 p 60 p 30 i 30 p Resolution 10. 480x 704 11. 12. 13. 14. 15. 480x 640 16. 17. 18. Aspect Ratio 16:9 4:3 4:3 4:3 4:3 4:3 4:3 4:3 4:3 Frame 24 p 60 p 30 i 30 p 24 p 60 p 30 i 30 p 24 p
Movie theaters show films in a wider 16x9 aspect ratio. This 16x9 picture is also the way most films are shot. To present the original 16x9 picture on a 4x3 TV screen, one of two common methods is adopted to fit the picture: In method 1, the 16x9 picture is cropped or cut off at the left and right. The main action part of the picture (usually the center or near center) is the only part transmitted.
Method 1 Cropping Center of 16 x 9 picture Shaded area Cropped/ removed
A standard definition transmission contains less data, permitting space for another digital video stream to coexist on the same frequency (channel). Therefore, a station can have more than one program stream on a digital channel. The maximum number of programs is six.
In method 2, the 16x9 picture is shrunken and placed on the TV screen. The entire picture is seen but with black areas above and below the picture. This method of viewing the entire 16x9 picture on a 4x3 set is called a Letterbox picture. Letterbox pictures can be selected on some DVD players and TV sets from the menu if the DVD or TV transmissions offer it.
Method 2 Letterbox Entire 16x9 Picture
Digital TV (DTV) Converter Boxes
TV broadcasters are transmitting their analog signals on one channel and their DTV signals on another. A list of their analog and digital channel assignments by state is located at www.transmitter.com. To receive a DTV station on an analog TV, a set top converter box is used. The box receives digital RF and outputs analog composite video to the TV. The boxes can also output higher resolution video signals to a high-resolution analog TV. These cable boxes are flexible at their input and outputs:
RF inputs:
Channels 1-99 Digital TV The TV converter boxes listed in the chart all decode DTV signals from off the air (terrestrial) in the USA and Canada. These TV stations conform to the DTV ATSC format that approves an 8VSB modulation method. The new digital channel numbers are frequencies within the current analog Channels 2-69. Ch 1-125 Cable DTV At this time some cable TV companies are providing DTV service using 8VSB modulation and other cable companies sell DTV service using QAM modulation. The 8VSB modulation means this method is probably the same as the off the air ATSC (DTV) signal. This means if the DTV converter boxes can receive the cable band, they can decode the cable DTV signal. Cable companies using a QAM (Quadrature Amplitude) Modulation method require their DTV boxes for processing. 950-1.45GHz Satellite In competition with cable companies are Direct Broadcast System (DBS) companies that provide satellite TV channels. The larger analog signal DBS dishes that operate on the "C" band were not as popular as the smaller "Ku" band digital signal dishes. A satellite manufacture can either provide the TV service directly to the consumer, rent transponders (space) to other providers, or both. Some of the larger companies are:
A few converter boxes can receive digital satellite signals. This combination of DTV and satellite decoding in one box is feasible because the decoding circuitry is similar. It is uncertain if these converter boxes can decode the new satellite high definition DTV signals.
Video Outputs
The converter boxes output standard resolution and high-resolution signals. All the boxes can down convert a 1080, 720 or 480 line input signal into a standard resolution 480i picture for an analog TV. This standard resolution output comes from the S or composite video jacks of the box. For the higher resolution TVs that are coming out now, there is a component (Y, Pr, Pb) and/or RGB output from the box. The RGB +sync output could be five individual BNC jacks or a single VGA connector, such as the ones found on the back of a home computer for its monitor. After the correct mechanical connection is made, the signal format from the box must match that of the high resolution TV. The box's output signal formats are menu selectable for box to TV compatibility. For example if the TV accepts 1080i signal format, the box's output must correspond with the same output signal format. If a 1080 format DTV signal is received, the box will convert it from an RF signal, unscramble it, separate the audio, video and data, and then uncompress the audio and video. The video will be changed into component video or RGB voltages that are input to the TV. The sync is on the Y line in the component video signal. If a standard resolution 480 format DTV signal is received, the same signal processing occurs but there is an additional scan converter to double the information before leaving as a 1080i format signal for the hich scan TV.
Satellite Manufactures GM Hughes Electronics EchoStar/Dish Network (HD 1080i) DBSC (Direct Broadcast Satellite Corp) Direct Sat Tempo ACC (advanced Communications Corp)
Providers Direct TV PrimeStar
Audio Outputs
All the converter boxes have composite video output and corresponding analog audio L&R channel outputs. Some boxes have digital optical and/ or coax outputs for a Dolby AC-3 decoder (often in a receiver). One converter box has an IEEE 1394 output for decoding the signal in a SVHS
Satellite reception is vulnerable to rain scattering the signal and the sun's microwave energy overpowering the satellite signal. The solar outages may occur only for minutes during the time span of a week or two during the spring and fall equinoxes. At these times the sun is behind the target satellite adding noise to the signal.
6
7
recorder. The IEEE-1394 format is also called i.LINK, or Firewire " because of the convenience or high speed. Customarily, both video and audio is sent on this 4-wire cable. More about the IEEE-1394 format is found in the appendix of this book. Dolby is a registered trademark of Dolby laboratories. Fire Wire is a trademark of Apple Computer Inc.
i.LINK is a trademark of Sony.
NOTES
8
9
New Features
FD Wega Picture Tube
The Sony flat screen picture tube is a full flat screen inside and outside.
Sony FD Glass screen Electron beam Non-Sony Picture Tube
Parent Menu
This allows the owner to block TV programs according to their content. Entering the owner's four-number password enables viewing of the blocked programs. The owner's password can be cleared with the master password 4357 ("HELP"). The owner's password can also be reset from the service mode by pressing 8, then enter.
Set Up Menu - 16:9 Enhanced
A 480p input signal can be in 4:3 or 16:9 video format.
Favorite Channel Preview
Pressing the Favorites remote button reduces the main picture and displays a small picture of another (favorite) station. As you move the joystick down the list of numbers, the preview picture changes to that station. Select that station by pressing enter.
Favorite Channel Display
Letterbox picture
16:9 Pix
Black border
Preview Main Pix
The wide 16:9 video format produces a picture on a 4:3 picture tube that is too tall. From the Auto/ON/OFF selections of the set up menu, choose 16:9 Enhanced = ON to reduce the vertical size of the picture so the picture is the correct aspect ratio. The "Auto" selection reduces the picture size if there is an ID-1 signal in the vertical blanking area of the input signal. The ID-1 signal identifies the video signal as 4:3 or 16:9 format. Sony 16:9 camcorders insert the ID-1 information into the video during recording.
Channel Numbers
New Picture Mode = Pro
The basic video modes are Vivid for use in bright daylight, Standard for reduced brightness in the home, and Movie for evenings. The Pro video mode is new. This mode darkens the picture and centers its dark to bright operating range for the widest dynamic picture swing. This mode is meant for pro movie watchers in a darkened room where the subtle dark to gray changes are made evident. The video settings (picture, brightness, color, etc) can be changed in any mode.
Video Menu - DRC-MF
Select an Interlace or Progressive mode display from the Video menu under "DRC-MF". Interlace is selected when watching moving images. The Progressive mode is selected only when many non-moving images are displayed, such as text or a still photograph. Selecting the Progressive mode stops the flickering that occurs in an interlaced picture when the two interlaced fields are not exactly the same. This interlace/progressive is not an option with a 1080i input
NOTES
10
11
Overall Block
The only conventional block within this TV is the vertical block. The remaining blocks are different because this TV is a high-resolution type with a "Wega"® flat screen. Therefore, changes to the power supply, horizontal frequency, convergence, focus, and video processing support the improved picture. Power Supply The power supply is in three parts to divide the load on the boards:
Power Supplies Board Standby Primary Power Supply Secondary Power Supply A A Purpose Outputs Standby 15V, 7V, & 5V. Outputs Set 9V, Set 5V, & Set 3.3V to local parts on the A, B, & BD boards. Outputs Pri-Pre 15V to start the Secondary PS. Outputs +200V, +135V, +24V (audio), Main 12V, Main 9V, & Main 5V to the D board.
V Pin Distortion
Top & bottom lines bowed in (exaggerated)
Horizontal Deflection The higher 33.75kHz horizontal frequency is made by IC201 and fed to the H Drive/Output stage on the D board. The output stage is fed regulated voltage from the +135V Secondary power supply via the PWM circuit of IC5002. The horizontal drive stage not only supplies the H Deflection yoke (H DY) with scan voltage, but also supplies G2 and filament voltage for the CRT. A regulated +200V is also output to supply the RGB output amplifiers on the C board. Horizontal AFC pulses from this stage are needed by the convergence and dynamic focus stages for sync. The AFC pulses are used to start the HV Converter. HV Converter Regulated HV and focus voltage is made by the HV Converter stage. It uses +200V from the secondary power supply to run and AFC pulses from the horizontal deflection stage to start. Horizontal Pincushion Correction To keep the lines at the left and right of the screen straight, an east/west (E/W) H pincushion correction signal is made in IC201. The E/W signal is used to modulate the PWM IC5002 that controls picture width. By changing the width line-by-line, the left and right sides in the large picture can be straightened.
D
The Primary power supply starts the secondary supply using a Pri-Pre 15V line. Once the Secondary power supply operates, Main 9V outputs to start the horizontal and vertical oscillators in Y/C CRT Drive IC201. Vertical Deflection In some Sony TV sets, there is no V Drive output the Y/C IC until data and clock are input. Unlike these TV sets, this IC201's vertical will output when power is applied. The sync source is dependent upon whether progressive, interlace or a sub picture is chosen. The vertical oscillator output is amplified by IC5004 on the "D" deflection board to drive the DY deflection yoke. Vertical Pincushion Correction As the TV screen becomes larger, the yoke can not perfectly control the beam at the screen perimeter. An additional coil on the top and bottom of the CRT neck assembly is fed V Pin correction signal from IC201 and IC5514. The additional coil eliminates any minor inward/outward bow at the top and bottom of the picture.
H Pin Distortion
Sides bowed in (exaggerated)
TUNERS VIDEO 1-4 VIDEO 5-6
VID IC3048 SW 480i SYNC
IC3303/ IC3408 DRC/MID 480p SYNC 1080i
MAIN 9V IC3414 SW A BD. +200V (HOT) C BD. RGB IC9001-3 RGB OUT IK CRT CATHODES
B BD.
E/W
H DRIVE = 33.75kHz
CRT VPIN FILAMENT COIL ON V DRIVE 200V CRT Q5026-8, C BD. NECK Q5035-6, G2 Q5030 IC5514 V IC5004 H DRIVE V PIN DY FOCUS V OUT H OUTPUT OUT H HV 100V DY IC5511 DF/DQP IC5513, VTIM CY IC5002 COILS IC5515 IN PWM CONV. DY IC8002 +135V HV CONV. AFC 200V
IC201 Y/C CRT DRIVE
VTIM (IC5513) STANDBY
STBY 15V 7V 5V IC5501 NVM (D BD.) IC707 NVM
IC701 MAIN uCOM D6530 POWER ON
340VDC + 15V SECONDARY P.S PRE 15V
SET VOLTAGES PRIMARY P.S 9V 5V 3.3V A BD.
D BD.
MAIN VOLTAGES 12V,9V,5V,24V
OVERALL BLOCK
48DTV02 1273
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13
Convergence of the Three Beams The good news is that the complex convergence signal is made in one IC5513 and the signal is amplified in the second IC5515. The output signal drives a convergence yoke inside the main horizontal and vertical deflection yoke. The convergence stage affects the beams at the perimeter of the screen. Dynamic Focus Correction As a beam is deflected, the points of focus form a curve. The focus points have to be moved to match the flat screen of the TV. A signal from DF IC5511 modulates the DC focus voltage to prevent poor focus at the left and right sides of the screen. Video Processing Standard Resolution Input A standard resolution NTSC signal can be selected from either tuner or any video input. However, this high resolution TV runs at a different horizontal frequency of 33.75kHz. To accept a standard NTSC signal (480i) that runs at 15,734 Hz, the video signal is improved and the horizontal sync more than doubled. The Digital Reality Creation Circuit (IC3303) analyzes each pixel of a line to add another line. Therefore the DRC circuit doubles the number of video lines of a standard NTSC signal. The DRC also doubles the horizontal sync frequency before passing the signal onto the MID circuit on the same board. The Multi Image Driver (MID) Circuit (IC3408) stores the lines and outputs the signal based on a new horizontal frequency that matches the TV. At the higher frequency, the picture finishes before the scan. Blank lines are added as filler by this MID stage before leaving the board. High Resolution Input - Video inputs 5 and 6 are for Y, Pr and Pb component signals only. They can be standard (480i) or high resolution (480p or 1080i). The 480p signal is already high resolution at double the H freq so it need not go through the DRC circuit. It is switched directly into the MID circuit. The high-resolution 1080i picture is at the same horizontal frequency as the TV set (33.75kHz), so it does not go into the DRC or the MID circuit. The 1080i signal is switched directly to the Y/C CRT Drive IC201 on the A board. Since the 1080i signal is a wide 16:9 ratio picture, it looks squeezed in on a 4:3 aspect ratio picture tube. To make the picture look correct, the vertical can be reduced using a "16:9 enhanced" menu command. Vertical reduction can be automatically done if there is a code in the vertical blanking area of the input signal called ID-1. This signal identifies the aspect ratio of the picture.
TUNERS VIDEO 1-4 VIDEO 5-6
VID IC3048 SW 480i SYNC
IC3303/ IC3408 DRC/MID 480p SYNC 1080i
MAIN 9V IC3414 SW A BD. +200V (HOT) C BD. RGB IC9001-3 RGB OUT IK CRT CATHODES
B BD.
E/W
H DRIVE = 33.75kHz
CRT VPIN FILAMENT COIL ON V DRIVE 200V CRT Q5026-8, C BD. NECK Q5035-6, G2 Q5030 IC5514 V IC5004 H DRIVE V PIN DY FOCUS V OUT H OUTPUT OUT H HV 100V DY IC5511 DF/DQP IC5513, VTIM CY IC5002 COILS IC5515 IN PWM CONV. DY IC8002 +135V HV CONV. AFC 200V
IC201 Y/C CRT DRIVE
VTIM (IC5513) STANDBY
STBY 15V 7V 5V IC5501 NVM (D BD.) IC707 NVM
IC701 MAIN uCOM D6530 POWER ON
340VDC + 15V SECONDARY P.S PRE 15V
SET VOLTAGES PRIMARY P.S 9V 5V 3.3V A BD.
D BD.
MAIN VOLTAGES 12V,9V,5V,24V
OVERALL BLOCK
48DTV02 1273
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SD to HD Conversion Concept
This TV has features designed to bridge the gap between the current analog sets and newer higher resolution digital TV sets. The KV32XBR400 TV is a high resolution set capable of receiving the current standard definition (SD) NTSC signal. The NTSC standard resolution of 480i lines is upgraded to a 960i (interlaced) or 480p (progressive) line picture, to be compatible with this TV. The user selects interlaced scan if there is motion in the picture or progressive scan if there is a still picture signal in order to stop interlace flicker. A higher resolution (480p or 1080i) signal that does not need to be upgraded can be input to video 5 or 6 for advanced placement in the video chain. Interlaced or Progressive Scan Most technical people do not know how many horizontal lines are present on the screen in a single scan from the top of the screen to the bottom. The confusion about the number of lines shown at one time relates to the different interlace/progressive scan modes. In the progressive scan mode the entire picture is presented in one scan of the picture tube (left to right, top to bottom). In an interlaced scan the entire picture consists of two fields so the picture is presented in two scans of the picture tube. The second field is displaced from the first so the lines fit in-between each other making the completed picture:
number of lines in the total picture. The i suffix identifies an interlaced picture. Since the picture is interlaced, there is only half the number of lines presented in a single scan. In this case, there are 240 lines displayed in a single scan. This is equivalent to a 240p picture that displays 240 lines in a single scan (480i is the same as 240p).
In a single scan 1 2 3 4 5 6 12i Interlaced scan picture is 6 lines per field = 6p Progressive scan picture
Similarly a 480p picture is like a 960i picture because both these pictures present 480 horizontal lines per scan. This is important to understand as the standard resolution NTSC picture is changed to a higher resolution in the "DRC" video processing stage of this TV.
Standard Definition Video Input
The Tuner and Video 1-4 inputs accept only the NTSC 480i-line standard definition signal identified by the 15.75kHz horizontal frequency. The 480i input signal is interlaced (i), consisting of two 240-line fields presented/ scanned one at a time that total the 480 lines. Therefore a 480i NTSC picture normally displays 240 lines each time the picture is scanned. The NTSC signal passes through the DRC and MID circuits. DRC Circuit In this model KV32XBR400 high resolution TV, a single scan must contain 540 lines, more than double of a NTSC signal. The DRC circuit almost bridges the gap between the 240 line input signal and the 540 line TV requirement. The DRC circuit doubles the number of horizontal lines by analyzing the pixel data to construct new lines. Therefore the DRC circuit brings the total line count from 240 to 480. The DRC circuit also doubles the horizontal frequency to 31.5kHz to support these lines.
Field 1
Field 2
"6i" Interlaced Picture consisting of alternating lines from fields 1 & 2
The resolution of the TV picture is measured in horizontal lines of a complete picture followed by the letter for the type of scan (i or p). For example, the NTSC signal contains 525 horizontal lines. The number of viewable lines is reduced to 480 because of the time required for V & H retrace, creating a blanking area above and below the picture. Therefore the standard resolution NTSC signal displays a 480i picture. 480 is the
B BD.
A BD.
TUNER/ VIDEO 480i 1-4 IC3048 STANDARD SW NTSC RESOLUTION
Y, Pb, Pr IC3303 DRC CIRCUIT
Yo -7 Cr-7 Cb-7
H+V
IC3408, IC3410 MID-XA CIRCUIT
C BD. IIC BUS DATA/ CLK IC201 Y/C CRT DRIVE IC9001-3 RGB OUTPUT
H+V SYNC
IIC BUS
VIDEO
DATA/CLK
CRT CATHODES
Y, Pb, Pr CONT
480i VIDEO 5 VIDEO 6 480i 480p 1080i
IC3603 ID-1 DECODE 480p 1080i
IC3414 YUV SWITCH
OSD
VERT OUTPUT IC5004 (D BD.)
SD TO HD CONVERSION CIRCUIT
12DTV02
10/2/00
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17
Progressive Scan - In this example of the progressive scan video processing, an NTSC still picture signal is input from a DVD player (in pause). The user chooses progressive scan from the menu to reduce picture flicker. Flicker occurs in an interlaced picture when the two fields are not exactly the same images. The flicker is more noticeable in the movement area(s) of the picture where the fields are different. In the progressive scan mode the DRC circuit doubles the number of lines from 480i (actually 240 lines) to 480p to make the NTSC signal compat480p ible with the TV.
Tuner Video 1-4 A/V Switches 480i DRC circuit MID circuit
The MID circuit centers the picture by adding 30 blank lines above and below the picture (60 lines total). This simple method permits the TV to keep the vertical frequency at 60Hz. Therefore the MID circuit increases the number of lines from 480p to 540p but these extra lines are blank. There are still only 480 active (picture) lines.
480 active lines 540p 540 lines Expand Vertical 480p + 60 = 540p lines 480p 480i DRC circuit 960i Interlaced 960i + 120 = 1080i lines 1080 lines 1080i Expand Vertical 960 active lines (2 fields) Progressive MID Circuit Adds 60 blank lines/scan
Interlace Scan - In a second example of the video processing, an NTSC signal with live pictures is input from an antenna. The user chooses the interlace scan mode from the menu because of the moving images. Each interlaced field displays a slightly different transitioning picture making movement seem smoother. In the interlaced scan mode the DRC circuit still must double the number of lines to meet the TV's 480-line/scan requirement. The resolution is changed from 480i (actually 240 lines) to 960i (actually 480 lines) by the DRC circuit. MID Circuit Fortunately, the model KV32XBR400 TV's horizontal deflection stage scans at a 33.75kHz rate to display high definition (1080i) video signals. However The horizontal frequency output the DRC circuit is double that of NTSC at 31.5kHz. This is slower than the KV32XBR400's 33.75kHz rate. Since the TV scans at a faster rate than what is input, the picture is finished faster, leaving blank lines at the bottom.
240/480 lines 480 lines
960i Progressive or interlaced output
Vertical Expansion To keep the 60 blank lines invisible, the vertical size is expanded slightly (picture overscaned) so the 480 lines fill the 4:3 aspect ratio screen. This is seen in the previous diagram where the 60 blank lines are shown (exaggerated) in black.
15.75kHz/31.5kHz
33.75kHz
B BD.
A BD.
TUNER/ VIDEO 480i 1-4 IC3048 STANDARD SW NTSC RESOLUTION
Y, Pb, Pr IC3303 DRC CIRCUIT
Yo -7 Cr-7 Cb-7
H+V
IC3408, IC3410 MID-XA CIRCUIT
C BD. IIC BUS DATA/ CLK IC201 Y/C CRT DRIVE IC9001-3 RGB OUTPUT
H+V SYNC
IIC BUS
VIDEO
DATA/CLK
CRT CATHODES
Y, Pb, Pr CONT
480i VIDEO 5 VIDEO 6 480i 480p 1080i
IC3603 ID-1 DECODE 480p 1080i
IC3414 YUV SWITCH
OSD
VERT OUTPUT IC5004 (D BD.)
SD TO HD CONVERSION CIRCUIT
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19 High Definition Video Input
The Video 5 and 6 inputs can be standard or high definition format signals. The MID circuit distinguishes the video format by their horizontal frequencies: Video 5 or Video 6 Input Formats Horizontal Frequency 480i 15.734kHz 480p (4:3 aspect ratio) 31.50kHz 480p (16:9 aspect ratio) 31.50kHz 1080i (16:9 aspect ratio) 33.75kHz 480p Picture Process A high-resolution 480p-video format is detected by its horizontal frequency and selected by the MID circuit for video processing. The resultant picture appearance will depend upon whether the video format of the input signal is a 4:3 or 16:9 aspect ratio. 4:3 aspect ratio - The MID circuit processes a 480p, 4:3 picture the same as the 4:3 NTSC picture. The MID circuit adds 60 blank lines to the signals. The picture is normally overscanned so the 60 blank lines are not 540p seen.
480p 4:3 pix MID Circuitry Adds 60 blank lines Vert size increased 480 lines
1080i Picture Process The 1080i-video format is a high-resolution picture with a 16:9 aspect ratio at a 33.75kHz horizontal frequency. The 1080i picture actually has 540 lines/scan (half 1080). Although 540 lines would fill this picture tube vertically, the picture tube is the wrong aspect ratio. The 16:9 picture is the correct width on the TV, but is too tall because it is displayed on a 4:3 picture tube. To compensate, the vertical size is automatically reduced when a 33.75kHz input signal is detected. The final 1080i picture is a "letterbox" on the KV32XBR400:
High Definition 1080i picture on the 4:3 aspect ratio KV32XBR400 TV 16 : 9 ENHANCED (VERT REDUCTION)
Aspect Ratio Detection The picture's aspect ratio is always 4:3 for a standard 480i input and 16:9 for a 1080I input. Unfortunately a 480p signal can be in either aspect ratio so the TV must be adjusted manually. The MID circuit monitors the horizontal frequency of the input signal when video 5 or 6 is selected. If the H. input frequency is 15.734kHz or 31.5kHz, blank lines are added and the picture is normally over-scanned vertically for a 4:3 picture. If the H. input frequency is 33.75kHz, IC201's (A board) vertical oscillator signal is amplitude reduced to maintain the correct aspect ratio for a 1080i, 16:9 picture on a 4:3 picture tube. Vertical reduction must be manually selected from the user's setup menu when a 480p 16:9 signal is input.
16:9 aspect ratio - The MID circuit does have to add 60 lines to the 480p, 16:9 picture when the horizontal frequency is changed. When this 16:9 picture is placed on a 4:3 screen, the picture is too tall (screen width was reduced). To maintain the aspect ratio of the picture, the vertical size must be manually reduced so the picture looks normal on the TV's 4:3 screen.
480p 16:9 pix MID Circuitry 540p 540p
Picture Compensation using Horizontal Frequency Resolution Aspect Horiz Freq Vertical Lines Ratio Compensation added 480i 4:3 15.734kHz Normal Overscan Yes 480p 480p 1080i 4:3 16:9 16:9 31.50kHz 31.50kHz 33.75kHz Normal Overscan Yes Manual Reduction Yes Automatic Reduction No
4:3 Pix Tube
Vertical size reduced
B BD.
A BD.
TUNER/ VIDEO 480i 1-4 IC3048 STANDARD SW NTSC RESOLUTION
Y, Pb, Pr IC3303 DRC CIRCUIT
Yo -7 Cr-7 Cb-7
H+V
IC3408, IC3410 MID-XA CIRCUIT
C BD. IIC BUS DATA/ CLK IC201 Y/C CRT DRIVE IC9001-3 RGB OUTPUT
H+V SYNC
IIC BUS
VIDEO
DATA/CLK
CRT CATHODES
Y, Pb, Pr CONT
480i VIDEO 5 VIDEO 6 480i 480p 1080i
IC3603 ID-1 DECODE 480p 1080i
IC3414 YUV SWITCH
OSD
VERT OUTPUT IC5004 (D BD.)
SD TO HD CONVERSION CIRCUIT
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Video Block
This Video Block Diagram will show the video signal processing as it changes from an NTSC composite video signal to separate Y & C, component Y, Pb, Pr and finally to RGB for the CRT cathodes.
Channel 1 2 3 Name Input
3D Comb Filter - Color Bar input Location CN3201/pin 1 CN3201/pin 3 CN3201/pin 5 Comments 2Vp-p 2Vp-p 1.7Vp-p
Y Output C Output
Composite Signal Input (B Board)
The NTSC format video from one of the two tuners or video inputs 1-4 is selected by composite video switch IC3201. The user makes the selection from the remote to the Main uCom IC701 through the I2C bus into IC3201 (not shown). There are three outputs from IC3201: IC3201 Outputs
Name Main Sub Monitor Location CN3201/pin 1 IC3201/pin 56, 58 IC3201/pin Output Type Composite or Y (if S video input TV) Separate Y / C Composite Destination 3D Comb filter IC3501 Y/C Sub processor Rear panel output
Time base = 20usec/div
Component Video Conversion (B Board)
The separate Y & C main signal is matrixed into component Y, Pb, and Pr signals inside IC3048. This IC3048 can therefore act as a switch to choose between the component video input from Video 5, Video 6 or the main signal from the 3D Comb filter. An additional RGB signal from the closed caption / V Chip IC3602 can be matrixed into the signal path by IC3048 if these features are selected by the user. There are three outputs from IC3048: IC3048 Outputs
Name Main Signal H & V Sync Comp Video
Output Type Component 1Vp-p 1Vp-p
Destination Main/Sub selector Sync selector IC3004 CCD/V Chip IC3602, ID-1 IC3603
Y & C Separation (B Board)
The main composite signal enters the BC board that plugs into the larger B board. The 3D Comb filter separates the luminance from the chroma, pixel by pixel to output Y and C signals. The input and outputs of the Comb filter are accessible and shown as 2Vp-p signals with a DC component in this scope shot:
c h1 c h2 1
Comp Video / ID-1 Concept ID-1 Concept ID-1 is a relatively new concept. The ID-1 signal is hidden in the vertical blanking area of the picture. This ID-1 signal identifies the aspect ratio of the picture. IC3603 finds the signal and outputs data to the microprocessor. The micro can change the vertical or horizontal size to present the picture properly. Recently, an ID-2 signal containing the aspect ratio and copy guard information has been proposed. Main Signal Path The main component video and sync signals are sent to switches IC3002 (video) and IC3004 (sync). They switch between the main and sub pictures. The outputs go to the Digital Reality Creation IC3303.
c h3
2
C H 1 !2 .00 V ~ C H 2 !2 .0 0 V = STOP 3 C H 3 !2 .0 0 V = C H P M T B 2 0 .0 us line
c h 1p
CN3201/ CN3500 CN003/ CN3203
A10 A8 63 6 44 1
BC BOARD
76
B BD. SUB Y,Pb,Pr (IC3110) MAIN Y,Pb,Pr IC3002 YCT SEL DRC CD SEL/ SYNC-SEL MID-uCOM IC3090 HD, VD SUB TO DRC - MF IC3303
MAIN TUNER SUB TUNER A BD. VIDEO 1 - 4 480i FORMAT
COMPOSITE/ Y
47 15 96
IC3501 3D COMB FILTER
83 84
IC3003 SUB COMB
C IC3201 (S VIDEO) A/V SW - 1 Y C SUB OUT Y/C TO: YCT SUB (IC3110)
C
5 3
Y Y
CN3500/ CN3201 MAIN Y,Pb,Pr
C
48
46
A25
41
MONITOR OUT VIDEO 5-6 480i/ 480p/ 1080i U BD. Y,Pb, Pr
IC3048 YCT MAIN
SUB PIX COMPOSITE VIDEO IC3110 VID 5,6
MAIN HTIM,VTIM IC3004 RGB DRC IC3602 VIN SYN 1 CLOSE CAP SEL V CHIP VIN HTIM/VTIM SYNC IC3603 TO IC3413 ID - 1 DEC 2 I C/ BUS (TO MID DATA CLK uCOM IC3090) IC3001 COMP J - F
HD - S VD - S (IC3110)
COMPONENT VIDEO TO IC3414
VIDEO BLOCK 1/2
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Digital Reality Creation This 3rd generation device has three main purposes: To summarize the MID functions, 60 lines are added to the picture by the MID-XA main signal processor IC3408 when the horizontal frequency is not 33.75kHz. MID-uCom IC3090 instructs oscillator IC201 to reduce the vertical amplitude when the sync is 33.75kHz (High Definition signal). Signal and Sync Switches Using control signal from MID-uCom IC3090, switches IC3414 and IC3413 select final signal and sync for the Y/C CRT Drive IC201. The component video that leaves the B board is shown in the waveform:
P M 3 3 9 4 , F L U K E & P H IL IP S
· · ·
Doubles the number of pixels on each scanning line after analyzing the pixels in the immediate area. Creates double the number of scanning lines by prediction.
Doubles the horizontal frequency to match the new image. The input is analog component video and the output is an 8 bit parallel port for each of the three component lines - Y, Pb and Pr. The digital output goes to the MID circuit IC3408. Multi Image Driver (MID) Circuit
ch1
The purpose of the MID circuit is to:
· · ·
Displays two images on the same screen (Main and Sub or Main and High resolution). · Add 60 blank lines to the picture. Change the input signal's horizontal frequency from 31.5kHz to 33.75kHz. Instruct the related MID uCom IC3090 what the input horizontal frequency is so it can control the sync path and aspect ratio.
1 2 3
ch2
1
ch3
2
Component Video leaving the B board - Color Bar input Channel Name MID Y MID Cb MID Cr Location CN3203/pin B8 CN3203/pin B9 CN3203/pin B10 Comments 0.7Vp-p 0.7Vp-p 0.7Vp-p
Any input signal selected is present at the MID-XA signal processor IC3408, so it knows what the input horizontal frequency is. Using this information, the interconnected MID-uCom IC3090 can control the signal and sync routing as well as send information to the Y/C CRT Drive IC201 for vertical reduction. MID-uCom IC3090 Outputs
Time base = 10usec/div
Name DO, CO (data, clock) IIC data bus Sync Sel
Destination MID-XA IC3408 Y/C, CRT Drive Sync Sw IC3413
Purpose Add 60 blank lines Vertical Reduction Sync for IC201
The following waveforms show the horizontal sync compared to the Y signal. After the MID circuit, the frequency is 33.75lkHz.
MAIN Y,Pb,Pr FROM IC3002 (YCTSEL) HD,VD SYNC FROM IC3004 (DRC-SYNSEL) II C BUS
OSD,RGB FROM MAIN uCOM IC701 YO-7 CRO-7 IC3303 DRC - MF CBO-7 H+V IC3408 MID - XA YO-7 CRO7 IC3410 D/A H DRIVE V DRIVE C BD.
CBO-7 Y,Pb,Cr IC201 Y/C CN3203/ CRT CN003 VIDEO DRIVE B8
B9 B10
RGB TO CRT
MID-uCOM IC3090 CONT: TO IC3414 (YUV SW)
DO,CO DATA/ CLK Y,Pb,Pr
IC3402 64M SDRAM
CONT. MID-uCOM IC3090
Y MID CB CR IC3414 YUV SW. IC3413 SYNC SW.
CN202/ CN9001 R
1 3 5 8
G MID H B14
B15
COMPONENT VIDEO FROM IC3001 (AV-SW1) SYNC SEL
B IK
10
IC9001, IC9002 IC9003 RGB OUT G2 MUTE
HIGH DEFINITION VIDEO 5 OR 6
MAIN H, PROG VERT
MID V
SYNC II C BUS
B BD.
HTIM HD HORIZ. IC3048 (YCT MAIN) VTIM INTERLACE VERT IC3048,(YCT MAIN)
P MUTE POWER OFF MUTE FROM MAIN uCOM IC701/67, Q708,Q730
A BD.
VIDEO BLOCK 2/2
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Component Video leaving the B board - Color Bar input
c h1 c h2 1
c h3
(vertical blanking area of ch 1) is still at 3Vp-p (power On level). The normal green signal (ch 2) shows the IK signal is reduced to 1.8Vp-p because the IK loop is complete. The last waveform (ch 3) does not show the missing red IK signal because of sampling errors in the digital scope used. IK drive pulses
2
3 39
,
U
&
S
ch1
3 C H 1 ! 50 0 m V~ C H 2 ! 2 .0 0 V = C H 3 ! 2 .0 0 V = C H P M T B 1 0 .0 u s lin e ch1p
ch3 ch2 T
Channel 1 2 3
Name Mid Y Mid H Mid V
Location CN3203/pin B8 CN3203/pin B14 CN3203/pin B15
Comments 0.7Vp-p 3.8Vp-p 3.8Vp-p
1
2
C H 1 ! 2 .0 0 V = C H 2 ! 2 .0 0 V =
Vertical blanking
C H P M T B 5 0 0 u s - 1 .0 8 d v c h 1 -
Time base = 10usec/div
C H 3 ! 1 .0 0 V = 3
IK drive signal in the vertical interval - Color Bar input
RGB Drive / AKB Circuit The Y/C CRT Drive IC201 has several functions:
Channel 1 2 3
Name R Drive G Drive B Drive
Location (C board) CN9001/pin 1 CN9001/pin 3 CN9001/pin 8
Comments 4Vp-p (open circuited) 3Vp-p 1.4Vp-p
Automatic Cathode Balance (AKB) or IK (cathode current) The AKB circuit monitors the CRT cathode currents and adjusts the RBG drive levels to compensate for CRT aging. By adjusting RGB drive levels to simulate the same cathode currents, white balance can be maintained. To accomplish this task, at power ON three IK drive pulses (about 3Vp-p) from IC201 are sent to each CRT cathode (video is muted). The cathode currents from all three cathodes are returned to IC201 on the single IK line. The three pulses are used to adjust the RGB drive pulses (and RGB gain) to produce equal amplitude IK return pulse levels. When the AKB loop closes, the AKB drive pulse is reduced (1.8Vp-p - ch 2). Finally, the video signal is unmuted to display a picture. To see the full operation in the next scope shot, the red drive wire has been opened at CN9001/pin 1. The CN9001/pin 1 connector is shorted to ground to simulate a defect red cathode. Notice the red IK drive pulse
· · ·
Amplifies the RGB signal and applies it to the CRT cathodes Mixes the main signal with the RGB On-Screen Display (OSD)
Time base = 0.5msec/div
Technical Note: If one or two cathodes falls below AKB adjustment range, the video will NOT blank as in other AKB circuits. However, if a cathode draws too much current, (Ik pulse gets large) the picture will blank, and the standby light will blink five times and repeat. In normal operation, if you increase the screen voltage, the IK return pulses (ch 3) will increase in amplitude because more cathode current is drawn. Because of the AKB closed loop, IC201's output IK drive pulses (ch 2) will decrease to lower the cathode current.
MAIN Y,Pb,Pr FROM IC3002 (YCTSEL) HD,VD SYNC FROM IC3004 (DRC-SYNSEL) II C BUS
OSD,RGB FROM MAIN uCOM IC701 YO-7 CRO-7 IC3303 DRC - MF CBO-7 H+V IC3408 MID - XA YO-7 CRO7 IC3410 D/A H DRIVE V DRIVE C BD.
CBO-7 Y,Pb,Cr IC201 Y/C CN3203/ CRT CN003 VIDEO DRIVE B8
B9 B10
RGB TO CRT
MID-uCOM IC3090 CONT: TO IC3414 (YUV SW)
DO,CO DATA/ CLK Y,Pb,Pr
IC3402 64M SDRAM
CONT. MID-uCOM IC3090
Y MID CB CR IC3414 YUV SW. IC3413 SYNC SW.
CN202/ CN9001 R
1 3 5 8
G MID H B14
B15
COMPONENT VIDEO FROM IC3001 (AV-SW1) SYNC SEL
B IK
10
IC9001, IC9002 IC9003 RGB OUT G2 MUTE
HIGH DEFINITION VIDEO 5 OR 6
MAIN H, PROG VERT
MID V
SYNC II C BUS
B BD.
HTIM HD HORIZ. IC3048 (YCT MAIN) VTIM INTERLACE VERT IC3048,(YCT MAIN)
P MUTE POWER OFF MUTE FROM MAIN uCOM IC701/67, Q708,Q730
A BD.
VIDEO BLOCK 2/2
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27
Picture with Picture
The picture with picture feature in the Sony model KV32XBR400 and 36XBR400 TVs displays two signals side by side. The picture-in-picture feature containing a small "sub" picture in one of the corners of the main picture is not used in this TV set. If the left or right picture is defective or missing, the signal path is required to localize the defect. There are two signal paths, one for each picture. In comparing the two diagrams, you will note that the main picture is on the
CN003/ CN3203
A10
left when both pictures are standard 480i video resolution. The confusing part is that when video 5 or 6 is selected and a 480p or 1080i signal is detected, the main picture moves to the right. There is no swap button to exchange pictures. Standard Resolution Input When only standard resolution signals are selected in the picture-withpicture mode, the left picture will pass through the DRC-MF circuit for detail improvements. The right picture will enter the MID-XA circuit directly to be reduced and merged with the main DRC picture on the same screen.
480i Y,Pb,Pr IC3303 DRC MF B BD.
MAIN TUNER SUB TUNER A BD. VIDEO 1 - 4 VIDEO 5 - 6 U BD.
MAIN TU - V
A6
MAIN A/V SWITCHES COMPOSITE TO COMPONENT MATRIX SUB
SUB TU - V
MAIN CN3203/ CN003 MAIN + SUB
A BD. IC201 CRT DRIVE
SUB
IC3408 MID XA
MAIN TUNER VIDEO 1 2 3 4 VIDEO 5 - 480i 6 - 480i
MAIN 480i PIX IN DRC PROCESS
SUB 480i PIX
SUB TUNER VIDEO 1 CRT 2 3 4
IC9001 - 3 VIDEO OUT C BD.
CN9001/ CN202
INPUTS ARE 480i
PICTURE WITH PICTURE - STANDARD RESOLUTION
High Resolution Input If video 5 or 6 inputs were selected, the MID circuit measures the signal's horizontal frequency to identify the video signal. If the frequency is higher than 15.75kHz, the signal is either 480p or 1080i. The MID uCom toggles switches to set up the signal path shown in the diagram below. When a 480p or 1080i signal is detected, this picture will be placed on the left side of the screen.
CN003/ CN3203
A10
The right 480i main picture will come from the tuner or video 1-4 signals along the top 480i path through the DRC-MF IC3303. The right side picture in Twin View cannot select video 5 or 6 inputs (they are skipped during the selection).
MAIN TUNER A BD. VIDEO 1 - 4 VIDEO 5 - 6 U BD.
480i Y,Pb,Pr A/V SWITCHES COMPOSITE TO COMPONENT MATRIX IC3303 DRC MF
MAIN PIX IC3408 MID XA
MAIN
IC3001 COMP J-F B BD.
HD PIX
MAIN + HD
CN3203/ CN003
C BD. VIDEO 5,6 Y,Pb,Pr 1080i/480p 480i PIX IN DRC PROCESS TO CRT IC9001 - 3 VIDEO OUT
A BD. IC201 CRT DRIVE CN9001/ CN202
HIGHER RESOLUTION VIDEO 5 6
STANDARD RESOLUTION MAIN TUNER VIDEO 1 2 3 4
PICTURE WITH PICTURE - HIGH RESOLUTION INPUT
28
29
Power ON Block
Power Supplies
There are four power supplies in the XBR400 TV:
KV32XBR400 Power Supplies Name Standby Primary Secondary Board A A D Start Plug in Power ON Primary Pre 15V, Main Relay Horiz Output AFC-PLS Purpose 5V for Main uCom 7V & 15V for power relay Unreg 11V, 7V, 5V become regulated 9V, 5V, 3.3V. +200V for HV stage, +135V for H. Output, +15V, +24V for Audio stage 31.5kV HV for CRT, Focus voltage.
Primary & Secondary Power Supplies
Before power ON can occur, the front panel master ON/OFF button (S01 on the HA board) must be pressed in. This latching switch behind the button supplies the AC relay (RY6501) with standby 7V. Pressing the switch again would unlatch the switch and the set would shut OFF. Power ON can be activated from the remote control or when the front panel button is latched in. The second half of front panel switch S01 (not shown) grounds out the power ON input to Main uCom IC701. IC701 powers ON the TV by turning on relay driver Q6527. Q6527 grounds one end of relay RY6501 and momentarily turns on Q710 via C724. Q710 supplies a higher +15V to AC relay RY6501 because a relay needs more voltage to close the contacts than to hold them closed.
Primary Power Supply
This power supply only needs 340Vdc from the bridge rectifier D6530 to start up and run. Three voltages with the prefix "set" are used on the A and plug in B and BC boards. The most important voltage is the Pri Pre 15V output that starts up the Secondary power supply on the D board.
HV Converter (not shown)
D
Except for the Standby power supply, the Primary, Secondary and HV Converter supplies are similar. The last three supplies use the same IC in a similar configuration. How they are turned on and the voltages they deliver is what makes them different. Each power supply is turned on in the order listed. The first power supply is operational when the TV is plugged into AC. When the TV is powered ON, the second and third supplies are turned ON one after the other. These supplies power the horizontal stages. Finally, the fourth power supply is turned ON after the horizontal output transformer develops scan, filament voltage and AFC pulses. The last power supply is not shown on this diagram, but knowing when the HV is powered on is important for troubleshooting.
Secondary Power Supply
The Secondary Power Supply needs three items to operate:
Three Items needed to run the Secondary Power Supply Item 340Vdc (B+) Pri Pre 15V voltage Main Relay (normally HIGH) From Primary Power Supply secondary Main uCom IC701 Purpose Starts the oscillator when more than 15.6Vdc. Enables IC6501 when HIGH Bridge Rectifier D6530 Powers the Driver/Output
Standby Power Supply
When the TV is plugged in, the standby power supply outputs three voltages: +15V, +7V, and +5V. A small transformer develops the +15V and +7V. The +7V is regulated down to +5V to power the Main uCom IC701.
This secondary power supply produces the remainder of the low voltages to power the TV. The +200V feeds the HV Converter power supply. The +135V powers the Horizontal stages. The +15V makes Main 12, Main 9 and Main 5V used throughout the D board. The +24V feeds the audio output stage.
STANDBY 5V F6001 6A STANDBY P.S. STANDBY 7V STANDBY 15V SOURCE IC6010 IC6007 IC6003 DEGAUSSING CIRCUIT STANDBY 7V D721 S 01 AC OUT CN6013/ 1 2 CN6502 FRONT PANEL POWER (HA BD.) CN7003/
1 3
SET 9V SET 5V SET 3.3V SOURCE
DCC COIL DGC COIL
UNREG. STANDBY 11V 7V 5V 5V
STANDBY 15V AC RELAY
D722
Q710
IC701 MAIN uCOM MAIN RELAY
IC6001 PRIMARY POWER SUPPLY PRI PRE 15V
C724 SET ON CN702/ 1 CN6504
POWER ON (HA BD.) CN6005/ 1 CN6501
R6006
A BD.
2
5
CN6503
Q6527 RY6501 AC D6530
Q6530, Q6532 PROT. LATCH
OVP OCP +135V
AC RECT +
D BD.
+200V IC6501 SECONDARY POWER SUPPLY +135V + 15V +24V AUDIO SOURCE
MAIN RELAY
R6526
POWER ON BLOCK
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Primary Power Supply
The primary power supply on the A board consists of three parts: 1. Oscillator 2. Output stage 3. Regulator Stage
into pin 14. Internal pulses from IC6001/pin 14 add to D6003's DC voltage, producing the boost voltage at Vb pin 14. This boost voltage is approximately +10V above the reference voltage at IC6001/pin 15 and used internally to serve as the B+ for the top internal drivers that amplify oscillator signal leaving IC6001/pin 16. Secondary Power Supply Starting The Pri Pre 15V output of D6009 is only approximately 10Vdc at start up when the oscillator frequency is high (normally about 18Vdc). When is reaches 15.6Vdc, it starts the Secondary Power Supply. Therefore, the Secondary Supply cannot start until the Primary Supply is running.
Start Up
The oscillator within IC6001 starts if the V Sense input voltage at pin 1 is above 1.3Vdc. Sample voltage from pin 18 is then used to run the internal oscillator. The initial frequency is approximately 200kHz. The low amplitude initial oscillator signal is output IC6001/pins 12 and 16 into the driver/output stage.
Regulation
Concept T6003's secondary output voltages are dependent upon the match between the output resonate circuit (T6003 = L, C6014 = C) and the oscillator frequency. When IC6001's oscillator frequency is the same as the resonate circuit frequency, there is maximum power transferred in T6003 producing maximum output voltage. By setting the oscillator frequency above resonance, T6003's output voltage can be regulated.
85kHz = Normal Operation 200kHz = Start Up
Driver / Output stage
The oscillator voltage output at pins 12 and 16 use drivers Q6007 and Q6008 to develop T6003 secondary voltages. IC6001's oscillator will shut down if the driver transistor's current is excessive. To prevent premature shutdown, the timer capacitor C6064 delays the shutdown. VC1 Enables the Regulator Although the oscillator is running, at this initial frequency of 200kHz, there is insufficient current from T6003 to produce any unregulated 5, 7, or 11V voltage because of the load. There is little load on D6005 and D6009, producing about 15V each at the cathodes (normally about 18Vdc). The voltage from D6005 is returned to IC6001/pin 8 to serve as regulated B+ for the internal drivers that amplify the oscillator signal leaving pin 12. The VC1 voltage also enables the internal regulator circuit (responds to the error voltage input IC6001/pin 2) to change the oscillator frequency. B+ for IC6001's Internal Drivers At start up IC6001 uses current limited B+ from pin 18 to amplify the oscillator signal and get it out to pin 16 (internal drivers). When VC1 is present, the internal drivers switch to this stable regulated B+. The B+ for the internal drivers for IC6001/pin 16 comes from Vb at pin 14. D6003 and C6009, external to IC6001/pins 10 and 14 (Vb), complete an internal voltage boost circuit. This boost circuit starts with VC1 voltage (input pin 8) that is connected internally to VC2 pin 10 (less 0.6Vdc). This VC2 voltage is filtered by C6009 and passes through blocking diode D6003
T6003 Output Voltage
Output Voltage Control The regulating stage uses error detector IC6002 and optical isolator PH6001 to monitor the unregulated +7V output from T6003. If the unregulated +7V output is LOW as it is at initial start up, the voltage fed back to IC6001/pin 2 goes HIGH, decreasing the oscillator frequency. The decrease in frequency increases the output of the T6003 transformer, until +7Vdc is reached.
Regulation Feedback Voltages Unreg 7V Output (D6011) Low PH6001/pin 2 high IC6001/pin 2 high
D6012 A BD. T6003 UNREG. 5V SOURCE AC RECT.+ FROM D6530 (D BD.) R6606 0.47 OHMS 340VDC R6059
18
D6013 UNREG. 11V SOURCE Q6008 VGH 16 N CH 160V Q6007 VGL 12 N CH R6043 R6049 C6014 D6011 UNREG. 7V SOURCE R6002 R6010 PRI PRE 15V (D BD.) D6009 D6005
R6007 R6008 VD
R6009
V SENSE
1
VS 15 IC6001 DRIVER MCZ3001D
3V R6011
TIMER VC1 VC2
6 8 10
OCP VB
14
F/B
2
9
C6064
+
1
1.86V D6003 + C6009 PH6001 OPTICAL ISOLATOR
R6050 IC6002 ERROR DET. uPC1093C
R6022 R6029
1
2
3
18.4V
PRIMARY POWER SUPPLY
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In the following scope shot both drive outputs from IC6001/pins 12 and 16 are shown. The outputs are complementary, the duty cycle is 50% and the frequency has dropped down from 200kHz to about 85kHz.
ch1 pkpk= 3 5 V : 2 ch1 ch1 fre 84 kH : q= .8 z ch2
Hot ground is at CN6501/pin 6 (black wire).
Oscillator Output Operation
The details of how the oscillator develops output voltage in T6003 are explained here. When the oscillator in IC6001 starts up (V Sense = 3V, no feedback VC1 voltage yet), the signal is amplified using unregulated voltage input pin 18 and a 200kHz signal is output IC6001/pins 12 and 16. This is shown in the following waveform:
PM 3394, F LUKE & PH ILIPS ch1: pkpk= 34 V 9 ch1 ch1: freq= 209kH z
T
1
2
ch2
C 1! 1 0 V H 0 = C 2!5 0 V H .0 = M B .0 us- 1 8 ch1 T 2 0 .1 dv -
Primary PS Oscillator - Normal operation - 85kHz
T
Channel 1 2
Name Top Driver Output Bottom Driver Out
Location Q6008/gate Q6007/gate
Voltage 340Vp-p 12Vp-p (4.6Vdc)
2 C 1!79.9 V= H C 2!10.0 V= H M TB1.0 0us- 1.28dv ch1+ 1
Time base = 2usec/div.
Testing
Checks for Primary power supply operation Check Point 1. R6006 2. CN6005/ pin 5 3. IC6001/ pin 2 (Feedback voltage) Normal 340Vdc >+15.6Vdc 1.9Vdc P.S. Input voltage Pri-Pre 15V. Checks P.S. Output If step 2 voltage is low, measure IC6001/pin 2. If pin 2 is High (4V) problem is around IC6001. If pin 2 is Low (0-1V), problem is the feedback path IC6002, PH6001.
Primary PS Oscillator - Start Up = 209kHz Channel 1 2 Name Top Driver Output Bottom Driver Out Location IC6001/pin 16 IC6001/pin 12 Voltage 340Vp-p 12Vp-p (4.6Vdc)
Time base = 1usec/div.
The two signals applied to the Q6008 and Q6007 drivers are complementary. This means only one MOSFET is conducting at a time. A positive voltage applied to top MOSFET Q6008's gate turns it ON so its Drain to Source resistance drops, increasing the voltage to T6003's primary winding. This voltage passes through the primary winding of T6003 into C6014. As the increasing voltage charges C6014, a magnetic field is built up in the primary of T6003. This magnetic field induces voltage into the secondary windings that is rectified to supply low voltages to the TV set. The cycle continues when Q6008 turns OFF and Q6007 turns ON. The charged C6014 discharges through the primary of T6003 and Q6007 to ground. The cycle then repeats.
4. IC6001 voltages. See the next chart. IC6001 Voltages (Power ON, Video 1 input, Dark screen) 1. 3.0V 10. 10V 2. 1.8V 11. 0V 3. 2.2V 12. 4.5V 4. 2.5V 13. -0.2V 5. 0V 14. -28V 6. 0V 15. -32V 7. 4.5V 16. -32V 8. 18.4V 17. -0.3V 9. 0V 18. 313V
D6012 A BD. T6003 UNREG. 5V SOURCE AC RECT.+ FROM D6530 (D BD.) R6606 0.47 OHMS 340VDC R6059
18
D6013 UNREG. 11V SOURCE Q6008 VGH 16 N CH 160V Q6007 VGL 12 N CH R6043 R6049 C6014 D6011 UNREG. 7V SOURCE R6002 R6010 PRI PRE 15V (D BD.) D6009 D6005
R6007 R6008 VD
R6009
V SENSE
1
VS 15 IC6001 DRIVER MCZ3001D
3V R6011
TIMER VC1 VC2
6 8 10
OCP VB
14
F/B
2
9
C6064
+
1
1.86V D6003 + C6009 PH6001 OPTICAL ISOLATOR
R6050 IC6002 ERROR DET. uPC1093C
R6022 R6029
1
2
3
18.4V
PRIMARY POWER SUPPLY
7DTV02 1263
10/3/00
34
35
Secondary Power Supply
The Primary and Secondary power supplies are similar because they use the same IC and driver/output stage. They differ in start up and output voltages.
Regulation
The +135V line to the Horizontal Output stage is fed back to IC6501 for regulation of the secondary power supply. Error Control IC6503 and Optical Isolator PH6502 control regulation. If the +135V output rises, the voltage at IC6501/pin 2 lowers to correct. A reduced voltage increases the oscillator frequency and decreases the output voltages of T6501.
Start UP
Although IC6501 is identical to IC6001 in the Primary power supply, IC6501/ pin 18 in this supply is not connected to 340Vdc. This makes VC1 at pin 8 the primary source of power to start this IC after pin 1 senses voltage. The start up sequence is listed as follows: 1. 340Vdc (B+) is applied to this stage from bridge rectifier D6530. 2. Pri Pre 15V voltage from the Primary power supply is applied to IC6501/ pin 8. It must be at least 15.6Vdc to enable IC6501's internal oscillator. 3. Main Relay signal from Main uCom IC701/pin 72 (HIGH at CN6501/ pin 5) turns ON Q6531, PH6503 and Q6528. Q6528 turns OFF Q6503, enabling voltage to appear at IC6501/pin 1. 4. R6646 and R6513 deliver at least 1.3Vdc to IC6501/pin 1. 5. IC6501 turns ON using voltage from pin 8 to run the oscillator. 6. An internal diode connected between pin 8 and 10 supplies voltage to VC2. 7. Oscillator pulses from VC2 pass blocking diode D6502 to make a ("pump up") voltage for the internal predriver amplifier stage. 8. Oscillator signal outputs IC6501/pins 12 and 16. In summary, these items are necessary to run the Secondary Supply:
Three Items needed to run the Secondary Power Supply Item 340Vdc (B+) (CN6501/pin 1) Pri Pre 15V voltage (CN6501/pin 5) Main Relay (normally HIGH at CN6504/pin 2) From Purpose Bridge Rectifier D6530 Powers the Driver/Output Primary Power Supply secondary Main uCom IC701 Starts the oscillator when more than 15.6Vdc. Enables IC6501 when HIGH
Testing
The typical error correction feedback voltage at IC6501/pin 2 is 2Vdc. By measuring the +135V B+ at R6598 and the feedback at IC6501/pin 2, you can determine if the problem is in the basic oscillator stage or the error regulator stage.
1. Measure B+ at R6598 (0.27 ohms at 1W) B+ is LOW or 0V 2. Measure IC6501/pin 2 Voltage Higher than 2V Lower than 2Vdc B+ is HIGH (shutdown Stby light blinks 3 times) IC Higher than 2V Lower than 2Vdc 3. Problem area
Oscillator stage IC6501 Error regulating stage IC6503/PH6502 Error regulating stage IC6503/PH6502 Oscillator/Driver Stage IC6501
V l (P ON Vid i D k ) IC6501 Voltages (Power ON, Video 1 input, Dark screen)
1. 2.5V 10. 10V
2. 1.8V 11. 0V
3. 2.2V 12. 4.7V
4. 2.5V 13. 0V
5. 0V 14. -15V
6. 0V 15. -19V
7. 4.0V 16. -19V
8. 18.3V 17. 0V
9. 0V 18. 1.5V
Hot ground is at CN6501/pin 6 (black wire).
AC
D6530
R6526 0.1 OHM R6646 DC
18
T6501 PIT
GND AU + 24 TO AUDIO D6516
AC PRIMARY POWER SUPPLY
NO CONNECTION D6515 Q6507 N CH R6533 VS
15
R6513
1
VD VGH 16 V SENSE
D6517 D6513
+200V SOURCE TO HV SOURCE R6598 135V SOURCE
Q6503 N R6504 R6552 OFF R6517 STANDBY 5V
1
Q6506 VGL 12 IC6501 DRIVER MCZ3001D OCP 9 V B 14 N CH R6535 R6501 R6556 D6502 VC2 10 F/B 2
8 4
Q6528 N
- 15V SOURCE + 15V SOURCE
PH6503 3 OPTICAL ON ISOLATOR
2
C6532
D6514
1 1
R6590
R6557
MAIN RELAY FROM MAIN uCOM IC701/72 (A BD.)
ON
Q6531 N
PH6502 OPTICAL ISOLATOR
2
IC6503 CONTROL 4 DM-58
5
VC1
PRI PRE 15V CN6005/6 (A BD.)
START D BD.
SECONDARY POWER SUPPLY
8DTV06 1262
10/6/00
36
37
Horizontal Drive / H Pincushion Correction / Filament Voltage
Overview
The purpose of the horizontal drive circuit is to manufacture a magnetic field that is used to sweep the CRT's electron beam from left to right on the screen. Within the basic horizontal drive circuit there is a PWM circuit that supplies the Horizontal Output transistor with voltage and provides horizontal pincushion correction. The horizontal drive circuit also makes the CRT filament voltage.
quency, but the MID circuit stored the video and output the signal at a new H freq. of 33.75kHz, independent of the source.
PM3394, FLUKE & PHILIPS ch1 1
ch2
ch3
2
ch4
3
CH1!2.00 V~ CH2!2.00 V~
Basic Horizontal Drive Circuit
This circuit is split between an oscillator on the A board and an output stage on the D board. The 33.75kHz horizontal oscillator is in the Y/C CRT Drive IC201. IC201 outputs a 2Vp-p rectangular waveform from pin 40 while there is B+ at pins 55 & 61 and the 2.7MHz X201 crystal is running. The horizontal drive waveform is buffered by Q211 and enters the D board. On the D board, an N channel MOSFET driver and an output transistor amplify the signal to provide sufficient current to drive the HOT T5001 and the H DY deflection yoke. At the output stage, the HOT T5001 has a secondary winding that provides filament voltage while its main winding provides +200V for the RGB video output ICs. While the H DY yoke provides horizontal beam deflection (sweep), a voltage divider consisting of capacitors C5058-C5060 tap off a sample of the H spike from the H Output Q5030/Collector to start the HV converter stage. This AFC-PLS is also used in the convergence and dynamic focus stages. The waveforms of the horizontal drive stage show typical signal shapes. The difference between this set and a conventional one is that the horizontal frequency is 33.75kHz (ch 2), not 15.75kHz (ch 1). When comparing the input sync (ch 1) to the horizontal oscillator (ch 2), notice that they are not in phase. This is because the DRC circuit doubled the H freChannel 1 2 3 4
CH3!10.0 V~ STOP 4 CH4! 125 V= ALT MTB5.00us L=2
ch2p
Horizontal Drive Signals Name 15.75kHz H signal Input 33.75kHz osc output H Driver input Horiz Output Location NTSC generator IC201/pin 40 Q5028/gate Q5030/Collector Voltage from the generator 2.2Vp-p 12Vp-p 1kVp-p
Time base = 5usec/div.
PWM Circuit
The PWM circuit has two functions. First it provides a regulated 102Vdc output for the H Output transistor. Second it compensates for horizontal pincushioning and keeps the picture straight at the sides.
No horiz pincushion correction Pix is bowed inward
MAIN 9V MID HS IC3413/4 SYNC SW. (B BD.) A BD. AFC-PLS Q5030/C H