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MDX-C5960R/C5970/C5970R
SERVICE MANUAL
German Model
MDX-C5960R
US Model Canadian Model E Model
MDX-C5970
AEP Model UK Model
MDX-C5970R
Photo: MDX-C5960R
Model Name Using Similar Mechanism Base Mechanism Type Optical Pick-Up Name
MDX-C7900/C7900R MG-164N-138 KMS-241B/J1NP
SPECIFICATIONS
Continued on next page
FM/AM (MW/LW) MINIDISC PLAYER
MICROFILM
4-8. SCHEMATIC DIAGRAM SERVO Board (1/3) · See page 55 for Waveforms. · See page 58 for IC Block Diagrams.
MDX-C5960R/C5970/C5970R
The components identified by mark ! or dotted line with mark ! are critical for safety. Replace only with part number specified. Les composants identifiés par une marque ! sont critiques pour la sécurité. Ne les remplacer que par une piéce portant le numéro spécifié. · Voltages and waveforms are dc with respect to ground under no-signal conditions. no mark : MD PLAY : Impossible to measure
(Page 35)
33
34
MDX-C5960R/C5970/C5970R
4-9. SCHEMATIC DIAGRAM SERVO Board (2/3) · See page 55 for Waveforms. · See page 57 for IC Block Diagrams.
(Page 34)
(Page 37)
· Voltages and waveforms are dc with respect to ground under no-signal conditions. no mark : MD PLAY : Impossible to measure
35
36
MDX-C5960R/C5970/C5970R
4-10. SCHEMATIC DIAGRAM SERVO Board (3/3) · See page 55 for Waveforms.
· Voltages and waveforms are dc with respect to ground under no-signal conditions. no mark : MD PLAY : Impossible to measure
(Page 43)
(Page 36)
37
38
MDX-C5960R/C5970/C5970R
4-13. SCHEMATIC DIAGRAM MAIN Board (1/4) · See page 55 for Waveforms. · See page 60 for IC Block Diagrams.
· Voltages and waveforms are dc with respect to ground under no-signal (detuned) conditions. no mark : FM ( ) : AM (MW) [ ] : LW : MD PLAY
(Page 38)
(Page 45)
(Page 49)
(Page 48)
43
44
MDX-C5960R/C5970/C5970R
4-14. SCHEMATIC DIAGRAM MAIN Board (2/4)
(Page 44)
(Page 49) · Voltages are dc with respect to ground under no-signal (detuned) conditions. no mark : FM
45
46
MDX-C5960R/C5970/C5970R
4-15. SCHEMATIC DIAGRAM MAIN Board (3/4) · See page 55 for Waveforms. · See page 60 for IC Block Diagrams.
(Page 44)
(Page 49) · Voltages and waveforms are dc with respect to ground under no-signal (detuned) conditions. no mark : FM ( ) : AM (MW) [ ] : LW
47
48
MDX-C5960R/C5970/C5970R
4-16. SCHEMATIC DIAGRAM MAIN Board (4/4) · See page 61 for IC Block Diagrams.
(Page 45)
(Page 44)
(Page 53)
(Page 48) · Voltages are dc with respect to ground under no-signal (detuned) conditions. no mark : FM ( ) : AM (MW) [ ] : LW : MD PLAY
49
50
MDX-C5960R/C5970/C5970R
4-18.
SCHEMATIC DIAGRAM KEY Board
· See page 56 for Waveforms.
(Page 50)
· Voltages and waveforms are dc with respect to ground under no-signal (detuned) conditions. no mark : FM
53
54
· Waveforms SERVO Board
1 IC302 @§ (TE) (MD PLAY Mode) 6 IC501 #¡ (EXTAL) (MD PLAY Mode)
MAIN Board
1 IC100 9 (OSC IN) (FM/AM (MW) Mode) 6 IC700 (£ (X1)
KEY Board
1 IC801 @º (OSC IN)
Approx. 0.5 Vp-p
2.7 Vp-p
2.7 Vp-p
5.8 Vp-p
2.8 Vp-p
0.1 µs
2 IC302 #¢ (FE) (MD PLAY Mode) 7 IC304 3 (IN) (MD PLAY Mode)
94 ns
2 IC102 5 (OSC1) (FM Mode)
271 ns
3.5 µs
Approx. 0.3 Vp-p
3.5 Vp-p
2.8 Vp-p
44 ns
3 IC302 #· (RF) (MD PLAY Mode)
224 ns
3 IC250 2 SWE (MD PLAY Mode)
1.2 Vp-p
14.2 Vp-p
24 µs
4 IC301 @ (LRCK) (MD PLAY Mode) 4 IC250 3 TC (MD PLAY Mode)
3.5 Vp-p
1.1 Vp-p
23 µs
5 IC301 @§ (XBCK) (MD PLAY Mode)
12 µs
5 IC700 &¢ (XOA)
4.5 Vp-p
2.1 Vp-p
356 µs
30 µs
55
56
· IC Block Diagrams SERVO Board IC101
XTI 1 DGND 2 VDD 3 LRCIN 4 DIN 5 NOISE SHAPER BCKIN 6 ZERO 7 D/C_R 8 VOUTR 9 AGND 10 5 LEVEL DAC LOWPASS FILTER CMOS AMP 5 LEVEL DAC LOWPASS FILTER CMOS AMP 15 RSTB 14 FORMAT 13 D/C_L 12 VOUTL 11 VCC
PCM1718E/2K
CLK CONTROL INPUT INTERFACE DIGITAL FILTER 20 XTO 19 CLKO MODE CONTROL 18 MUTE 17 DM1 16 DM0
IC301
CXD2652AR
APCREF F0CNT TEST3 TEST2 TEST1 DVDD DCHG SRDR SPRD EFMO TRDR LDDR DVSS FRDR SFDR ADFG CKRF SPFD DTRF TFDR XLRF FFDR FGIN APC FS4
100 99 98 97 96 95
94 93
92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
AUTO SEQUENCER
MNT0 1 MNT1 2 MNT2 3 MNT3 4 MONITOR CONTROL EACH BLOCK
SPINDLE SERVO
PWM GENERATOR
75 AUX2 74 TE 73 SE 72 AVSS 71 ADRB
ADIP DECODER SWDT 5 SCLK 6 XLAT 7 SRDT 8 SENS 9 XRST 10 SQSY 11 DQSY 12 RECP 13 SUBCODE PROCESSOR CPU I/F EACH BLOCK SERVO DSP A/D CONVERTER ANALOG MUX
70 ADRT 69 AVDD 68 ADIO 67 VC 66 AUX1 65 FE 64 ABCD 63 BOTM 62 PEAK 61 CLTV
PLL
60 FILO 59 FILI 58 PCO 57 PDO 56 AVSS
XINT 14 TX 15 OSCI 16 OSCO 17 XTSL 18 NC 19 DVSS 20 DIN 21 DOUT 22 CLOCK GENERATOR EACH BLOCK
SHOCK RESISTANT MEMORY CONTROLLER
EFM/ACIRC ENCODER/ DECODER
DIGITAL AUDIO I/F
SAMPLING RATE CONVERTER
COMP
55 RFI 54 BIAS 53 AVDD 52 ASYI 51 ASYO
ADDT 23 DADT 24 LRCK 25
ATRAC ENCODER/DECODER
ADDRESS/DATA BUS A00 - A11, D0 - D3
26 27 28
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
50
DVSS
DVDD
XRAS
XBCK
FS256
XCAS
57
MVCI
XWE
XOE
D1
D0
D2
A03
A02
A01 A00
A10
A04
A05
A06
A07
A08
A11
A09
D3
IC302
CXA2523R
COMPO COMPP MORFO RF AGC MORFI ADDC PEAK AGCI OPN OPO RFO RF
48
47
46
45 + USROP
44
43 42 + BPF3T
41
40 RF AGC
39
38 EQ
37
+
RFA1
USRC DET EQ
RFA2 I J 1 2 1 2 CFST 1 2 GRV GRVA 2 1 WBL HLPT 1 2 PTGR 3T PEAK BOTTOM 3T
PEAK3T P-P WBL
TEMP 36 BOTM
VC
3
A
4 IVR
B
5 IVR
C
6 IVR
D
7 IVR
E
8 IVR
F
9 IVR
GSW IV PD 10
+ +
APC 11 APCREF 12 13
GND
EQADJ
SWDT
F0CNT
VREF
TEMPI
3TADJ
TEMPR
58
XSTBY
SCLK
XLAT
VCC
+ + + + + + +
CVB
PBH
35 ABCD 34 FE 33 AUX BPFC 32 ADFG 31 ADAGC
AA
+ + + +
ABCDA
BB
+ +
30 ADIN FEA
CC BPF22 + + DD WBL + + EFB TESW PTGR WBL ATA ADIP AGC
DET
29 ADFM
1 2 SEA
TG
28 SE 27 CSLED
EE
+
EE'
1 2 TEA
TG
26 TE
FF
+ FBAL
FF'
WBL 3T EQ VI CONV 25 WBLADJ
AUXSW COMMAND
BGR VREF
SCRI - PARA DECODE
14
15
16
17
18
19
20
21
22 23
24
IC303
CAPA
BH6511FS-E2
PGND2 PGND1 OUT2R OUT1R CAPA+ OUT2F OUT1F VM12 IN2R IN1R
18 15
VM2
VM1
IN2F
IN1F
32
31
30
29
28
27
26
25
24
23
22
21
20
19
17
INTERFACE
AMP
AMP
AMP
AMP
INTERFACE
VDD
CHARGE PUMP. OSC
PREDRIVE
PREDRIVE
PREDRIVE
PREDRIVE
INTERFACE
AMP
AMP
AMP
AMP
INTERFACE
PSB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
PGND4
PGND3
IN4R
IN4F
IN3F
OUT4F
OUT4R
OUT3R
OUT3F
VM34
IN3R
GND
VG
VM4
VM3
IC305
OUT1 1
BA6287F
8 GND
VM 2
7 OUT2
DRIVER TSD
DRIVER
VCC 3
CONTROL LOGIC
6 VREF
POWER SAVE FIN 4 5 RIN
IC307
MN41V4400TT-08S
PSB
26 GND 25 D4 24 D3 23 XCAS 22 XOE 21 NC 20 NC 19 NC 18 A8 17 A7 16 A6 15 A5 14 A4
D1 1 D2 2 XWE 3
CLOCK OSC
NC 5 NC 6 NC 7 A9 8 A0A9 COLUMN DECODER
SENSE REFRESH AMP INPUT/OUTPUT CONTROL SWITCH
ADDRESS BUFFER
A1 10 A2 11 A3 12 VDD 13
A0A9
ROW DECODER
MEMORY CELL (4194204 BIT)
(4) OUTPUT BUFFER
A0 9
(4) INPUT BUFFER
XRAS 4
59
VDD
MAIN Board IC100 TDA7427AD
DOUT2 DOUT1/INLOCK GND-SIG
LP OUT
VDD2 GND-AM AM IN FM IN NC
28
27 26 25 24 23
22
21
20 19 18 17 16 15
11 BIT PROGRAMMABLE COUNTER
SUPPLY & POWER ON RESET SWITCH SWM/DIR 5 BIT PROGRAMMABLE COUNTER PRE COUNTER FM/AM SWITCH SWITCH SWM/DIR
CONTROL SWITCH OUT 16 BIT PROGRAMMABLE COUNTER TIMER 14 BIT PROGRAMMABLE COUNTER 11 21 BIT PROGRAMMABLE COUNTER FM/AM SWITCH
INLOCK DETECTOR
CHARGE PUMP SWITCH LP1/LP2
PHASE COMPARATOR
TEST LOGIC PORT EXTENSION REFERENCE OSCILLATOR IIC BUS INTERFACE
1 2 3 LP FM LP HC LP AM
4 VREF
5 6 7 8 DOUT3 DOUT4 DOUT5 DOUT6
9 OSCIN
10 OSCOUT
11 NC
12 SCL
13 SDA
IC102 SAA6588T-118 (MDX-C5960R/C5970R)
SCOUT LVIN VSSA MPX MAD PSWN VDDA VREF CIN AFIN
IC250
NJM2360AM (TE2)
IF AM
SSTOP IF FM 14
ADDR HFREF
VDD1
20
MULTI PATH DETECTOR
1 2 MRO MPTH
OSCI
DAVN
VSSD
SDA
OSCO
VDDD
TCON
SCL
+ 19 18 CLOCKED COMPARATOR RDS/RDBS DEMODULATOR TEST CONTROL 3 4
17
16
15
14
13 PAUSE DETECTOR
12 11
CS 1 Q1 ES 2 CT 3 GND 4
Q2
Q
S R Ipk CT OSC
8 CD 7 SI 6 V+ 5 INVIN COMP
POWER SUPPLY & RESET 57kHz 8th ORDER BAND-PASS FILTER SIGNAL QUALITY DECODER 4 CLOCK RDS/RDBS DECODER DATA OSCILLATOR & CLOCK INTERFACE REGISTER 5 4 CLOCK DATA
VREF 1.25V
+
IIC BUS SLAVE TRANSCEIVER
5
6
7
8
9
10
60
IC300
TDA7462D013TR
28 27 26 25 24 23 SE3L SE3R MUTE SDA SCL PAUSE
PAUSE DETECT INPUT GAIN & AUTO ZERO TREBLE/ BASS CONTROL CIRCUIT FRONT FADER
SE1L SE1R MD+ MD CDL+ CDL CDR CDR+ PDR PDGND PDL SE2L SE2R
1 2 3 4 5 6 7 8 9 10 11 12 13
FRONT SIDE SELECTOR
LOUDNESS CONTROL CIRCUIT
VOLUME CONTROL CIRCUIT
SOFT MUTE
VOICE BANDPASS HP LP
22 OUT FL
INPUT MULTIPLEXER & MIXING STAGE
FRONT FADER COMPANDER REAR FADER LOUDNESS CONTROL CIRCUIT
21 OUT FR
REAR SIDE SELECTOR
20 OUT RL
INPUT GAIN
REAR FADER
19 OUT RR
BEEP
SUBWOOFER LP
FADER 18 SUBOUT+ 17 SUBOUT SDA
SUBWOOFER OUT IIC BUS
DIGITAL CONTROL CIRCUIT
SCL 16 VDD 15 GND
CREF 14
POWER SUPPLY
IC600
BUS ON 1
BA8270F-E2
BUS ON SWITCH RESET SWITCH BATTERY SWITCH 14 VCC
IC800
BA3918-V3
REGULATOR
13 12 11 10 RST BUS ON CLK IN BU IN
RST 2
BATT 3
GND 7
8 DATA OUT
1 NC
2 3 4 MODE2 MODE1 STB
5 VDD
6 AMP
7 VCC
8 ANT
9 COM
10 AM
11 FM
61
GND
+ 12
+
+
+
CLK 4 VREF 5 DATA 6
OVER VOLTAGE PROTECT
9 DATA IN
4-19.
IC PIN FUNCTION DESCRIPTION
· SERVO BOARD IC301 CXD2652AR (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, EFM/ACIRC ENCODER/DECODER, SHOCK PROOF MEMORY CONTROLLER, ATRAC ENCODER/DECODER, 2M BIT D-RAM) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 to 32 33 34 to 38 39 40 41 42 43 44 45 Pin Name MNT0 MNT1 MNT2 MNT3 SWDT SCLK XLAT SRDT SENS XRST SQSY DQSY RECP XINT TX OSCI OSCO XTSL RVDD RVSS DIN DOUT ADDT DADT LRCK XBCK FS256 DVDD A03 to A00 A10 A04 to A08 A11 DVSS XOE XCAS A09 XRAS XWE I/O O O O O I I I O (3) O (3) I O O I O I I O I -- -- I O I O O O O -- O O O O -- O O O O O Function Focus OK signal output to the MD mechanism controller (IC501) "H" is output when focus is on ("L": NG) Track jump detection signal output to the MD mechanism controller (IC501) Busy monitor signal output to the MD mechanism controller (IC501) Spindle servo lock status monitor signal output to the MD mechanism controller (IC501) Writing serial data signal input from the MD mechanism controller (IC501) Serial data transfer clock signal input from the MD mechanism controller (IC501) Serial data latch pulse signal input from the MD mechanism controller (IC501) Reading serial data signal output to the MD mechanism controller (IC501) Internal status (SENSE) output to the MD mechanism controller (IC501) Reset signal input from the MD mechanism controller (IC501) "L": reset Subcode Q sync (SCOR) output to the MD mechanism controller (IC501) "L" is output every 13.3 msec Almost all, "H" is output Digital In U-bit CD format subcode Q sync (SCOR) output terminal "L" is output every 13.3 msec Almost all, "H" is output Not used (open) Laser power selection signal input terminal "L": playback mode, "H": recording mode (fixed at "L" in this set) Interrupt status output to the MD mechanism controller (IC501) Recording data output enable signal input terminal Writing data transmission timing input (Also serves as the magnetic head on/off output) Not used (fixed at "L") System clock signal (512Fs=22.5792 MHz) input from the oscillator circuit System clock signal (512Fs=22.5792 MHz) output terminal Not used (open) Input terminal for the system clock frequency setting "L": 45.1584 MHz, "H": 22.5792 MHz (fixed at "H" in this set) Power supply terminal (+3.3V) (digital system) Ground terminal (digital system) Digital audio signal input terminal when recording mode Digital audio signal output terminal when playback mode Recording data input terminal Not used (fixed at "L") Playback data output to the PCM1718E (IC101) L/R sampling clock signal (44.1 kHz) output to the PCM1718E (IC101) Bit clock signal (2.8224 MHz) output to the PCM1718E (IC101) Clock signal (11.2896 MHz) output to the PCM1718E (IC101) Power supply terminal (+3.3V) (digital system) Address signal output to the D-RAM (IC307) Address signal output to the external D-RAM Address signal output to the D-RAM (IC307) Address signal output to the external D-RAM Ground terminal (digital system) Output enable signal output to the D-RAM (IC307) Address signal output to the D-RAM (IC307) Row address strobe signal output to the D-RAM (IC307) Write enable signal output to the D-RAM (IC307) "L" active "L" active "L" active "L" active Column address strobe signal output to the D-RAM (IC307) Not used (open) Not used (open) Not used (fixed at "L") Not used (open)
62
Pin No. 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91
Pin Name D1 D0 D2 D3 MVCI ASYO ASYI AVDD BIAS RFI AVSS PDO PCO FILI FILO CLTV PEAK BOTM ABCD FE AUX1 VC ADIO AVDD ADRT ADRB AVSS SE TE AUX2 DCHG APC ADFG F0CNT XLRF CKRF DTRF APCREF LDDR TRDR TFDR DVDD FFDR FRDR FS4 SRDR
I/O I/O I/O I/O I/O I O I (A) -- I (A) I (A) -- O (3) O (3) I (A) I (A) I (A) I (A) I (A) I (A) I (A) I (A) -- I (A) I (A) -- I (A) I (A) I (A) I (A) I (A) I O O O O O O O O -- O O O O Two-way data bus with the D-RAM (IC307)
Function
Digital in PLL oscillation input from the external VCO Not used (fixed at "L") Playback EFM full-swing output terminal Playback EFM asymmetry comparator voltage input terminal Power supply terminal (+3.3V) (analog system) Playback EFM asymmetry circuit constant current input terminal Playback EFM RF signal input from the CXA2523R (IC302) Ground terminal (analog system) Phase comparison output for clock playback analog PLL of the playback EFM Not used (open) Phase comparison output for master clock of the recording/playback EFM master PLL Filter input for master clock of the recording/playback master PLL Internal VCO control voltage input of the recording/playback master PLL Light amount signal (RF/ABCD) peak hold input from the CXA2523R (IC302) Light amount signal (RF/ABCD) bottom hold input from the CXA2523R (IC302) Light amount signal (ABCD) input from the CXA2523R (IC302) Focus error signal input from the CXA2523R (IC302) Auxiliary signal (I3 signal/temperature signal) input terminal Not used (fixed at "H") Middle point voltage (+1.65V) input from the CXA2523R (IC302) Power supply terminal (+3.3V) (analog system) A/D converter operational range upper limit voltage input terminal (fixed at "H" in this set) A/D converter operational range lower limit voltage input terminal (fixed at "L" in this set) Ground terminal (analog system) Sled error signal input from the CXA2523R (IC302) Tracking error signal input from the CXA2523R (IC302) Auxiliary signal input terminal Light amount signal input from the CXA2523R (IC302) Connected to the +3.3V power supply Error signal input for the laser automatic power control Not used (fixed at "L") ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the CXA2523R (IC302) Filter f0 control signal output terminal Not used (open) Serial data latch pulse signal output terminal Not used (open) Serial data transfer clock signal output terminal Not used (open) Writing serial data output terminal Not used (open) Control signal output to the reference voltage generator circuit for the laser automatic power control PWM signal output for the laser automatic power control Not used (open) Tracking servo drive PWM signal () output to the BH6511FS (IC303) Tracking servo drive PWM signal (+) output to the BH6511FS (IC303) Power supply terminal (+3.3V) (digital system) Focus servo drive PWM signal (+) output to the BH6511FS (IC303) Focus servo drive PWM signal () output to the BH6511FS (IC303) Clock signal (176.4 kHz) output terminal (X'tal system) Not used (open) Sled servo drive PWM signal () output to the BH6511FS (IC303)
O (A) Filter output for master clock of the recording/playback master PLL
O (A) Monitor output of the A/D converter input signal Not used (open)
63
Pin No. 92 93 94 95 96 97 98 99 100
Pin Name SFDR SPRD SPFD FGIN TEST1 TEST2 TEST3 DVSS EFMO
I/O O O O I I I I -- O Ground terminal (digital system) Input terminal for the test (fixed at "L")
Function Sled servo drive PWM signal (+) output to the BH6511FS (IC303) Spindle servo drive PWM signal () output to the BH6511FS (IC303) Spindle servo drive PWM signal (+) output to the BH6511FS (IC303) Not used (fixed at "L")
EFM signal output terminal when recording mode
Not used (open)
* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.
64
· SERVO BOARD IC302 CXA2523R (RF AMP, FOCUS/TRACKING ERROR AMP) Pin No. 1 2 3 4 to 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name I J VC A to F PD APC APCREF GND TEMPI TEMPR SWDT SCLK XLAT XSTBY F0CNT VREF EQADJ 3TADJ VCC WBLADJ TE CSLED SE ADFM ADIN ADAGC ADFG AUX FE ABCD BOTM PEAK RF RFAGC AGCI COMPO COMPP ADDC OPO OPN RFO MORFI MORFO I/O I I O I I O I -- I O I I I I I O I I -- I O I O O I I O O O O O O O I I O I I O I O I O Function I-V converted RF signal I input from the optical pick-up block detector I-V converted RF signal J input from the optical pick-up block detector Middle point voltage (+1.65V) generation output terminal Signal input from the optical pick-up detector Light amount monitor input from the optical pick-up block laser diode Laser amplifier output terminal to the automatic power control circuit Reference voltage input terminal for setting laser power Ground terminal Connected to the temperature sensor Not used (open) Not used (open) Output terminal for a temperature sensor reference voltage
Writing serial data input from the MD mechanism controller (IC501) Serial data transfer clock signal input from the MD mechanism controller (IC501) Serial data latch pulse signal input from the MD mechanism controller (IC501) Standby signal input terminal "L": standby (fixed at "H" in this set) Center frequency control voltage input terminal of internal circuit (BPF22, BPF3T, EQ) input terminal Reference voltage output terminal Not used (open)
Center frequency setting terminal for the internal circuit (EQ) Center frequency setting terminal for the internal circuit (BPF3T) Power supply terminal (+3.3V) Center frequency setting terminal for the internal circuit (BPF22) Tracking error signal output to the CXD2652AR (IC301) Connected to the external capacitor for low-pass filter of the sled error signal Sled error signal output to the CXD2652AR (IC301) FM signal output of the ADIP Receives a ADIP FM signal in AC coupling Connected to the external capacitor for ADIP AGC ADIP duplex signal (22.05 kHz ± 1 kHz) output to the CXD2652AR (IC301) Auxiliary signal (I3 signal/temperature signal) output terminal Focus error signal output to the CXD2652AR (IC301) Light amount signal (ABCD) output to the CXD2652AR (IC301) Light amount signal (RF/ABCD) bottom hold output to the CXD2652AR (IC301) Light amount signal (RF/ABCD) peak hold output to the CXD2652AR (IC301) Playback EFM RF signal output to the CXD2652AR (IC301) Connected to the external capacitor for RF auto gain control circuit Receives a RF signal in AC coupling User comparator output terminal User comparator input terminal Not used (open) Not used (fixed at "L") Not used (open) Not used (fixed at "L") Not used (open)
Connected to the external capacitor for cutting the low band of the ADIP amplifier User operational amplifier output terminal RF signal output terminal Receives a MO RF signal in AC coupling MO RF signal output terminal User operational amplifier inversion input terminal
65
· SERVO BOARD IC501 CXP84340-201Q (MD MECHANISM CONTROLLER) Pin No. 1 to 5 6 7 8, 9 10 11 12 13 14 to 17 18 19 20 21 22 23 24, 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 Pin Name TIN3 to TIN7 LOAD EJECT NCO MDMON E-SW AG-OK ADJ-OK NCO DFCTSEL DPLLSEL EMPHSEL LOCK NCO 2M/4M NCO MNT0 MNT1 MNT2 MNT3 RESET EXTAL XTAL VSS TX TEX AVSS AVREF INIT TEMP ACNT DO-SEL EE-CS EE-CKO EE-SIO MD-SO LINKOFF I/O I/O O O O O I O O O I I I O O I O I I I I I O I -- O I -- I I I I I O O I/O O O Function Input of the 4×8 matrix test keys ("L" is always output, except in test mode) Not used (open) Loading motor control signal output to the motor driver (IC305) "H" active *1 Loading motor control signal output to the motor driver (IC305) "H" active *1 Not used (open) Power supply on/off control signal output of the MD mechanism deck section main power supply and loading motor drive (IC305) power supply "H": power on Inputs the disc loading completion detect switch detection signal "L": When completed of the disc loading operation Output of aging status in test mode "L": under aging, "H": aging completed Not used (open) Output of status when aging completed in test mode "L": aging NG, "H": aging OK Not used (open) Not used (open) Select whether defect function is used for the CXD2652AR (IC301) "L": used this function , "H": not used this function (fixed at "H" in this set) Select whether digital PLL function is used for the CXD2652AR (IC301) "L": used this function , "H": not used this function (fixed at "H" in this set) Select whether emphasis signal output from pin or unilink data "L": outputs from both pin and unilink data, "H": output from pin only (fixed at "H" in this set) Mini-disc lock detection signal output to the master controller (IC700) "H": lock Not used (open) Select whether D-RAM capacitance 2M bit or 4M bit "L": 4M bit (external D-RAM) , "H": 2M bit (internal D-RAM of CXD2652AR) (fixed at "L" in this set) Not used (open) Focus OK signal input from the CXD2652AR (IC301) "H" is input when focus is on ("L": NG) Track jump detection signal input from the CXD2652AR (IC301) Busy monitor signal input from the CXD2652AR (IC301) Spindle servo lock status monitor signal input from the CXD2652AR (IC301) System reset signal input from the master controller (IC700), reset signal generator (IC801) and reset switch (S900) "L": reset For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H" Main system clock output terminal (10 MHz) Main system clock input terminal (10 MHz) Ground terminal Sub system clock output terminal (32.768 kHz) Not used (open) Sub system clock input terminal (32.768 kHz) Not used (fixed at "L") Ground terminal (for A/D converter) Reference voltage input terminal (+5V) (for A/D converter) Initial reset signal input terminal (A/D input) (fixed at "H") Temperature sensor (TH501) input terminal (A/D input) Select the number of load/eject aging times (A/D input) 0H 54H (30 times), 55H OA9H (20 times), OAAH OFFH (10 times) Select the digital output bits (A/D input) Chip select signal output to the external EEPROM device Not used (open) Serial data transfer clock signal output to the external EEPROM device Not used (open) Two way data bus with the external EEPROM device Not used (open) Writing serial data signal output to the CXD2652AR (IC301) and CXA2523R (IC302) Unilink on/off control signal output for the SONY bus "L": link on, "H": link off
66
Pin No. 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 to 77 78 to 80
Pin Name UNIREQ UNICKIO UNISI UNISO MD-CKO MD-SI NCO SENS CC-XINT LIMIT-IN EJT-KEY ERROR-PWM MD-RST BU-IN BUS-ON SQSY C-SW MD-LAT MD-ON DEEMP A-MUTE NCO TSTCKO TSTSO TSTMOD VCC NIL
TOUT0 to TOUT3
I/O O I/O I O O I O I I I I O O I I I I O O O O O O O I -- I O I/O
Function Data request signal output terminal (for SONY bus) "H": request on Not used (open)
Serial clock signal input from the master controller (IC700) or serial clock signal output to the SONY bus interface (IC600) and master controller (IC700) (for SONY bus) Serial data input from the SONY bus interface (IC600) Serial data output to the SONY bus interface (IC600) Serial data transfer clock signal output to the CXD2652AR (IC301) and CXA2523R (IC302) Reading serial data signal input from the CXD2652AR (IC301) Not used (open) Internal status (SENSE) input from the CXD2652AR (IC301) Interrupt status input from the CXD2652AR (IC301) Detection input from the sled limit-in detect switch The optical pick-up is inner position when "L" Eject request signal input terminal "L": eject on Not used (fixed at "H") Not used (open)
PWM error monitor output terminal (C1and ATER is output when test mode)
Reset signal output to the PCM1718E (IC101), CXD2652AR (IC301) and BH6511FS (IC303) "L": reset Battery detect signal input from the SONY bus interface (IC600) and battery check circuit "H": battery on SONY bus on/off control signal input from the master controller (IC700) Subcode Q sync (SCOR) input from the CXD2652AR (IC301) "L" is input every 13.3 msec Almost all, "H" is input Inputs the disc loading start or disc eject completion detect switch detection signal "L": When start or eject completed of the disc loading operation Serial data latch pulse signal output to the CXD2652AR (IC301) and CXA2523R (IC302) Power supply on/off control signal output of the MD mechanism deck section main power supply "H": power on Emphasis on/off control signal output to the PCM1718E (IC101) Audio muting on/off control signal output terminal Not used (open) Output of clock signal for the test mode display Output of data for the test mode display Setting terminal for the test mode Power supply terminal (+5V) Not used (fixed at "H") Output of the 4×8 matrix test keys Not used (open) Not used (open) Input of the 4×8 matrix test keys ("L" is always output, except in test mode) Not used (open) Not used (open) "H": emphasis on "L": bus on
"L": test mode, "H": normal mode
TIN0 to TIN2
*1 Loading motor (M903) control Operation Terminal LOAD (pin 6) EJECT (pin 7) IN "H" "L" OUT "L" "H" BRAKE "H" "H" STOP "L" "L"
67
· MAIN BOARD IC700 (MASTER CONTROLLER) MB90574PFV-G-188-BND (MDX-C5960R/C5970R) Pin No. 1 to 7 8 9 10 11 12 13 14 15 16 17 18, 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin Name NC VCC PLL SI PLL SO PLL CKO NOSE-SW LCD SO LCD CKO BEEP DBMOD2 DOOR-SW NC UNI SI UNI SO UNI CKIO NC SIRCS PACK-IND VOL SO VOL CKO DSTSEL0 SYSRST DSTSEL1 DBMOD1 TESTIN VSS C NS-MASK BUS- ON I/O O -- I O O I O O O O I O I O I/O O I O O O I O I O I -- -- O O Not used (open)
MB90574PFV-G-187-BND (MDX-C5970) Function
Power supply terminal (+5V) PLL serial data input terminal PLL serial data output terminal Not used (open) Not used (open) Not used (open)
PLL serial data transfer clock signal output terminal
Front panel block remove/attach detection signal input terminal "L": front panel is attached Serial data output to the liquid crystal display driver (IC801) Serial data transfer clock signal output to the liquid crystal display driver (IC801) Beep sound drive signal output terminal D-BASS mode control signal output terminal Front panel open/close detection signal input Not used (open) Not used (open) Serial data input from the SONY bus interface (IC600) Serial data output to the SONY bus interface (IC600) Serial clock signal output to the MD mechanism controller (IC501) and SONY bus interface (IC600) or serial clock signal input from the MD mechanism controller (IC501) (for SONY bus) Not used (open) Sircs remote control signal input terminal Not used (fixed at "L") LED drive signal output of the MD disc slot illumination and 6 indicator "H": LED on "H" is output to turn on LED when front panel is opened Not used (open) Serial data output for the electrical volume Not used (open) Not used (open) Serial data transfer clock signal output for the electrical volume Not used (open) "L" is input when the front panel is closed
Destination setting terminal (Except German models: fixed at "H", German model: fixed at "L") System reset signal output to the MD mechanism controller (IC501) and SONY bus interface (IC600) "L": reset Destination setting terminal (US, Canadian models: fixed at "H", E model: fixed at "L") D-BASS mode control signal output terminal Setting terminal for the test mode Ground terminal Connected to coupling capacitor for the power supply Discharge control signal output for the noise detection circuit "H": discharge Used for the MDX-C5960R/C5970R only (MDX-C5970: Not used (open)) Bus on/off control signal output to the MD mechanism controller (IC501) and SONY bus interface (IC600) "L": bus on A/D converter power control signal output terminal When the KEYACK (pin &ª) that controls reference voltage power for key A/D conversion input is active, "L" is output from this terminal to enable the input Power supply terminal (+5V) (for D/A converter) Ground terminal (for D/A converter) View field angle control signal is output when front panel is fully opened "H": front panel is fully opened Chip enable signal output for the electrical volume Power supply terminal (+5V) (for A/D converter) Not used (open) Not used (open) "L": test mode, Normally: fixed at "H"
37 38 39 40 41 42
AD-ON DVCC DVSS LCDANG VOL CE AVCC
O -- -- O O --
68
Pin No. 43 44 45 46
Pin Name AVRH AVRL AVSS KEY-IN0
I/O I I -- I
Function Reference voltage (+5V) input terminal (for A/D converter) Reference voltage (0V) input terminal (for A/D converter) Ground terminal (for A/D converter) Key input terminal (A/D input) (LSW801 to LSW804, LSW806 to LSW810) OFF, SOURCE, SEEK/AMS + ) + = 0 , DSPL, SOUND, MODE, SHIFT, 1, 2 keys input (LSW804 DSPL: MDX-C5960R/C5970R only) Key input terminal (A/D input) (LSW811 to LSW821) 6, AF/TA (MDX-C5960R/C5970R) DSPL (MDX-C5970), LIST PTY (MDX-C5960R/ C5970R) LIST (MDX-C5970), 10 to 3 keys input Key input terminal (A/D input) Not used (open) Rotary remote commander key input terminal (A/D input) D-BASS switch (LSW805) input terminal (A/D input) Noise level detection signal input at SEEK mode (A/D input) Used for the MDX-C5960R/C5970R only (MDX-C5970: Not used (open)) Multi-path detection signal input from the RDS decoder (IC102) (A/D input) Used for the MDX-C5960R/C5970R only (MDX-C5970: Not used (open)) FM and AM signal meter voltage detection input from the FM/AM tuner unit (TU1) (A/D input) Power supply terminal (+5V) Power amp muting on/off control signal output to the power amplifier (IC500) "L": muting on Standby on/off control signal output to the power amplifier (IC500) "L": standby mode, "H": amp on Auto dimmer control illumination line detection signal input terminal "L" is input at dimmer detection Mini-disc lock detection signal input from the MD mechanism controller (IC501) Emphasis control signal output terminal Not used (open) Audio line muting on/off control signal output terminal "H": muting on Preamp muting on/off control signal output to the electrical volume (IC300) "H": muting on Muting on/off control signal output of the FM tuner signal "H": muting on Used for the MDX-C5960R/C5970R only (MDX-C5970: Not used (open)) Ground terminal Accessory detect signal input terminal "L": accessory on PLL low-pass filter time constant selection signal output at AF SEEK "H" is output when AF SEEK Not used (open) IF band select signal output terminal "H": wide mode In receiving FM signals, interference noise from adjacent stations is removed by narrowing the IF band automatically in the tuner unit so as to raise the selectivity, but in this case, the distortion may increase and accordingly, the IF band is widened forcibly Not used (open) Data transmit completed detect signal input from the RDS decoder (IC102) "H" active Used for the MDX-C5960R/C5970R only (MDX-C5970: Not used (open)) Narrow select signal output terminal "H" active Not used (open) IF counter request signal input from the FM/AM PLL (IC100) Two-way data bus with the FM/AM PLL (IC100), RDS decoder (IC102) and electrical volume (IC300) (RDS decoder is MDX-C5960R/C5970R only) Bus clock signal output to the FM/AM PLL (IC100), RDS decoder (IC102) and electrical volume (IC300) (RDS decoder is MDX-C5960R/C5970R only) Rotary remote commander shift key input terminal "L": shift Sub system clock output terminal (32.768 kHz) Sub system clock input terminal (32.768 kHz) "H": lock
47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65
KEY-IN1 KEY-IN2 RC-IN0 D-BASS IN QUALITY MPDH (MTP) S-METER (VSM) VCC AMP ATT AMP ON ILL IN LOCK IN EMPH ON AU ATT AF ATT TU-ATT VSS ACC IN AF-SEEK
I I I I I I I -- O O I I O O O O -- I O
66
WIDE
O
67 68 69 70 71 72 73 74
DAVN NARROW SSTOP SDA SCL RC-IN1 X1A X0A
I O I I/O O I O I
69
Pin No. 75 76 77, 78 79 80
Pin Name NC BU-IN NC KEYACK TEL-ATT
I/O O I O I I Not used (open)
Function Battery detect signal input from the SONY bus interface (IC600) and battery detect circuit "L" is input at low voltage Not used (open) Input of acknowledge signal for the key entry Acknowledge signal is input to accept function and eject keys in the power off status On at input of "H" Telephone muting signal input terminal At input of "H", the signal is attenuated by 20 dB Used for the MDX-C5970/C5970R only (MDX-C5960R: fixed at "H") FM stereo broadcasting detection signal input from the FM/AM tuner unit (TU1), or forced monaural control signal output to the FM/AM tuner unit (TU1) "L" is input in the FM stereo mode, or "L" is output in the forced monaural mode Seek control signal output to the FM/AM tuner unit (TU1) AM mode: Used for IF count output/SD output request/AGC cut at SEEK or BTM FM mode: Used for SD speed up at SEEK, BTM, or AF "L" is output at tuner off Station detector detect input from the FM/AM tuner unit (TU1) Stop level for SEEK, BTM, etc. is determined SD is present at input of "H" Not used (open) PLL serial chip enable signal output terminal Not used (open) Hardware standby input terminal "L": hardware standby mode Reset signal input in this set Setting terminal for the CPU operational mode (fixed at "L" in this set) Setting terminal for the CPU operational mode (fixed at "H" in this set) Setting terminal for the CPU operational mode (fixed at "H" in this set) System reset signal input from the reset signal generator (IC801) and reset switch (S900) "L": reset "L" is input for several 100 msec after power on, then it changes to "H" Ground terminal Main system clock input terminal (3.68 MHz) Main system clock output terminal (3.68 MHz) Power supply terminal (+5V) Power select switch input terminal "L": off (halt mode), "H": on (operation mode) Not used (open) Polar monaural detection signal input terminal Not used (open) Not used (open) Frequency select switch (S701) input terminal "L": MW10k step/FM 200k step, "H": MW 9k step/FM 50k step Used for the E model only (Except E models: fixed at "H") Not used (open) Internal RAM reset detection signal input from the RN5VD23AA (IC802) Input terminal to check that RAM data are not destroyed due to low voltage This checking is made within 100 msec after reset Not used (open) Chip enable signal output to the liquid crystal display driver (IC801) "H" active Internal flash memory data write mode detection signal input terminal "L": data write mode Not used (fixed at "H" in this set) Dial pulse input of the rotary encoder (EN801) (for VOLUME/BASS/TREBLE/BALANCE/FADER control) Power on/off control signal output of the illumination LED and liquid crystal display driver (IC801) "H": power on Main system power supply on/off control signal output to the BA3918 (IC800) "H": power on FM system power supply on/off control signal output to the BA3918 (IC800) "L": AM power on, "H": FM power on
81
ST-MONO
I/O
82
SEEKOUT
O
83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 to 99 100 101 102 103 104 105 106 107 108 109 110
SD-IN MONO PLL CE HSTX MD2 MD1 MD0 RESET VSS X0 X1 VCC POW-SEL POL MONO NC BAND (9K-10K) NC RAMBU NC LCD CE FLASH-W RE-IN0 RE-IN1 LAMP ON (ILL ON) PW-ON FM-ON
I O O I I I I I -- I O -- I I O I O I O O I I I O O O
70
Pin No. 111
112 to 118
Pin Name TU-ON NC VSS NC
I/O O O -- O
Function Tuner system power supply on/off control signal output to the BA3918 (IC800) "H": tuner power on Not used (open) Ground terminal Not used (open)
119 120
71