Text preview for : Mainboard_Foxconn_Model-661M08.pdf part of some brands - algumas marcas some schematic motherboards notebooks downloaded from www.freeservicemanuals.net. alguns esquemas placa-mae e notebook baixados de www.freeservicemanuals.net.
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5
4
3
2
1
CPU-LGA775
Note:
D
Do not include the schematic when create netlist.
D
Host Bus
AGP SLOT VGA PCI Slot 1
C
AGP BUS
AGP BUS
SiS661GX /661FX /648FX/ 648C
DDR SDRAM
DIMM1 DIMM2
C
PCI Slot 2 PCI Slot 3
MuTIOL 1G
LAN PHY AC'97 Audio Codec
IDE 1 IDE 2
SiS964/ 964L
Back Panel Front Panel
B
B
SATAX2
KEYBOARD /MOUSE
PS/2 LPC Bus
USB 0 USB 1
USB 4 USB 5 USB 6 USB 7 USB 3
FAN 1
FAN CONTROL
USB 2
VOLTAGE MONITOR SPI Bus LPC Bus
FAN 2 SPI ROM LPC ROM
LPC Super I/O
TEMPERATURE MONITOR
A
A
IR
PARALLEL
COM
FLOPPY
TECHNOLOGY COPR.
Title
Topology
Document Number Rev
661M08
Date:
5 4 3 2
A
1 of 44
1
Monday, August 01, 2005
Sheet
5
4
3
2
1
Foxconn Precision Co. Inc.
661M08 Schematic
D
Fab.A Data: 2005/06/28
Page Index 00. Index Page 01. Topology 02. Rest Map 03. Clock Distribution 04. Power Delivery Map 22. DECOUPLE & EMI 23. Termination 24. PCI 1&2 25. PCI3 26. IDE CONN 27. USB & LAN PORT 28. SI/O_ITE8712F/JX 29. K/B & MS CONN 30. COM/PRT/GAME PORT 31. LPC/SPI BIOS_FLOPPY 32. FAN 33. 653/655 AC97 CODEC 34. AC97 I/O 35. LAN PHY AC131KML 36. Power BTN/RTC Batt 37. DDR 2.5V DDRVTT 38. Power CONN 39. SB3V, SB1.8V, VCC1.8V, VDDQ 40. TI1394(NA) 41. USB 42. Modification 43. Jumper Setting/Option Table
D
C
05. LGA775-1 06. LGA775-2 07. Voltage regulator Down 10.1 08. Output CAP 09. 661FX-1 HOST & AGP 10. 661FX-2 DDR 11. 661FX Mutiol & VGA 12. 661FX Power 13. 964/L-1 PCI/IDE/Link 14. 964/L-2 PC/MIL/CPU/GPIO 15. 964-3 USB/SATA 16. 964-4 Power 17. 952017/18AF Clock GEN 18. DDR Clock Buffer 19. AGP 20. VGA CON 21. DIMM1 & DIMM2
C
B
B
A
A
FOXCONN PCEG
Title
Index Page
Size B Date:
5 4 3 2
Document Number
661M08
Sheet
1
Rev A 1 of 44
Monday, August 01, 2005
5
4
3
2
1
VCCP
VCCP
Prescott
CPUPWRGD CPURST_
VRD10.1/VRM9.X
D
VRMPWRGD
D
&
PWOK CPUPWRGD NBPWRGD CPURST_
ATX Power
PSON_
C
SiS648FX SiS661FX
NBRST_
C
AGP 8X SLOT
SiS964/SiS964L
SBPWRGD
PCI Slot 1 PCI Slot 2
NBRST_
PCI Slot 3
PCIRST_
Front Panel
PSON_
B
RSTSW_ PWRBTN_ SIORST_
IDE CONN 1 IDE CONN 2
B
PWRBTN_
SIORST_
SIORST_
Super IO 8712F/JX
A
Media Interface
A
TECHNOLOGY COPR.
Title
Reset Map
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 2 of 44
A
5
4
3
2
1
14.318MHz
CPU
D
CPUCLK0
100/133/200 MHz
D
CPUCLK1
100/133/200 MHz
66 MHz AGPCLK1 133 MHz ZCLK0 66 MHz AGPCLK0
AGP 8x DDR CLOCK BUFFER
DIMM 1-2
SiS648FX /661FX
FWDSDCLK0
DDRCLK
CLOCK GENERATOR
C
C
33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M REFCLK 133 MHz
SiS964/ 964L
33 MHz
TXCLK RXCLK
LAN PHY
PCICLK1-3
PCI Slot 1-3
B
B
AUDIO_CLK 32.768KHz
AC'97
24.576MHz/NC 48 MHz SIO48M
Super I/O
A
A
TECHNOLOGY COPR.
Title
Clock Distribution
Document Number Rev
661M08
Date:
5 4 3 2
A
Sheet
1
Monday, August 01, 2005
3
of
44
5
4
3
2
1
DDR 2 DIMMS:
ATX SPS
5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V
ATX 12V P/S
+ 1 2 V LGA775 +12V CORE_CPU_SYS VCCP 1.1V~1.85V 119A VCC_VID 1.2V 30mA
VCC3
SB5V
> >
2.5V REGULATOR
S3AUXSW-
VCC2.5_MEM
> 2.5V +/-100mv
6.00A
D
REGULATOR
D
VCC2.5_MEM DDR_VTT_STR
DDR VTT
> VRD 10.1
MIC5258
5V_DUAL VCC3
>
VCCVID
> >
>
VCC3
1.25V REGULATOR
> 1.25V
2A
SIS648FX/ 661FX
VCC3_DUAL VCC1.8V 1.8V 1389.5mA VDDQ: AGP 1.5V 35.1/21.7mA SB1.8V 1.8V 10mA VCC1.8V VCCP
PWRG_ATX
C
SB5V
AIC1086 VCC3
SB3V
PWRG_ATX
VCC3_DUAL
> > > >
VCC3: 3.3V 108mA VCC3_DUAL 33.4mA VCC2.5_MEM 2.5V 501.3mA
SB3V
3 VOLTS BATTERY
> OR >
VCC_RTC
VCC_RTC
> > > > >
SIS964
VCC3: 3.3V
VCC3_DUAL
VCC1.8V 1.8V
C
RTCVDD
VCCP
AIC1084
VCC1.8V
CLK_GEN VCC3
> > > >
VCC5
VCCP VCC5_DUAL 5V_SYS VCC3 VCC5 +12V -12V
B
3.3V 300mA
VCC3_DUAL
> > > > > > > > > > >
PCI PER SLOT: 3.3V 5V 12V -12V 3.3Vaux 0.375A 7.6A 5.0A 0.5A 0.1A
VCC3_DUAL
SUPER I/O VCC5_DUAL 5V VCC3_DUAL
>
VCC5_DUAL VCC5_DUAL
FWH
B
VCC5
PWRG_ATX
SB5V VCC3_DUAL
LAN PHY
+12V VCC5A
> >
USB POWER 5V PS2 KB/MS POWER 5V
VCC3 VCC3 +12V
A
AIC1084
VDDQ 1.5V
AUDIO VREG
AGP
VCC3
> >
AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA
VCC5 VCC3_DUAL
A
TECHNOLOGY COPR.
Title
Power Delivery Map
Document Number Rev
661M08
Date:
5 4 3 2
A
Sheet
1
Monday, August 01, 2005
4
of
44
5
4
3
2
1
9 HDJ[63..0] HDJ[63..0] 9
HAJ[31..3]
HAJ[31..3]
U33A U33B HDJ0 HDJ1 HDJ2 HDJ3 HDJ4 HDJ5 HDJ6 HDJ7 HDJ8 HDJ9 HDJ10 HDJ11 HDJ12 HDJ13 HDJ14 HDJ15 9 9 9 HDBIJ0 HDSTBNJ0 HDSTBPJ0 HDJ16 HDJ17 HDJ18 HDJ19 HDJ20 HDJ21 HDJ22 HDJ23 HDJ24 HDJ25 HDJ26 HDJ27 HDJ28 HDJ29 HDJ30 HDJ31 9 9 9 HDBIJ1 HDSTBNJ1 HDSTBPJ1 HDBIJ1 HDBIJ0 B4 C5 A4 C6 A5 B6 B7 A7 A10 A11 B10 C11 D8 B12 C12 D11 A8 C8 B9 G9 F8 F9 E9 D7 E10 D10 F11 F12 D13 E13 G13 F14 G14 F15 G15 G11 G12 E12 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1# CPU_Socket 2 OF 7 HAJ3 HAJ4 HAJ5 HAJ6 HAJ7 HAJ8 HAJ9 HAJ10 HAJ11 HAJ12 HAJ13 HAJ14 HAJ15 HAJ16 9 HREQJ[4..0] HREQJ0 HREQJ1 HREQJ2 HREQJ3 HREQJ4 9 HAJ17 HAJ18 HAJ19 HAJ20 HAJ21 HAJ22 HAJ23 HAJ24 HAJ25 HAJ26 HAJ27 HAJ28 HAJ29 HAJ30 HAJ31 HDBIJ3 HDSTBNJ3 HDSTBPJ3 9 9 9 TP11 TP12 TP13 TP14 TP_LAG775_PIN_AH4 TP_LAG775_PIN_AH5 TP_LAG775_PIN_AJ5 TP_LAG775_PIN_AJ6 HADSTBJ0 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AC4 AE4 AD5 A03# ADS# A04# BNR# A05# HIT# A06# RSP# A07# BPRI# A08# DBSY# A09# DRDY# A10# HITM# A11# IERR# A12# INIT# A13# LOCK# A14# TRDY# A15# BINIT# A16# DEFER# RSVD1 EDRDY# RSVD2 MCERR# REQ0# REQ1# AP0# REQ2# AP1# REQ3# REQ4# BR0# ADSTB0# TESTHI08 PCREQ# TESTHI09 TESTHI10 A17# A18# DP0# A19# DP1# A20# DP2# A21# DP3# A22# A23# GTLREF A24# A25# RESET# A26# A27# RS0# A28# RS1# A29# RS2# A30# A31# A32# A33# A34# A35# RSVD3 RSVD4 ADSTB1# 1 OF 7 CPU_Socket HCPURSTJ TESTHI00 TESTHI01 TESTHI11 TESTHI12 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHI06 TESTHI07 RSVD10 RSVD11 SLP# RSVD12 PWRGOOD PROCHOT# THERMTRIP# COMP0 COMP1 COMP2 COMP3 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 F26 W3 P1 W2 F25 G25 G27 G26 G24 F24 AK6 G6 L2 AH2 N1 AL2 M2 A13 T1 G2 R1 N5 AE6 C9 G10 D16 A20 E23 E24 F23 H2 J2 J3 Y1 V2 AA2 HCOMP0 HCOMP1 HCOMP2 HCOMP3 TESTHI_0 TESTHI_1 TESTHI_11 TESTHI_12 TESTHI_0 6 FSB_VTT BC940 22pF C0603 10 mils width 7 mils spacing R815 100 R816 100 R817 R818 62 62 Dummy TESTHI_0 TESTHI_2_7 R819 R820 60.4 60.4 HCOMP2 HCOMP3 HCOMP0 HCOMP1 VTT_OUT_RIGHT D2 C2 D4 H4 G8 B2 C1 E4 AB2 P3 C3 E3 AD3 G7 F2 AB3 U2 U3 F3 G3 G4 H5 J16 H15 H16 J17 H1 G23 B3 F5 A3 HADSJ HBNRJ HITJ TP1 HBPRIJ HDBSYJ HDRDYJ HITMJ INITJ HLOCKJ HTRDYJ TP2 9 9 9 9 9 9 9 14 9 9
TP_RSPJ
D
D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3#
G16 E15 E16 G18 G17 F17 F18 E18 E19 F20 E21 F21 G21 E22 D22 G22 D19 G20 G19 D20 D17 A14 C15 C14 B15 C18 B16 A17 B18 C21 B21 B19 A19 A22 B22 C20 A16 C17
HDJ32 HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDBIJ2
D
HIERRJ
TP_BINITJ TP_EDRDYJ TP_MCERRJ TP_APJ0 TP_APJ1 HBR0J TESTHI_8 TESTHI_9 TESTHI_10 TP_DPJ0 TP_DPJ1 TP_DPJ2 TP_DPJ3 HGTLREF
HDEFERJ 9 TP3 TP4 GTLREF voltage TP5 12 mils width, TP6 divider should caps should be HBR0J 9
should be 0.67*FSB_VTT 15 mils spacing be within 1.5" of the GTLREF pin placed near CPU pin VTT_OUT_RIGHT
HDBIJ2 HDSTBNJ2 HDSTBPJ2
9 9 9
9
HAJ[31..3]
HAJ[31..3]
C
HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63 HDBIJ3
R813 100 +/-1% R0603
HCPURSTJ 9 HRSJ0 HRSJ1 HRSJ2 9 9 9
*
R814 210 BC938 BC939 +/-1% 1uF 220pF R0603 10V, Y5V, +80%/-20% X7R, +/-10% 50V, C0603 C0603
*
*
C
Place at CPU end of route
TBD
TBD
Pin CRB Pin CRB D23 0.7: test point TP_VCCPLL AM5 0.7: test point TP_VID6
HBR0J CRB 0.7: 220 ohm, 5% DG 0.51: 62 ohm, 5%
TBD
Pin AL2 PROCHOT# CRB 0.7: pull up to VTT_OUT_RIGHT DG/611A: example VR thermal monitor circuit 3 OF 7
9
HADSTBJ1
U33C 14 14 14 14 14 14 14
B
SMIJ A20MJ FERRJ INTR NMI IGNNEJ STPCLKJ HVCCA HVSSA HVCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 TP16 VID0 VID1 VID2 VID3 VID4 VID5 TP_VID6
P2 K3 R3 K1 L1 N2 M3 A23 B23 D23 C23 AM2 AL5 AM3 AL6 AK4 AL4 AM5 F28 G28 AE8 AL1 AK1 TP_VCCSENSE TP_VSSSENSE AN3 AN4 AN5 AN6
SMI# A20M# FERR#/PBE# LINT0 LINT1 IGNNE# STPCLK# VCCA VSSA RSVD5 VCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 RSVD6 BCLK0 BCLK1 SKTOCC# THERMDA THERMDC
*
VTT_OUT_LEFT
TBD
Pin AK6, G6 refer to CRB 0.7
6 6 6 7 7 7 7 7 7
TP_VCCPLL
TESTHI_2_7 RSVD_AK6 RSVD_G6 CPUSLPJ CPU_PWRG PROCHOTJ THERMTRIPJ 14 14 14 14 VTT_OUT_LEFT VTT_OUT_RIGHT
*
BC4 0.1uF C0603 25V, Y5V, +80%/-20%
*
BC5 0.1uF C0603 25V, Y5V, +80%/-20%
B
10 mils width 7 mils spacing
1 3 5 7
*
RN80 8P4R0603 62 2 4 6 8 62 62 100 62 62 62 DUMMY 62
TESTHI_9 TESTHI_8 TESTHI_10 TESTHI_1 TESTHI_11 TESTHI_12 CPU_PWRG HCPURSTJ HBR0J RSVD_G6 CPU_BOOT
R821 R822 R823 R824
62 62 130 62
HIERRJ THERMTRIPJ PROCHOTJ FERRJ
FSB_VTT
17 17
CPUCLK0 CPUCLK-0
TBD
Pin N5 ~ Pin J3 CRB 0.7: connections ok? VTT_OUT_RIGHT
R825 R826 R827 R828 R829 R830 R831
INTEL THERMTRIPJ, FERRJ PULL HIGH FSB_VTT
FSB_VTT VTT_OUT_LEFT R832 R833 R834 R835 R836 R838 R839 R840 56 56 56 56 56 56 56 56 A20MJ STPCLKJ CPUSLPJ SMIJ INITJ IGNNEJ INTR NMI
*
BC8 0.1uF C0603 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20%
*
BC7 1uF C0805 16V, X7R, +/-10% 16V, X7R, +/-10%
32 32
THERMDA THERMDC TP17 TP18
*
BC6 0.1uF 25V, Y5V, +80%/-20% C0603
*
A
7 7
VCC_SENSE VSS_SENSE
TP25
*
BOOTSELECT LL_ID0 LL_ID1
CPU_BOOT LL_ID0 TP_LL_ID1
680 R841 +/-5% LL_ID0 R842
CPU_Socket
5 4 3 2
* *
VCCSENSE VSSSENSE VCC_MB_REG VSS_MB_REG Changed pin name F29 from RSV RSVD9
R837 TP_RSVD_CPU_N5 TP_RSVD_CPU_AE6 TP_RSVD_CPU_C9 TP_RSVD_CPU_G10 TP_RSVD_CPU_D16 TP_RSVD_CPU_A20 RN81 TP22 TP23 TP24 8 6 4 2
680 +/-5% 7 5 3 1
VID0 VID3 VID2 VID4 VID1 VID5 +/-5% Dummy
NEAR CPU
A
680 +/-5%
TECHNOLOGY COPR.
Title
*
RSVD_AK6 Document Number
Clock Distribution
Rev
661M08
Date: Monday, August 01, 2005 Sheet
1
A
5 of 44
5
4
3
2
1
VCCP U33E AG22 K29 AM26 AL8 AE12 AE11 W23 W24 W25 T25 Y28 AL18 AC25 W30 Y30 AN14 AD28 Y26 AC29 M29 U24 J23 AC27 AM18 AM19 AB8 AC26 J8 J28 T30 AM9 AF15 AC8 AE14 N23 W29 U29 AC24 AC23 Y23 AN26 AN25 AN11 AN18 Y27 Y25 AD24 AE23 AE22 AN19 V8 K8 AE21 AM30 AE19 AC30 AE15 M30 K27 M24 AN21 T8 AC28 N25 AE18 W26 AD25 M8 N30 AD26 AJ26 AM29 M25 M26 L8 U25 Y8 AJ12 AD27 U23 M23 AG29 N27 AM22 U28 K28 U8 AK18 AD8 K24 AH28 AH21 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45 VCCP46 VCCP47 VCCP48 VCCP49 VCCP50 VCCP51 VCCP52 VCCP53 VCCP54 VCCP55 VCCP56 VCCP57 VCCP58 VCCP59 VCCP60 VCCP61 VCCP62 VCCP63 VCCP64 VCCP65 VCCP66 VCCP67 VCCP68 VCCP69 VCCP70 VCCP71 VCCP72 VCCP73 VCCP74 VCCP75 VCCP76 VCCP77 VCCP78 VCCP79 VCCP80 VCCP81 VCCP82 VCCP83 VCCP84 VCCP85 VCCP86 VCCP87 VCCP88 VCCP89 VCCP90 VCCP91 VCCP92 5 OF 7 VCCP93 VCCP94 VCCP95 VCCP96 VCCP97 VCCP98 VCCP99 VCCP100 VCCP101 VCCP102 VCCP103 VCCP104 VCCP105 VCCP106 VCCP107 VCCP108 VCCP109 VCCP110 VCCP111 VCCP112 VCCP113 VCCP114 VCCP115 VCCP116 VCCP117 VCCP118 VCCP119 VCCP120 VCCP121 VCCP122 VCCP123 VCCP124 VCCP125 VCCP126 VCCP127 VCCP128 VCCP129 VCCP130 VCCP131 VCCP132 VCCP133 VCCP134 VCCP135 VCCP136 VCCP137 VCCP138 VCCP139 VCCP140 VCCP141 VCCP142 VCCP143 VCCP144 VCCP145 VCCP146 VCCP147 VCCP148 VCCP149 VCCP150 VCCP151 VCCP152 VCCP153 VCCP154 VCCP155 VCCP156 VCCP157 VCCP158 VCCP159 VCCP160 VCCP161 VCCP162 VCCP163 VCCP164 VCCP165 VCCP166 VCCP167 VCCP168 VCCP169 VCCP170 VCCP171 VCCP172 VCCP173 VCCP174 VCCP175 VCCP176 VCCP177 VCCP178 VCCP179 VCCP180 VCCP181 VCCP182 VCCP183 VCCP184 AK12 AH22 T29 AM14 AM25 AE9 Y29 AK25 AK19 AG15 J22 T24 AG21 AM21 J25 U30 AL21 AG25 AJ18 J19 AH30 J15 AG12 AJ22 J20 AH18 AH26 W27 AL25 AN8 AH14 U27 T23 R8 AK22 AN29 AG11 AK26 J10 AJ15 AG26 AN9 AH15 AF18 AL15 J26 J18 J21 AG27 AK15 AF11 AD23 AM15 AF8 AK21 AG30 AJ21 AM11 AL11 AJ11 K30 AL14 AN30 AH25 AL12 AJ9 AK11 AG14 N29 AL30 AJ25 AH9 J29 J11 K25 P8 K23 AL19 AM8 T26 N28 AH12 AL22 AN15 AJ8 U26 AJ19 T27 AK8 AN12 AG9 N26
VCCP VCCP U33F AF9 AF22 AH11 AJ14 AH19 AH29 AH27 AG28 AL26 AM12 J24 J13 T28 W28 J12 J27 AG19 AL9 AD30 AF21 Y24 AK14 J9 M27 AF14 J30 AG18 AA8 AG8 AL29 AD29 W8 AH8 N24 AN22 J14 K26 AF19 N8 AF12 M28 AK9 C10 D12 AM7 C24 K2 C22 AN1 B14 K7 AE16 B11 AL10 AK23 H12 AF7 AK7 H7 E14 L28 Y5 E11 AL16 AL24 AK13 AL3 D21 AL20 D18 AN2 AK16 AK20 AM27 AM1 AL13 AL17 C19 E28 AH7 AK30 D24 VCCP185 VCCP186 VCCP187 VCCP188 VCCP189 VCCP190 VCCP191 VCCP192 VCCP193 VCCP194 VCCP195 VCCP196 VCCP197 VCCP198 VCCP199 VCCP200 VCCP201 VCCP202 VCCP203 VCCP204 VCCP205 VCCP206 VCCP207 VCCP208 VCCP209 VCCP210 VCCP211 VCCP212 VCCP213 VCCP214 VCCP215 VCCP216 VCCP217 VCCP218 VCCP219 VCCP220 VCCP221 VCCP222 VCCP223 VCCP224 VCCP225 VCCP226 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 6 OF 7 VSS41 AL23 VSS42 A12 VSS43 L25 VSS44 J7 VSS45 AE28 VSS46 AE29 VSS47 K5 VSS48 J4 VSS49 AE30 VSS50 AN20 VSS51 AF10 VSS52 AE24 VSS53 AM24 VSS54 AN23 VSS55 H9 VSS56 H8 VSS57 H13 VSS58 AC6 VSS59 AC7 VSS60 AH6 VSS61 C16 VSS62 AM16 VSS63 AE25 VSS64 AE27 VSS65 AJ28 VSS66 AJ7 VSS67 F19 VSS68 AH13 VSS69 AD7 VSS70 AH16 VSS71 AK17 VSS72 E17 VSS73 AH17 VSS74 AH20 VSS75 AE5 VSS76 AH23 VSS77 AE7 VSS78 AM13 VSS79 AH24 VSS80 AJ30 VSS81 AJ10 VSS82 AF3 VSS83 AK5 VSS84 AJ16 VSS85 AF6 VSS86 AK29 VSS87 AJ17 VSS88 F22 VSS89 AH3 VSS90 AK10 VSS91 AM10 VSS92 F16 VSS93 AJ23 VSS94 F13 VSS95 AG7 VSS96 F10 VSS97 L26 VSS98 AD4 VSS99 H11 VSS100 L24 VSS101 L23 VSS102 AM23 VSS103 A15 VSS104 AH10 VSS105 H29 VSS106 B24 VSS107 L3 VSS108 H27 VSS109 A21 VSS110 AE2 VSS111 AJ29 VSS112 A24 VSS113 AK27 VSS114 AK28 VSS115 B20 VSS116 AM20 VSS117 H26 VSS118 B17 VSS119 H25 VSS120 H24 VSS121 AA3 VSS122 AA7 VSS123 H23 VSS124 AA6 VSS125 H10 H22 H21 H20 H19 H18 AB7 H17 AJ24 AM17 AC3 H14 P28 V6 AK2 P27 P26 AM28 AJ13 W4 P25 AJ20 W7 P23 AG13 AG16 AG17 C7 Y2 L30 L29 D15 AL27 Y7 L27 AA29 N6 N7 AA28 AN13 AA27 AA26 P4 AA25 AA24 P7 E26 V30 R2 V29 V28 R5 V27 R7 E20 AN10 V25 T3 V24 V23 T6 AL7 E25 U1 R29 R28 R27 R26 R25 U7 R24 R23 P30 V3 P29 AF16 AE10 AF13 H6 A18 A2 E2 D9 C4 A6 D6 U33G VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 7 OF 7 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 D5 A9 D3 B1 B5 B8 AJ4 AE26 AH1 E29 V7 C13 AK24 AB30 L6 L7 AB29 M1 AB28 E8 AG20 AN17 AB27 AB26 AN16 M7 AB25 AB24 AB23 N3 AA30 F4 AG10 AE13 AF30 H28 F7 AF29 AF28 G1 AF27 AF26 AF25 AN28 AN27 AF24 AF23 AG24 AF17 AN24 H3 AN7 P24 AE20 AE17 E27 T7 R30 AJ27 AB1 AM4 V26 AA23 AL28 AF20 AG23
D
D
note: 7/6-change termination 49.9 to RN702 47
Place BPM termination near CPU
VTT_OUT_RIGHT
Intel Pull High RES 49.9Ohm.
C
C
VTT_OUT_RIGHT
******
R843 R844 R845 R846 R847 R848
62 62 62 62 62 62
HBPM5J HBPM4J HBPM3J HBPM2J HBPM1J HBPM0J
GTLREF_SEL
GTLREF_SEL
9
FSB_VTT PLL Supply Filter 1 1
125mA L12 L0805 10uH RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 V1 F6 T2 Y3 AE3 W1 E7 B13 D14 E6 D1 E5 0805 +/-10%
*****
R849 R850 R851 R852 R853
49.9 49.9 49.9 49.9 49.9
HTDO HTMS HTDI HTCK HTRSTJ
5
HVCCIOPLL
HVCCIOPLL BC959 1uF 10V, Y5V, +80%/-20% R854 C0603 0 +/-5% R0603
*
*
125mA L13 L0805 10uH 0805 +/-10% Notes: 1. Cap. should be within 600 mils of the VCCA and VSSA pins 2. VCCA route should be parallel and next to VSSA route 3. Min. 12 mils trace from the filter to the processor pins 4. The inductors should be close to the cap.
2
2
B
CPU_Socket
5 5
HVCCA HVSSA
HVCCA HVSSA
EC98 33uF 16V, +/-20% CE20D50H110 ESL <= 5 nH, ESR < 0.3 ohm
*
B
CPU_Socket
CPU_Socket
+12V
?
VTT_OUT_RIGHT
*
VCC3
U33D HTCK HTDI HTDO HTMS HTRSTJ HBPM0J HBPM1J HBPM2J HBPM3J HBPM4J HBPM5J ICH_SYS_RSTJ AE1 AD1 AF1 AC1 AG1 AJ2 AJ1 AD2 AG2 AF2 AG3 AC2 AK3 AJ3 FSBSEL0 FSBSEL1 R931 1K +/-1% R0603 DUMMY G29 H30 G30 TCK TDI TDO TMS TRST# 4 OF 7 A29 B25 B29 B30 C29 A26 B27 C28 A25 A28 A27 C30 A30 C25 C26 C27 B26 D27 D28 D25 D26 B28 D29 D30 AM6 AA1 J1 F27 VTT_OUT_RIGHT VTT_OUT_LEFT R859 1 FSB_VTT
BC1025 1uF 10V, Y5V, +80%/-20% C0603
*
FSB_VTT
*
17 BSEL1 R341 470 +/-5% R0603
R271 1K +/-5% R0603
*
R272 2.7K +/-5% R0603
BSEL0 C
17
*
FSBSEL0
A
E
R338 220 B +/-5% R0603
Q34 MMBT3904
E
R942 4.7KB +/-5% R0603
C
*
Q35 MMBT3904
11,13
NBRST-
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 BPM0# VTT8 BPM1# VTT9 BPM2# VTT10 BPM3# VTT11 BPM4# VTT12 BPM5# VTT13 VTT14 DBR# VTT15 VTT16 ITPCLKOUT0 VTT17 ITPCLKOUT1 VTT18 VTT19 BSEL0 VTT20 BSEL1 VTT21 BSEL2 VTT22 VTT23 VTT24 VTTPWRGD VTT_OUT1 VTT_OUT2 VTT_SEL CPU_Socket
R855 10K +/-5% VCC3 R0603
*
GTLREF_SEL D
R856 249 +/-1% R0603 Q95
*
R857 110 +/-1% R0603
G 2N7002 5 TESTHI_0 TESTHI_0 S
*
BC960 0.1uF
R858 62 +/-5% R0603
A
VTT_PWRGD 38 VTT_OUT_RIGHT VTT_OUT_LEFT VCC3 Place at CPU end of route
2
Dummy
FOXCONN PCEG
Title
LGA775 -2
Size Date:
5 4 3 2
Document Number
661M08
Sheet
1
Rev A 6 of 44
Monday, August 01, 2005
5
4
3
2
1
optional Preliminary OVP Protection
3 R944 0 +/-5% R0805
D43 2 1 12V_VRM SB5V 12V_VRM
D
D
R943 10 +/-5% R0805
BAT54C
*
5 U40
*
*
BC1 1uF 16V, X7R, +/-10% C0805
*
BC2 1uF 16V, X7R, +/-10% C0805 BC3 1uF 16V, X7R, +/-10% C0805
BC1029 1uF 16V, X7R, +/-10% C0805 12V_VIN 12V_VIN 8 R945 2.2 R0805 +/-5% G AOD452L S
38
35
39
41
4
3
1
D
D44 1N4148W 2 PGND3 PGND2 VCCDR3 VCCDR2 PGND1 VCCDR1 SGND VCC VRM_EN VID_OUT0 VID_OUT1 VID_OUT2 VID_OUT3 VID_OUT4 VID_OUT5 R955 13 24 25 26 27 28 23 R0603 29 Dummy 100K +/-1% BC1033C0603 9 Dummy 10nF 25V, X7R, +/-10% R952 R0603 Reserved 0 +/-5% 20 BC1034C0603 Dummy 10nF 25V, X7R, +/-10% 21 BOOT1 UGATE1 VID0 VID1 VID2 LGATE1 VID3 VID4 VID5 CS1+ VID_SEL R950 OVP CS114 15 PHASE1 47 2 R947 R0805 1VBOOT
Q109
BC1030 4.7uF 16V, Y5V, +80%/-20% C1206
8
VRM_EN
OUTEN
BC10360.1uF 45 C0603 25V, Y5V, +80%/-20%
*
46
5 5 5 5 5 5
VID0 VID1 VID2 VID3 VID4 VID5
R946 R0805
2.2 +/-5%
phase1
Q110 2.2 +/-5% G S G AOD456L S AOD456L Q111 R948 2.2 R0805 R949 +/-5% +/-1% BC1032 1.5nF 50V, X7R, +/-10% C0603 D D
1.8K R0603
*
0.6uH BC1031 C0805 0.33uF 16V, X7R, +/-10%
*
3K +/-1% R951 1
*
2 1.2K +/-1% D
12V_VIN
7/20
C
D45 1N4148W 2 1VBOOT TC BOOT2 CS_SEL UGATE2 PHASE2 LGATE2 CS2OSC/FAULT CS2+ 17 44 43 42 40 16 R957 R0805 2.2 +/-5% G BC10350.1uF C0603 25V, Y5V, +80%/-20% G
Q108
AOD452L S
BC1037 0.33uF 16V, X7R, +/-10% BC1038 C0805 4.7uF Dummy 16V, Y5V, +80%/-20% C1206
*
*
7/20
D
D
R954 +/-1%
127K R0603
6
OFFSET
L6711TR
R953 R0805
2.2 +/-5% phase2
L15 R956 2.2 R0805 +/-5%
Q112 G AOD456L S S
Q113
Select pull high voltage by chipset
12V_VRM
R959 150K
R0603 +/-1%
22
AOD456L
*
R958 +/-1% BC1040 1.5nF 50V, X7R, +/-10% C0603
1.8K R0603
*
0.6uH BC1039 C0805 0.33uF 16V, X7R, +/-10%
R960 8.2K +/-5% R0603 17,38 VRMPWRGD R963 8.2K 7/20 +/-5% R0603 Dummy R965 0 +/-5% R0603 R964 R0603 5.1K +/-5%
31 30
SGND SS_END
R961
3K +/-1% R962 1
D46 1N4148W 2 1VBOOT 34 33 32 36 18 19 R969 R0805 2.2 +/-5% BC10420.1uF C0603 25V, Y5V, +80%/-20%
10
VSEN BOOT3 UGATE3
Q114
8 18K +/-1% R0603 R967
FB
PHASE3 LGATE3 CS3CS3+ 49
phase3 Q115 G S G AOD456L S AOD456L Q116 R968 2.2 R0805 +/-5% D D R970
B
*
T
*
RT2 100K +/-1% R0603 Dummy
*
470pF 50V, X7R, +/-10% C0603
BC1044
*
Place close to MOSFET
*
G AOD452L S
BC1041 0.33uF 16V, X7R, +/-10% BC1043 C0805 4.7uF Dummy 16V, Y5V, +80%/-20% C1206
D
R966 R0805
2.2 +/-5%
L16
BC1045 47pF 50V, NPO, +/-5% C0603
0.6uH 1.8K R0603 BC1046 0.33uF C0805 16V, X7R, +/-10%
*
NC48
11
12
48
37
NC37
BC1047 4.7nF 50V, X7R, +/-10% C0603 7 COMP FBG FBR
*
+/-1% BC1048 1.5nF 50V, X7R, +/-10% C0603
49
R972
3K
R971 VCCP 0 R0603 +/-5% Dummy
BC1049 0.1uF C0603
R973 0 R0603 +/-5% Dummy 2 JS1
BC1050 0.33uF 16V, X7R, +/-10% C0805 Dummy
1 SHORT HS1
5
VCC_SENSE
VSS_SENSE
5
MOSFET Heatsink PHC539C01012 mosfet_hsh180
Note: Put on Power Dummy Mosfet surface.
A A
5
4
3
2
* *
1
+/-1% R0603 R974 2 1.2K +/-1% r0805h6
*
*
* *
2 1.2K +/-1% r0805h6
12V_VIN
12V_VIN
8
*
*
12V_VIN
8
*
*
* *
*
L14
C
VCCP
B
*
TECHNOLOGY COPR.
Title
VRD
Document Number Rev
661M08
Date: Monday, August 01, 2005
1
A
Sheet 7 of 44
5
4
3
2
1
PWM Controller Enable schematics VRM Output MLCC
D
SB5V
12V_VRM
D
VCCP
VTT_OUT_RIGHT
R91 10K +/-5% R0603 Dummy C Q24 MMBT3904 SOT23_BEC Dummy D
R90 10K +/-5% R0603 VRM_EN Dummy Q23 G S 2N7002 Dummy R89 4.7K +/-5% R0603 Dummy VRM_EN 7 BC1066 1nF 50V, X7R, +/-10% C0603 Dummy
* *
R88 B 4.7K R0603 +/-5% Dummy R92 22.1K +/-1% R0603 Dummy
BC1059 22uF 6.3V, X5R, +/-10% C1206 Dummy
*
BC1060 22uF 6.3V, X5R, +/-10% C1206 Dummy
*
BC1061 22uF 6.3V, X5R, +/-10% C1206 Dummy
*
BC1062 22uF 6.3V, X5R, +/-10% C1206 Dummy
*
BC1063 22uF 6.3V, X5R, +/-10% C1206 Dummy
*
BC1064 22uF 6.3V, X5R, +/-10% C1206 Dummy
*
BC1067 1uF 16V, X5R, +/-10% C0603 Dummy E
place in socket
VCCP
C
*
EC4 560uF 4V, +/-20% CE35D80H90 Dummy
*
EC5 560uF 4V, +/-20% CE35D80H90 Dummy
*
EC6 560uF 4V, +/-20% CE35D80H90 Dummy
C
VRM Input LC schematics
*
12V_VRM 7 12V_VIN 12V_VIN EC11 1500uF 16V, +/-20% CE50D100H300 EC22 1500uF 16V, +/-20% CE50D100H300 EC38 1500uF 16V, +/-20% CE50D100H300 L4 EC23 1500uF 16V, +/-20% CE50D100H300 4 2 EC7 560uF 4V, +/-20% CE35D80H90 Dummy
*
EC8 560uF 4V, +/-20% CE35D80H90 Dummy
*
EC9 560uF 4V, +/-20% CE35D80H90 Dummy
*
TC1 100uF 2V,+30/-20% ctdh16 Dummy
*
TC2 100uF 2V,+30/-20% ctdh16 Reserved
*
7/20 PWR2 3 1 ATX12V_P1_2X2 PWR4NWP1 5
Choke Coil 1.2uH
*
B
*
*
*
*
BC1065 0.1uF 25V, X7R, +/-10% C0603 Dummy
B
VRM Output filter schematics
VCCP
A
* *
EC17 3300uF 6.3V, +/-20% CE35_50D100H300
* *
EC32 3300uF 6.3V, +/-20% CE35_50D100H300
* *
EC37 3300uF 6.3V, +/-20% CE35_50D100H300
* *
EC39 3300uF 6.3V, +/-20% CE35_50D100H300
* *
EC36 3300uF 6.3V, +/-20% CE35_50D100H300
A
TECHNOLOGY COPR.
Title
Output CAP
Document Number Rev
661M08
Date:
5 4 3 2
A
Sheet
1
Monday, August 01, 2005
8
of
44
8
7
6
5
4
3
2
AAD[0..31] SBA-[0..7] AAD[0..31] SBA-[0..7] AC-BE[0..3] ST[0..2] ADSTBF[0..1] ADSTBS[0..1] 19 19 19 19 19 19
1
5 5
HDBIJ[0..3] HDJ[0..63]
HDBIJ[0..3] AC-BE[0..3] HDJ[0..63] C1XAVDD C1XAVSS C4XAVDD C4XAVSS HVREF HNCOMP HPCOMP AAD31 AAD30 AAD29 AAD28 AAD27 AAD26 AAD25 AAD24 AAD23 AAD22 AAD21 AAD20 AAD19 AAD18 AAD17 AAD16 AAD15 AAD14 AAD13 AAD12 AAD11 AAD10 AAD9 AAD8 AAD7 AAD6 AAD5 AAD4 AAD3 AAD2 AAD1 AAD0 ST2 ST1 ST0 SBA-0 SBA-1 SBA-2 SBA-3 SBA-4 SBA-5 SBA-6 SBA-7 ST[0..2] ADSTBF[0..1] ADSTBS[0..1] HREQJ[4..0] AL36 AK34 AJ36 AK35 AA26 W26 U26 R26 L20 D22 C22 B22 B6 F7 B5 Y5 W4 V2 W6 V4 U2 V5 U4 R2 T4 R3 T5 P2 R4 N2 R6 L3 L4 K2 L6 J2 J3 K4 J4 J6 H4 G3 H5 F2 G4 E2 G6 U6A E3 F4 D2 F5 E4 B2 E6 B3
D
5
HAJ[31..3]
HAJ[31..3]
D
5 HREQJ[4..0]
HCOMP_P HCOMP_N HCOMPVREF_N
C1XAVSS C1XAVDD
C4XAVSS C4XAVDD
ST0 ST1 ST2 AAD0 AAD1 AAD2 AAD3 AAD4 AAD5 AAD6 AAD7 AAD8 AAD9 AAD10 AAD11 AAD12 AAD13 AAD14 AAD15 AAD16 AAD17 AAD18 AAD19 AAD20 AAD21 AAD22 AAD23 AAD24 AAD25 AAD26 AAD27 AAD28 AAD29 AAD30 AAD31
17 17
CPUCLK1 CPUCLK-1
CPUCLK1 CPUCLK-1 HLOCKJ HDEFERJ HTRDYJ HCPURSTJ CPUPWRGD_NB HBPRIJ HBR0J HRSJ2 HRSJ1 HRSJ0 HADSJ HITMJ HITJ HDRDYJ HDBSYJ HBNRJ HREQJ4 HREQJ3 HREQJ2 HREQJ1 HREQJ0
HVREF0 HVREF1 HVREF2 HVREF3 HVREF4
SBA7 SBA6 SBA5 SBA4 SBA3 SBA2 SBA1 SBA0
FSB_VTT AC/BE3# AC/BE2# AC/BE1# AC/BE0# AREQ# AGNT# AFRAME# AIRDY# ATRDY# ADEVSEL# ASERR# ASTOP# APAR K5 M5 P4 U6 C6 E8 N6 M4 N4 L2 P5 M2 N3 D7 B4 C7 C4 D6 C2 D3 T2 U3 G2 H2 D8 W2 Y2 B8 C8 A7 B7 W3 Y4 D24 F30 G33 N31 E25 D30 H32 M32 HDSTBNJ3 HDSTBNJ2 HDSTBNJ1 HDSTBNJ0 HDSTBPJ3 HDSTBPJ2 HDSTBPJ1 HDSTBPJ0 HDSTBNJ3 HDSTBNJ2 HDSTBNJ1 HDSTBNJ0 HDSTBPJ3 HDSTBPJ2 HDSTBPJ1 HDSTBPJ0 5 5 5 5 5 5 5 5 ADSTBF0 ADSTBS0 ADSTBF1 ADSTBS1 AGPCLK0 AGPRCOMP AGPRCOMN A1XAVDD A1XAVSS A4XAVDD A4XAVSS VCC3 AVREFGC 19 A1XAVDD AGPCLK0 17 GCDETDBI_HI DBI_LOW AC-BE3 AC-BE2 AC-BE1 AC-BE0 AREQ AGNT AFRAME AIRDY ATRDY ADEVSEL ASERR ASTOP APAR RBF WBF GCDETDBI_HI DBI_LOW SBSTBF SBSTBS 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 R48 14 HNCOMP
AJ31 AJ33 T33 T35 V32 B23 F22 R34 U31 R33 T32 U35 V35 R35 U34 W34 U33 V33 W35 Y33 W31 W33 Y35 AG31 AA33 R36
CPUCLK CPUCLK# HLOCK# DEFER# HTRDY# CPURST# CPUPWRGD BPRI# BREQ0# RS#2 RS#1 RS#0 ADS# HITM# HIT# DRDY# DBSY# BNR# HREQ4# HREQ3# HREQ2# HREQ1# HREQ0# HASTB1# HASTB0# DPWR# HA31# HA30# HA29# HA28# HA27# HA26# HA25# HA24# HA23# HA22# HA21# HA20# HA19# HA18# HA17# HA16# HA15# HA14# HA13# HA12# HA11# HA10# HA9# HA8# HA7# HA6# HA5# HA4# HA3# 661FX
5 HLOCKJ 5 HDEFERJ 5 HTRDYJ 5 HCPURSTJ 14 CPUPWRGD_NB 5 HBPRIJ 5 HBR0J 5 5 5 5 5 5 5 5 5 HRSJ2 HRSJ1 HRSJ0
*
AGP
R49 change from 100 to 120 R49 100 HPCOMP
*
R48 648 648FX 661FX
R49
10 1% 113 1% 14 1% 100 1% 14 1% 100 1%
C
HADSJ HITMJ HITJ HDRDYJ HDBSYJ HBNRJ
RBF# WBF# GC_DET# ADBIH/PIPE# ADBIL SB_STB SB_STB# AD_STB0 AD_STB0# AD_STB1 AD_STB1#
AGP3.0 = 50 ohm VDDQ
C
5 5
HADSTBJ1 HADSTBJ0
HADSTBJ1 HADSTBJ0
661FX-1
AGPCLK AGPCOMP_P AGPCOMP_N A1XAVDD A1XAVSS A4XAVDD A4XAVSS AGPVREF AGPVSSREF HDSTBN3# HDSTBN2# HDSTBN1# HDSTBN0# HDSTBP3# HDSTBP2# HDSTBP1# HDSTBP0#
B
HD63# HD62# HD61# HD60# HD59# HD58# HD57# HD56# HD55# HD54# HD53# HD52# HD51# HD50# HD49# HD48# HD47# HD46# HD45# HD44# HD43# HD42# HD41# HD40# HD39# HD38# HD37# HD36# HD35# HD34# HD33# HD32# HD31# HD30# HD29# HD28# HD27# HD26# HD25# HD24# HD23# HD22# HD21# HD20# HD19# HD18# HD17# HD16# HD15# HD14# HD13# HD12# HD11# HD10# HD9# HD8# HD7# HD6# HD5# HD4# HD3# HD2# HD1# HD0#
VCCP
DBI3# DBI2# DBI1# DBI0#
HAJ31 HAJ30 HAJ29 HAJ28 HAJ27 HAJ26 HAJ25 HAJ24 HAJ23 HAJ22 HAJ21 HAJ20 HAJ19 HAJ18 HAJ17 HAJ16 HAJ15 HAJ14 HAJ13 HAJ12 HAJ11 HAJ10 HAJ9 HAJ8 HAJ7 HAJ6 HAJ5 HAJ4 HAJ3
AH33 AG33 AJ35 AF32 AJ34 AH32 AG35 AE31 AH35 AF35 AE35 AE33 AE34 AF33 AG34 AC33 AD32 AD33 AC35 AD35 AC31 AC34 AB35 AB32 AB33 AA35 AA31 Y32 AA34
* *
AGPRCOMP R51
*
AGPRCOMN R50
51
43.2
BC48 10nF
B
A1XAVSS
HOST
C24 E23 B24 D23 D25 F24 C26 B25 B26 D27 D26 E27 B27 D28 C28 B28 E29 F28 B29 C30 B30 B31 C32 D29 C33 B33 B35 D32 B34 E31 D31 D33 D35 G31 C35 F33 E33 D34 E35 F32 J34 G34 H35 F35 J33 J31 G35 H33 J35 K32 N33 K33 L31 L33 K35 L35 M35 M33 P32 P33 L34 N34 N35 P35 F26 B32 E34 R31 HDJ0 HDJ1 HDJ2 HDJ3 HDJ4 HDJ5 HDJ6 HDJ7 HDJ8 HDJ9 HDJ10 HDJ11 HDJ12 HDJ13 HDJ14 HDJ15 HDJ16 HDJ17 HDJ18 HDJ19 HDJ20 HDJ21 HDJ22 HDJ23 HDJ24 HDJ25 HDJ26 HDJ27 HDJ28 HDJ29 HDJ30 HDJ31 HDJ32 HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63 HDBIJ0 HDBIJ1 HDBIJ2 HDBIJ3
BC48, BC49 Change to 0.1uF?
VCC3 A4XAVDD
*
A4XAVSS
BC49 10nF
*
D
R803 619 +/-1% R0603 Q91
FSB_VTT
*
6
GTLREF_SEL
G S
A
2N7002
R52 change from 49.9 to 100 R52 49.9 +/-1% Rds-on(p) = 56 ohm HPCVERF = 2/3 VCCP HVREF
VCC3 C1XAVDD
VCC3
A
C4XAVDD
*
R54 change from 100 to 149
R54 100 +/-1%
*
BC50 10nF
*
BC51 0.1uF
*
C1XAVSS
BC54 0.1uF
*
C4XAVSS
BC53 0.1uF
TECHNOLOGY COPR.
Title
661FX-1 HOST & AGP
Document Number place this capacitor under 661 solder side Date: Rev
661M08
Monday, August 01, 2005 Sheet 9 of 44
A
8
MD[0..63] DQM[0..7] DQS[0..7] MA[0..14] CS-[0..3] CKE[0..3]
7
MD[0..63] DQM[0..7] DQS[0..7] MA[0..14] CS-[0..3] CKE[0..3] 21,23 21,23 21,23 21,23 21,23 21 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 DQM0 DQS0 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 DQM1 DQS1 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 DQM2 DQS2 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM3 DQS3 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 DQM4 DQS4 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 DQM5 DQS5 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 DQM6 DQS6 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 DQM7 DQS7 AN35 AP36 AK33 AM33 AN34 AK32 AR34 AN33 AR35 AP34 AM32 AL31 AR31 AL30 AN32 AR33 AN31 AM31 AR32 AP32 AP30 AR30 AM29 AL27 AN30 AN29 AL28 AN28 AL29 AR29 AP26 AN25 AR24 AL24 AL25 AR26 AM25 AN24 AP24 AR25 AN21 AP20 AN20 AL18 AM21 AR21 AL19 AM19 AL20 AR20 AL15 AL14 AN15 AR15 AN16 AM15 AN14 AL13 AP16 AR16 AM13 AL12 AL11 AR12 AP14 AR14 AN13 AP12 AN12 AR13 AL10 AR11 AM9 AR9 AM11 AN11 AP10 AN9 AN10 AR10 U6B
6
5
4
3
2
VCC2.5_MEM put bottom side
1
*
DDRVREFA
R56 150
D
VCC2.5_MEM
*
BC589 0.1uF C0603
*
BC590 0.1uF C0603
*
BC591 0.1uF C0603
*
BC592 0.1uF C0603
*
BC593 0.1uF C0603
C
VCC2.5_MEM
*
BC594 0.1uF C0603
*
BC595 0.1uF C0603
*
BC596 0.1uF C0603
*
BC597 0.1uF C0603
*
BC598 0.1uF C0603
B
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 DQM0 DQS0/CSB0# MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 DQM1 DQS1/CSB1# MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 DQM2 DQS2/CSB2# MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM3 DQS3/CSB3# MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 DQM4 DQS4/CSB4# MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 DQM5 DQS5/CSB5# MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 DQM6 DQS6/CSB6# MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 DQM7 DQS7/CSB7# 661FX
*
BC55 10nF
*
R57 150
D
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 NC SRAS# SCAS# SWE# CS0# CS1# CS2# CS3# CS4# CS5#
AR23 AN23 AN22 AM23 AL23 AL26 AN26 AN27 AR27 AR28 AP22 AN18 AR22 AP28 AM27 AT14 AL17 AR19 AN19 AM17 AL16 AN17 AR17 AP18 AR18
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 SRASSCASSWECS-0 CS-1 CS-2 CS-3
VCC2.5_MEM
*
DDRVREFB
R58 150
*
/RSRAS/RSCAS/RSWE21,23 21,23 21,23
BC56 10nF
*
R59 150
C
661FX-2
BC57 10pF
CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 S3AUXSW#
AP4 AT3 AR3 AP3 AR2 AN4 AP2
CKE0 CKE1 CKE2 CKE3
*
R785 4.7K +/-5% R0603 S3AUXSW28,37 DDRAVDD FB21 1
*
VCC3 BLM18BB470SN1D 2
SB3V
FWDSDCLKO
*
FWDSDCLKO DRAMTEST
BC58 0.1uF
*
AL21 AL22
R60
22
FWDSDCLKO
FWDSDCLKO
18 DDRAVSS
B
VCC2.5_MEM DLLAVDD DLLAVSS DDRAVDD DDRAVSS
AL34 AM35 AN36
DLLAVSS DDRAVDD DDRAVSS DLLAVDD FB22 1
*
AL35
DLLAVDD
DDRCOMN
R61
40.2 VCC3 BLM18BB470SN1D 2
*
DDRCOMP
R62
40.2
*
DDRVREFA DDRVREFB DLLAVSS
BC59 0.1uF
DDRVREFA DDRVREFB TRAP2 DDRCOMP_P DDRCOMP_N
AF16 AF23 AP1 AR8 AP8
DDRCOMP DDRCOMN
A
A
TECHNOLOGY COPR.
Title
661FX-2 DDR
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 10 of 44
A
8
7
6
5
4
3
2
1
Enable RSYNC VGA panel link VB 1 1 1 LSYNC CSYNC
AL6 AL4 AK5 AJ2 AJ3 AE3 AF2 AH5 AK2 AJ4 AJ6 AH2 AH4 AG3 AG6 AF4 AG2 AF5 AG4 AD2 AE6 AE2 AE4 AL3 ZVREF ZCMP_N ZCMP_P Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS VCC3 661FX Z4XAVDD BC64 0.1uF Z4XAVSS ECLKAVSS AK4 AD5 AD4 AN1 AM2 AL2 AL1 ZCLK VOSCI ZUREQ ZDREQ ZSTB0 ZSTB0# ZSTB1 ZSTB1# ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 ZVREF ZCOMP_N ZCOMP_P Z1XAVDD Z1XAVSS PCIRST# PWROK AUXOK Z4XAVDD Z4XAVSS TRAP1 TRAP0 ROUT GOUT BOUT HSYNC VSYNC VGPIO0 VGPIO1 B12 B13 A13 ROUT GOUT BOUT 20 20 20 20 20 20 20 13,19,24,25 A15 REFCLK2 17
Disable 0 0 0
D
17 13 VCC1.8V ZAD[0..16] ZAD[0..16] 13 13 13 13 13 13 ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 ZCLK0 ZUREQ ZDREQ ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 ZCLK0 ZUREQ ZDREQ ZSTB0 ZSTB-0 ZSTB1 ZSTB-1
U6C
D
VCC3 RSYNC ENTEST LSYNC CSYNC RSYNC RN6 1 3 5 7 R69
** **
*
VGA
R65 150
A11 B11 E13 C11 C10 D12 E12 D11 E15 D15 E14 D13 C12 D14 C13 B15 C15 B14 C14
33 33
R64 R66
* *
HSYNC VSYNC DDC1CLK DDC1DATA INT-A CSYNC RSYNC LSYNC
100 R67 100 R68
8P4R0603 4.7K +/-5% 2 4 6 8 4.7K DUMMY
ZVREF
*
R70 51.1
*
BC60 0.1uF
661FX-3 HyperZip
INT#A CSYNC RSYNC LSYNC VCOMP VRSET VVBWN DACAVDD1 DACAVSS1 DACAVDD2 DACAVSS2 DCLKAVDD DCLKAVSS DLLEN# ENTEST ECLKAVDD ECLKAVSS
AUXOK
BC62
**
NBPWRGD
BC61
0.1uF 0.1uF
C
VCOMP VRSET VVBWN DACAVDD DACAVSS DACAVDD DACAVSS DCLKAVDD DCLKAVSS DCLKAVDD ECLKAVDD ECLKAVSS DCLKAVSS VCC3
C
TESTMODE2 TESTMODE1 TESTMODE0
*
BC63 0.1uF
AN2 AM4 AN3
F9 D10
C9 B9 B10
E10 D9
*
B
6,13 38 NBPWRGD 14,36
NBRSTAUXOK
VCC3 NBPWRGD AUXOK ENTEST ECLKAVDD BC65 0.1uF
*
B
* *
VVBWN VCOMP DACAVDD VCC1.8V VCC3
BC66 BC67
0.1uF 0.1uF
VRSET
VCC1.8V BC69 1uF
*
R71 130
* *
R72 56 +/-5% R0603 ZCMP_N DACAVSS
BC68 0.1uF
*
*
BC70 0.1uF DUMMY
* *
R73 56 +/-5% R0603 ZCMP_P
Z1XAVDD BC71 0.1uF Z1XAVSS
Put the cap bottom side
U6_1
A
U6_A
U6_C
A
TECHNOLOGY COPR.
Title
Clip_2P
Clip_2P
661FX-3 VGA & MUTIOL
Document Number Heatsink Date: Rev
661M08
Monday, August 01, 2005 Sheet 11 of 44
A
8
FSB_VTT
7
VCC1.8V VCC1.8V
6
5
VCC1.8V VCC3
4
3
2
1
A17 A18 A19 A20 A21 B17 B18 B19 B20 B21 C17 C18 C19 C20 C21 D17 D18 D19 D20 D21 E17 E18 E19 E20 E21 F17 F18 F19 F20 F21 N13 N14 N16 N18 N19 N20 N21 N22 N23 N24 P13 P24 R24 T13 T24 U24 V13 V24 W13 W24 Y13 Y24 AA24 AB13 AC24 AD13 AD15 AD17 AD19 AD21 AD23 AD24 N15 R13 U13 AA13
AH3 AJ1 AK3 AM3 W11 W12 Y11 Y12 AA12 AD3 AE1 AF3 AG1
D4 D5 AM5
L17 M17 N17
U6D
SB1.8V
IVDD, AUX_IVDD 1.8V
AUX_IVDD AUX3.3 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ IVDD IVDD IVDD IVDD IVDD NC4 NC5 NC6 NC7 NC8 NC9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AB12 AC12 AA1 AA2 AA3 AA4 AA5 AA6 AB1 AB2 AB3 AB4 AB5 AB6 AC1 AC2 AC3 AC4 AC5 AC6 L11 L12 L13 M11 M12 M13 M14 M15 M16 N11 N12 P12 R12 T12 U12 V12 B16 C16 D16 E16 F15 E11 F11 F13 AL33 AM34 A9 A3 A5 C1 C3 C5 E1 E5 E7 E9 F3 G1 G5 H3 J1 J5 K3 L1 L5 M3 N1 N5 P3 R1 R5 T3 U1 U5 V3 W1 W5 Y3 AE5 AG5 AJ5 AL5
Place these capacitors under 660 solder side VCC1.8V SB3V VDDQ
D
VCC2.5_MEM
L25 L26 M18 M19 M20 M21 M22 M23 M24 M25 M26 N25 P25 R25 T25 U25 V25 W25 Y25 AA25 AL7 AL8 AL9 AM6 AM7 AM8 AN5 AN6 AN7 AN8 AP5 AP6 AP7 AR4 AR5 AR6 AR7 AT4 AT5 AT6 AT7 AB25 AC25 AD12 AD25 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AE26 AF11 AF12 AF25 AF26 AB24 AC13 AD14 AD16 AD18 AD20 AD22 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 U14 U15 U16 U17 U18 U19 U20 U21 U22 U23 V14 V15 V16 V17 V18 V19 V20 V21 V22 V23 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM
VDD3.3 VDD3.3 VDD3.3
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT IVDD IVDD IVDD IVDD IVDD PVDD IVDD PVDD IVDD IVDD IVDD IVDD PVDD PVDD IVDD PVDD PVDD IVDD IVDD PVDD PVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD PVDD IVDD IVDD IVDD
VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ
NC1 NC2 NC3
D
VCC1.8V SB1.8V SB3V
*
BC72 0.1uF
*
BC73 1uF
*
BC78 10uF C1206
*
BC79 1uF
*
BC80 0.1uF
*
BC81 0.1uF
Power
FSB_VTT
C
*
BC74 10uF C1206
*
BC75 1uF
*
BC76 1uF
*
BC77 1uF
*
BC102 1uF
*
BC103 1uF
*
BC105 4.7uF C0805
*
C
BC106 4.7uF C0805
VDDQ
VCC2.5_MEM
661FX-4
PVDDM PVDDM PVDDM PVDDM PVDDM PVDDM PVDDM VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
*
BC82 10uF DUMMY
*
BC83 1uF
*
BC84 1uF
*
BC85 1uF
*
BC86 10uF DUMMY
*
BC87 1uF
*
BC88 0.1uF
*
BC89 0.1uF
*
BC1027 10uF
*
BC1028 1uF
B
A22 A24 A26 A28 A30 A32 A34 C23 C25 C27 C29 C31 C34 C36 E22 E24 E26 E28 E30 E32 E36 F34 G32 G36 H34 J32 J36 K34 L32 L36 M34 N32 N36 P34 R32 T34 U32 U36 V34 W32 W36 Y34 AA32 AA36 AB34
VCC1.8V
VDDQ
VCC2.5_MEM
B
*
BC91 0.1uF
*
BC93 0.1uF
*
BC94 0.1uF
*
BC95 0.1uF
*
BC96 10uF Reserved
*
BC97 0.1uF
*
BC98 0.1uF
*
BC99 0.1uF
*
BC90 0.1uF
*
BC92 0.1uF
A
A
661FX
AM10 AM12 AM14 AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM30 AP9 AP11 AP13 AP15 AP17 AP19 AP21 AP23 AP25 AP27 AP29 AP31 AP33 AP35 AT8 AT10 AT12
Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22 Y23 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB23 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC22 AC23
AC32 AC36 AD34 AE32 AE36 AF34 AG32 AG36 AH34 AJ32
AT16 AT18 AT20 AT22 AT24 AT26 AT28 AT30 AT32 AT34 AL32
TECHNOLOGY COPR.
Title
661FX-4 Power
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 12 of 44
A
8
VCC3 RN68 INT-A INT-B INT-C INT-D
7
24,25 VCC3 AD[0..31]
6
AD[0..31]
5
4
3
2
1
2 4 6 8
*1 3
5 7
VCC1.8V
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
*
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
D
8.2K +/-5% 8P4R0603 PREQ-3 PREQ-2 PREQ-1 PREQ-0 PGNT-3 PGNT-2 PGNT-1 PGNT-0
R334 4.7K +/-5% R0603 Dummy PREQ-4 PREQ-3 PREQ-2 PREQ-1 PREQ-0 PGNT-3 PGNT-2 PGNT-1 PGNT-0 C/BE-3 C/BE-2 C/BE-1 C/BE-0
H3 H2 H1 J4 J3 J2 J1 K4 K2 K1 L4 L3 L2 L1 M4 M3 R4 R3 R2 R1 T4 T3 T2 T1 U3 U2 U1 V4 V3 V2 V1 W4
*
U25A
BC879 0.1uF 25V, Y5V, +80%/-20% C0603
25 24 24
F1 F2 F3 F4 E1 H4 G1 G2 G3 G4 K3 M2 P1 U4 F5 E4 E3 E2 M1 N4 N3 P4 P3 P2 N2 N1
PREQ4# PREQ3# PREQ2# PREQ1# PREQ0# PGNT4# PGNT3# PGNT2# PGNT1# PGNT0# C/BE3# C/BE2# C/BE1# C/BE0# INTA# INTB# INTC# INTD# FRAME# IRDY# TRDY# STOP# SERR# PAR DEVSEL# PLOCK# PCICLK PCIRST#
IDEAVDD IDEAVSS ICHRDYA IDREQA IIRQA CBLIDA IIORA# IIOWA# IDACKA# IDSAA2 IDSAA1 IDSAA0 IDECSA1# IDECSA0# ICHRDYB IDREQB IIRQB CBLIDB
W1 W2 AE15 AD14 AC15 AE16 AF15 AC14 AD15 AC16 AF16 AD16 AE17 AF17 AE22 AD21 AC22 AE23 AF22 AC21 AD22 AF24 AF23 AD23 AF25 AE24 AF14 AD13 AF13 AD12 AF12 AD11 AF11 AF10 AE10 AE11 AC11 AE12 AC12 AE13 AC13 AE14 AF21 AD20 AF20 AD19 AF19 AD18 AF18 AD17 AC17 AE18 AC18 AE19 AC19 AE20 AC20 AE21
IDESAB2 IDESAB1 IDESAB0 IDECS-B1 IDECS-B0 IDEDA0 IDEDA1 IDEDA2 IDEDA3 IDEDA4 IDEDA5 IDEDA6 IDEDA7 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15 IDEDB0 IDEDB1 IDEDB2 IDEDB3 IDEDB4 IDEDB5 IDEDB6 IDEDB7 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 IDEDA[0..15] 26 IDESAB[0..2] IDECS-B[0..1] IDESAA2 IDESAA1 IDESAA0 IDECS-A1 IDECS-A0 IDESAA[0..2] IDECS-A[0..1] ICHRDYA IDEREQA IDEIRQA CBLIDA IDEIOR-A IDEIOW-A IDACK-A ICHRDYA IDEREQA IDEIRQA CBLIDA IDEIOR-A IDEIOW-A IDACK-A IDESAA[0..2] IDECS-A[0..1] 26 26 26 26 26 26 26 26 26
D
C/BE-[0..3] 24,25 C/BE-[0..3]
25 24 24
PCI
11,19,24,25 19,24,25 24,25 24,25 24,25 24,25 24,25 24,25
INT-A INT-B INT-C INT-D
INT-A INT-B INT-C INT-D FRAMEIRDYTRDYSTOPSERRPAR DEVSELPLOCK96XPCLK PCIRSTR301 R302 R303 R309 33 33 33 33
FRAMEIRDYTRDYSTOPSERRPAR DEVSELPLOCK-
ICHRDYB IDEREQB IDEIRQB CBLIDB IDEIOR-B IDEIOW-B IDACK-B
ICHRDYB IDEREQB IDEIRQB CBLIDB IDEIOR-B IDEIOW-B IDACK-B IDESAB[0..2] IDECS-B[0..1] 26 26 26 26
26 26 26 26
C
IDE
IIORB# IIOWB# IDACKB# IDSAB2 IDSAB1 IDSAB0 IDECSB1# IDECSB0# IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15 IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15
26
24,25 24,25 24,25 24,25
C
ZCLK1 17 11 11 11 11 11 11 ZCLK1 ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 ZUREQ ZDREQ ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 ZUREQ ZDREQ
****
17 96XPCLK 19,24,25,26,35 PCIRST28 SIORST6,11 NBRST31 PCIRSTAJ
W3 B3
964/964L -1
AB26 V24 W26 R25 T26 Y24 Y23
ZCLK ZSTB0 ZSTB0# ZSTB1 ZSTB1# ZUREQ ZDREQ
SZCMP_N VCC1.8V SZCMP_P
AA24 AA25
ZCMP_N ZCMP_P
B
B
*
R304 150 +/-1% R0603 SZVREF
SZ1XAVDD SZ1XAVSS SZ4XAVDD SZ4XAVSS SZVREF BC880 0.1uF 25V, Y5V, +80%/-20% C0603
AC26 AB25 Y22 AA23 AA26 ZAD16 Y26
Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS ZVREF ZAD16 ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15
HyperZip
W24 W25 V22 V23 V26 U22 U25 U24 T22 U26 T23 R22 T24 R24 R26 P22
*
R305 49.9 +/-1% R0603
*
IDEDB[0..15] 964
26
ZAD15 ZAD14 ZAD13 ZAD12 ZAD11 ZAD10 ZAD9 ZAD8 ZAD7 ZAD6 ZAD5 ZAD4 ZAD3 ZAD2 ZAD1 ZAD0
11
ZAD[0..16]
Analog Power supplies of Transzip function for 96X Chip.
VCC1.8V
SZ1XAVDD
SZ4XAVDD
SHORT/NA
*
*
BC882 0.1uF 25V, Y5V, +80%/-20% C0603 SZ1XAVSS
*
BC883 0.1uF 25V, Y5V, +80%/-20% C0603 SZ4XAVSS
*
BC881 0.1uF 25V, Y5V, +80%/-20% C0603
*
A
VCC1.8V
VCC1.8V
JP24 2
1
R306 56 +/-5% R0603
SZCMP_N
A
TECHNOLOGY COPR.
R307 56 +/-5% R0603
SZCMP_P
Title
964_I
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 13 of 44
0.6 A
8
7
INITJ A20MJ SMIJ INTR NMI IGNNEJ FERRJ STPCLKJ CPUSLPJ R290 10K +/-5% R0603
6
AB23 AD26 AE25 AC24 AD25 AD24 AE26 AB22 AC23 AF26 AC25 AB24
5
U25B
4
OSC25MHI D7 C7 D10 E10 STXEN E11 D12 C12 E13 D13 E14 C14 D15
STXD0 STXD1 STXD2 STXD3 MCLK25I MCLK25O TXCLK TXEN TXD0 TXD1 TXD2 TXD3 TXCLK TXEN TXD0 TXD1 TXD2 TXD3 35 35 35 35 35 35
3
RN66 STXEN 1 STXD0 3 STXD1 5 STXD2 7
2
1
SB1.8V MIIAVDD
*
*
D
5 5 5 5 5 5 5 5 5 5
INITJ A20MJ SMIJ INTR NMI IGNNEJ FERRJ STPCLKJ CPUSLPJ PROCHOTJ
VCC3 STHERMTRIP-
INIT# A20M# SMI# INTR NMI IGNNE# FERR# STPCLK# CPUSLP# APICCK/LDTREQ# APICD0/THERM2# APICD1/GPIOFF#
OSC25MHO TXCLK TXEN TXD0 TXD1 TXD2 TXD3 NC34 NC31 NC32 NC30
22 +/-5% 2 4 6 8
TXEN TXD0 TXD1 TXD2 BC872 0.1uF 25V, Y5V, +80%/-20% C0603
RN67 SMDIO SMDC STXD3
1 3 5 7
*
22 +/-5% MDIO 2 MDC 4 TXD3 6 8
*
MIIAVSS
D
MCLK25O MCLK25I R291 1M +/-5% R0603
28,31
LAD[0..3] LAD0 LAD1 LAD2 LAD3
AC4 AC3 AE1 AF1 AD3 AE2 AF2
LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# SIRQ RXCLK RXDV RXER OSC32KHI OSC32KHO BATOK PWROK RXD0 RXD1 RXD2 RXD3 NC36 NC35 NC38 NC37 NC33 B12 A11 B11 C11 A10 C10 A9 B9 A14
RXD0 RXD1 RXD2 RXD3 RXD0 RXD1 RXD2 RXD3 35 35 35 35
28,31 28 28
LFRAMELDRQSIRQ
LFRAMELDRQSIRQ
C13 A12 A13
RXCLK RXDV RXER
RXCLK RXDV RXER
35 VCC3 35 35 VCC3
1
*
X4
2
* *
R335 1K +/-5% R0603
OSC32KHI OSC32KHO 36 BATOK 17,38 SBPWRGD BATOK SBPWRGD
C2 C1 D4 D2
*
C
R336 300 +/-5% R0603 STHERMTRIPQ32 MMBT3904 OSC32KHO OSC32KHI
XTAL-25MHz BC873 15pF 50V, NPO, +/-5% C0603
*
BC874 15pF 50V, NPO, +/-5% C0603
RTCVDD RTCVSS
C
*
5
THERMTRIPJ
Q33 MMBT3904
E
*
BC875 RTCVDD 0.1uF 25V, Y5V, +80%/-20% C3 C0603 D3
E
3
*
Crystal Retainer
4
R337 4.7K B +/-5% R0603
C
X5 X5_1
*
1
B
R292 10M XTAL-32.768kHz 2
COL
17,18,21 SMBDAT 17,18,21 SMBCLK SMBDAT SMBCLK
B14 C15 C9 E9 B7 A6
SMDC SMDIO
COL CRS MDC MDIO MIIAVDD MIIAVSS
COL CRS MDC MDIO
35 35
BC876 15pF 50V, NPO, +/-5% C0603
*
BC877 22pF 50V, NPO, +/-5% C0603
C
AB1 AB2
GPIO20 CRS GPIO19 MDC
SB3V
BAT 33 33 33 33 33 SDATI0 SDATO SYNC AC_RESETBIT_CLK SDATI0 SDATO SYNC AC_RESETBIT_CLK
PME37 -KEYLOCK
R293 R776
***
35 35
LAN_RESETJ
R308
Dummy 4.7K 4.7K 4.7K
E6 B4 AB3 AC1 B5 AC2
AC_SDIN0 AC_SDIN1 AC_SDOUT AC_SYNC AC_RESET# AC_BIT_CLK
MDIO MIIAVDD MIIAVSS
*
R332 1M +/-5% R0603 INTR
VCC3
VCC3
VCC3
VCC3
GPIO0/SPDIF
17 33,38 REFCLK1 SPKR REFCLK1 SENTEST SPKR PWRBTNPMEPSONAUXOK ACPILED
Y3 AE3 Y4 AA1 AA2 AA3 AA4 A4 C6 C5 C4 F6 E5
964
ID2 INTRID3 THERMINTRID1 ID0
AD2 D1 AD1 D5 A7 D8 A3 B6
OSCI ENTEST SPK PWRBTN# PME# PSON# AUXOK ACPILED
GPIO1/LDRQ1# GPIO2/THERM# GPIO3/EXTSMI# GPIO4/CLKRUN# GPIO5/PREQ5# GPIO6/PGNT5# GPIO7 GPIO8/RING
2 1
*
ID0
THERM- 28
B
28,36 PWRBTN19,24,25,28 PME28,38 PSON11,36 36 AUXOK ACPILED
R340 4.7K +/-1% R0603 Dummy
*
ID1
R333 4.7K +/-1% R0603 Dummy
*
ID2
R345 4.7K +/-1% R0603 Dummy
*
ID3
R343 4.7K +/-1% R0603 Dummy
B
R342 4.7K +/-1% R0603 Dummy
*
BC878 0.1uF 25V, Y5V, +80%/-20% C0603
*
R339 4.7K +/-1% R0603 Dummy
*
R331 4.7K +/-1% R0603 Dummy
*
R344 4.7K +/-1% R0603 Dummy
*
B2 A5
GPIO13 GPIO14
LAN_RESETJ
LAN_RESETJ 35
7/28 7/28
GPIO11 R296 SMBDAT R297
VCC3
29 29 29 29
KBDAT KBCLK PMDAT PMCLK VCC3
GPIO15/KBDAT GPIO9/AC_SDIN2 GPIO16/KBCLK GPIO10/AC_SDIN3 GPIO17/PMDAT GPIO11/OSC25M/STP_PCI# GPIO18/PMCLK GPIO12/CPUSTP#
GPIO11 BIOS_TBL_PROTECT 31 -KEYLOCK GPIO9
* ****
KBDAT KBCLK PMDAT PMCLK
B8 A8 C8 D6
RING
30
THERM- R295
4.7K 4.7K 4.7K 4.7K R294 0 +/-5% R0603
SMBCLK R298 SENTEST
A
R2503 0 +/-5% R0603
A
TECHNOLOGY COPR.
Title
*
GPWAKDummy
R300
1K B
MMBT3904 Q31
7/28
GPWAKCPU_PWRG 5
R312
* *
R299 470 +/-5% R0603
CPUPWRGD_NB 9
E
C
*
R311
Dummy
0 GPIO9 +/-5% R0603 Dummy LAN_RESETJ 0 +/-5% R0603 Dummy
964_2
Document Number Rev
Dummy
661M08
Date: Monday, August 01, 2005 Sheet 14 of 44
A
VCC1.8V
8
1
FB12
7
2
SATACMPAVDD
6
5
SB1.8V
4
3
2
1
FB L0603 80 Ohm
*
BC912 10nF C0603
*
BC858 0.1uF 25V, Y5V, +80%/-20% C0603 SATACMPAVSS
*
U25C
USBCMPAVDD1.8 BC859 0.1uF 25V, Y5V, +80%/-20% C0603 USBCMPAVSS1.8
D
41 41 41 41 27 27 27 27 27 27 27 27 27 27 27 27 27 OC0123-
UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5UV6+ UV6UV7+ UV7-
UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5UV6+ UV6UV7+ UV7OC0123-
G26 G25 H24 H23 C21 D21 A22 B22 C19 D19 A20 B20 C17 D17 A18 B18 C26 C24 D26 D25 D24 E24 E23 F22 E18 E20 E22 F17 F18 F19 F20 F21 G22 H22 AA6 AA7 AA8 AA9 AA10 AB6 AF3 AD4 Y2 Y1 AB5 AD5
R10 OSC12MHI OSC12MHO R277 127 +/-1% R0603 0 R0603 +/-5% USB12M 17
UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5UV6+ UV6UV7+ UV7OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7# UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 UVDD18 IVDD IVDD IVDD IVDD IVDD IVDD IVDD VSS IVDD VSS IVDD VSS
OSC12MHI OSC12MHO USBREF USBPVDD18 USBPVSS18 USBCMPAVDD18 USBCMPAVSS18
E25 E26 A24 F24 F23 A25 B24 D23 C23 G16 G18 H20 G21 H21
D
USBPVDD1.8 USBCMPAVDD1.8 USBCMPAVSS1.8 USBCMPAVDD3.3
USB
USBCMPAVDD33 USBCMPAVSS33 UVDD33 UVDD33 UVDD33 IVDD_AUX IVDD_AUX
*
BC860 0.1uF C0603 FB11 SB3V
*
USBREF
SB1.8V
27
OC4567-
OC4567-
IVDD_AUX IVDD_AUX
*
1 2 BC861 0.1uF 25V, Y5V, +80%/-20% FB L0603 80 Ohm C0603
R278 R279 IPB_OUT1
SB3V
*
C
VCC1.8V FB13
*
**
BC862 10nF C0603
BC863 0.1uF 25V, Y5V, +80%/-20% C0603
964-3
SATA
NC NC NC NC NC NC NC NC NC GPIO21/EESK GPIO22/EEDI GPIO23/EEDO GPIO24/EECS IPB_OUT0/PLLENN AD7 AC7 AF6 AE6 AD9 AC9 AF8 AE8 AB4 A16 A15 B16 B15 A26 B25
STX1P STX1N SRX1P SRX1N STX2P STX2N SRX2P SRX2N SATA_LED GPIO21 GPIO22 GPIO23 GPIO24 IVDD_AUX FDLL4148
IPB_OUT0
4.7K 4.7K
Dummy Dummy
C
1
BC864 10nF FB L0603 80 Ohm C0603
2
*
*
BC865 1uF 10V, Y5V, +80%/-20% C0603 SATARXAVDD SATARXAVSS
SB1.8V
VCC1.8V
FB9
*
HDDLED 26,36
1
2
* FB L0603 80 Ohm
BC867 10nF C0603
*
SATATXAVDD BC868 1uF 10V, Y5V, +80%/-20% C0603 SATATXAVSS SATACMPAVSS SATACLKSATACLK
SATATXAVDD SATATXAVSS SATACMPAVDD SATACMPAVSS
2
D15
1
BC866 0.1uF 25V, Y5V, +80%/-20% C0603
R2504 17 17 FB10 CLK_SATAJ CLK_SATA +/-1%
SB1.8V IPB_OUT0 IPB_OUT1 SB3V R282 USBPVDD1.8
332 R0603
VCC1.8V
AC5 AE4 AF4
NC NC NC
IPB_OUT1/ZCLKSEL
TRAP0 TRAP1
R283
1
2
FB L0603 80 Ohm
*
BC870 10nF C0603
*
SATARXAVDD BC871 1uF 10V, Y5V, +80%/-20% C0603 SATARXAVSS
**
B
0728 For SATA Eye. Change Value from 374 to 332
B26 C25
964 R284 22 +/-5% R0603
4.7K 4.7K
Dummy Dummy
*
BC869 0.1uF 25V, Y5V, +80%/-20% C0603
B
R285 22 +/-5% R0603
OSC12MHO OSC12MHI R286 1M +/-5% R0603
1
SB3V
SATA_1
8 9
SATA
1 2 3 4 5 6 7 1 2 3 4 5 6 7
STX1P STX1N SRX1N SRX1P GPIO24 GPIO21 GPIO22 GPIO23
A
SATA_2
8 9
SATA
STX2P STX2N SRX2N SRX2P
R2497 4.7K +/-5% R0603 Dummy U43 1 CS 2 SK 3 DI 4 DO
SB3V
C0603
Dummy
Dummy
Dummy
VCC NC ORG GND
8 7 6 5
AT93C46-2.7V Dummy
TECHNOLOGY COPR.
Title
964_3
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 15 of 44
* *
* *
15 mils
BC913 10pF
*
** **
X3 Dummy 2 XTAL-12MHz BC914 10pF C0603
A
0.6 A
8
7
6
5
4
VCC1.8V
3
P26 P21 R21 T25 V25 V21 W21 Y25 Y21 VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD
2
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS USBVSS AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA AVSSSATA
U25D
1
D
FSB_VTT
VCC1.8V VCC3 SB1.8V BC830 0.1uF 25V, Y5V, +80%/-20% C0603 BC832 0.1uF 25V, Y5V, +80%/-20% C0603
BC831 0.1uF 25V, Y5V, +80%/-20% C0603 BC833 0.1uF 25V, Y5V, +80%/-20% C0603 FSB_VTT BC836 0.1uF 25V, Y5V, +80%/-20% C0603 BC840 0.1uF 25V, Y5V, +80%/-20% C0603
*
BC918 0.1uF 25V, Y5V, +80%/-20% C0603 BC835 0.1uF 25V, Y5V, +80%/-20% C0603
VCC3 BC837 0.1uF 25V, Y5V, +80%/-20% C0603 BC841 0.1uF 25V, Y5V, +80%/-20% C0603
M21 N21 T21 U21 AB18 AB16 AB14 AB11 AA5 Y5 T5 R5 L5 G5 L21 AA21 AB19 AB13 U5 M5 H5 K21 J21 AB20 AB17 AB15 AB12 AB10 W5 V5 P5 N5 K5 J5
L10 L11 L12 M10 M11 M12 N10 N11 N12 N13 N14 N15 N16 P10 P11 P12 P13 P14 R10 R11 R12 R13 R14 T10 T13 T14 U10 U13 U14 U15 P15 P16 R15 R16 T15 T16 U16 F25 F26 G23 G24 H25 H26 J23 J24 A23 B23 C22 D22 A21 B21 E21 C20 D20 A19 B19 E19 C18 D18 A17 B17 E17 C16 D16 L13 L14 L15 L16 M13 M14 M15 M16 AD10 AC10 AF9 AE9 AB9 AD8 AC8 AB8 AF7 AE7 AB7 AD6 AC6 AF5 AE5 T11 T12 U11 U12
964
D
*
* *
*
*
* *
* *
964-4
Power
C
C
FSB_VTT FSB_VTT Put under 96X solder side BC842 0.1uF 25V, Y5V, +80%/-20% C0603 SB3V BC843 0.1uF 25V, Y5V, +80%/-20% C0603 VCC3 BC846 0.1uF 25V, Y5V, +80%/-20% C0603 Dummy BC849 0.1uF 25V, Y5V, +80%/-20% C0603 BC852 0.1uF 25V, Y5V, +80%/-20% C0603 Dummy BC855 0.1uF 25V, Y5V, +80%/-20% C0603 BC847 0.1uF 25V, Y5V, +80%/-20% C0603 BC850 0.1uF 25V, Y5V, +80%/-20% C0603 Dummy BC853 0.1uF 25V, Y5V, +80%/-20% C0603 BC856 0.1uF 25V, Y5V, +80%/-20% C0603 Dummy SB3V BC848 0.1uF 25V, Y5V, +80%/-20% C0603 Dummy BC851 0.1uF 25V, Y5V, +80%/-20% C0603 BC854 0.1uF 25V, Y5V, +80%/-20% C0603 Dummy BC857 0.1uF 25V, Y5V, +80%/-20% C0603 SB1.8V
AA22 AB21 F9 F12 F15
VTT VTT IVDD_AUX IVDD_AUX IVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX PVDD_AUX PVDD_AUX
*
VCC1.8V
*
BC844 10nF C0603
*
B
B10 B13 BC845 E7 0.1uF E12 25V, Y5V, +80%/-20% E15 C0603 F10 F11 F13 F7 G20 E8 F14
K26 K25 K24 K23 J26 J25 J22 K22 F16 E16
A
D9 D11 D14 R23 U23 W23
VSS VSS VSS VSSZ VSSZ VSSZ
NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29
* * * * * * * * * *
* * * * * * * *
* *
SB3V
B
* *
W22 P25 P24 P23 N26 N25 N24 N23 N22 M26 M25 M24 M23 M22 L26 L25 L24 L23 L22
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19
A
TECHNOLOGY COPR.
Title
964_4
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 16 of 44
0.6 A
8
VCC3
7
6
5
4
3
2
1
2
3D3V_CLKM
FB1 FB L0805 300 Ohm 1 1 11 13 19 28 29 42 48
U24
D
BC803 4.7uF
C0805 6.3V, X5R, +/-10%
CPUCLK0 CPUCLK#0 CPUCLK1 CPUCLK#1
** **
* * * * * * * * *
BC804 BC805 BC806 BC807 BC808 BC809 BC810 BC811 1uF 10nF 1uF 10nF 1uF 10nF 1uF 10nF
VDD_REF VDDZ VDD_PCI VDD_PCI VDD48 VDDAGP VDDCPU VDDSRC
D
40 39 44 43 R241 R242 R243 R244 33 33 33 33 CPUCLK0 CPUCLK-0 CPUCLK1 CPUCLK-1 5 5 9 9 By-Pass Capacitors Place near to the Clock Outputs
*
7,38 VRMPWRGD VCC3 VCCP VCC3
AGPCLK0 AGPCLK1 ZCLK0 ZCLK1
** **
5 8 18 23 24 32 41 45
VSSREF VSSZ VSSPCI VSSPCI VSS48 VSSAGP VSSCPU VSSSRC
R245 49.9 +/-1% R0603
*
R246 49.9 +/-1% R0603
*
R247 49.9 +/-1% R0603
*
R248 49.9 +/-1% R0603
31 30 9 10
R249 R250 R251 R252
22 22 22 22
AGPCLK0 AGPCLK1 ZCLK0 ZCLK1
AGPCLK0 AGPCLK1 ZCLK0 ZCLK1
9 19 11 13
AGPCLK0
AGPCLK1 ZCLK0
*
C
R260 220 Dummy
* *
**
VttPWR_GD/PD#
C
*
B E
Q30 MMBT3904 Dummy
IREF **FS0/REF0 **FS1/REF1
E
2 3
FS0 FS1
14,38 SBPWRGD VCC3 FB2 1 BLM18BB470SN1D CLK_PLLVCC 2
4
Reset# ~**Sel24_48#/24_48MHz
***
B
Q29 MMBT3904 Dummy
R261
475 38
R262 R263 R264
22 22 33
REFCLK2 REFCLK1 AUDIO_CLK
?
C
REFCLK2 REFCLK1 AUDIO_CLK
11 14 33
*
33
26
36
VDDA SCLK SDATA SRCCLK SRCCLK# 12_48MHz/SEL12_48#** 48MHz X1 X2
*
B
BC823 4.7uF 6.3V, X5R, +/-10% C0805
*
BC824 0.1uF 25V, Y5V, +80%/-20% C0603 37 VSSA
47 46 27 25 USB_12M CK_48M
R266 R267
** *
35 34
R265
*
R9 R270
6
7
ICS952017
X2 1 2 USB_12M
Co-lay with ICS952018 ICS952018 SiS964/964L ICS952017 SiS964L
*
XTAL-14.318MHz BC828 BC829 22pF 22pF
*
Note: Select USB 12MHz
C0603 50V, NPO, +/-5%
C0603 50V, NPO, +/-5%
6
BSEL1
BSEL1
* *
6
A
* *
R38 1K +/-5% R0603 Dummy
R253 1K +/-5% R0603 Dummy
R4 0 +/-5% R0603
**FS_3/PCICLK6 **FS_4/PCICLK7 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 *FS2/PCICLK5
14 15 16 17 20 21 22 12
FS3 FS4 RN55 33_PCI3 33_PCI1 33_PCI2 33_964 R784 R783 33M_FWH FS2
7 5 3 1
8 33 6 4 2 33 33
8P4R0603 +/-5%
SIOPCLK PCICLK3 PCICLK1 PCICLK2 96XPCLK CK_33M_FWH
SIOPCLK PCICLK3 PCICLK1 PCICLK2 96XPCLK CK_33M_FWH
28 25 24 24 13 31
ZCLK1 AUDIO_CLK
BC813 10pF 50V, NPO, +/-5% C0603 Dummy BC815 10pF 50V, NPO, +/-5% C0603 Dummy BC816 10pF
BC812 10pF 50V, NPO, +/-5% C0603 Dummy BC814 10pF 50V, NPO, +/-5% C0603 Dummy
*
* * *
* *
C
REFCLK2 REFCLK1 0 33 33 33 R0603 +/-5% 22 CK_48M_SIO CK_48M SMBCLK SMBDAT CLK_SATA CLK_SATAJ 14,18,21 14,18,21 15 15
BC822 10pF 50V, NPO, +/-5% C0603 Dummy BC826 10pF 50V, NPO, +/-5% C0603 Dummy
BC821 10pF 50V, NPO, +/-5% C0603 Dummy
*
USB12M 15 CK_48M_SIO 28
R269 49.9 +/-1% R0603
*
R268 49.9 +/-1% R0603
*
AUDIO_CLK CK_48M_SIO
VCC3
BC827 10pF 50V, NPO, +/-5% C0603 Dummy
B
*
*
R254 1K +/-5% R0603 Reserved
*
R255 1K +/-5% R0603 Dummy
Note: Select ICS952018 when low
Change R273 and R274 from 2.7K to 10K
BSEL0
BSEL0
R273 R274 R275 10K +/-5% R0603 Dummy
10K R0603
FS2
10K R0603 FS3
*
A
TECHNOLOGY COPR.
Title
Clock Gen
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 17 of 44
A
8
7
6
5
4
3
2
1
VCC2.5_MEM FB14 1 2 FB L0603 47 Ohm CBVDD
D
*
BC143 0.1uF DUMMY BC146 10nF
*
BC144 10nF
*
BC147 0.1uF
BC145 0.1uF
D
BC148 0.1uF
*
*
*
DDRCLK[0..5] DDRCLK-[0..5]
21 21
Clock Buffer (DDR)
VCC2.5_MEM CBVDD 3 12 23 U9 ICS93732 VDD VDD VDD 2
C
1
FB7 FB L0603 47 Ohm
C
CLK0 CLK1 CLK2 CLK3 CLK4 CLK5 2 4 13 17 24 26 DDRCLK0 DDRCLK1 DDRCLK2 DDRCLK3 DDRCLK4 DDRCLK5 DDRCLK0 DDRCLK1 DDRCLK2 DDRCLK3 DDRCLK4 DDRCLK5 21 21 21 21 21 21
*
BC149 10uF DUMMY
*
BC150 0.1uF
*
BC151 10nF
10
AVDD
11
AGND
**
14,17,21 SMBCLK 14,17,21 SMBDAT 10 FWDSDCLKO
SMBCLK SMBDAT FWDSDCLKO
0 0
DUMMY R115 R116 DUMMY
7 22 8
SCLK SDATA CLK_IN
CLK#0 CLK#1 CLK#2 CLK#3 CLK#4 CLK#5
1 5 14 16 25 27
DDRCLK-0 DDRCLK-1 DDRCLK-2 DDRCLK-3 DDRCLK-4 DDRCLK-5
DDRCLK-0 DDRCLK-1 DDRCLK-2 DDRCLK-3 DDRCLK-4 DDRCLK-5
21 21 21 21 21 21
18
NC1 FB_OUT NC3 19 21
B
*
R117
0 BC152 10pF
20
FB_IN
B
9
NC2 GND GND GND
close to clock buffer
SSOP28FB
6 28 15
A
TECHNOLOGY COPR.
Title
* *
FB_OUT
A
DDR Clock Buffer
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 18 of 44
A
8
9 9 9 9 9 9 SBA-[0..7] ST[0..2] AC-BE[0..3] AAD[0..31] ADSTBF[0..1] ADSTBS[0..1] SBA-[0..7] ST[0..2] AC-BE[0..3]
7
VCC5
6
5
+12V VDDQ
4
3
2
GCDET- on card GND OPEN GCDET0V 1.47V
1
AVREFCG 0.35V 0.75V APERR 0V 1.5V
AAD[0..31] ADSTBF[0..1]
SB3V VCC3
NOTE: This AGP slot support both AGP3.0 display card and SiS301 video bridge card.
ADSTBS[0..1]
VDDQ
VCC3
D
AGP B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 OVRCNT# +5V +5V USB+ GND INTB# CLK REQ# VCC3.3 ST0 ST2 RBF# GND RESERVEDB14 SBA0 VCC3.3 SBA2 SB_STB GND SBA4 SBA6 DBI_LO GND VCC3_AUX VCC3.3 AD31 AD29 VCC3.3 AD27 AD25 GND AD_STB1 AD23 VDDQ AD21 AD19 GND AD17 C/BE#2 VDDQ IRDY# +12V TYPEDET# GC_AGP8X_DET USBGND INTA# RST# GNT# VCC3.3 ST1 MB_AGP8X_DET PIPE# GND WBF# SBA1 VCC3.3 SBA3 SB_STB# GND SBA5 SBA7 DBI_HI GND RESERVEDA24 VCC3.3 AD30 AD28 VCC3.3 AD26 AD24 GND AD_STB1# C/BE3# VDDQ AD22 AD20 GND AD18 AD16 VDDQ FRAME# A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 GCDETINT-A PCIRSTAGNT ST1 DBI_HI WBF SBA-1 SBA-3 SBSTBS SBA-5 SBA-7 DBI_HI WBF 9 9 GCDETINT-A PCIRSTAGNT 9 11,13,24,25 13,24,25,26,35 9
D
13,24,25 INT-B 17 AGPCLK1 9 AREQ
INT-B AGPCLK1 AREQ ST0 ST2
9 9
RBF DBI_LOW SBA-0 SBA-2 SBSTBF SBA-4 SBA-6
RBF
9
SBSTBF
SBSTBS
9 VCC3
close to AGP SLOT
VCC5 VDDQ
C
AAD31 AAD29 AAD27 AAD25 ADSTBF1 AAD23 AAD21 AAD19 AAD17 AC-BE2 9 AIRDY AIRDY
AAD30 AAD28 AAD26 AAD24 ADSTBS1 AC-BE3 AAD22 AAD20
* *
R119 10K
*
R120 10K
R118 124 +/-1% R0603 AVREFCG R122 124
C
D
*
R121 54.9 Q10
*
G C S
2N7002
*
BC153 10nF
E
AFRAME
AFRAME
9
*
AAD18 AAD16
GCDET-
R123
4.3KB
Q11 MMBT3904
VDDQ 9 ADEVSEL APERR 9 ASERR AC-BE1 AAD14 AAD12 AAD10 AAD8 ADSTBF0 AAD7 AAD5 AAD3 AAD1 AVREFCG B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 DEVEL# VDDQ PERR# GND SERR# C/BE1# VDDQ AD14 AD12 GND AD10 AD8 VDDQ AD_STB0 AD7 GND AD5 AD3 VDDQ AD1 VREF_CG TRDY# STOP# PME# GND PAR AD15 VDDQ AD13 AD11 GND AD9 C/BE0# VDDQ AD_STB0# AD6 GND AD4 AD2 VDDQ AD0 VREF_GC A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 ATRDY ASTOP PMEAPAR AAD15 AAD13 AAD11 AAD9 AC-BE0 ADSTBS0 AAD6 AAD4 AAD2 AAD0 AVREFGC 9 BC154 0.1uF ATRDY ASTOP PMEAPAR 9 9 14,24,25,28 9
*
D
R124 8.2K APERR Q12
B
G S
B
2N7002
*
R125 1K
1 2 3
AGP_SLOT_124P
1 2 3
*
close to 660
AGP CONNECTOR DECOUPLING
put CAP close to AGP slot each POWER PIN
VDDQ
VCC3 +12V VCC5 SB3V VDDQ EC13 1000uF 6.3V, +/-20% ce35d80h140
A
*
BC155 10nF
*
BC156 10nF
*
BC157 10nF
*
BC158 10nF
*
BC159 10nF
*
BC160 10nF
*
BC161 10nF
*
BC162 10nF
*
BC163 10nF
*
A
TECHNOLOGY COPR.
Title
AGP
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 19 of 44
A
5
4
3
2
1
D
VGA CONNECTOR
VCC5
D
2
2
2 4 6 8
Dummy 1 1 1
Dummy
1 3 5 7
*
RN77 0 8P4R0603 +/-5%
2
*
BC1100 0.1uF 3
2
VCC5 VCC5 D484 BAV99 Dummy
D482 BAV99 Dummy
3
D483 BAV99 Dummy
3
F3 F1210_1.1A Reserved 1
*
R126 2.2K
*
R127 2.2K
*
C
ET1206L 19ohm@100MHz?
11 11 11 ROUT GOUT BOUT ROUT GOUT BPUT FB15 FB16 FB17 1 1 1 2 FB L0603 75 Ohm 2 FB L0603 75 Ohm 2 FB L0603 75 Ohm BC168 6.8pF
BC164 CONNECTOR 0.1uF TOP 25V, Y5V, +80%/-20% VIEW C0603
VGA VGA15P
C
DDC1DATA HSYNC VSYNC BC169 6.8pF BC170 6.8pF
DDC1DATA HSYNC VSYNC DDC1CLK
11 11 11 11
*
R128 75
*
BC165 6.8pF
*
R129 75
*
BC166 6.8pF
*
R130 75
*
BC167 6.8pF
*
*
*
DDC1CLK
*
BC171 470pF Reserved
*
BC172 470pF Reserved
*
BC173 470pF Reserved
*
BC174 470pF Reserved
For EMI.
close to GND gap
B
VCC5
B
2
3
D485 BAV99 Dummy 1
2 D486 BAV99 Dummy 1
3
*
BC1104 0.1uF
Dummy
A
A
TECHNOLOGY COPR.
Title
VGA
Document Number Rev
661M08
Date:
5 4 3 2
A
Sheet
1
Monday, August 01, 2005
20
of
44
10,23 MD[0..63] 10,23 MA[0..14] 10,23 DQM[0..7] 10,23 DQS[0..7]
8
MD[0..63] MA[0..14]
7
VCC2.5_MEM
6
5
MD[0..63] MA[0..14]
4
VCC2.5_MEM
3
2
1
DQM[0..7] DQS[0..7] 108 85 70 46 38 7 180 172 164 156 143 136 128 112 104 96 77 62 54 30 22 15 DIMM1
DQM[0..7] DQS[0..7] 108 85 70 46 38 7 180 172 164 156 143 136 128 112 104 96 77 62 54 30 22 15 VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ DIMM2
D
NOTE: VDDID IS A TRAP ON THE DIMM MODULE TO INDICATE: VDDID OPEN GND REQUIRED POWER VDD=VDDQ VDD!=VDDQ MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA11 MA12 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
120 148 168 184 48 43 41 130 37 32 125 29 122 27 141 118 115 103 59 52 113 97 107 119 129 149 159 169 177 140 5 14 25 36 56 67 78 86 47 44 45 49 51 134 135 142 144
VDD VDD VDD VDDSPD A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 NC9 BA0 BA1 BA2 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 NC1 NC5(RESET#) NC2 NC3 NC4 A13 RAS# CAS# WE# S0# S1# NC6(S2#) NC7(S3#) CKE0 CKE1 CK0 CK1 CK2 CK0# CK1# CK2# addr = 1010000b
MEMORY MUX TABLE: SDR CS0 CS1 CS2 CS3 CS4 CS5 CSB0 CSB1 CSB2 CSB3 CSB4 CSB5 CSB6 CSB7 DDR CS0 CS1 CS2 CS3 CS4 CS5 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
C
B
9 10 101 102 173 167 10,23 10,23 10,23 /RSRAS/RSCAS/RSWE/RSRAS/RSCAS/RSWECS-0 CS-1 154 65 63 157 158 71 163 21 111 137 16 76 138 17 75
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VREF VDDID WP SCL SDA SA0 SA1 SA2
2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 1 82 90 92 91 181 182 183
MD4 MD2 MD3 MD5 MD0 MD1 MD7 MD6 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD63 MD60 MD61 MD62 MD59 DDRVREF WP SMBCLK SMBDAT
120 148 168 184 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA11 MA12 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 48 43 41 130 37 32 125 29 122 27 141 118 115 103 59 52 113 97 107 119 129 149 159 169 177 140 5 14 25 36 56 67 78 86 47 44 45 49 51 134 135 142 144 9 10 101 102 173 167 /RSRAS/RSCAS/RSWECS-2 CS-3 154 65 63 157 158 71 163 21 111 137 16 76 138 17 75
D
2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 1 82 90 92 91 181 182 183 MD4 MD2 MD3 MD5 MD0 MD1 MD7 MD6 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD63 MD60 MD61 MD62 MD59 DDRVREF WP SMBCLK SMBDAT R132 8.2K
VDD VDD VDD VDDSPD A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 NC9 BA0 BA1 BA2 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
Swap DATA for Layout
NC1 NC5(RESET#) NC2 NC3 NC4 A13 RAS# CAS# WE# S0# S1# NC6(S2#) NC7(S3#) CKE0 CKE1 CK0 CK1 CK2 CK0# CK1# CK2# addr = 1010001b
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VREF VDDID WP SCL SDA SA0 SA1 SA2
C
B
VCC2.5_MEM
*
R131 4.7K
DDRVREF WP SMBCLK SMBDAT 14,17,18 14,17,18
22
CKE0 CKE1 DDRCLK0 DDRCLK3 DDRCLK2 DDRCLK-0 DDRCLK-3 DDRCLK-2
CKE2 CKE3 DDRCLK5 DDRCLK4 DDRCLK1 DDRCLK-5 DDRCLK-4 DDRCLK-1
*
VCC2.5_MEM
000
100
A
TECHNOLOGY COPR.
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
176 160 152 145 139 132 124 116 100 93 89 81 74 66 58 50 42 34 26 18 11 3
10
CKE[0..3]
CKE[0..3]
18 DDRCLK[0..5] 18 DDRCLK-[0..5] Title
176 160 152 145 139 132 124 116 100 93 89 81 74 66 58 50 42 34 26 18 11 3
A
10,23
CS-[0..3]
CS-[0..3]
DDR_DIMM
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DDR_DIMM
DIMM1, 2
Document Number Rev
661M08
Date: Monday, August 01, 2005 Sheet 21 of 44
A
8
7
6
5
4
3
2
1
D
D
DDRVREF GEN. & DECOUPLING
VCC2.5_MEM
EMI
VCC5 VCC5 VCC5 VCC5 VCC5 VCC5 SB5V VDDQ VCC5 VCC5
C
*
C
R133 75 +/-1% R0603
*
BC175 10nF
DDRVREF
DDRVREF
21
*
*
R134 75 +/-1% R0603
*
BC176 10nF
*
BC177 10nF
BC320 BC321 BC322 BC323 BC324 BC325 BC342 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF Reserved Reserved Reserved Reserved Reserved Reserved Reserved
*
*
*
*
*
*
*