Denon-DNS3500 cd.pdf part of Denon DNS3500 Denon-DNS3500 cd.part1.rar, CD player text manual preview

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For U.S.A., Canada, Europe, U.K.,
Asia, China, Taiwan R.O.C., Korea
& Japan model

Ver. 1
SERVICE MANUAL
MODEL DN-S3500
TABLE TOP SINGLE CD PLAYER

For purposes of improvement, specifications and
design are subject to change without notice.

Please use this service manual with referring to the
operating instructions without fail.

Some illustrations using in this service manual are
slightly different from the actual set.

TOKYO, JAPAN
Denon Brand Company, D&M Holdings Inc.

X0252V.01 DE/CDM 0508
DN-S3500

SAFETY PRECAUTIONS
The following check should be performed for the continued protection of the customer and service technician.

LEAKAGE CURRENT CHECK
Before returning the unit to the customer, make sure you make either (1) a leakage current check or (2) a line to chassis
resistance check. If the leakage current exceeds 0.5 milliamps, or if the resistance from chassis to either side of the
power cord is less than 460 kohms, the unit is defective.

LASER RADIATION
Do not stare into beam or view directly with optical instruments, class 3A laser product.

500V

1M

(1)

(2)

(1)

(2)

2
DN-S3500

DISASSEMBLY
(Follow the procedure below in reverse order when reassembling.)
Note: First of all, remove the Platter. Refer to the Instruction Manuals.

1. Bottom Plate
(1) Remove 4 screws 70 and pull out Bottom Plate.

70

Bottom Plate

70

2. Top Cover unit
(1) Remove 4 screws 71.
(2) Detach FFC ESC.
(3) Remove 2 Push Rivets 31.
(4) Disconnect Connector to remove Eject LED unit.
(5) Remove 6 screws 71.
(6) Disconnect FFC Cable and Connector.
(7) Detach Top Cover unit.

71
Front ESC

71
Connector
CW121
71 71

Connector
CX032

31
71 FFC Cable
CX251
Eject LED unit

Note:
Do not pull out aslant to prevent FFC cable damage.
Do not fail to pull AC cord from wall outlet before disconnect FFC Cable.
If AC cord is remained plugged into wall outlet, power is kept supplied in the unit, which may cause danger.

3
DN-S3500

3. Motor unit
(1) Remove 4 screws 74.
(2) Detach Motor unit (FG3500).

Motor unit
74 (FG3500)

74

4. Mecha unit
(1) Remove 2 screws 63 and 2 screws 64.
(2) Disconnect FFC cable and Connector.
(3) Detach Mecha Unit.

Connector
CX061
64

63

63

FFC Cable
CX361
Mecha unit

Note:
Do not pull out aslant to prevent FFC cable damage.
Do not fail to pull AC cord from wall outlet before disconnect FFC cable.
If AC cord is remained plugged into wall outlet, power is kept supplied in the unit, which may cause danger.

4
DN-S3500

5. Power P.W.B.
(1) Remove 6 screws 69, a screws 72 and a screws 73.
(2) Detach Power P.W.B.

Power P.W.B.
69
73

72

69 69

69

6. Main P.W.B.
(1) Short-circuit the short land above.
(2) Remove a screws 65 and a screws 66.
(3) Disconnect FFC Cable and FPC Cable.
(4) Detach Main P.W.B.

65

Main P.W.B. FPC Cable

66

Short land for laser diode

FFC Cable

Note:
Do not pull out aslant to prevent FFC cable damage.

5
DN-S3500

7. Shield Plate (E3 Model only)
(1) Remove 4 screws 60.
(2) Detach Shield Plate.

Shield Plate

60
60

8. CD Mecha
(1) Remove 2 screws 63 and pull out Main Pwb Bracket.
(2) Remove 2 screws 64 and pull out Disc Guide.

Main Pwb Bracket
63
63
CD Mecha

Disc Guide

64

64

6
DN-S3500

BLOCK DIAGRAM

7
DN-S3500

CONFIRMING THE SERVO
What is Service Program
Service program is a special program intended for confirming servo functions etc.
Required Measuring Implement
Reference disc (TCD784 or CO-74176)
1. Contents of Service Program
Turn on the power while pressing both B button and the PARAMETER knob to set the service mode of DN-S3500. The various
check items can be selected with the PARAMETER knob, the various test items can be selected with the A, SAMP, EXIT/RELOOP,
(SAMP.)EXIT/RELOOP, and BEND buttons. Press either the PARAMETER knob or PLAY/PAUSE button to start the check
or test and display the result.
To eject the disc, press the DISC EJECT button.
To cancel the service mode, turn the power off.

Process No. Function
(TRACK Contents
(Character-display)
Indication)
A PARAMETER knob is pushed and a version is checked.
ľcom Version check
01 1. System ľcom version No. : "System_XXXX"
(Version No.)
2. DSP soft version No. : "Dsp_XXXX"
Press the PARAMETER knob to turn the tracking servo off.
"TR_Signal"
02 When the tracking servo is off, press the PARAMETER knob to turn the tracking
"HF_Signal"
servo on.
Press the PARAMETER knob to start automatic servo adjustment. When the
adjustment is completed, the adjustment data is displayed. The data can be
selected by turning the EFFECTS knob.
1. Disc check, CD/CD-RW
2. Focus gain data
Automatic Servo
3. Focus balance data
03 Adjustment call
4. Focus offset data
(Servo Data)
5. Tracking gain data
6. Tracking balance data
7. Tracking offset data
8. S curve maximum
9. S curve minimum

PARAMETER Select the focus gain. Default : 7. Select the data with the scratch disc, then press
knob the PARAMETER knob to enter it. The higher the value, the higher the gain, while
04 "Fo_Gain"
the lower the value, the lower the gain.
* Do not change this without instruction from engineering.
05 "Tr_Gain" Select the tracking gain. Default : 2. The operation is the same as for the Fo Gain.
06 "Block_Err" The block error rate is displayed.
When the PARAMETER knob is pressed, the pickup moves towards the outer
edge of the disc. The pickup lens becomes visible through the slit in the CD mech-
07 "PU._Clean"
anism plate. The lens can be cleaned using a cotton swab, etc.
(Perform this operation with the top panel/cover removed and the disc ejected.)
During normal operation, the error code for the error that occurred is displayed.
Turn the EFFECTS knob to select up to 10 sets of error data stored in the mem-
Error Code Check
08 ory. (See the error code table for a description of the error codes.)
(Error Data)
Press the PARAMETER knob to set the error data clear mode. ("Error Clear?" is
displayed.) Press the PARAMETER knob again to clear all the error data.
The total operating time of the spindle motor is displayed. A total of 65,535 hours
can be counted, in units of hours.
Total Running Time
09 NOTE: If the power is turned off after 59 minutes or less, that hour is not counted.
(Total Time)
Press the PARAMETER knob to set the total time clear mode. ("Time Clear?" is
displayed.) Press the PARAMETER knob again to clear the total time.

8
DN-S3500

BEND+ button FLT all light check performed while button pressed.
BEND- button FLT all off check performed while button pressed.
button Disc eject status set while button pressed.
The disc loading/eject roller turns. The dirt can be cleaned off the roller by gently pressing a cotton swab with "Iso-
propyl alcohol", against the roller.
(Perform this operation with the top panel/cover removed and the disc ejected.)
Servo automatic adjustment read-out value

Adjustment Item Adjustment Value indication at character portions.
1 Focus Gain 0408 ~ 3248
2 Focus Balance -50 ~ +50
3 Focus Offset -005 ~ +005
4 Tracking Gain 0392 ~ 1569
5 Tracking Balance -025 ~ +025
6 Tracking Offset -005 ~ +005

2. TEST MODE
Function
Contents
(Character-display)

Press button A1, then press the PLAY/PAUSE button to start the test.
The disc is ejected, loaded and played repeatedly.
Heat Run Test
A button For discs containing 20 tracks or less, all the tracks are played.
H/R1 Normal
For discs containing 21 tracks or more, only the first and last tracks on the disc are played.
If an error occurs, the error code is displayed and the stop mode is set.
Press button A2, then press the PLAY/PAUSE button to start the test.
Chucking Test
A2 button The disc load/eject, servo input and TOC reading operations are performed repeatedly.
H/R2 Tray
If an error occurs, the error code is displayed and the stop mode is set.
Platter rotation speed Press button SAMP, then press the PLAY/PAUSE button. The platter starts to rotate and
SAMP button revolution number is displayed.
check
(SAMP.)EXIT Platter rotation speed Press the (SAMP.)EXIT/RELOOP button, then press the PLAY/PAUSE button. The Platter starts
/RELOOP to rotate and revolution number is displayed. The rotation speed can be adjusted to turn the
button fine adjustment parameter knob.
Press button EXIT/RELOOP, then press the PLAY/PAUSE button to start the system check.
Once the check is completed, the results are displayed.
1. The system ľcom and DSP communications are checked.
2. Reading and writing SDRAM of DSP are checked.
EXIT/ 3. Reading and writing SDRAM of servo DSP are checked.
System check
RELOOP 4. Communications between the system ľcom and servo DSP are checked.
button Sys. Check
5. The CD drive operation is checked. (Inner edge switch detection is performed.)
6. The CD drive operation is checked. (Disc detection is performed.)
Once all the checks are completed, the results are displayed on the character display. The
numbers of the checks in items 1 to 6 above that were OK are displayed. If one of the checks
was not OK, the number of that item is not displayed.

3. Error Code Table (Appears only at Heat Run and Chucking Test function)
Error Code Contents
Automatic Adjustment Error
E1 00 Unable to detect disk
E1 01 Unable to adjust tracking offset
E1 03 Unable to adjust focus fine gain
E1 04 Unable to actuate focus
E1 05 Unable to actuate tracking
E1 06 Unable to adjust tracking fine gain
E2 02 Servo down during automatic Adjustment
E3 00 Unable to read TOC

9
DN-S3500

Error Code Contents
E4 00 Unable to close the disc holder in the regular time
E4 01 Unable to open the disc holder in the regular time
E5 00 The inner SW dose not turn on
E5 01 Slider error
E5 02 The inner SW dose not turn off
E8 00 Track jumping was happened during memory of data. And unable to memorize data continuously.

Error Indication
TR MIN SEC FRAM CHARACTER
displays the track No. in Displays the time at which error occurred. H Operation count
which error occurred. E Error code

4. ľcom update
The system ľcom and DSP can be updated from a disc.
The ľcom should be updated to the latest version, when GU-3689(MAIN PWB UNIT) or IC102(Flash ROM) is replaced.
(1) Creating the update disc
Use the procedure described below to create the disc for updating the system microprocessor and DSP.
Store the update file on a CD-R or CD-RW disc in ISO9660 Mode 1 format, then finalize the disc.
Write the distributed update files using the "DISC AT ONCE" CD writing software and finalize.
Do not record any other software or data on the disc containing the update software.
Do not change the file names - use the file names as distributed.

(2) Updating the system ľcom and DSP
Turn on the power and load the disc created in (1) above.
When the update disc is detected, "Version Up" is displayed. And "xxxx yyyyy" and "Push Play!" are displayed by turns.
xxxx : Old Version No., yyyy : New Version No.
Press the PLAY/PAUSE button. "NowLoading" is displayed and the updating procedure starts.
As updating proceeds, the playback position indicator lights in order from left to right.
NOTE: In some extremely rare cases, the updating procedure is not completed. If the updating procedure has not finished after
three minutes, there could be a problem. Turn off the power and repeat the operation from step (2) .
Depending on the problem that occurred, it may happen that no other operations can be performed. If this happens, GU-
3689 IC102 must be replaced. Software must be pre-recorded on the IC102. (When ordering the IC102, order the more
recent system microprocessor version number (GEN number).)
When updating is completed, "Complete!" is displayed and the disc is ejected.

ADJUSTMENT
When the motor (FG-3500) is replaced, platter rotation speed adjustment is necessary.
(1) Start the Platter Rotation Speed Fine Adjust mode in the test mode. (Refer to page 9)
The actual revolution number is indicated on the lower part of the Character display. (Standard is 33rpm)
The difference from the standard revolution number is indicated on the upper part of the Character display.
(2) Turn the parameter knob. And the "D_**"(left side) of the lower part of the Character display is set to "D_77".
Then check the difference from the standard revolution number.
a) The difference from the standard number is -5% ~ +1% :
Turn the parameter knob to set "-2%". And push the parameter knob to complete the adjustment.
b) The difference from the standard number is outside of -5% ~ +1% :
Start the platter revolution check mode in the test mode. (Refer to page 9)
Present revolution number is indicated on the lower part of character display. (Standard is 33rpm)
Difference from the standard revolution number is indicated on the upper part of character display.
Make adjustment by turning VR701 on the power unit GU-3690 so that difference from the standard revolution number
indicated on the upper part of character display becomes -2%.

10
DN-S3500

Only major semiconductors are shown, general semiconductors etc. are omitted to list.

1. IC's
MN102H730F (IC101)
96 65

97 64

TOP VIEW

128 33

1 32
MN102H730F Terminal Function

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
1 CS0_ CS0_ O - Pu - - External memory chip select 0 (FrashROM CS)
2 CS1_ CS1_ O - Pu - - External memory chip select 1 (Frashrom for memo)
3 D00 DQ0 I/O - - - - External memory data in/out 0, DSP interface 0
4 D01 DQ1 I/O - - - - External memory data in/out 1, DSP interface 1
5 D02 DQ2 I/O - - - - External memory data in/out 2, DSP interface 2
6 D03 DQ3 I/O - - - - External memory data in/out 3, DSP interface 3
7 VDD VDD - - - - - Power (+3.3V)
8 VSS VSS - - - - - GND
9 D04 DQ4 I/O - - - - External memory data in/out 4, DSP interface 4
10 D05 DQ5 I/O - - - - External memory data in/out 5, DSP interface 5
11 D06 DQ6 I/O - - - - External memory data in/out 6, DSP interface 6
12 D07 DQ7 I/O - - - - External memory data in/out 7, DSP interface 7
13 D08 DQ8 I/O - - - - External memory data in/out 8, DSP interface 8
14 D09 DQ9 I/O - - - - External memory data in/out 9, DSP interface 9
15 D10 DQ10 I/O - - - - External memory data in/out 10, DSP interface 10
16 PD0,DMAACK1_ MUTE_ O - Pd L L Mute signal (L:mute)
17 PD1,DMAREQ1_ DSPF3 O - - L - FLAG3 for DSP
18 D11 DQ11 I/O - - - - External memory data in/out 11, DSP interface 11
19 D12 DQ12 I/O - - - - External memory data in/out 12, DSP interface 12
20 D13 DQ13 I/O - - - - External memory data in/out 13, DSP interface 13
21 D14 DQ14 I/O - - - - External memory data in/out 14, DSP interface 14
22 D15 DQ15 I/O - - - - External memory data in/out 15, DSP interface 15
23 WORD WORD I - - Data bus width select (H:16bit width), GND fixed
24 VDD VDD - - - - - Power (+3.3V)
25 MODE MODE I - - L L Processor mode, GND fixed
26 PC3 APOWER O - Pd L L Analog out power ON/OFF (L: Power OFF)
27 XI XI I - - - - Oscillation input terninal
28 XO XO O - - - - Oscillation output terninal
29 VDD VDD - - - - - Power (+3.3V)

11
DN-S3500

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
30 OSCI OSCI I - - - - Oscillation input terninal 32.0MHz
31 OSCO OSCO O - - - - Oscillation output terninal
32 VSS VSS - - - - - GND
33 P57,BOSC DR_/W O - - H - DN7000X: DSP interface send/receive select signal
34 PC5,NMI_ NMI I - - - - Connect to power
35 RST_ RST_ I - - - - Micro-processor RESET
36 PC0 FPLAY1 I - (Pu) H H MAIN fader start PLAY input
37 P76 FCUE1 I - (Pu) H H MAIN fader start CUE input
X2;clock interrupt in for play/X1;LRCK :used for time code make
38 P60,IRQ0 DTIME I - iPu H -
out when MP3 play
39 P61,IRQ1 BLKCK I - iPu - - Sub-code clock interrupt
40 P62,IRQ2,TM10IOA TABLE I - (Pu) - - Pulse width measure input for turntable
41 P63,IRQ3,TM10IOB DBCLK I - - - - Pulse width measure clock input (5.6MHz) for DISC
42 P64,IRQ4 DTIMES I - iPu H - X2;clock interrupt input for sampler play/X1
43 P65,IRQ5,TM12IOA DISCA I - - - - Pulse width measure input for scratch DISC
44 P66,IRQ6 DISCDIR I - (Pu) - - Scratch DISC turn direction detect interrupt input
45 P67,IRQ7 DQSY I - iPu - - CD-TEXT DQSY interrupt
46 P70,TM13IOB DISCPA I - (Pu) H H Pulse A count input for scratch DISC
47 P71 ML O - iPu - - D/A interface latch 2 lines common
48 PD2,DMAACK0_ CHGOFT O - - L - Off track signal (transistor drive)
49 PD3,TM3IO DISCPA_ I - - - - Pulse A inverse count input for scratch DISC
50 VDD VDD - - - - - Power (+3.3V)
51 P77 DSTBY_ O - Pd L L Driver standby signal Çk: standby
52 P72,TM14IOB DISCPB I - - - - Pulse B count input for scratch DISC
53 P73,TM11I0B DISCINT I - (Pu) - - DISC rotation start interrupt input
54 P74 MLD O - - H - Servo DSP interface latch
55 P75§TM12IOB DBCLK I - - - - Pulse width measure clock input (5.6MHz) for DISC
56 PA0,SBI0 STAT I - iPu - - Servo DSP interface receive (clock synchronous)
57 PA1,SBO0 MDAT O - - H - Servo DSP interface send (clock synchronous)
58 PA2,SBT0 MCLK O - - H - Servo DSP interface clock (clock synchronous)
59 PA3,SBI1 RXDM I - (Pu) - - Interface receive with Memo link SET (asynchronous)
60 PA4,SBO1 TXDM O - Pu H H Interface receive with Memo link SET (asynchronous)
61 PA5,SBT1 NRES_ O - Pd L L Peripheral IC reset signal
62 PB0,SBI2 DSPRXD I - Pu - H DSP interface receive (asynchronous)
63 PB1,SBO2 DSPTXD O - Pu H H DSP interface send (asynchronous)
64 PB2,SBT2 FLCS_ O - - H - FLT driver enable signal
65 PB3,SBI3 FLRES_ O - Pd L L FLT driver reset signal
66 PB4,SBO3 PDATA O - - H - FLT driver data, and LED driver data (clock synchronous)
67 PB5,SBT3 FLCLK O - - H - FLT driver data send clock (clock synchronous)
68 VDD VDD - - - - - Power (+3.3V)
69 VSS VSS - - - - - GND
70 AVSS AVSS - - - - - Analog standard GND for AD conversion
71 Vref- Vref- - - - - - Analog standard voltage for AD conversion
72 P80 O - Pd L L Not used
73 P81 O - - H - Not used
74 P82 O - - H - Not used
75 P83 SEL_A O - - L - Key scan out select signal A
76 P84 SEL_B O - - L - Key scan out select signal B
77 P85 SEL_C O - - L - Key scan out select signal C
78 P86,AD06 PITCH I - - - - Slide VR data input for pitch
79 P87,AD07 PITCHC I - - - - Slide VR center value data input for pitch
80 PD4 SEL_D O - Pu H H Key scan out select signal D
81 PD5 I - Pu (H) H Not used
82 P90 I - Pu (H) H Not used
83 P91 MSTART O - Pd L L MOTOR START/STOP H: MOTOR START
84 P92 MDIR O - - H - MOTOR turn direction select H: forward

12
DN-S3500

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
85 P93 DSPRES_ O - Pd L L DSP RESET signal L: RESET
86 Vref+ Vref+ - - - - - Analog standard voltage +3.3V for AD conversion
87 AVDD AVDD - - - - - Power (+3.3V)
88 P94,DAC0 MSPD1 O - - - - MOTOR turn speed output D/A1
89 P95,DAC1 MSPD2 O - - - - MOTOR turn speed output D/A2(RESERVE)
90 P96,DAC2 MBRK O - - - - MOTOR BRAKE ON: H
91 P97,DAC3 LOAD O - - - - Disc loading, eject signal (D/A)
92 PC6,BREQ_ BREQ_ I - Pu - H Bus request signal
93 PC7,BRACK_ BRACK_ O - Pu H H Bus request accept signal
94 WEL_ WE_ O - Pu - H External memory write enable (lower 8bit)
95 P51 BOOT_ O - Pu H H DSP boot start signal L: START
96 RE_ RE_ O - Pu - H External memory read enable
97 CS2_ CS2_ O - Pu - H External memory chip select 2 (DSP Latch buffer interface)
98 VDD VDD - - - - - Power (+3.3V)
99 VSS VSS - - - - - GND
100 P54,BSTRE DACK_ I - Pu H H Not used
101 P55,WR_ DREQ_ O - Pu H H Not used
102 CS3_ CS3_ O - Pu - H Extended port chip select
103 A00 A00 O - - - - External memory address bus 0 (not used when 16bit bus select)
104 A01 A01 O - - - - External memory address bus 1
105 A02 A02 O - - - - External memory address bus 2
106 A03 A03 O - - - - External memory address bus 3
107 A04 A04 O - - - - External memory address bus 4
108 A05 A05 O - - - - External memory address bus 5
109 A06 A06 O - - - - External memory address bus 6
110 A07 A07 O - - - - External memory address bus 7
111 A08 A08 O - - - - External memory address bus 8
112 PD6 DSPF1 O - - L - FLAG1 for DSP
113 PD7,TM7IO DISCPB_ I - iPu - - Pulse B inverse count input for scratch DISC
114 A09 A09 O - - - - External memory address bus 9
115 A10 A10 O - - - - External memory address bus 10
116 A11 A11 O - - - - External memory address bus 11
117 A12 A12 O - - - - External memory address bus 12
118 A13 A13 O - - - - External memory address bus 13
119 VDD VDD - - - - - Power (+3.3V)
120 PC4 DSPF2 O - - L - FLAG2 for DSP
121 A14 A14 O - - - - External memory address bus 14
122 A15 A15 O - - - - External memory address bus 15
123 A16 A16 O - - - - External memory address bus 16
124 A17 A17 O - - - - External memory address bus 17
125 A18 A18 O - - - - External memory address bus 18
126 A19 A19 O - Pd - - External memory address bus 19
127 A20 A20 O - - - - External memory address bus 20
128 A21 A21 O - - - - External memory address bus 21

13
DN-S3500

ADSP-BF531 (IC401)

176 133
1 132
PIN 1

TOP VIEW

44 89
45 88

ADSP-BF531 Terminal Function

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
1 GND GND - - - - - GND
2 GND GND - - - - - GND
3 GND GND - - - - - GND
4 VROUT2 O - - - - External FET drive output 2
5 VROUT1 VROUT1 O - - - - External FET drive output 1
6 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
7 GND GND - - - - - GND
8 GND GND - - - - - GND
9 GND GND - - - - - GND
10 CLKIN CLKIN I - - - - Clock input 25MHz oscillation
11 XTAL XTAL O - - - - Cristal oscillator terminal
12 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
13 _RESET _RESET I - - - - Reset signal input
14 NMI NMI I - - - - Mask disable interrupt
15 GND GND - - - - - GND
16 RTXO O - - - - RTC cristal oscillator output
17 RTXI I - - L L RTC cristal oscillator input
18 VDDRTC VDDRTC I - - - - Real time clock power (+3.3V)
19 GND GND - - - - - GND
20 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
21 PPI_CLK I - - L L PPI clock
22 PPI0 O - - L - PPI data 0
23 PPI1 O - - L - PPI data 1
24 PPI2 O - - L - PPI data 2
25 VDDINT VDDINT I - - - - Internal power (+1.2V)
26 PPI3 O - - L - PPI data 3
27 PF15 O - - L - Programmable flag pin 15
28 PF14 O - - L - Programmable flag pin 14
29 PF13 O - - L - Programmable flag pin 13
30 GND GND - - - - - GND
31 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
32 PF12 I - Pu H H Not used
33 PF11 I - - L - Not used
34 PF10 O - Pu H H Not used
35 PF9 I - Pu H H Not used
36 PF8 DSPF5 O - - L - (RESERVE)
37 PF7 O - - L - Not used
38 PF6 DTIMES O - - L - Playback clock output for SAMPLER
39 GND GND - - - - - GND
40 GND GND - - - - - GND

14
DN-S3500

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
41 GND GND - - - - - GND
42 GND GND - - - - - GND
43 GND GND - - - - - GND
44 GND GND - - - - - GND
45 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
46 PF5 DSPF3 O - - L - Programmable flag pin5 Inter micro processor pin3 (RESERVE)
47 PF4 DSPF2 O - - L - Programmable flag pin4 Inter micro processor pin2 (RESERVE)
48 PF3 DSPF1 O - - L - Programmable flag pin3 Inter micro processor pin1 (RESERVE)
49 PF2 DSPF0 O - - L - Programmable flag pin2 Inter micro processor pin0 (RESERVE)
50 PF1 DTIME O - - L - Programmable flag pin1 Clock output for playback
51 PF0 BTEND O - Pd L L Programmable flag pin0 'H' when all boot completed
52 VDDINT VDDINT I - - - - Internal power (+1.2V)
53 SCK O - - L - Master slave clock
54 MISO O - - L - Master input slave output
55 MOSI O - - L - Master output slave input
56 GND GND - - - - - GND
57 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
58 DT1SEC O - - - - Not used
59 DT1PRI DDATA1 O - - - - Main digital out data send 0 (serial port OUT 1)
60 TFS1 DLRCK I - IPu - H Digital out send frame synchro (LRCK) signal (serial port OUT 1)
61 TSCLK1 DBCK I - - - - Digital out send frame synchro (BCK) signal (serial port OUT 1)
62 DR1SEC I - - L L Playback data receive 1
63 DR1PRI I - - - - Not used
64 RFS1 O - - - - Not used
65 RSCLK1 O - IPu - H Not used
66 VDDINT VDDINT I - - - - Internal power (+1.2V)
67 DT0SEC ADATA2 O - - - - Not used
68 DT0PRI ADATA1 O - - - - Main analog playback data send 0 (serial port OUT 0)
69 TFS0 ALRCK I - IPu - H Analog playback send frame synchro (LRCK) signal (serial port OUT 0)
70 GND GND - - - - - GND
71 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
72 TSCLK0 ABCK I - - - - Analog playback send frame synchro (BCK) signal (serial port OUT 0)
73 DR0SEC I - - L L Playback data receive 1
74 DR0PRI SRDATA I - - - - Playback data receive 0 (serial port IN 0)
75 RFS0 LRCK I - - - - Receive frame synchro (LRCK) signal (serial port IN 0)
76 RSCLK0 BCLK I - IPu - H Receive frame synchro (BCK) signal (serial port IN 0)
77 TMR2 O - - L - Timer 2
78 TMR1 O - - L - Timer 1
79 TMR0 O - - L - Timer 0
80 VDDINT VDDINT I - - - - Internal power (+1.2V)
81 TX TX O - Pu H - UART send
82 RX RX I - Pu - H UART receive
83 _EMU _EMU O - - - - Emulation status
84 _TRST _TRST I - Pd - L Test reset (JTAG)
85 TMS TMS I - Pu - H Test mode select (JTAG)
86 TDI TDI I - Pu - H Test data input (JTAG)
87 TD0 TD0 O - - - - Test data output (JTAG)
88 GND GND - - - - - GND
89 GND GND - - - - - GND
90 GND GND - - - - - GND
91 GND GND - - - - - GND
92 GND GND - - - - - GND
93 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
94 TCK TCK I - Pu - H Test clock (JTAG)
95 BMODE1 BMODE1 I - - - - Boot mode strap 1

15
DN-S3500

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
96 BMODE0 BMODE0 I - - - - Boot mode strap 0
97 GND GND - - - - - GND
98 DATA15 D15 I/O - - - - External bus data 15
99 DATA14 D14 I/O - - - - External bus data 14
100 DATA13 D13 I/O - - - - External bus data 13
101 DATA12 D12 I/O - - - - External bus data 12
102 DATA11 D11 I/O - - - - External bus data 11
103 DATA10 D10 I/O - - - - External bus data 10
104 DATA9 D9 I/O - - - - External bus data 9
105 DATA8 D8 I/O - - - - External bus data 8
106 GND GND - - - - - GND
107 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
108 DATA7 D7 I/O - - - - External bus data 7
109 DATA6 D6 I/O - - - - External bus data 6
110 DATA5 D5 I/O - - - - External bus data 5
111 VDDINT VDDINT I - - - - Internal power (+1.2V)
112 DATA4 D4 I/O - - - - External bus data 4
113 DATA3 D3 I/O - - - - External bus data 3
114 DATA2 D2 I/O - - - - External bus data 2
115 DATA1 D1 I/O - - - - External bus data 1
116 DATA0 D0 I/O - - - - External bus data 0
117 GND GND - - - - - GND
118 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
119 _BG O - - - - Bus accept signal
120 _BGH O - - - - Bus accept wait signal
121 ADDR19 BA1 I/O - - - - External bus address 19
122 ADDR18 BA0/ADDR18 I/O - - - - External bus address 18
123 ADDR17 ADDR17 I/O - - - - External bus address 17
124 ADDR16 ADDR16 I/O - - - - External bus address 16
125 ADDR15 ADDR15 I/O - - - - External bus address 15
126 ADDR14 ADDR14 I/O - - - - External bus address 14
127 ADDR13 ADDR13 I/O - - - - External bus address 13
128 GND GND - - - - - GND
129 GND GND - - - - - GND
130 GND GND - - - - - GND
131 GND GND - - - - - GND
132 GND GND - - - - - GND
133 GND GND - - - - - GND
134 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
135 ADDR12 ADDR12 I/O - - - - External bus address 12
136 ADDR11 ADDR11 I/O - - - - External bus address 11
137 ADDR10 ADDR10 I/O - - - - External bus address 10 (SDRAM connects with SDA10)
138 ADDR9 ADDR9 I/O - - - - External bus address 9
139 ADDR8 ADDR8 I/O - - - - External bus address 8
140 ADDR7 ADDR7 I/O - - - - External bus address 7
141 ADDR6 ADDR6 I/O - - - - External bus address 6
142 ADDR5 ADDR5 I/O - - - - External bus address 5
143 VDDINT VDDINT I - - - - Internal power (+1.2V)
144 GND GND - - - - - GND
145 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
146 ADDR4 ADDR4 I/O - - - - External bus address 4
147 ADDR3 ADDR3 I/O - - - - External bus address 3
148 ADDR2 ADDR2 I/O - - - - External bus address 2
149 ADDR1 ADDR1 I/O - - - - External bus address 1
150 _ABE1 SDQM1 I/O - - - - SDRAM data mask 1

16
DN-S3500

Pin
Pin Name Symbol I/O DET Ext Ini Res Function
No.
151 _ABE0 SDQM0 I/O - - - - SDRAM data mask 0
152 _AWE _AWE O - - H H Asynchro memory write enable
153 _ARE _ARE O - - H H Asynchro memory read enable
154 _AOE O - - - - Asynchro memory output enable
155 GND GND - - - - - GND
156 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
157 VDDINT VDDINT I - - - - Internal power (+1.2V)
158 _AMS3 O - - - - Asynchro memory bank select 3
159 _AMS2 O - - - - Asynchro memory bank select 2
160 _AMS1 _AMS1 O - - - - Asynchro memory bank select 1
161 _AMS0 _AMS0 O - - - - Asynchro memory bank select 0
162 ARDY I - - - L Bus wait ready signal
163 _BR I - - - H Bus request signal
164 SA10 SA10 I/O - - - - Synchro memory A10
165 _SWE _SWE O - - - - Synchro memory write enable signal
166 _SCAS _SCAS O - - - - Synchro memory column address strobe signal
167 _SRAS _SRAS O - - - - Synchro memory row address strobe signal
168 VDDINT VDDINT I - - - - Internal power (+1.2V)
169 CLKOUT CLKOUT I/O - - - - Synchro memory clock output
170 GND GND - - - - - GND
171 VDDEXT VDDEXT I - - - - I/O power (+3.3V)
172 _SMS _SMS O - - - - Synchro memory bank select signal
173 SCKE SCKE O - - - - Synchro memory clock enable signal
174 GND GND - - - - - GND
175 GND GND - - - - - GND
176 GND GND - - - - - GND

17
DN-S3500

MN6627933 (IC201)

MN6627933 Terminal Function

Pin
Pin Name I/O Function
No.
1 D11 I/O SDRAM data signal I/O 11
2 D10 I/O SDRAM data signal I/O 10
3 D9 I/O SDRAM data signal I/O 9
4 D8 I/O SDRAM data signal I/O 8
5 UDQM O SDRAM higher rank byte data mask signal output
6 SDRCK O SDRAM clock signal output
7 A11 O SDRAM address signal output 11
8 A9 O SDRAM address signal output 9
9 A8 O SDRAM address signal output 8
10 A7 O SDRAM address signal output 7
11 A6 O SDRAM address signal output 6
12 A5 O SDRAM address signal output 5
13 A4 O SDRAM address signal output 4
14 LDQM O SDRAM lower rank byte data mask signal output
15 NEW O SDRAM write enable signal output
16 NCAS O SDRAM CAS control signal output
17 NRAS O SDRAM RAS control signal output

18
DN-S3500

Pin
Pin Name I/O Function
No.
18 NCS O SDRAM chip select signal output
19 A3 O SDRAM address signal output 3
20 A2 O SDRAM address signal output 2
21 A1 O SDRAM address signal output 1
22 A0 O SDRAM address signal output 0
23 DRVDD1 I Power supply 1 for SDRAM interface I/O
24 DVSS1 I GND 1 for digital circuits
25 A10 O SDRAM address signal output 10
26 *BA1 O SDRAM bank selection signal output 1
27 *BA0 O SDRAM bank selection signal output 0
28 DVDD1 I Power supply 1 for inside digital circuits
29 SPOUT O Spindle drive signal output (absolute value)
30 *SPPOL O Spindle drive signal output (polarity)
31 TRVP O Traverse drive signal output (positive polarity)
32 *TRVM O Traverse drive signal output (negative polarity)
33 *TRVP2 O Traverse drive signal output 2 (positive polarity)
34 *TRVM2 O Traverse drive signal output 2 (negative polarity)
35 TRP O Tracking drive signal output (positive polarity)
36 *TRM O Tracking drive signal output (negative polarity)
37 FOP O Focus drive signal output (positive polarity)
38 *FOM O Focus drive signal output (negative polarity)
39 IOVDD1 I Power supply 1 for digital I/O
40 TBAL O Tracking balance adjustment signal output
41 FBAL O Focus balance adjustment signal output
42 FE I Focus error signal input
43 TE I Tracking error signal input
44 ADPVCC I Voltage input for supply voltage monitor
45 RFENV I RF envelope signal input
46 LDON O Laser ON signal output
47 NRFDET I RF detect signal input
48 OFT I Off-track signal input
49 BDO I Dropout signal input
50 AVDD I Power supply 1 for analog circuits
51 IREF I Analog reference current input
52 ARF I RF signal input
53 DSLF O DSL loop filter
54 PWMSEL I PWM output mode selection input L: Direct H: 3-state
55 PLLF O PLL loop filter (phase comparison output)
56 PLLFO O PLL loop filter (speed comparison output)
57 AVSS I GND 1 for analog circuits
58 LOOUTL O L-ch audio signal output for lineout output
59 LOVSS1 I GND for lineout output
60 LOOUTR O R-ch audio signal output for lineout output
61 LOVDD1 I Power supply for lineout output
62 N.C. -
63 TMON1 O Test monitor output 1
64 N.C. -
65 N.C. -
66 TMON2 O Test monitor output 2
67 DVDD3 I Power supply 3 for digital circuits
68 DVSS2 I GND 2 for digital circuits
69 *EXT0 I/O Expansion I/O port 0
70 *EXT1 I/O Expansion I/O port 1
71 *EXT2 I/O Expansion I/O port 2
72 MCLK I ľcom command clock signal input

19
DN-S3500

Pin
Pin Name I/O Function
No.
73 MDATA I ľcom command data signal input
74 MLD I ľcom command load signal input
75 *STAT O Status signal output
76 *BLKCK O Subcode block clock signal output
77 *SMCK O 4.2336MHz/8.4672MHz clock signal output
78 *PMCK O 88.2kHz clock signal output
79 *TX O Digital audio interface signal output
80 *FLAG O Flag signal output
81 NRST I LSI reset signal input
82 NTEST I Test mode setup input
83 DVSS3 I GND 3 for digital circuits
84 X1 I Crystal oscillator circuit input
85 X2 O Crystal oscillator circuit output
86 IOVDD2 I Power supply 2 for digital I/O
87 DVDD2 I Power supply 2 for inside digital circuits
88 D2 I/O SDRAM data signal I/O 2
89 D1 I/O SDRAM data signal I/O 1
90 D0 I/O SDRAM data signal I/O 0
91 D3 I/O SDRAM data signal I/O 3
92 D4 I/O SDRAM data signal I/O 4
93 D5 I/O SDRAM data signal I/O 5
94 D6 I/O SDRAM data signal I/O 6
95 D7 I/O SDRAM data signal I/O 7
96 D15 I/O SDRAM data signal I/O 15
97 D14 I/O SDRAM data signal I/O 14
98 DRVDD2 I Power supply 2 for SDRAM interface I/O
99 D13 I/O SDRAM data signal I/O 13
100 D12 I/O SDRAM data signal I/O 12
Note) Pins marked with an asterisk can be switched to different signals by using microcontroller commands.

20
DN-S3500

AN8785SB (IC202)

L: All mute [ Others ]
Hiz: ch2,4 ON
[ Loading ] [ Traverse ] [ Spindle ] [ Focus ] [ Tracking ]
H: Active
1 28 Standby PVcc2 D2- D2+ D4- D4+ D3- D3+ PVcc3 D1- D1+ D5- D5+ PVcc1
M M M

16 10 12 11 18 17 14 13 19 1 28 26 25 24
7 22
Protection
Circuit
Standby
Band-gap 4 IN-
Vcc/Vref -+ -+ -+ -+ -+ -+ -+ -+ -+
21 Reser Circuit -+ 5 IN+
8
-+

1.25V
3 OUT
14 15
-+ -+ -+ -+ -+ -+