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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

D D D D D D D D D D D D D

Bidirectional Transceivers Meet or Exceed the Requirements of ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27 Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments 3-State Driver and Receiver Outputs Individual Driver and Receiver Enables Wide Positive and Negative Input/Output Bus Voltage Ranges Driver Output Capability . . . 60 mA Max Thermal Shutdown Protection Driver Positive and Negative Current Limiting Receiver Input Impedance . . . 12 k Min Receiver Input Sensitivity . . . 200 mV Receiver Input Hysteresis . . . 50 mV Typ Operate From Single 5-V Supply

D OR P PACKAGE (TOP VIEW)

R RE DE D

1 2 3 4

8 7 6 5

VCC B A GND

description
The SN65176B and SN75176B differential bus transceivers are monolithic integrated circuits designed for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced transmission lines and meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27. The SN65176B and SN75176B combine a 3-state differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, that can be connected together externally to function as a direction control. The driver differential outputs and the receiver differential inputs are connected internally to form differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or VCC = 0. These ports feature wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. The driver is designed for up to 60 mA of sink or source current. The driver features positive and negative current limiting and thermal shutdown for protection from line-fault conditions. Thermal shutdown is designed to occur at a junction temperature of approximately 150C. The receiver features a minimum input impedance of 12 k, an input sensitivity of 200 mV, and a typical input hysteresis of 50 mV. The SN65176B and SN75176B can be used in transmission-line applications employing the SN75172 and SN75174 quadruple differential line drivers and SN75173 and SN75175 quadruple differential line receivers. The SN65176B is characterized for operation from 40C to 105C and the SN75176B is characterized for operation from 0C to 70C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1999, Texas Instruments Incorporated

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1

SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

Function Tables
DRIVER INPUT D H L X ENABLE DE H H L RECEIVER DIFFERENTIAL INPUTS AB VID 0.2 V 0.2 V < VID < 0.2 V VID 0.2 V X Open ENABLE RE L L L H L OUTPUT R H ? L Z ? OUTPUTS A H L Z B L H Z

H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off)

logic symbol
DE RE 3 2 EN1 EN2 6 7

logic diagram (positive logic)
DE D RE A B R 3 4 2 1 6 7 A B Bus

D

4

1 1

R

1

2

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

2

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT VCC R(eq) 16.8 k NOM 960 NOM 960 NOM TYPICAL OF A AND B I/O PORTS VCC TYPICAL OF RECEIVER OUTPUT VCC 85 NOM

Input

Output

GND Driver input: R(eq) = 3 k NOM Enable inputs: R(eq )= 8 k NOM R(eq) = equivalent resistor Input/Output Port

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 15 V Enable input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential input/output bus voltage, are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.

recommended operating conditions
MIN Supply voltage, VCC Voltage at any bus terminal (separately or common mode), VI or VIC mode) High-level input voltage, VIH Low-level input voltage, VIL Differential input voltage, VID (see Note 3) High-level High level output current, IOH current Low-level Low level output current, IOL current Operating free-air temperature, TA free air temperature Driver Receiver Driver Receiver SN65176B SN75176B 40 0 D, DE, and RE D, DE, and RE 2 0.8 12 60 400 60 8 105 70 4.75 TYP 5 MAX 5.25 12 7 UNIT V V V V V mA A mA C

NOTE 3: Differential-input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER VIK VO |VOD1| |VOD2| VOD3 |VOD| VOC |VOC| IO IIH IIL Input clamp voltage Output voltage Differential output voltage g Differential output voltage Differential output voltage Change in magnitude of differential output g g voltage Common-mode Common mode output voltage Change in magnitude of common-mode g g output voltage Output current High-level input current Low-level input current Output disabled, , See Note 5 VI = 2.4 V VI = 0.4 V VO = 7 V VO = 0 VO = VCC VO = 12 V No load Outputs enabled Outputs disabled 42 26 VO = 12 V VO = 7 V RL = 54 or 100 , See Figure 1 TEST CONDITIONS II = 18 mA IO = 0 IO = 0 RL = 100 , RL = 54 , See Note 4 See Figure 1 See Figure 1 MIN 0 1.5 1/2 VOD1 or 2 1.5 1.5 2.5 5 5 0 2 0.2 +3 1 0 2 0.2 1 0.8 20 400 250 150 250 250 70 35 mA mA 3.6 TYP MAX 1.5 6 6 UNIT V V V V V V V V V mA A A

IOS

Short-circuit Short circuit output current

ICC

Supply current (total package)

The power-off measurement in ANSI Standard TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. All typical values are at VCC = 5 V and TA = 25C. |VOD| and |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. The minimum VOD2 with a 100- load is either 1/2 VOD1 or 2 V, whichever is greater. NOTES: 4. See ANSI Standard TIA/EIA-485-A, Figure 3.5, Test Termination Measurement 2. 5. This applies for both power on and off; refer to ANSI Standard TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for a combined driver and receiver terminal.

switching characteristics, VCC = 5 V, RL = 110 k, TA = 25C (unless otherwise noted)
PARAMETER td(OD) tt(OD) tPZH tPZL tPHZ tPLZ Differential-output delay time Differential-output transition time Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level TEST CONDITIONS RL = 54 , See Figure 4 See Figure 5 See Figure 4 See Figure 5 See Figure 3 MIN TYP 15 20 85 40 150 20 MAX 22 30 120 60 250 30 UNIT ns ns ns ns ns ns

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

SYMBOL EQUIVALENTS DATA-SHEET PARAMETER VO |VOD1| |VOD2| |VOD3| |VOD| VOC |VOC| IOS IO | |Vt| |Vt| | |Vos| |Vos Vos| |Isa|, |Isb| |Ixa|, |Ixb| Iia, Iib TIA/EIA-422-B Voa, Vob Vo Vt (RL = 100 ) TIA/EIA-485-A Voa, Vob Vo Vt (RL = 54 ) ( Vt (Test Termination Measurement 2) | |Vt |Vt| | |Vos| |Vos Vos|

RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER VIT + VIT Vhys VIK VOH VOL IOZ II IIH IIL rI IOS ICC Positive-going input threshold voltage Negative-going input threshold voltage Input hysteresis voltage (VIT + VIT ) Enable Input clamp voltage High-level High level output voltage Low-level Low level output voltage High-impedance-state output current Line input current High-level enable input current Low-level enable input current Input resistance Short-circuit output current Supply current (total package) No load Outputs enabled Outputs disabled II = 18 mA VID = 200 mV, , See Figure 2 VID = 200 mV, , See Figure 2 VO = 0.4 V to 2.4 V Other input = 0 V, , See Note 6 VIH = 2.7 V VIL = 0.4 V VI = 12 V 12 15 42 26 85 55 35 VI = 12 V VI = 7 V IOH = 400 , A, IOL = 8 mA, , 2.7 27 0.45 0 45 20 1 0.8 20 100 VO = 2.7 V, VO = 0.5 V, TEST CONDITIONS IO = 0.4 mA IO = 8 mA MIN 0.2 50 1.5 TYP MAX 0.2 UNIT V V mV V V V A mA A A k mA mA

All typical values are at VCC = 5 V, TA = 25C. The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE 6: This applies for both power on and power off. Refer to EIA Standard TIA/EIA-485-A for exact conditions.

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25C
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level TEST CONDITIONS VID = 0 to 3 V See Figure 6 V, See Figure 7 See Figure 7 MIN TYP 21 23 10 12 20 17 MAX 35 35 20 20 35 25 UNIT ns ns ns ns ns ns

PARAMETER MEASUREMENT INFORMATION

RL VOD2 2 RL 2 VOC

VID VOH VOL +IOL IOH

Figure 1. Driver VOD and VOC

Figure 2. Receiver VOH and VOL
3V Input CL = 50 pF (see Note A) Output td(OD) Output 50% 10% 90% 1.5 V 1.5 V 0V td(OD) 2.5 V 50% 10% 2.5 V tt(OD)

Generator (see Note B)

50 3V

RL = 54

tt(OD) TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .

Figure 3. Driver Test Circuit and Voltage Waveforms

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

Output S1 0 V or 3 V CL = 50 pF (see Note A) RL = 110 tPZH Output 2.3 V tPHZ VOLTAGE WAVEFORMS 0.5 V Input 1.5 V 1.5 V

3V 0V VOH Voff 0 V

Generator (see Note B)

50

TEST CIRCUIT

NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .

Figure 4. Driver Test Circuit and Voltage Waveforms
5V RL = 110 Output tPZL CL = 50 pF (see Note A) 50 Output 2.3 V tPLZ 5V 0.5 V VOL Input 1.5 V 1.5 V 0V

3V

S1 3 V or 0 V

Generator (see Note B)

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .

Figure 5. Driver Test Circuit and Voltage Waveforms
3V Generator (see Note B) 51 1.5 V CL = 15 pF (see Note A) 0V Output Input 1.5 V 1.5 V 0V tPLH Output tPHL VOH 1.3 V 1.3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .

Figure 6. Receiver Test Circuit and Voltage Waveforms

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

PARAMETER MEASUREMENT INFORMATION
1.5 V 1.5 V S1 2 k S2 5V

CL = 15 pF (see Note A) Generator (see Note B) 50

5 k

1N916 or Equivalent

S3 TEST CIRCUIT 3V Input 1.5 V 0V tPZH VOH Output 1.5 V 0V Output 1.5 V VOL 4.5 V S1 to 1.5 V S2 Open S3 Closed Input 3V 1.5 V 0V tPZL S1 to 1.5 V S2 Closed S3 Open

3V Input 1.5 V 0V tPHZ VOH Output 1.3 V VOLTAGE WAVEFORMS 0.5 V tPLZ 0.5 V Output S1 to 1.5 V S2 Closed S3 Closed Input 1.5 V

3V S1 to 1.5 V S2 Closed S3 Closed 0V

1.3 V VOL

NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .

Figure 7. Receiver Test Circuit and Voltage Waveforms

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POST OFFICE BOX 655303

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

TYPICAL CHARACTERISTICS
DRIVER DRIVER

HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 VOH VOH High-Level Output Voltage V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 20 40 60 80 100 IOH High-Level Output Current mA 120 VCC = 5 V TA = 25C VOL Low-Level Output Voltage V 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0

LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
VCC = 5 V TA = 25C

20 40 60 80 100 IOL Low-Level Output Current mA

120

Figure 8
DRIVER

Figure 9
DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT
4 VCC = 5 V TA = 25C

VOD VOD Differential Output Voltage V

3.5 3 2.5 2 1.5 1 0.5 0

0

10

20

30 40 50 60 70 80 IO Output Current mA

90 100

Figure 10

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

TYPICAL CHARACTERISTICS
RECEIVER RECEIVER

HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 4.5 VOH VOH High-Level Output Voltage V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 5 10 15 20 25 30 35 40 45 50 IOH High-Level Output Current mA VCC = 4.75 V VCC = 5.25 V VCC = 5 V VID = 0.2 V TA = 25C VOH VOH High-Level Output Voltage V

HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 40 VCC = 5 V VID = 200 mV IOH = 440 A

20

0

20

40

60

80

100

120

TA Free-Air Temperature C Only the 0C to 70C portion of the curve applies to the SN75176B.

Figure 11
RECEIVER

Figure 12
RECEIVER

LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
0.6 VOL VOL Low-Level Output Voltage V VCC = 5 V TA = 25C VOL VOL Low-Level Output Voltage V 0.6

LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
VCC = 5 V VID = 200 mV IOL = 8 mA

0.5

0.5

0.4

0.4

0.3

0.3

0.2

0.2

0.1

0.1

0 0 5 10 15 20 25 30 IOL Low-Level Output Current mA

0 40

20

0

20

40

60

80

100

120

TA Free-Air Temperature C

Figure 13

Figure 14

10

POST OFFICE BOX 655303

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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B JULY 1985 REVISED JUNE 1999

TYPICAL CHARACTERISTICS
RECEIVER RECEIVER

OUTPUT VOLTAGE vs ENABLE VOLTAGE
5 VID = 0.2 V Load = 8 k to GND TA = 25C 6

OUTPUT VOLTAGE vs ENABLE VOLTAGE
VCC = 5.25 V VID = 0.2 V Load = 1 k to VCC TA = 25C VCC = 5 V

4 VO VO Output Voltage V

VCC = 5.25 V VO VO Output Voltage V

5 VCC = 4.75 V 4

3

VCC = 5 V

VCC = 4.75 V

3

2

2

1

1

0 0 0.5 1 1.5 2 2.5 3 VI Enable Voltage V

0 0 0.5 1 1.5 2 2.5 3 VI Enable Voltage V

Figure 15

Figure 16

APPLICATION INFORMATION
SN65176B SN75176B RT RT SN65176B SN75176B

Up to 32 Transceivers

NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible.

Figure 17. Typical Application Circuit

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